A method and device for adjusting the gear of a phase-controlled arc suppression coil

Abstract

The present invention discloses a method and device for adjusting the tap of a phase-controlled arc suppression coil. The present invention belongs to the technical field of power grid control. Specifically, it provides a method for adjusting the tap of the arc suppression coil by taking the three-phase voltage as a reference. Compared with the traditional thyristor conduction angle control method, it does not rely on the zero-crossing detection at both ends of the arc suppression coil. The locked-phase output of UA is obtained by locking the phase of the three-phase voltage. According to the locked-phase output period of UA, the sampling of U0 for one cycle is carried out, and at the same time, the initial phase of UA corresponding to this cycle is obtained. The initial phase of U0 corresponding to this cycle is obtained through DFT, and then the phase difference between UA and U0 is obtained. The position of the conduction angle found by originally detecting the zero-crossing of U0 is converted into finding the position of the conduction angle on the locked-phase output of UA. The tap adjustment can be reliably carried out even when the harmonic current is large and the zero-sequence voltage waveform distortion is serious.

Description

Technical Field

[0001] The present invention belongs to the technical field of power grid control, and specifically refers to a method and device for adjusting the gear of a phase-controlled arc suppression coil. Background Art

[0002] The traditional triggering method of the thyristor conduction angle is to control the compensation current of the arc suppression coil by controlling the thyristor conduction angle. The U0 voltage is obtained through a potential transformer (PT), and then the zero-crossing point of U0 is obtained through zero-crossing detection. The delay time of the target conduction angle is calculated based on the zero-crossing point, and then the thyristor is triggered to conduct at this moment with a delay to generate an inductive current to achieve the purpose of arc suppression. Therefore, the accuracy of zero-crossing detection affects the accuracy of thyristor control.

[0003] The current flowing through the thyristor contains a large amount of odd harmonics mainly composed of the third and fifth harmonics. The filtering winding forms a harmonic low-impedance loop to prevent a large amount of harmonic current from entering the power grid. If the third and fifth harmonic resonances occur due to the grid grounding capacitance and the primary leakage reactance of the phase-controlled arc suppression coil, a large amount of third and fifth harmonics will enter the power grid, resulting in serious distortion of the U0 voltage waveform collected by the PT, thus making the zero-crossing detection inaccurate and causing problems in thyristor control. Summary of the Invention

[0004] In view of the above situation, to overcome the defects of the prior art, the present invention provides a method and device for adjusting the gear of a phase-controlled arc suppression coil to solve the problem of inaccurate control of the phase-controlled arc suppression coil caused by waveform distortion at both ends of the phase-controlled arc suppression coil.

[0005] The technical solution adopted by this application is as follows:

[0006] This solution provides a device for adjusting the gear of a phase-controlled arc suppression coil, which includes an arc suppression coil, a drive circuit, and a gear adjustment device composed of a processor. The gear adjustment device is used to select the adjustment method of the arc suppression coil and process data;

[0007] The arc suppression coil includes a primary winding and two secondary windings. The secondary windings include a filtering winding and a control winding;

[0008] The primary winding is connected between the neutral point of the transformer and the ground;

[0009] The first secondary winding is connected to a filtering circuit. The filtering circuit includes a third-harmonic filtering branch and a fifth-harmonic filtering branch that are respectively connected in parallel at both ends of the first secondary winding. The third-harmonic filtering branch and the fifth-harmonic filtering branch are respectively a series-connected capacitor and inductor branch;

[0010] The second secondary winding is connected to a thyristor control loop composed of two antiparallel thyristors. The gear adjustment device does not depend on the zero-crossing point of the voltage across the arc suppression coil, and outputs pulses to the processor through phase-locked loop. The processor outputs a control signal to the drive circuit, and the drive circuit is connected to the two thyristors of the thyristor control loop to control the conduction state of the thyristor.

[0011] Preferably, the adjustment method of the gear adjustment device specifically includes the following steps:

[0012] S1: Sample the three-phase grid voltages UA, UB, and UC through a potential transformer (PT), and set a reference voltage based on the three-phase voltages. Among them, the stable voltage in the grid is used as the reference voltage, preferably the positive-sequence component of the three-phase voltages. Subsequently, perform PLL phase-locking processing on the three-phase voltages, and the output after phase-locking is , obtain the phase-locked output waveform, and use the phase-locked output as the reference phase;

[0013] S2: Sample the voltage U0 at the primary side of the arc suppression coil through a potential transformer (PT), perform fundamental wave extraction processing (such as Fourier transform, etc.) on the U0 voltage to obtain the initial phase of the fundamental wave of U0, and calculate the phase difference between the reference voltage and the U0 voltage ;

[0014] S3: The controller issues a target conduction angle θcmd, which is processed through proportional-integral to obtain a reference conduction angle θref. Find the angle where the conduction angle position is in the phase-locked output waveform, and send a pulse to control the thyristor to conduct.

[0015] Preferably, the specific steps of S3 include the following:

[0016] S3.1 Based on the phase-locked output as the reference, calculate the reference output angle at the beginning of each cycle. When the processor issues a pulse to control the target conduction angle to be θcmd (the range of θcmd is π / 2~π), select the initial value angle and obtain the reference conduction angle θref in a proportional-integral processing manner towards the target conduction angle θcmd. The range of the initial value angle is π / 2~π, and preferably, the initial value is π / 2 and integrated towards the target conduction angle θcmd to obtain the reference conduction angle θref;

[0017] S3.2 Make the vertical coordinate of the phase-locked output in the current cycle be and issue a pulse to control the thyristor output. Then, at the beginning of each cycle (i.e., when the vertical coordinate of the phase-locked output is 0), repeat the above process to make the output angle approach the target conduction angle starting from π / 2 for output.

[0018] Preferably, the phase difference is calculated and updated at least 3 times in each phase-locked output cycle.

[0019] With the above solution, the beneficial effects achieved by the present invention are as follows:

[0020] 1. By using the method with three-phase voltage as the reference, it does not rely on the zero-crossing point of the voltage across the arc suppression coil, avoiding the control problems caused by inaccurate zero-crossing detection due to voltage distortion across the arc suppression coil.

[0021] 2. Through three-phase voltage phase-locking, the phase-locked output of UA is obtained as the reference, and through fundamental wave extraction processing of U0, the initial fundamental wave phase of U0 is obtained. Furthermore, the phase difference between UA and U0 is obtained, solving the problem that the waveform on U0 is prone to distortion and it is difficult to find the target conduction angle. The target conduction angle control is transferred from finding the target conduction angle on U0 to the more stable phase-locked output of UA, avoiding the problems brought by using U0 zero-crossing detection in the traditional process; in the way of generating pulses by approaching the target conduction angle proportionally and integrally from 90°, the coil is controlled starting from full conduction, which can effectively avoid resonance between the coil and the ground capacitance.

[0022] 3. This solution can also reliably adjust the gear position when the harmonic current is large and the zero-sequence voltage waveform is severely distorted, ensuring the control accuracy and stability of the arc suppression coil. Description of the Drawings

[0023] Figure 1 is the overall flowchart of a gear position adjustment method for a phase-controlled arc suppression coil provided by this solution;

[0024] Figure 2 is the output waveform after three-phase voltage phase-locking in this solution;

[0025] Figure 3 is the schematic diagram of a gear position adjustment device for a phase-controlled arc suppression coil provided by this solution. Detailed Embodiments

[0026] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings in the embodiments of the present invention.

[0027] Embodiment 1:

[0028] Please refer to Figure 1 as shown, this embodiment provides a gear position adjustment method for a phase-controlled arc suppression coil, including the following steps:

[0029] S1: Obtain the three-phase grid voltages UA, UB, and UC through PT sampling, set a reference voltage based on the three-phase voltage, and then perform PLL phase-locking processing on the three-phase voltage. The output after phase-locking is , obtaining the phase-locked output waveform, and using the phase-locked output as the reference phase;

[0030] Among them, the stable voltage in the power grid is used as the reference voltage. In this embodiment, the positive sequence component of the three-phase voltage is preferably used as the reference voltage;

[0031] S2: Sample the primary side voltage U0 of the arc suppression coil through the potential transformer PT, perform fundamental wave extraction processing on the U0 voltage to obtain the initial phase of the fundamental wave of U0, and calculate the phase difference between the reference voltage and the U0 voltage ;

[0032] S3: The controller issues the target conduction angle θcmd, which is processed by proportional-integral to obtain the reference conduction angle θref, and finds the angle where the conduction angle position is in the phase-locked output waveform, and sends a pulse to control the thyristor to conduct.

[0033] Combined with Figure 1 shown, UA, UB, and UC are the three-phase voltages of the power grid obtained by PT sampling, PLL is phase-locked processing, is the output after the three-phase voltage is phase-locked, U0 is the sampling value of the primary side voltage of the arc suppression coil by PT, DFT is discrete Fourier processing, is the phase difference between U0 and UA obtained by sampling one cycle and processing through DFT based on the phase-locked reference, θcmd is the target conduction angle issued by the processor, is proportional-integral processing, with an initial value of 90°, and θref is the reference conduction angle processed by proportional-integral. is to find the angle where the angle is in the phase-locked output waveform and send a pulse to control the thyristor to conduct.

[0034] Further, use the three-phase voltages UA, UB, UC (or the voltage between two phases) for phase-locked processing to obtain the phase-locked output of UA as Figure 2 . Figure 2 provides an output waveform after three-phase voltage phase-locking. Among them, the abscissa is time and the ordinate is radian. The frequency is 50Hz and the amplitude is 2π.

[0035] Figure 2 The period duration of the sawtooth wave in is denoted as Ta, and the amplitude is 2π. Then, based on the phase-locked output waveform as the time axis, collect the U0 voltage data of one cycle (i.e., t~t + Ta) at a certain moment t, and the acquisition time length is Ta; the initial phase of UA corresponding to this cycle is the ordinate value of the phase-locked output at time t , obtain the initial phase of the fundamental wave of U0 of this cycle through fundamental wave extraction processing (such as Fourier transform) (the % is the remainder calculation).

[0036] In this embodiment, in theory, the phase difference at each sampling point can be updated by the above method at each sampling point time , but considering the processor performance, based on the phase-locked output, the phase difference is calculated and updated at least 3 times in each phase-locked output cycle .

[0037] The phase-locked output waveform and the phase difference are obtained by the above method . Based on the phase-locked output, at the beginning of each cycle, that is, when the ordinate of the phase-locked output is 0 (in actual use, at the sampling point time when the phase-locked output value changes from 2π to a value close to 0), the reference output angle is calculated: when the controller issues a pulse to control the target conduction angle to be θcmd, and the range of θcmd is π / 2~π, in a proportional-integral manner, starting from the initial value of π / 2, the reference conduction angle θref is obtained by integrating towards the target conduction angle θcmd

[0038] Make the ordinate of the phase-locked output in the current cycle At this point, a pulse is issued to control the thyristor output, and then the above process is repeated at the beginning of each cycle (that is, when the ordinate of the phase-locked output is 0), so that the output angle approaches the target conduction angle from π / 2 for output

[0039] As Figure 3 shown, a schematic diagram of a tap-changing device for a phase-controlled arc suppression coil is provided. This embodiment includes an arc suppression coil, a drive circuit, and a tap-changing device composed of a processor. The tap-changing device is used to select and process data for the adjustment method of the arc suppression coil

[0040] Among them, the arc suppression coil includes a primary winding and two secondary windings. The secondary winding includes a filtering winding and a control winding

[0041] The primary winding is connected between the neutral point of the transformer and the ground

[0042] The first secondary winding is connected to a filtering circuit. The filtering circuit includes a 3rd harmonic filtering branch and a 5th harmonic filtering branch that are respectively connected in parallel at both ends of the first secondary winding. The 3rd harmonic filtering branch and the 5th harmonic filtering branch are respectively series-connected capacitor and inductor branches

[0043] The second secondary winding is connected to a thyristor control circuit composed of two reverse-parallel thyristors. The tap-changing device does not rely on the zero-crossing point of the voltage across the arc suppression coil. A pulse is output to the processor through phase-locked output. The processor outputs a control signal to the drive circuit, and the drive circuit is connected to the two thyristors of the thyristor control circuit to control the conduction state of the thyristor

[0044] As can be seen from the figure, UA, UB, and UC are the three-phase voltages of the power grid obtained by PT sampling, CX is the system-to-ground capacitance, U0 is the voltage sampling value of the PT on the primary side of the arc suppression coil, T1 is the phase-controlled arc suppression coil; SCR is a thyristor; L3 and L5 are the 3rd and 5th filtering inductors, and C3 and C5 are the 3rd and 5th filtering capacitors.

[0045] Figure 3 In the illustrated embodiment, L3 is connected in series with C3, and L5 is connected in series with C5. The two parts are connected in parallel to the filtering winding of the arc suppression coil, and the thyristor is connected in parallel to the control winding of the coil; the primary side voltage U0 of the arc suppression coil is measured by PT sampling to obtain the three-phase voltages UA, UB, and UC through PT. The sampling is input to the processor system D, and a control signal is output to the drive circuit to drive and control the thyristor to conduct.

[0046] It should be noted that although the embodiments of the present invention have been shown and described, for those of ordinary skill in the art, without departing from the spirit of the present invention, any structural forms and embodiments designed without creativity that are similar to the technical solution should fall within the protection scope of the present invention.

Claims

1. A method for adjusting the position of a phase-controlled arc extinguishing coil, applied to a gear adjustment device of a phase-controlled arc extinguishing coil, the gear adjustment device comprising an arc extinguishing coil, a drive circuit and a processor, the gear adjustment device being used to select and process data of an adjustment mode of the arc extinguishing coil, the arc extinguishing coil comprising a primary winding and two secondary windings, the secondary winding comprising a filter winding and a control winding, characterized in that: The primary winding is connected between the transformer neutral point and ground; The first secondary winding is connected to a filter circuit, wherein the filter circuit comprises a third harmonic filter branch and a fifth harmonic filter branch respectively connected in parallel at two ends of the first secondary winding, and the third harmonic filter branch and the fifth harmonic filter branch are respectively a capacitor and an inductor branch connected in series; The second secondary winding is connected to a thyristor control loop composed of two reverse parallel thyristors. The gear adjustment device does not rely on the zero-crossing point of the voltage at both ends of the arc extinguishing coil, and outputs pulses to the processor through phase locking. The processor outputs a control signal to the drive circuit, and the drive circuit is connected to the two thyristors of the thyristor control loop to control the conduction state of the thyristor. The adjustment method of the gear position adjustment device of the phase-controlled arc-extinguishing coil comprises the following steps: S1: The three-phase voltages UA, UB, and UC of the power grid are obtained by sampling the voltage transformer, a reference voltage based on the three-phase voltage is set, and then the three-phase voltage is subjected to PLL phase-locking processing. The output after phase locking is , get the phase-locked output waveform, and take the phase-locked output as the reference phase; S2: The voltage on the primary side of the arc suppression coil is sampled by the voltage transformer to obtain the U0 voltage, the fundamental wave extraction process of the U0 voltage is performed to obtain the initial phase of the fundamental wave of U0, and the phase difference between the reference voltage and the U0 voltage is calculated. ; S3: The controller sends out the target conduction angle θcmd, and after proportional-integral processing, the reference conduction angle θref is obtained. The conduction angle position is found in the phase-locked output waveform: Angle, send pulses to control the thyristor to conduct; The specific steps of S3 include the following: S3.1 uses the phase-locked output as the reference phase and calculates the reference output angle at the beginning of each cycle. When the processor sends a pulse to control the target conduction angle to be θcmd, the range of θcmd is π / 2~π, and the initial value angle is selected to obtain the reference conduction angle θref by proportional integral processing to the target conduction angle θcmd. The initial value angle range is π / 2~π; S3.2 makes the vertical coordinate of the phase-locked output in the current cycle A pulse is sent out to control the thyristor output, and then the above process is repeated at the beginning of each cycle, so that the output angle is close to the target conduction angle from the initial value angle. The stable voltage in the power grid is used as the reference voltage.

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