Reliability test verification method for CAN bus control module in MCU

Abstract

The invention discloses a reliability test verification method for a CAN bus control module in an MCU, and relates to the field of chip test verification, and the method comprises the following steps: a CAN bus controller is integrated into the MCU through a bus interconnection mode, and the method is mainly divided into an interface management logic part, a state control logic part, an error detection logic part and an information buffer part; an MCU integrated with a CAN control module is used as a single node, a double-node frame information transmitting and receiving mode is adopted to build a test platform, a signal control module is added to apply interference to different positions where the nodes transmit the frame information, the error condition in real use is simulated, and the test efficiency is improved for different tests. And the correctness of the verification result of the CAN control module is determined by detecting the output signal of the MCU and the signal on the bus.

Description

Technical Field

[0001] The present invention relates to the field of chip testing and verification, and in particular to a reliability testing and verification method for a CAN bus control module in an MCU. Background Art

[0002] MCU (Micro Controller Unit), also known as microcontroller, is a microcomputer that integrates memory, central processing unit, and various interfaces into a chip. It has the advantages of small size and flexible operability. With the rapid development of the integrated circuit industry, automotive computer industry, industrial control, local area network and other fields, MCU will face a wider range of application scenarios, and the development towards high integration will be the key direction of MCU's future development.

[0003] Controller Area Network (CAN) is a serial communication protocol bus widely used in the automotive, automation and industrial fields. Because it uses twisted pair cables to transmit signals, it has strong anti-interference ability during the transmission of detection signals. The CAN bus independent controller chip used in the CAN protocol has a unique error management logic inside, which can detect error information in time by analyzing the interference situations in different scenarios. Therefore, the error detection function of the CAN controller well reflects its reliability in the communication process.

[0004] Integrating the CAN controller into the MCU will enrich the functionality of the MCU and make it applicable to more application scenarios. However, there is currently a lack of detailed reliability testing methods for the integrated CAN control module, and the test content cannot more accurately reflect the real application scenarios. Summary of the invention

[0005] In view of the shortcomings of the prior art mentioned above, the purpose of the present invention is to provide a reliability test and verification method for the CAN bus control module in the MCU, integrate the CAN controller into the MCU through bus interconnection, and provide a detailed description of the test method for the reliability of the CAN module.

[0006] The technical solution adopted by the present invention to achieve the above-mentioned purpose is:

[0007] A reliability test and verification system for a CAN bus control module in an MCU, comprising:

[0008] The monitoring and control platform is used to write commands and data into the MCU, read the status of the CAN and the received frame information, monitor the data information and waveform on the bus, and control the signal control module to interfere with the bus signal;

[0009] MCU1, as a sending node, is used to send frame information to the bus according to the command of the monitoring and control platform;

[0010] MCU2, as a receiving node, is used to receive and identify the frame information on the bus and give corresponding feedback according to the command of the monitoring and control platform;

[0011] A signal control module, used to send an idle signal to the bus and to interfere with different segments of the frame information sent by the node at a specified delay;

[0012] The oscillator is used to provide working clock to MCU1, MCU2 and signal control module.

[0013] The MCU1 and MCU2 are both integrated with a CAN control module through bus interconnection.

[0014] A reliability test verification method for a CAN bus control module in an MCU comprises the following steps:

[0015] 1) Write initialization configuration information;

[0016] 2) Calculate the time point Tseptal when the signal control module erroneously interferes with the frame sent by the MCU;

[0017] 3) The monitoring and control platform sends frame information to MCU1 and performs detection function tests under different error scenarios.

[0018] The step 1) is specifically as follows:

[0019] The monitoring and surveillance platform writes initialization configuration information to the corresponding addresses of the register groups in the CAN control modules of the two MCUs, and sends a bus idle signal to the bus through the signal control module.

[0020] The initialization configuration information includes: CAN working mode, bit timing configuration, acceptance filter configuration, interrupt configuration, and output control configuration.

[0021] The step 2) comprises the following steps:

[0022] 2.1) During the test, the delay Tde l ay1 from when the control platform writes a send command to MCU1 to when MCU1 sends the frame start bit is recorded and monitored by the clock;

[0023] 2.2) confirming the time Tbit of one bit in each frame according to the bit timing information of the initial configuration;

[0024] 2.3) Using the frame information written into the MCU, calculate the specific delay from the start of the frame to a certain bit of the current frame Tdel ay2 = n*Tbit, where n is the number of bits from the start of the frame to this bit;

[0025] 2.4) Calculate Tseptal = Tdelay1 + Tdelay2.

[0026] The step 3) comprises the following steps:

[0027] 3.1) According to the CAN working mode configured by initialization, the waveform of each segment of the frame information of different formats is recorded;

[0028] 3.2) Starting from the moment when the frame starts to be sent, the clock is used to calculate the delay from the start of the frame to the end of each segment. When the monitoring and control platform detects the signal waveform sent by MCU1 on the bus, the waveform generator is controlled to apply interference to different segments of the current frame according to the calculated delay Tseptal, so that the sending and receiving nodes are in different error type states;

[0029] 3.3) Verify the functionality of the error detection logic by reading the values ​​of the internal error capture, interrupt and status registers of the CAN control module in MCU1 and MCU2.

[0030] The frame information includes remote frames and data frames, and each frame information includes: a start segment, an arbitration segment, a control segment, a data segment, a CRC segment, and an ACK segment.

[0031] The present invention has the following beneficial effects and advantages:

[0032] 1. The present invention provides a reliability verification method for testing an integrated CAN control module, which uses dual MCUs as node transceivers for testing, simulating the usage scenario in real communication.

[0033] 2. The present invention controls the moment of applying interference by calculating the delay of each bit in the frame information, and conducts detailed tests on node error situations in a more flexible and comprehensive manner.

[0034] 3. The test method of the present invention is applicable to both independent CAN controllers and MCUs with integrated CAN modules. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 This is the structural block diagram of the test verification platform.

[0036] Figure 2 This is a schematic diagram for calculating the time point when the signal control module interferes with the bus.

[0037] Figure 3 The figure is a schematic diagram of the test flow for the reliability of the CAN control module. DETAILED DESCRIPTION

[0038] The present invention is further described in detail below in conjunction with the accompanying drawings and embodiments.

[0039] A reliability test and verification method for a CAN bus control module in an MCU is provided. The CAN controller is integrated into the MCU through bus interconnection, and a test method for the reliability of the CAN module is described in detail.

[0040] The present invention uses an MCU integrated with a CAN module as a node, and connects two MCUs (MCU1 and MCU2) to a bus respectively as a sending node and a receiving node to simulate a real usage scenario.

[0041] The present invention adds a monitoring control platform which is respectively connected to MCU1, MCU2 and the bus, writes operation commands to the MCU through software, reads feedback signals from the MCU and monitors data transmission on the bus to judge the functional correctness of the CAN control module.

[0042] The present invention adds a signal control module connected to the bus, and uses the same clock provided by an oscillator to ensure the timing consistency of the signal control module and the MCU. The module contains a waveform generator for writing waveforms into the data transmission process on the bus to simulate the situation in which the bus is idle and the bus is actually used and receives external interference, resulting in node transmission data errors.

[0043] The test initialization configuration method for the CAN module is as follows: the initialization configuration information is written to the corresponding address of the register group in the CAN control module of the two MCUs through the monitoring platform software, including CAN working mode (Peli CAN mode, Basic CAN mode), bit timing configuration, acceptance filter configuration, interrupt configuration, output control configuration, and then the signal control module is used to send a bus idle signal to the bus.

[0044] The communication process between simulated nodes is as follows: after the signal control module sends a bus idle signal to the bus, MCU1 is used as the sending node and MCU2 as the receiving node. According to the CAN module working mode configured by initialization, the monitoring platform software is used to write the frame information of the corresponding CAN mode to be sent to MCU1. At the same time, the monitoring platform monitors the waveform on the bus in real time to determine the time when the information is sent, or control the signal control module to interfere with the bus. After that, the monitoring platform software writes the send command to the CAN module command register inside MCU1, and MCU1 starts to send frame information.

[0045] For the detection function test of the CAN module in different error scenarios, first record the waveform of each segment (start segment, arbitration segment, control segment, data segment, CRC segment, ACK segment) of the frame information (remote frame, data frame) in different formats according to the initial configuration of the CAN working mode, start timing from the moment the frame starts to be sent, and calculate the delay from the start of the frame to the end of each segment. When the monitoring platform detects the signal waveform sent by MCU1 on the bus, control the waveform generator to apply interference to different segments of this frame according to the calculated delay, so that the sending and receiving nodes are in different error type states, and verify the function of the error detection logic by reading the values ​​of the internal error capture, interrupt and status registers of the CAN module in MCU1 and MCU2.

[0046] See also Figure 1 The embodiment of the present invention provides a test platform for testing an MCU integrated with a CAN control module, which is mainly composed of a monitoring control platform, two MCUs (MCU1, MCU2) integrated with a CAN control module, a signal control module, and an oscillator:

[0047] Among them, the monitoring and control platform is connected to two MCUs and the bus, and is used to write commands and data into the MCU through software and read the status of the CAN module and the received frame information; monitor the data information and waveform on the bus; and control the information control module to interfere with the bus signal.

[0048] The two MCUs are used as receiving and sending nodes respectively, MCU1 is used as the sending node, and MCU2 is used as the receiving node.

[0049] Among them, the signal control module is used to send an idle signal to the bus. At the same time, it can interfere with different segments of the frame information sent by the node at a specified delay to simulate different error states on the bus during actual use.

[0050] The oscillator is used to provide a working clock to MCU1, MCU2 and the signal control module, ensuring that the moment when the signal control module interferes with the bus matches the position of the set error.

[0051] See also Figure 2 The frame information sent by MCU to the bus can be divided into standard mode (Basic CAN) and extended mode (Peli CAN) according to the working mode of the CAN module. These two modes can be divided into data frames and remote frames. The data segmentation of each frame is different, and the corresponding response made by the node after detecting the error due to an error in each segment is also different. Taking the Peli CAN mode data frame with the longest frame information as an example, it can be divided into frame start segment, arbitration segment, control segment, data segment, CRC segment, ACK segment, and frame end segment.

[0052] Among them, before testing the error detection logic of the CAN module, we must first calculate the time point Tseptal when the signal control module erroneously interferes with the frame sent by the MCU. During the test, the clock recording monitoring platform first writes the send command to MCU1 to the delay Tdelay1 from MCU1 sending the frame start bit, and then the time Tbit of one bit in each frame can be confirmed according to the bit timing information of the initialization configuration. Combined with the frame information written to the MCU by the software, the specific delay Tdelay2=n*Tbit from the start of the frame to a certain bit of this frame can be calculated, where n is the number of bits from the start of the frame to this bit. From this, it can be concluded that Tseptal=Tdelay1+Tdelay2.

[0053] See also Figure 2 and Figure 3 When performing error interference test, first perform normal node communication test. After MCU1 sends out frame information, calculate the position of high-level signal in each segment according to the written frame information. Take the interference to the second high-level signal of the data segment as an example. From the format of frame information, it can be calculated that Tdelay2=1*Tbit+32*Tbit+6*Tbit+2*Tbit=41*Tbit from the start of the frame to this bit. When the monitoring platform writes the send command to MCU1, set the signal control module to write a low-level interference signal with a duration of 1*Tbit after Tseptal=Tdelay1+Tdelay2 delay. Since the bus is connected to different nodes in a wired-AND manner, the low-level interference signal will cover the original high-level signal, resulting in frame information error.

[0054] See also Figure 3 , depending on the node type and the error position on the frame information, the error types of the sending node include bit error, ACK error, and format error; the error types of the receiving node include fill error, CRC error, and format error. When the monitoring and control platform detects an error frame on the bus (6 consecutive low-level signals), the corresponding information is read from the error capture register and interrupt register of MCU1 and MCU2 respectively, and the functional correctness of the CAN module is judged according to the reaction status of the node. (Since this method is based on the same concept as the error detection logic of the CAN bus controller, the specific reaction state of the CAN module after each frame information error can refer to the test method of the independent CAN bus controller chip, which will not be repeated here).

[0055] The embodiment of the present invention provides a reliability test verification method for a CAN bus control module in an MCU. The method uses dual MCUs as node transceivers for testing, and controls the moment of applying interference by calculating the delay of each bit in the frame information, so that the node is in different error scenarios. This test method has test versatility for MCUs with integrated CAN modules or separate CAN controllers, and the test method for error scenarios is more in line with practical applications and more flexible and comprehensive.

[0056] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0057] The above embodiments are only for illustrating the technical concept and features of the present invention, and their purpose is to enable ordinary technicians in the field to understand the content of the present invention and implement it accordingly, and they cannot be used to limit the protection scope of the present invention. Any equivalent changes or modifications made based on the essence of the content of the present invention should be included in the protection scope of the present invention.

Claims

1. A reliability test and verification system for a CAN bus control module in an MCU, characterized in that: include: The monitoring and control platform is used to write commands and data into the MCU, read the status of the CAN and the received frame information, monitor the data information and waveform on the bus, and control the signal control module to interfere with the bus signal; MCU1, as a sending node, is used to send frame information to the bus according to the command of the monitoring and control platform; MCU2, as a receiving node, is used to receive and identify the frame information on the bus and give corresponding feedback according to the command of the monitoring and control platform; A signal control module, used to send an idle signal to the bus and to interfere with different segments of the frame information sent by the node at a specified delay; The oscillator is used to provide working clock to MCU1, MCU2 and signal control module.

2. A reliability test and verification system for a CAN bus control module in an MCU according to claim 1, characterized in that: The MCU1 and MCU2 are both integrated with a CAN control module through bus interconnection.

3. A reliability test verification method for a CAN bus control module in an MCU, characterized in that: The following steps are involved: 1) Write initialization configuration information; 2) Calculate the time point Tseptal at which the signal control module erroneously interferes with the frame sent by the MCU; 3) The monitoring and control platform sends frame information to MCU1 and performs detection function tests under different error scenarios.

4. A reliability test verification method for a CAN bus control module in an MCU according to claim 3, characterized in that: The step 1) is specifically as follows: The monitoring and surveillance platform writes initialization configuration information to the corresponding addresses of the register groups in the CAN control modules of the two MCUs, and sends a bus idle signal to the bus through the signal control module.

5. A reliability test verification method for a CAN bus control module in an MCU according to claim 4, characterized in that: The initialization configuration information includes: CAN working mode, bit timing configuration, acceptance filter configuration, interrupt configuration, and output control configuration.

6. A reliability test verification method for a CAN bus control module in an MCU according to claim 3, characterized in that: The step 2) comprises the following steps: 2.1) During the test, the delay Tdelay1 from when the control platform writes a send command to MCU1 to when MCU1 sends the frame start bit is recorded and monitored by the clock; 2.2) confirming the time Tbit of one bit in each frame according to the bit timing information of the initial configuration; 2.3) Using the frame information written into the MCU, calculate the specific delay from the start of the frame to a certain bit of the current frame Tdelay2=n*Tbit, where n is the number of bits from the start of the frame to this bit; 2.4) Calculate Tseptal = Tdelay1 + Tdelay2.

7. A reliability test verification method for a CAN bus control module in an MCU according to claim 3, characterized in that: The step 3) comprises the following steps: 3.1) According to the CAN working mode configured by initialization, the waveform of each segment of the frame information of different formats is recorded; 3.2) Starting from the moment the frame is sent out, the clock is used to calculate the delay from the start of the frame to the end of each segment. When the monitoring and control platform detects the signal waveform sent by MCU1 on the bus, the waveform generator is controlled to apply interference to different segments of the current frame according to the calculated delay Tseptal, so that the sending and receiving nodes are in different error type states; 3.3) Verify the functionality of the error detection logic by reading the values ​​of the internal error capture, interrupt and status registers of the CAN control module in MCU1 and MCU2.

8. A reliability test verification method for a CAN bus control module in an MCU according to claim 7, characterized in that: The frame information includes remote frames and data frames, and each frame information includes: a start segment, an arbitration segment, a control segment, a data segment, a CRC segment, and an ACK segment.

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