Formation method of semiconductor structure

Abstract

A forming method of a semiconductor structure comprises the following steps: providing a substrate; forming an initial embedded layer in the substrate, wherein the initial embedded layer is internally provided with doped ions; and performing annealing treatment on the initial embedded layer to form the embedded layer, wherein gas for annealing treatment comprises inert gas and hydrogen or isotope gas of inert gas and hydrogen. The gas for annealing treatment does not contain oxygen, so that the initial embedded layer is not excessively consumed, and the surface of the embedded layer is not obviously sunken. In addition, suspension bonds exist on the surface of the substrate made of the silicon material, hydrogen atoms can be combined with the suspension bonds after entering silicon crystals by adopting hydrogen annealing, and therefore the purpose of eliminating the interface state is achieved. Compared with the hydrogen element, the bond energy between the isotope of hydrogen and the silicon is larger, so that the hydrogen is not easy to break, and the purpose of better eliminating the interface state is achieved. In addition, high-temperature hydrogen or isotope gas annealing of hydrogen can also eliminate cavity defects on the surface and in the substrate, and the roughness of the surface of the substrate is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a method for forming a semiconductor structure. Background Art

[0002] Bipolar-Complementary Metal Oxide Semiconductor (CMOS)-Doublediffused Metal Oxide Semiconductor (DMOS, BCD, hereinafter referred to as BCD) is a System on a Chip (SoC) process that can form a smart power integrated circuit. The BCD process can produce bipolar transistors, complementary metal oxide semiconductor transistors (CMOS) and double diffused metal oxide semiconductor transistors (DMOS) on the same chip. Devices manufactured using the BCD process are widely used in power management, display drive, automotive electronics, industrial control and other fields.

[0003] The BCD process can effectively integrate power chips, which has the advantages of significantly saving packaging costs, reducing power consumption and improving system performance. As electronic products tend to be more and more high-density and miniaturized, the BCD process is increasingly used in the manufacture of semiconductor devices.

[0004] However, there are still many problems in the BCD process in the prior art. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a method for forming a semiconductor structure to improve the performance of the semiconductor structure.

[0006] In order to solve the above problems, the technical solution of the present invention provides a method for forming a semiconductor structure, including: providing a substrate; forming an initial buried layer in the substrate, wherein the initial buried layer has doped ions; annealing the initial buried layer to form a buried layer, and the gas for the annealing treatment includes an inert gas and hydrogen, or an inert gas and isotope gas of hydrogen.

[0007] Optionally, the inert gas includes argon or helium.

[0008] Optionally, the hydrogen isotope gas includes protium gas, deuterium gas or tritium gas.

[0009] Optionally, the gas flow rate of the inert gas is 15 slm to 25 slm; the gas flow rate of the hydrogen or hydrogen isotope gas is 0.5 slm to 1.5 slm.

[0010] Optionally, the process parameters of the annealing treatment include: a heating rate of 80 degrees Celsius / second to 200 degrees Celsius / second; a cooling rate of 20 degrees Celsius / second to 50 degrees Celsius / second; a reaction temperature of 1000 degrees Celsius to 1200 degrees Celsius; and a reaction time of 5 hours to 8 hours.

[0011] Optionally, the doping ion concentration in the initial buried layer is greater than 1E18atoms / cm 3 .

[0012] Optionally, the method for forming an initial buried layer in the substrate includes: forming a patterned layer on the substrate, the patterned layer exposing a portion of the top surface of the substrate; and injecting the doping ions into the substrate using the patterned layer as a mask to form the initial buried layer.

[0013] Optionally, the doping ions include: N-type ions or P-type ions; the N-type ions include: phosphorus ions, arsenic ions or antimony ions; the P-type ions include boron ions, boron fluoride ions or indium ions.

[0014] Optionally, after forming the buried layer, the method further includes: forming an epitaxial layer on the substrate.

[0015] Optionally, the process for forming the epitaxial layer includes: one or more of metal organic chemical vapor deposition, plasma enhanced chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, liquid phase epitaxy and chloride vapor phase epitaxy.

[0016] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0017] In the method for forming a semiconductor structure of the technical solution of the present invention, the initial buried layer is annealed to form the buried layer, and the gas for the annealing process includes an inert gas and hydrogen, or an inert gas and an isotope gas of hydrogen. Since the gas for the annealing process does not contain oxygen, it will not cause excessive consumption of the initial buried layer, thereby causing a significant depression on the surface of the buried layer, thereby improving the performance of the device structure subsequently formed on the buried layer.

[0018] In addition, there are dangling bonds on the surface of the silicon substrate. Using hydrogen annealing can allow hydrogen atoms to enter the silicon crystal and combine with the dangling bonds, thereby achieving the purpose of eliminating interface states. Compared with the hydrogen element, the bond energy between hydrogen isotopes and silicon is greater, and therefore less likely to break, thereby achieving the purpose of better eliminating interface states. Moreover, high-temperature hydrogen or hydrogen isotope gas annealing can also eliminate void defects on the surface and inside of the substrate and improve the roughness of the substrate surface. Therefore, annealing with hydrogen or hydrogen isotope gas can promote the elimination of native defects in the substrate, thereby improving the performance of the semiconductor structure finally formed.

[0019] Furthermore, the gas flow rate of the inert gas is 15slm to 25slm; the gas flow rate of the hydrogen or hydrogen isotope gas is 0.5slm to 1.5slm. When the gas flow rate of the hydrogen or hydrogen isotope gas is lower than 0.5slm, the proportion of hydrogen or hydrogen isotope gas is small, and the treatment effect on the depression of the surface of the buried layer is not obvious; when the gas flow rate of the hydrogen or hydrogen isotope gas is higher than 1.5slm, since hydrogen or hydrogen isotope gas is an active gas, its content is too high and it will react with silicon or natural oxide layer in a high temperature environment, thereby increasing the roughness of the surface of the silicon substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a schematic diagram of the structure of each step of a method for forming a semiconductor structure;

[0021] Figures 2 to 5 It is a structural schematic diagram of each step of the method for forming a semiconductor structure in an embodiment of the present invention. DETAILED DESCRIPTION

[0022] As described in the background art, there are still many problems in the BCD process in the prior art, which will be described in detail below with reference to the accompanying drawings.

[0023] Figure 1 The present invention is a schematic diagram of the structure of each step of a method for forming a semiconductor structure.

[0024] Please refer to Figure 1 , providing a substrate 100, forming an initial buried layer (not shown) in the substrate 100, wherein the initial buried layer has doped ions; annealing the initial buried layer to form a buried layer 101, wherein the annealing gas includes nitrogen.

[0025] In this embodiment, the material of the substrate 100 is silicon. Nitrogen reacts with silicon at high annealing temperature to produce Si3N4 particles. The Si3N4 particles adhere to the surface of the substrate 100, making the surface of the substrate 100 rough and difficult to remove.

[0026] In order to solve the above problems, a small amount of oxygen is also added to the annealing gas in the prior art. Since the reaction temperature of oxygen and silicon is lower than the reaction temperature of nitrogen and silicon, under the same conditions, silicon will preferentially react with oxygen to form a SiO2 film. It is difficult for nitrogen to penetrate the SiO2 film, thereby preventing nitrogen from reacting with silicon, reducing the generation of Si3N4 particles, and thereby improving the smoothness of the substrate surface.

[0027] In this embodiment, the buried layer 101 formed after the initial buried layer is annealed can effectively prevent the BCD transistor formed on the substrate 100 from generating a latch-up effect, thereby preventing the BCD transistor from burning out due to a short circuit. Therefore, it is required that the doping ions in the initial buried layer have the same conductivity type as the doping ions in the substrate 100, and the doping ions in the initial buried layer need to be heavily doped. The doping ion concentration in the initial buried layer is generally greater than 1E18atoms / cm 3 .

[0028] However, since the ion doping concentration is proportional to the oxidation rate, during the annealing process at a high temperature of 1100 degrees Celsius and for several hours, the heavily doped initial buried layer will consume more silicon to generate a thicker SiO2 film, resulting in a more obvious depression in the final buried layer 101, which will in turn have a greater impact on the height of the shallow trench isolation (STI) subsequently formed on the buried layer 101, thereby affecting the device performance.

[0029] On this basis, the present invention provides a method for forming a semiconductor structure, wherein the initial buried layer is annealed to form a buried layer, and the gas for the annealing treatment includes an inert gas and hydrogen, or an inert gas and an isotope gas of hydrogen. Since the gas for the annealing treatment does not contain oxygen, it will not cause excessive consumption of the initial buried layer, thereby causing a significant depression on the surface of the buried layer, thereby improving the performance of the device structure subsequently formed on the buried layer. In addition, there are dangling bonds on the surface of the substrate made of silicon material, and hydrogen annealing can allow hydrogen atoms to enter the silicon crystal and combine with the dangling bonds, thereby achieving the purpose of eliminating interface states. Compared with hydrogen element, the bond energy between hydrogen isotopes and silicon is greater, so it is less likely to break, thereby achieving the purpose of better eliminating interface states. Moreover, high-temperature hydrogen or hydrogen isotope gas annealing can also eliminate the void defects on the surface and inside of the substrate, and improve the roughness of the substrate surface. Therefore, annealing with hydrogen or hydrogen isotope gas can promote the elimination of native defects of the substrate, thereby improving the performance of the semiconductor structure finally formed.

[0030] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0031] Figures 2 to 5 It is a schematic structural diagram of each step of the method for forming a semiconductor structure in an embodiment of the present invention.

[0032] Please refer to Figure 2 , providing a substrate 200.

[0033] In this embodiment, the material of the substrate 200 is silicon, and the substrate 200 is doped with N-type ions.

[0034] In other embodiments, the material of the substrate may be germanium, silicon germanium, silicon carbide, gallium nitride, gallium arsenide, indium arsenide, indium phosphide, silicon germanium carbide, gallium arsenic phosphide, gallium indium phosphide, or a substrate containing silicon-on-insulator (SOI).

[0035] In other embodiments, the substrate may also be doped with P-type ions.

[0036] Please refer to Figure 3 , an initial buried layer 201 is formed in the substrate 200, and the initial buried layer 201 has doped ions.

[0037] In this embodiment, the method for forming an initial buried layer 201 in the substrate 200 includes: forming a patterned layer (not shown) on the substrate 200, wherein the patterned layer exposes a portion of the top surface of the substrate 200; and injecting the doped ions into the substrate 200 using the patterned layer as a mask to form the initial buried layer 201.

[0038] The doping ions include: N-type ions or P-type ions; the N-type ions include: phosphorus ions, arsenic ions or antimony ions; the P-type ions include boron ions, boron fluoride ions or indium ions.

[0039] In this embodiment, the doping ions are antimony ions.

[0040] In this embodiment, the initial buried layer 201 is subsequently annealed to form a buried layer, which can effectively prevent the BCD transistor subsequently formed on the substrate 200 from generating a latch-up effect, thereby preventing the BCD transistor from burning out due to a short circuit. Therefore, it is required that the doping ions in the initial buried layer 201 have the same conductivity type as the doping ions in the substrate 200, and the doping ions in the initial buried layer 201 need to be heavily doped.

[0041] In this embodiment, the doping ion concentration in the initial buried layer 201 is greater than 1E18atoms / cm 3 .

[0042] Please refer to Figure 4 The initial buried layer 201 is annealed to form a buried layer 202, and the annealing gas includes an inert gas and hydrogen, or an inert gas and hydrogen isotope gas.

[0043] The inert gas includes argon or helium; the hydrogen isotope gas includes protium, deuterium or tritium.

[0044] In this embodiment, the gases used in the annealing process are argon gas and deuterium gas.

[0045] The gas flow rate of the inert gas is 15slm to 25slm; the gas flow rate of the hydrogen or hydrogen isotope gas is 0.5slm to 1.5slm

[0046] In this embodiment, the gas flow rate of the argon gas is 15slm to 25slm; the gas flow rate of the deuterium gas is 0.5slm to 1.5slm. When the gas flow rate of the hydrogen or hydrogen isotope gas is lower than 0.5slm, the proportion of hydrogen or hydrogen isotope gas is small, and the treatment effect on the depression on the surface of the buried layer 202 is not obvious; when the gas flow rate of the hydrogen or hydrogen isotope gas is higher than 1.5slm, since the hydrogen or hydrogen isotope gas is an active gas, its content is too high and it will react with silicon or natural oxide layer in a high temperature environment, thereby increasing the roughness of the surface of the silicon substrate 200.

[0047] The process parameters of the annealing treatment include: a heating rate of 80 degrees Celsius / second to 200 degrees Celsius / second; a cooling rate of 20 degrees Celsius / second to 50 degrees Celsius / second; a reaction temperature of 1000 degrees Celsius to 1200 degrees Celsius; and a reaction time of 5 hours to 8 hours.

[0048] In this embodiment, the process parameters of the annealing treatment include: a heating rate of 80 degrees Celsius; a cooling rate of 30 degrees Celsius / second; a reaction temperature of 1100 degrees Celsius; and a reaction time of 6 hours.

[0049] In this embodiment, since the annealing gas does not contain oxygen, it will not cause excessive consumption of the initial buried layer 201, thereby causing obvious depressions on the surface of the buried layer 202, thereby improving the performance of the device structure subsequently formed on the buried layer 202.

[0050] In addition, there are dangling bonds on the surface of the silicon substrate 200. The use of hydrogen annealing can allow hydrogen atoms to enter the silicon crystal and combine with the dangling bonds, thereby achieving the purpose of eliminating interface states. Compared with the hydrogen element, the bond energy between hydrogen isotopes and silicon is greater, and therefore less likely to break, thereby achieving the purpose of better eliminating interface states. Moreover, high-temperature hydrogen or hydrogen isotope gas annealing can also eliminate void defects on the surface and inside of the substrate 200 and improve the roughness of the surface of the substrate 200. Therefore, the use of hydrogen or hydrogen isotope gas for annealing can promote the elimination of native defects of the substrate 200, thereby improving the performance of the semiconductor structure finally formed.

[0051] In this embodiment, the buried layer is the initial stage of the BCD process and is used to place the subsequently formed BCD transistor to generate a latch-up effect, thereby preventing the BCD transistor from burning out due to a short circuit.

[0052] Please refer to Figure 5 After forming the buried layer 202 , the method further includes: forming an epitaxial layer 203 on the substrate 200 .

[0053] In this embodiment, the epitaxial layer 203 provides a foundation for a BCD transistor (not shown) and an isolation structure (not shown) to be formed subsequently.

[0054] In this embodiment, the epitaxial layer 203 is an N-type epitaxial layer; in other embodiments, the epitaxial layer may also be a P-type epitaxial layer.

[0055] The formation process of the epitaxial layer 203 includes: one or more of metalorganic chemical vapor deposition (MOCVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), liquid phase epitaxy (LPE) and chloride-vapor phase epitaxy (Cl-VPE).

[0056] In this embodiment, the epitaxial layer 203 is formed by a metal organic chemical vapor deposition method.

[0057] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: providing a substrate; forming an initial buried layer in the substrate, wherein the initial buried layer has doping ions; The initial buried layer is annealed to form a buried layer, and the annealing gas includes an inert gas and hydrogen, or an inert gas and hydrogen isotope gas.

2. The method for forming a semiconductor structure according to claim 1, wherein: The inert gas includes argon or helium.

3. The method for forming a semiconductor structure according to claim 1, wherein: The hydrogen isotope gas includes protium gas, deuterium gas or tritium gas.

4. The method for forming a semiconductor structure according to claim 1, wherein: The gas flow rate of the inert gas is 15 slm to 25 slm; the gas flow rate of the hydrogen or hydrogen isotope gas is 0.5 slm to 1.5 slm.

5. The method for forming a semiconductor structure according to claim 1, wherein: The process parameters of the annealing treatment include: a heating rate of 80 degrees Celsius / second to 200 degrees Celsius / second; a cooling rate of 20 degrees Celsius / second to 50 degrees Celsius / second; a reaction temperature of 1000 degrees Celsius to 1200 degrees Celsius; and a reaction time of 5 hours to 8 hours.

6. The method for forming a semiconductor structure according to claim 1, wherein: The doping ion concentration in the initial buried layer is greater than 1E18atoms / cm 3 .

7. The method for forming a semiconductor structure according to claim 1, wherein: The method for forming an initial buried layer in the substrate comprises: forming a patterned layer on the substrate, wherein the patterned layer exposes a portion of the top surface of the substrate; and injecting the doping ions into the substrate using the patterned layer as a mask to form the initial buried layer.

8. The method for forming a semiconductor structure according to claim 1, wherein: The doping ions include: N-type ions or P-type ions; the N-type ions include: phosphorus ions, arsenic ions or antimony ions; The P-type ions include boron ions, boron fluoride ions or indium ions.

9. The method for forming a semiconductor structure according to claim 1, wherein: After forming the buried layer, the method further includes: forming an epitaxial layer on the substrate.

10. The method for forming a semiconductor structure according to claim 9, wherein: The epitaxial layer formation process includes: one or more of metal organic chemical vapor deposition, plasma enhanced chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, liquid phase epitaxy and chloride vapor phase epitaxy.

Images