Methods for forming semiconductor structures

Abstract

A method for forming a semiconductor structure includes: providing a substrate; forming an initial buried layer within the substrate, the initial buried layer containing doped ions; and annealing the initial buried layer to form a buried layer, wherein the annealing gas includes an inert gas and hydrogen, or an inert gas and a hydrogen isotope gas. Since the annealing gas does not contain oxygen, it does not cause excessive consumption of the initial buried layer, thus preventing significant surface depressions. Furthermore, silicon substrates have dangling bonds on their surface; hydrogen annealing allows hydrogen atoms to enter the silicon crystal and bind to these dangling bonds, thereby eliminating interface states. Compared to elemental hydrogen, hydrogen isotopes have higher bond energies with silicon, making them less prone to breakage and thus better eliminating interface states. Moreover, high-temperature hydrogen or hydrogen isotope gas annealing can also eliminate surface and internal voids and defects in the substrate, improving surface roughness.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method for forming a semiconductor structure. Background Technology

[0002] Bipolar-Complementary Metal Oxide Semiconductor (CMOS)-Doublediffused Metal Oxide Semiconductor (DMOS) (BCD) is a system-on-a-chip (SoC) process that enables the fabrication of smart power integrated circuits. BCD technology can fabricate bipolar transistors, CMOS transistors, and DMOS transistors on the same chip. Devices manufactured using BCD technology are widely used in power management, display drivers, automotive electronics, and industrial control.

[0003] BCD technology can effectively integrate power chips, and it has advantages such as significantly saving packaging costs, reducing power loss and improving system performance. As electronic products become increasingly dense and miniaturized, BCD technology is also being used more and more often in the manufacture of semiconductor devices.

[0004] However, there are still many problems in the existing BCD process. Summary of the Invention

[0005] The technical problem solved by this invention is to provide a method for forming a semiconductor structure to improve the performance of the semiconductor structure.

[0006] To address the aforementioned problems, the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming an initial buried layer within the substrate, the initial buried layer containing doped ions; and annealing the initial buried layer to form a buried layer, wherein the annealing gas includes an inert gas and hydrogen, or an inert gas and an isotope gas of hydrogen.

[0007] Optionally, the inert gas includes argon or helium.

[0008] Optionally, the hydrogen isotope gas includes protium, deuterium, or tritium.

[0009] Optionally, the flow rate of the inert gas is 15 slm to 25 slm; the flow rate of the hydrogen or hydrogen isotope gas is 0.5 slm to 1.5 slm.

[0010] Optionally, the process parameters for the annealing treatment include: a heating rate of 80°C / second to 200°C / second; a cooling rate of 20°C / second to 50°C / second; a reaction temperature of 1000°C to 1200°C; and a reaction time of 5 hours to 8 hours.

[0011] Optionally, the dopant ion concentration in the initial buried layer is greater than 1E18 atoms / cm². 3 .

[0012] Optionally, the method of forming an initial buried layer in the substrate includes: forming a patterned layer on the substrate, the patterned layer exposing a portion of the top surface of the substrate; and implanting the dopant ions into the substrate using the patterned layer as a mask to form the initial buried layer.

[0013] Optionally, the doped ions include: N-type ions or P-type ions; the N-type ions include: phosphorus ions, arsenic ions or antimony ions; the P-type ions include: boron ions, boron-fluorine ions or indium ions.

[0014] Optionally, after forming the buried layer, the method further includes forming an epitaxial layer on the substrate.

[0015] Optionally, the epitaxial layer formation process includes one or more of the following: metal-organic chemical vapor deposition, plasma-enhanced chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, liquid phase epitaxy, and chloride vapor phase epitaxy.

[0016] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0017] In the semiconductor structure formation method of the present invention, the initial buried layer is annealed to form a buried layer. The annealing gas includes an inert gas and hydrogen, or an inert gas and an isotope gas of hydrogen. Since the annealing gas does not contain oxygen, it will not cause excessive consumption of the initial buried layer, thereby preventing significant depressions on the surface of the buried layer and improving the performance of the device structure subsequently formed on the buried layer.

[0018] Furthermore, the silicon substrate surface contains dangling bonds. Hydrogen annealing allows hydrogen atoms to enter the silicon crystal and bond with these dangling bonds, thereby eliminating interface states. Compared to elemental hydrogen, hydrogen isotopes have higher bond energies with silicon, making them less prone to breakage and thus more effectively eliminating interface states. Moreover, high-temperature hydrogen or hydrogen isotope gas annealing can eliminate voids and defects on the substrate surface and within the substrate, improving surface roughness. Therefore, annealing with hydrogen or hydrogen isotope gas can promote the elimination of intrinsic defects in the substrate, thereby improving the performance of the final semiconductor structure.

[0019] Furthermore, the flow rate of the inert gas is 15 slm to 25 slm; the flow rate of the hydrogen or hydrogen isotope gas is 0.5 slm to 1.5 slm. When the flow rate of the hydrogen or hydrogen isotope gas is less than 0.5 slm, the proportion of hydrogen or hydrogen isotope gas is relatively small, and the effect on treating the surface depressions of the buried layer is not obvious. When the flow rate of the hydrogen or hydrogen isotope gas is greater than 1.5 slm, since hydrogen or hydrogen isotope gas is a reactive gas, its excessive content and complex reactions with silicon or natural oxide layers under high temperature conditions will increase the surface roughness of the silicon substrate. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the steps involved in forming a semiconductor structure.

[0021] Figures 2 to 5 This is a schematic diagram of the steps in the method for forming a semiconductor structure in an embodiment of the present invention. Detailed Implementation

[0022] As described in the background section, there are still many problems in the existing BCD process. These will be explained in detail below with reference to the accompanying drawings.

[0023] Figure 1 This is a schematic diagram of the steps involved in forming a semiconductor structure.

[0024] Please refer to Figure 1 A substrate 100 is provided, and an initial buried layer (not shown) is formed in the substrate 100, the initial buried layer having doped ions; the initial buried layer is annealed to form a buried layer 101, the annealing gas including nitrogen.

[0025] In this embodiment, the substrate 100 is made of silicon. Nitrogen reacts with silicon at the high temperature of annealing to produce Si3N4 particles. The Si3N4 particles adhere to the surface of the substrate 100, making the surface of the substrate 100 rough and difficult to remove.

[0026] To address the aforementioned issues, existing technologies incorporate a small amount of oxygen into the annealing gas. Since the reaction temperature between oxygen and silicon is lower than that between nitrogen and silicon, silicon will preferentially react with oxygen to form a SiO2 film under the same conditions. Nitrogen gas has difficulty penetrating the SiO2 film, thus preventing the reaction between nitrogen and silicon, reducing the formation of Si3N4 particles, and thereby improving the smoothness of the substrate surface.

[0027] In this embodiment, the buried layer 101 formed after annealing the initial buried layer can effectively prevent the latch-up effect of the BCD transistors formed on the substrate 100, thereby avoiding the BCD transistors from burning out due to short circuits. Therefore, the dopant ions in the initial buried layer need to have the same conductivity type as the dopant ions in the substrate 100, and the dopant ions in the initial buried layer need to be heavily doped, typically exceeding 1E18 atoms / cm². 3 .

[0028] However, since the ion doping concentration is proportional to the oxidation rate, the initial buried layer with a heavy doping concentration will consume more silicon and generate a thicker SiO2 film during the annealing process at a high temperature of 1100 degrees Celsius for several hours. This results in a more obvious depression in the final buried layer 101, which will have a significant impact on the height of the shallow trench isolation (STI) subsequently formed on the buried layer 101, thereby affecting the device performance.

[0029] Based on this, the present invention provides a method for forming a semiconductor structure, wherein an initial buried layer is annealed to form a buried layer. The annealing gas includes an inert gas and hydrogen, or an inert gas and a hydrogen isotope gas. Since the annealing gas does not contain oxygen, it does not cause excessive consumption of the initial buried layer, thus preventing significant surface depressions and improving the performance of the device structure subsequently formed on the buried layer. Furthermore, the silicon substrate surface contains dangling bonds. Annealing with hydrogen allows hydrogen atoms to enter the silicon crystal and combine with these dangling bonds, thereby eliminating interface states. Compared to elemental hydrogen, hydrogen isotopes have higher bond energies with silicon, making them less prone to breakage and thus better eliminating interface states. Moreover, high-temperature hydrogen or hydrogen isotope gas annealing can also eliminate voids and defects on the substrate surface and internally, improving the surface roughness of the substrate. Therefore, annealing with hydrogen or hydrogen isotope gas can promote the elimination of intrinsic defects in the substrate, thereby improving the performance of the final semiconductor structure.

[0030] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0031] Figures 2 to 5 This is a schematic diagram of the steps in the method for forming a semiconductor structure in an embodiment of the present invention.

[0032] Please refer to Figure 2 Substrate 200 is provided.

[0033] In this embodiment, the substrate 200 is made of silicon and is doped with N-type ions.

[0034] In other embodiments, the substrate material may be germanium, silicon germanium, silicon carbide, gallium nitride, gallium arsenide, indium arsenide, indium phosphide, silicon germanium carbide, gallium arsenide phosphide, indium gallium phosphide, or a substrate containing a silicon-on-insulator (SOI) layer.

[0035] In other embodiments, the substrate may also be doped with P-type ions.

[0036] Please refer to Figure 3 An initial buried layer 201 is formed within the substrate 200, and the initial buried layer 201 contains doped ions.

[0037] In this embodiment, the method for forming an initial buried layer 201 in the substrate 200 includes: forming a patterned layer (not shown) on the substrate 200, the patterned layer exposing a portion of the top surface of the substrate 200; and implanting the dopant ions into the substrate 200 using the patterned layer as a mask to form the initial buried layer 201.

[0038] The doped ions include: N-type ions or P-type ions; the N-type ions include: phosphorus ions, arsenic ions or antimony ions; the P-type ions include: boron ions, boron-fluorine ions or indium ions.

[0039] In this embodiment, the doping ion is an antimony ion.

[0040] In this embodiment, the initial buried layer 201 is subsequently annealed to form a buried layer. This buried layer effectively prevents the latch-up effect of the BCD transistors subsequently formed on the substrate 200, thereby avoiding burnout due to short circuits. Therefore, the dopant ions in the initial buried layer 201 need to have the same conductivity type as the dopant ions in the substrate 200, and the dopant ions in the initial buried layer 201 need to be heavily doped.

[0041] In this embodiment, the dopant ion concentration in the initial buried layer 201 is greater than 1E18 atoms / cm 3 .

[0042] Please refer to Figure 4 The initial embedded layer 201 is annealed to form the embedded layer 202. The annealing gas includes an inert gas and hydrogen, or an inert gas and hydrogen isotope gas.

[0043] The inert gas includes argon or helium; the hydrogen isotope gas includes protium, deuterium or tritium.

[0044] In this embodiment, the gases used in the annealing process are argon and deuterium.

[0045] The inert gas flow rate is 15 slm to 25 slm; the hydrogen or hydrogen isotope gas flow rate is 0.5 slm to 1.5 slm.

[0046] In this embodiment, the argon gas flow rate is 15 slm to 25 slm; the deuterium gas flow rate is 0.5 slm to 1.5 slm. When the hydrogen or hydrogen isotope gas flow rate is less than 0.5 slm, the proportion of hydrogen or hydrogen isotope gas is relatively small, and the treatment effect on the surface depression of the buried layer 202 is not obvious. When the hydrogen or hydrogen isotope gas flow rate is greater than 1.5 slm, since hydrogen or hydrogen isotope gas is an active gas, its excessive content will cause complex reactions with silicon or natural oxide layer under high temperature environment, thereby increasing the surface roughness of the silicon substrate 200.

[0047] The annealing process parameters include: a heating rate of 80°C / second to 200°C / second; a cooling rate of 20°C / second to 50°C / second; a reaction temperature of 1000°C to 1200°C; and a reaction time of 5 hours to 8 hours.

[0048] In this embodiment, the process parameters for the annealing treatment include: a heating rate of 80 degrees Celsius; a cooling rate of 30 degrees Celsius / second; a reaction temperature of 1100 degrees Celsius; and a reaction time of 6 hours.

[0049] In this embodiment, since the annealing gas does not contain oxygen, it will not cause excessive consumption of the initial embedded layer 201, thereby causing obvious depressions on the surface of the embedded layer 202, which improves the performance of the device structure subsequently formed on the embedded layer 202.

[0050] Furthermore, the silicon substrate 200 has dangling bonds on its surface. Hydrogen annealing allows hydrogen atoms to enter the silicon crystal and bond with these dangling bonds, thereby eliminating interface states. Compared to elemental hydrogen, hydrogen isotopes have higher bond energies with silicon, making them less prone to breakage and thus more effectively eliminating interface states. Moreover, high-temperature hydrogen or hydrogen isotope gas annealing can eliminate voids and defects on the surface and within the substrate 200, improving its surface roughness. Therefore, annealing with hydrogen or hydrogen isotope gas can promote the elimination of intrinsic defects in the substrate 200, thereby improving the performance of the final semiconductor structure.

[0051] In this embodiment, the buried layer is the initial stage of the BCD process and is used to prevent the subsequent BCD transistors from generating a latch-up effect, thereby avoiding the BCD transistors from burning out due to short circuits.

[0052] Please refer to Figure 5 After forming the buried layer 202, the method further includes forming an epitaxial layer 203 on the substrate 200.

[0053] In this embodiment, the epitaxial layer 203 provides the foundation for the subsequently formed BCD transistor (not shown) and isolation structure (not shown).

[0054] In this embodiment, the epitaxial layer 203 is an N-type epitaxial layer; in other embodiments, the epitaxial layer may also be a P-type epitaxial layer.

[0055] The formation process of the epitaxial layer 203 includes one or more of the following: metal-organic chemical vapor deposition (MOCVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), liquid phase epitaxy (LPE), and chloride-vapor phase epitaxy (Cl-VPE).

[0056] In this embodiment, the epitaxial layer 203 is formed using metal-organic chemical vapor deposition.

[0057] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, include: Provide substrate; An initial buried layer is formed within the substrate, and the initial buried layer contains doped ions; The initial embedded layer is annealed to form the embedded layer. The annealing gas includes an inert gas and hydrogen, or an isotope gas of an inert gas and hydrogen, and the annealing gas does not contain oxygen.

2. The method for forming a semiconductor structure as described in claim 1, characterized in that, The inert gas includes argon or helium.

3. The method for forming a semiconductor structure as described in claim 1, characterized in that, The hydrogen isotope gas includes protium, deuterium, or tritium.

4. The method for forming a semiconductor structure as described in claim 1, characterized in that, The flow rate of the inert gas is 15 slm to 25 slm; the flow rate of the hydrogen or hydrogen isotope gas is 0.5 slm to 1.5 slm.

5. The method for forming a semiconductor structure as described in claim 1, characterized in that, The annealing process parameters include: heating rate of 80°C / second to 200°C / second; cooling rate of 20°C / second to 50°C / second; reaction temperature of 1000°C to 1200°C; and reaction time of 5 hours to 8 hours.

6. The method for forming a semiconductor structure as described in claim 1, characterized in that, The dopant ion concentration in the initial buried layer is greater than 1E18 atoms / cm². 3 .

7. The method for forming a semiconductor structure as described in claim 1, characterized in that, A method for forming an initial buried layer within the substrate includes: forming a patterned layer on the substrate, the patterned layer exposing a portion of the top surface of the substrate; and implanting the dopant ions into the substrate using the patterned layer as a mask to form the initial buried layer.

8. The method for forming a semiconductor structure as described in claim 1, characterized in that, The doped ions include: N-type ions or P-type ions; the N-type ions include: phosphorus ions, arsenic ions or antimony ions; the P-type ions include: boron ions, boron-fluorine ions or indium ions.

9. The method for forming a semiconductor structure as described in claim 1, characterized in that, After forming the buried layer, the method further includes forming an epitaxial layer on the substrate.

10. The method for forming a semiconductor structure as described in claim 9, characterized in that, The epitaxial layer formation process includes one or more of the following: metal-organic chemical vapor deposition, plasma-enhanced chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, liquid phase epitaxy, and chloride vapor phase epitaxy.

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