A superconducting quantum interference device based on a josephson junction and a method of manufacturing the same

Abstract

This invention provides a superconducting quantum interference device (SQUID) based on a Josephson junction and its fabrication method. By improving the fabrication process of the Josephson junction, an organic cleaning process is added during the photoresist stripping process, which allows the sidewalls formed by continuous stacking to be removed, improving the quality of the subsequently deposited thin film. This makes the SQUID output curve less prone to resonance and improves the yield of the SQUID mass production process. Based on the traditional SQUID, this invention adds an additional Josephson junction in series or parallel to each Josephson junction to form a SQUID with four Josephson junctions, thereby obtaining a larger output voltage modulation depth. This results in higher sensitivity, lower noise, and a larger linear range for the SQUID, making the circuit less prone to lockout. It also eliminates the need for lengthy bias lines and avoids problems such as magnetic flux crosstalk and poor magnetic flux coherence, making the layout design simpler and more convenient.

Description

Technical Field

[0001] This invention belongs to the field of superconducting quantum interference devices, and in particular relates to a superconducting quantum interference device based on a Josephson junction and its fabrication method. Background Technology

[0002] A superconducting quantum interference device (SQUID) is an extremely sensitive magnetic flux sensor, available in DC SQUID and radio frequency (RF) SQUID. A DC SQUID consists of two weakly connected superconducting Josephson junctions in parallel and a superconducting ring; its magnetic field sensitivity can reach the order of fT (1 fT = 10⁻¹⁰). -15 The magnetic field detector (T) can measure all physical quantities that can be converted into magnetic flux, such as current, voltage, magnetic field, gravity and heat. Therefore, it has been widely used in the fields of astronomical observation, geophysical exploration, biomagnetic imaging and ultra-low field magnetic resonance for detecting weak magnetic signals.

[0003] Because the output voltage across a DC SQUID varies sinusoidally with magnetic flux, and its amplitude is on the order of μV, the linear range of the DC SQUID's output signal is small and very weak. Therefore, in practical applications, a corresponding readout circuit is needed to linearize the output voltage across the DC SQUID. The flux-locked loop (FLL), one of the most common SQUID readout circuits, works by using a negative feedback mechanism to maintain a constant magnetic flux within the superconducting loop. Specifically, an external input magnetic flux generates a small voltage change across the SQUID. This voltage signal is then amplified by an amplifier in the FLL circuit and converted into a current signal by an integrator. This current signal generates a feedback magnetic flux through a feedback coil and is fed back into the superconducting loop. This feedback magnetic flux is opposite in direction to the input magnetic flux, thus canceling out the input magnetic flux and maintaining a constant total magnetic flux within the superconducting loop. Within the amplifier's operating range, the FLL circuit can maintain a linear relationship between the output signal and the input flux. However, the amplifier's equivalent flux noise in the FLL circuit can overwhelm the SQUID's intrinsic flux noise, severely impacting the SQUID's high sensitivity. To reduce the impact of the amplifier's equivalent flux noise on the SQUID, the SQUID's flux-to-voltage transfer coefficient must be increased. Traditional methods for increasing the SQUID's flux-to-voltage transfer coefficient include adding positive feedback (APF) and bootstrap circuits (SBC), using parallel inductors to add flux feedback. While this increases the SQUID's flux-to-voltage transfer coefficient, it also reduces the linear range and slew rate of the FLL circuit, easily causing circuit latch-up and preventing linear output.

[0004] like Figure 1As shown in the paper "Fabrication and Testing Analysis of Series Superconducting Quantum Interference Device Arrays" published in the 70th volume, 17th issue of the *Acta Physica Sinica* in 2021, a series array configuration of SQUIDs is presented, which connects a number of SQUIDs in series to increase their signal amplification capability. However, magnetic flux crosstalk exists between each SQUID in this array configuration, and the magnetic flux pinning effect between each SQUID is also different, resulting in poor overall magnetic flux coherence of the device. Furthermore, a lengthy bias line needs to be added to the structure to provide bias current for the array configuration, making the layout design more complex. It is also difficult to guarantee the consistency of the electromagnetic environment and fabrication process for each SQUID in the array configuration.

[0005] Furthermore, during the fabrication of submicron junction SQUID, after exposure and development, due to the use of positive photoresist and issues such as film stress, the film is prone to leaving residues in the vertical direction at the edge of the pattern, thus forming sidewalls. The presence of these sidewalls can cause the subsequently deposited metal film to break at the high sidewalls, and can also cause changes in the resistivity and resistance of the resistive layer. Moreover, these sidewalls are more prone to tip discharge, making the SQUID output curve more likely to resonate, resulting in degraded device performance. Summary of the Invention

[0006] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a superconducting quantum interference device based on a Josephson junction and its fabrication method, which solves the problems in the prior art that, while improving the flux-voltage conversion coefficient of a SQUID, the linear range and slew rate of the flux-locked loop are reduced, resulting in easy circuit unlocking; the difference in flux pinning effect among each SQUID in the SQUID series array configuration and the deterioration of flux coherence of the SQUID caused by flux crosstalk between each SQUID; and the problems in the fabrication process that the SQUID output curve is prone to resonance and device performance degradation due to the presence of thin film sidewalls at the edge of the pattern.

[0007] To achieve the above and other related objectives, this invention provides a method for fabricating a superconducting quantum interference device based on a Josephson junction, comprising the following steps:

[0008] A substrate is provided, and a stacked structure comprising a first superconducting layer, an insulating material layer and a second superconducting layer stacked sequentially is formed on the surface of the substrate, wherein the first superconducting layer has a first thickness, the second superconducting layer has a second thickness, and the first thickness is greater than the second thickness.

[0009] Based on the insulating material layer and the second superconducting layer, a Josephson junction pre-junction region is defined. The insulating material layer and the second superconducting layer, excluding the Josephson junction pre-junction region, are etched to expose a portion of the first superconducting layer.

[0010] The second superconducting layer on the Josephson junction pre-junction region is etched to form a first superconducting wire strip on the insulating material layer, and the bottom electrode is etched to form a first contact hole through the bottom electrode and exposing the substrate;

[0011] A patterned first passivation layer is formed on the surface of the stacked structure, and the first passivation layer includes a first opening that exposes the first superconducting wire strip.

[0012] A patterned resistive layer is formed on the bottom electrode, and the resistive layer covers the first passivation layer inside the first contact hole;

[0013] A patterned second passivation layer is formed on the bottom electrode, the second passivation layer covers the first contact hole and the bottom electrode, and the second passivation layer includes a second opening that exposes the resistive layer;

[0014] A third superconducting layer is formed on the first superconducting strip and inside the second opening. The third superconducting layer is etched to form a top electrode and a second superconducting strip. The second superconducting strip intersects with the first superconducting strip to form the Josephson junction.

[0015] Optionally, forming a patterned first passivation layer on the surface of the stacked structure includes the following steps:

[0016] A patterned first photoresist layer is formed on the surface of the bottom electrode;

[0017] The first passivation layer is grown in the first contact hole based on the patterned first photoresist layer, and the first passivation layer is continuously deposited in the vertical direction on the sidewall of the first photoresist layer to form a sidewall.

[0018] While stripping the first photoresist layer, an organic cleaning process is added to finally form a patterned first passivation layer, which covers the substrate and the sidewall of the bottom electrode within the first contact hole.

[0019] Optionally, the width of the Josephson knot pre-junction region is greater than the width of the Josephson knot.

[0020] Optionally, the thickness of the first superconducting layer is 100–200 nm; the thickness of the second superconducting layer is 50–100 nm; and the thickness of the third superconducting layer is 300–350 nm.

[0021] Optionally, the first superconducting layer includes at least one of a niobium nitride layer and a niobium layer; the second superconducting layer includes at least one of a niobium nitride layer and a niobium layer; and the third superconducting layer includes at least one of a niobium nitride layer and a niobium layer.

[0022] Optionally, the first passivation layer includes at least one of a silicon dioxide layer and a silicon monoxide layer; the second passivation layer includes at least one of a silicon dioxide layer and a silicon monoxide layer.

[0023] Optionally, the insulating material layer includes at least one of an aluminum layer, an aluminum oxide layer, and an aluminum nitride layer, and the thickness of the insulating material layer is 1 to 5 nm.

[0024] The present invention also provides a superconducting quantum interference device based on a Josephson junction, wherein the superconducting quantum interference device comprises at least:

[0025] Substrate;

[0026] A bottom electrode is located on the substrate, and a first contact hole is formed on the surface of the bottom electrode to expose the substrate;

[0027] An insulating material layer is located on the bottom electrode;

[0028] The first superconducting wire is located on the insulating material layer;

[0029] A first passivation layer covers the substrate and the sidewall of the bottom electrode within the first contact hole, and the first passivation layer includes a first opening that exposes the first superconducting wire.

[0030] A resistive layer covering the first passivation layer within the first contact hole;

[0031] A second passivation layer covers the first contact hole and the bottom electrode, and the second passivation layer includes a second opening that exposes the resistive layer.

[0032] The second superconducting wire is located within the first opening and intersects with the first superconducting wire to form the Josephson knot. The Josephson knot includes a first Josephson knot, a second Josephson knot, a third Josephson knot, and a fourth Josephson knot with identical structures.

[0033] A top electrode, which is located within the second opening and connected to the resistive layer and the second superconducting strip.

[0034] Optionally, the first Josephson junction is connected in series with the third Josephson junction, and the second Josephson junction is connected in series with the fourth Josephson junction. The first Josephson junction and the second Josephson junction are symmetrically distributed, and the third Josephson junction and the fourth Josephson junction are symmetrically distributed. The first Josephson junction, the second Josephson junction, the third Josephson junction, the fourth Josephson junction, and the bottom electrode constitute a first superconducting ring.

[0035] Optionally, the first Josephson junction and the second Josephson junction are connected in parallel, and the third Josephson junction and the fourth Josephson junction are connected in parallel. The first Josephson junction, the second Josephson junction, and the bottom electrode form a second superconducting ring, and the third Josephson junction, the fourth Josephson junction, and the bottom electrode form a third superconducting ring.

[0036] As described above, the superconducting quantum interference device (SQUID) based on a Josephson junction and its fabrication method of the present invention improves the fabrication process of the Josephson junction by adding an organic cleaning step during the photoresist layer stripping process after the formation of the first passivation layer, resistive layer, and second passivation layer. This allows the sidewalls formed by the continuous vertical stacking during the growth of the first passivation layer, resistive layer, and second passivation layer to be completely removed, thereby improving the quality of the subsequently deposited metal thin film and making the SQUID output curve less prone to resonance, thus improving the yield of the SQUID mass production process. Furthermore, based on the traditional SQUID with two Josephson junctions, the present invention adds an additional Josephson junction in series in the branch where each Josephson junction is located. This results in a SQUID with four Josephson junctions. The four identical Josephson junctions are distributed in pairs in two superconducting rings, which increases the output voltage of the SQUID and achieves a greater output voltage modulation depth. The presence of the bottom electrode can also reduce the interference of uniform magnetic fields in the environment, improve the SQUID's anti-interference ability, and make the SQUID have higher sensitivity, lower noise and a larger linear range. This makes the circuit less prone to lockout, and at the same time, there is no need to add lengthy bias lines, and there is no need to worry about magnetic flux crosstalk and poor magnetic flux coherence. Its area and design are basically the same as the traditional SQUID with two Josephson junctions, so the layout structure design is simpler and more convenient, and it has high industrial application value. Attached Figure Description

[0037] Figure 1 This is shown as a SQUID cascade array configuration in the prior art.

[0038] Figure 2 The diagram shows an equivalent circuit of a superconducting quantum interference device based on a Josephson junction.

[0039] Figure 3 This is shown as another equivalent circuit diagram of a superconducting quantum interference device based on a Josephson junction.

[0040] Figure 4 The diagram shows the process flow of the fabrication method of the Josephson junction-based superconducting quantum interference device of the present invention.

[0041] Figure 5The diagram shown is a cross-sectional view of the fabrication method of the Josephson junction-based superconducting quantum interference device of the present invention after forming a stacked structure.

[0042] Figure 6 The diagram shows a cross-sectional structure of the Josephson junction pre-junction region and the first superconducting wire after forming the Josephson junction pre-junction region, which is a method for fabricating a superconducting quantum interference device based on a Josephson junction according to the present invention.

[0043] Figure 7 The diagram shows a cross-sectional structure after forming the bottom electrode and the first contact hole in the fabrication method of the Josephson junction-based superconducting quantum interference device of the present invention.

[0044] Figure 8 The diagram shows a cross-sectional view of the sidewall during the formation of the first passivation layer in the fabrication method of the Josephson junction-based superconducting quantum interference device of the present invention.

[0045] Figure 9 The diagram shows a cross-sectional structure after the formation of the first passivation layer and the first opening in the fabrication method of the superconducting quantum interference device based on the Josephson junction of the present invention.

[0046] Figure 10 The diagram shows a cross-sectional view of the fabrication method of the Josephson junction-based superconducting quantum interference device of the present invention after the formation of the resistive layer.

[0047] Figure 11 The diagram shows a cross-sectional structure after the formation of the second passivation layer and the second opening in the fabrication method of the superconducting quantum interference device based on the Josephson junction of the present invention.

[0048] Figure 12 The diagram shows a cross-sectional structure after forming the top electrode and the second superconducting wire in the fabrication method of the Josephson junction-based superconducting quantum interference device of the present invention.

[0049] Explanation of icon numbers

[0050] 10. Substrate; 11. First superconducting layer; 12. Insulating material layer; 13. Second superconducting layer; 14. Stacked structure; 15. Josephson junction pre-junction region; 16. Bottom electrode; 17. First contact hole; 18. First photoresist layer; 19. First superconducting wire strip; 20. First passivation layer; 21. Sidewall; 22. First opening; 23. Resistive layer; 24. Second passivation layer; 25. Second opening; 26. Top electrode; 27. Second superconducting wire strip; 28. First Josephson junction; 29. ​​Second Josephson junction; 30. Third Josephson junction; 31. Fourth Josephson junction; S1-S7, Steps. Detailed Implementation

[0051] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0052] In the detailed description of embodiments of the present invention, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged and not to scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. In actual fabrication, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0053] For ease of description, spatial relation terms such as "below," "below," "less than," "below," "above," and "upper" may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the drawings for devices in use or operation. Furthermore, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or there may be one or more layers in between. Additionally, the term "between" as used in this invention includes both endpoint values.

[0054] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are formed in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0055] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0056] Example 1

[0057] This embodiment provides a method for fabricating a superconducting quantum interference device based on a Josephson junction, such as... Figure 4 The diagram shown is a process flow chart of the fabrication method of the superconducting quantum interference device based on the Josephson junction, including the following steps:

[0058] S1: A substrate 10 is provided, and a stacked structure 14 comprising a first superconducting layer 11, an insulating material layer 12 and a second superconducting layer 13 stacked sequentially is formed on the surface of the substrate 10, wherein the first superconducting layer 11 has a first thickness, the second superconducting layer 13 has a second thickness, and the first thickness is greater than the second thickness.

[0059] S2: Define the Josephson junction pre-junction region 15 based on the insulating material layer 12 and the second superconducting layer 13, etch the insulating material layer 12 and the second superconducting layer 13 except for the Josephson junction pre-junction region 15, and expose part of the first superconducting layer 11;

[0060] S3: Etch the second superconducting layer 13 on the Josephson junction pre-junction region 15 to form a first superconducting wire strip 19 on the insulating material layer 12, and etch the first superconducting layer 11 to form a first contact hole 17 that penetrates the first superconducting layer 11 and exposes the substrate 10.

[0061] S4: A patterned first passivation layer 20 is formed on the surface of the stacked structure 14, and the first passivation layer 20 includes a first opening 22 that exposes the first superconducting wire 19.

[0062] S5: A patterned resistive layer 23 is formed on the first superconducting layer 11, and the resistive layer 23 covers the first passivation layer 20 in the first contact hole 17.

[0063] S6: A patterned second passivation layer 24 is formed on the first superconducting layer 11. The second passivation layer 24 covers the first contact hole 17 and the first superconducting layer 11, and the second passivation layer 24 includes a second opening 25 that exposes the resistive layer 23.

[0064] S7: A third superconducting layer is formed on the first superconducting strip 19 and inside the second opening 25. The third superconducting layer is etched to form a top electrode 26 and a second superconducting strip 27. The second superconducting strip 27 intersects with the first superconducting strip 19 to form the Josephson junction.

[0065] The fabrication method of the superconducting quantum interference device based on the Josephson junction is further described below with reference to the accompanying drawings:

[0066] In step S1, please refer to Figure 4 and Figure 5A substrate 10 is provided, and a stacked structure 14 comprising a first superconducting layer 11, an insulating material layer 12 and a second superconducting layer 13 stacked sequentially is formed on the surface of the substrate 10, wherein the first superconducting layer 11 has a first thickness, the second superconducting layer 13 has a second thickness, and the first thickness is greater than the second thickness.

[0067] As an example, the substrate 10 may include one of a silicon substrate, a magnesium oxide substrate, a sapphire substrate, and a silicon carbide substrate, which may be selected as needed. The substrate 10 may be a wafer-level substrate, such as a 6-inch, 8-inch, or 12-inch wafer-level substrate, or it may be an irregularly shaped substrate. The morphology and size of the substrate 10 are not excessively limited here.

[0068] As an example, the first superconducting layer 11 may include at least one of niobium nitride layer and niobium layer; that is, it may be one of them or a stacked structure 14 composed of two of them; the second superconducting layer 13 may include at least one of niobium nitride layer and niobium layer; that is, it may be one of them or a stacked structure 14 composed of two of them; in addition, the insulating material layer 12 may include at least one of aluminum layer, aluminum oxide layer and aluminum nitride layer; that is, it may be one of them or a stacked structure 14 composed of two or more of them.

[0069] In this embodiment, the first superconducting layer 11, the insulating material layer 12, and the second superconducting layer 13 can be grown using DC reactive magnetron sputtering. By adjusting the proportion of each element in the material, the first superconducting layer 11 and the second superconducting layer 13 can be made to have superconducting properties under specific conditions (e.g., at ultra-low temperatures). The materials of the first superconducting layer 11 and the second superconducting layer 13 are both commonly used NbN. The material of the insulating material layer 12 is aluminum oxide formed by oxidizing aluminum in oxygen. The oxidation time and oxidation pressure determine the thickness of the insulating material layer 12 and the critical current density of the Josephson junction formed subsequently. However, the choice of materials for the first superconducting layer 11, the insulating material layer 12, and the second superconducting layer 13 is not limited to this.

[0070] For the needs of subsequent over-etching processes, in the stacked structure 14 here, the first superconducting layer 11 and the second superconducting layer 13 have different film thicknesses, and the second superconducting layer 13 located on the upper layer is thinner than the first superconducting layer 11 located on the lower layer.

[0071] As an example, the thickness of the first superconducting layer 11 is 100-200 nm; the thickness of the second superconducting layer 13 is 50-100 nm; and the thickness of the insulating material layer 12 is 1-5 nm.

[0072] Specifically, in this embodiment, the thickness of the first superconducting layer 11 can be 100-200 nm, such as 100 nm, 150 nm, 200 nm, etc., which will not be described in detail here; the thickness of the second superconducting layer 13 can be 50-100 nm, such as 50 nm, 75 nm, 100 nm, etc., which will not be described in detail here; the thickness of the insulating material layer 12 is 1-5 nm, such as 1 nm, 3 nm, 5 nm, which will not be described in detail here.

[0073] In step S2, please refer to Figure 4 and Figure 6 Based on the insulating material layer 12 and the second superconducting layer 13, a Josephson junction pre-junction region 15 is defined. The insulating material layer 12 and the second superconducting layer 13, excluding the Josephson junction pre-junction region 15, are etched to expose a portion of the first superconducting layer 11.

[0074] In this embodiment, the position of the Josephson junction to be fabricated is predefined on the insulating material layer 12 and the second superconducting layer 13. To prevent leakage current, the width of the predefined Josephson junction pre-junction region 15 is larger than the width of the actual Josephson junction formed later. Then, the insulating material layer 12 and the second superconducting layer 13, except for the Josephson junction pre-junction region 15, are etched away using photolithography and etching techniques, thereby exposing part of the first superconducting layer 11. The method for etching the second superconducting layer 13 can be reactive ion etching, and the method for etching the insulating material layer 12 can be wet etching, but it is not limited to these methods. This step is a preliminary preparation for the actual Josephson junction to be formed later.

[0075] In step S3, please refer to Figure 4 and Figure 7 The second superconducting layer 13 on the Josephson junction pre-junction region 15 is etched to form a first superconducting wire 19 on the insulating material layer 12, and the first superconducting layer 11 is etched to form a first contact hole 17 that penetrates the first superconducting layer 11 and exposes the substrate 10.

[0076] like Figure 7As shown in Figure a, in this embodiment, a patterned first photoresist layer 18 is formed on the surface of the first superconducting layer 11 and the second superconducting layer 13. The second superconducting layer 13 on the Josephson junction pre-junction region 15 is etched to form a first superconducting wire strip 19. During the etching process, the second superconducting layer 13 on the Josephson junction pre-junction region 15 and the first superconducting layer 11 outside the Josephson junction pre-junction region 15 are etched simultaneously. However, since the thickness of the first superconducting layer 11 is greater than that of the second superconducting layer 13, the second superconducting layer 13 faces over-etching. The insulating material layer 12 on the Josephson junction pre-junction region 15 can serve as an etching barrier layer to prevent over-etching from affecting the first superconducting layer 11 under the Josephson junction pre-junction region 15. Figure 7 As shown in b, the first superconducting layer 11 is etched based on the patterned first photoresist layer 18, and a first contact hole 17 is formed on the first superconducting layer 11 outside the Josephson junction pre-junction region 15. The first contact hole 17 penetrates the first superconducting layer 11 and exposes the substrate 10. The remaining part of the first superconducting layer 11 serves as the bottom electrode 16. The shape and size of the bottom electrode 16 can be selected according to the actual situation and are not limited here.

[0077] Specifically, the method for forming the patterned first photoresist layer 18 is the process of photoresist coating, drying, exposure, and development, which will not be described in detail here.

[0078] In step S4, please refer to Figure 4 , Figure 8 and Figure 9 A patterned first passivation layer 20 is formed on the surface of the stacked structure 14, and the first passivation layer 20 includes a first opening 22 that exposes the first superconducting wire 19.

[0079] As an example, forming a patterned first passivation layer 20 on the surface of the stacked structure 14 includes the following steps: growing the first passivation layer 20 in the first contact hole 17, the first passivation layer 20 being continuously deposited in the vertical direction on the sidewall of the first photoresist layer 18 to form a sidewall 21; simultaneously peeling off the first photoresist layer 18 and performing an organic cleaning process, and finally forming the patterned first passivation layer 20, the first passivation layer 20 covering the sidewall of the substrate 10 and the bottom electrode 16 in the first contact hole 17.

[0080] Specifically, after performing step S3, the patterned first photoresist layer 18 formed on the surface of the first superconducting layer 11 and on the second superconducting layer 13 can be left unremoved, and the first passivation layer 20 can be grown immediately afterwards. Figure 8As shown, the first passivation layer 20 is continuously deposited in the vertical direction along the sidewall of the first photoresist layer 18 within the first contact hole 17 to form a sidewall 21. After the first passivation layer 20 is grown, the first photoresist layer 18 is stripped to re-expose the surface of the first superconducting wire and the surface of the bottom electrode 16.

[0081] For the sidewall 21 formed by continuous vertical deposition on the sidewall of the first photoresist layer 18, it is difficult to completely remove it under the existing ultrasonic cleaning and stripping process. The presence of the sidewall 21 will cause the subsequently deposited metal film to break at the sidewall 21, thereby causing tip discharge and device resonance.

[0082] In this embodiment, an organic cleaning process is added simultaneously with the stripping of the first photoresist layer 18, specifically as follows: During the stripping of the first photoresist layer 18, a high-pressure water jet is used to spray an organic solution capable of dissolving the first photoresist layer 18 onto the surface of a high-speed rotating substrate 10, thereby removing the residual sidewalls 21 of the first photoresist layer 18. Then, deionized water is sprayed to clean away the organic solution and impurities on the surface of the substrate 10. Finally, high-speed rotation causes the deionized water to detach from the substrate 10 under centrifugal force, thus removing the sidewalls 21. Specifically, the organic solution spraying time can be 30-90 seconds, for example: 30 seconds, 45 seconds, 60 seconds, etc., and the rotation speed is set to 3000-6000 r / s. The organic solution can be acetone or isopropanol, etc. Figure 9 As shown, after the sidewall 21 formed on the sidewall of the first photoresist layer 18 is removed, a patterned first passivation layer 20 is formed. The first passivation layer 20 covers the sidewall of the substrate 10 and the bottom electrode 16 within the first contact hole 17. At the same time, the upper surface of the first passivation layer 20 is planarized to make the upper surface of the obtained first passivation layer 20 have good flatness, providing a good process platform for the subsequent formation of the resistor layer 23, thereby improving the quality of the subsequently formed resistor layer 23. At the same time, the first passivation layer 20 can be thinned to obtain a first passivation layer 20 with a suitable thickness. The first passivation layer 20 also includes a first opening 22 formed to expose the first superconducting wire 19.

[0083] Specifically, the method for forming the first passivation layer 20 includes chemical vapor deposition, physical vapor deposition, or other suitable methods.

[0084] Specifically, the first passivation layer 20 includes at least one of silicon dioxide layer and silicon monoxide layer. The first passivation layer 20 can play a good protective role. As needed, the first passivation layer 20 can be a single layer or a stack of different materials, without excessive restrictions here.

[0085] In step S5, please refer to Figure 4 and Figure 10 A patterned resistive layer 23 is formed on the first superconducting layer 11, and the resistive layer 23 covers the first passivation layer 20 inside the first contact hole 17.

[0086] In this embodiment, a resistive layer 23 is formed on the surface of the bottom electrode 16 and on the first passivation layer 20. A patterned second photoresist layer (not shown in the figure) is formed on the upper surface of the resistive layer 23, and the resistive layer 23 is etched based on the patterned second photoresist layer to obtain the resistive layer 23. Figure 10 As shown, the resistive layer 23 covers the first passivation layer 20 inside the first contact hole 17.

[0087] Specifically, the method for forming the resistive layer 23 includes magnetron sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition, or other suitable methods.

[0088] Specifically, the etching methods for the resistive layer 23 include dry etching, wet etching, or other suitable methods. In this embodiment, in order to obtain the resistive layer 23 with a better sidewall morphology, an organic cleaning process is also required while stripping the second photoresist layer.

[0089] Specifically, the resistive layer 23 is made of molybdenum, platinum, nickel-chromium alloy, or other suitable thin-film resistive materials. In this embodiment, a molybdenum (Mo) thin film layer is used as the resistive layer 23.

[0090] Specifically, the method for forming the patterned second photoresist layer is the same as the method for forming the patterned first photoresist layer 18, and will not be described again here.

[0091] In step S6, please refer to Figure 4 and Figure 11 A patterned second passivation layer 24 is formed on the first superconducting layer 11. The second passivation layer 24 covers the first contact hole 17 and the first superconducting layer 11, and includes a second opening 25 that exposes the resistive layer 23.

[0092] Specifically, the method for forming the patterned second passivation layer 24 is the same as the method for forming the patterned first passivation layer 20, and will not be repeated here. For example... Figure 11 As shown, the formed second passivation layer 24 covers the first contact hole 17 and the bottom electrode 16, and the second passivation layer 24 includes a second opening 25 that exposes the resistive layer 23. In this embodiment, in order to obtain a second passivation layer 24 with a better sidewall morphology, an organic cleaning process is also required while stripping the photoresist layer.

[0093] In step S7, please refer to Figure 4 and Figure 12 A third superconducting layer is formed on the first superconducting strip 19 and inside the second opening 25. The third superconducting layer is etched to form a top electrode 26 and a second superconducting strip 27. The second superconducting strip 27 intersects with the first superconducting strip 19 to form the Josephson junction.

[0094] As an example, the third superconducting layer may include at least one of a niobium nitride layer and a niobium layer; that is, it may be one of them or a stacked structure 14 composed of two of them.

[0095] As an example, the thickness of the third superconducting layer is 300–350 nm.

[0096] Specifically, in this embodiment, the thickness of the third superconducting layer can be 300-350 nm, such as 300 nm, 325 nm, 350 nm, etc., which will not be elaborated here.

[0097] Specifically, for details regarding the preparation and material selection of the third superconducting layer, please refer to the above description of the first superconducting layer 11 and the second superconducting layer 13, which will not be repeated here.

[0098] Specifically, in this embodiment, in order to further reduce the size of the formed Josephson junction, it is preferable that the second superconducting wire 27 is perpendicular to the first superconducting wire 19, but the included angle between the second superconducting wire 27 and the first superconducting wire 19 is not limited to this.

[0099] This embodiment of a method for fabricating a superconducting quantum interference device based on a Josephson junction improves the fabrication process of the Josephson junction by adding an organic cleaning step during the photoresist stripping process after the formation of the first passivation layer 20, the resistive layer 23, and the second passivation layer 24. This allows the sidewalls 21 formed by the continuous vertical stacking along the sidewalls of the photoresist layer during the growth of the first passivation layer 20, the resistive layer 23, and the second passivation layer 24 to be completely removed, improving the quality of the subsequently deposited metal film. This makes the SQUID output curve less prone to resonance, thereby improving the yield of the SQUID mass production process.

[0100] Example 2

[0101] This embodiment provides a superconducting quantum interference device based on a Josephson junction. The superconducting quantum interference device includes at least: a substrate 10; a bottom electrode 16 located on the substrate 10, the surface of which has a first contact hole 17 exposing the substrate 10; an insulating material layer 12 located on the bottom electrode 16; a first superconducting wire 19 located on the insulating material layer 12; a first passivation layer 20 covering the sidewalls of the substrate 10 and the bottom electrode 16 within the first contact hole 17, the first passivation layer 20 including a first opening 22 exposing the first superconducting wire 19; and a resistive layer 23 covering the first contact hole 16. The first passivation layer 20 within the contact hole 17; a second passivation layer 24, the second passivation layer 24 covering the first contact hole 17 and the bottom electrode 16, and the second passivation layer 24 including a second opening 25 exposing the resistive layer 23; a second superconducting wire 27, located within the first opening 22, and intersecting with the first superconducting wire 19 to form the Josephson junction, the Josephson junction including a first Josephson junction 28, a second Josephson junction 29, a third Josephson junction 30 and a fourth Josephson junction 31 with identical structures; and a top electrode 26, located within the second opening 25 and connected to the resistive layer 23 and the second superconducting wire 27.

[0102] As an example, the first Josephson junction 28 is connected in series with the third Josephson junction 30, the second Josephson junction 29 is connected in series with the fourth Josephson junction 31, the first Josephson junction 28 and the second Josephson junction 29 are symmetrically distributed, the third Josephson junction 30 and the fourth Josephson junction 31 are symmetrically distributed, and the first Josephson junction 28, the second Josephson junction 29, the third Josephson junction 30 and the fourth Josephson junction 31 and the bottom electrode 16 constitute a first superconducting ring.

[0103] Specifically, such as Figure 2As shown, this is an equivalent circuit diagram of a superconducting quantum interference device based on a Josephson junction in this embodiment. In this embodiment, four identical Josephson junctions—a first Josephson junction 28, a second Josephson junction 29, a third Josephson junction 30, and a fourth Josephson junction 31—are symmetrically distributed in pairs on both sides of the bottom electrode 16 of the SQUID. The first Josephson junction 28 and the third Josephson junction 30 are connected in series with one bottom electrode 16, and the second Josephson junction 29 and the fourth Josephson junction 31 are connected in series with the other bottom electrode 16. The two bottom electrodes 16 are connected by a wire. The first Josephson junction 28, the second Josephson junction 29, the third Josephson junction 30, the fourth Josephson junction 31, and the two bottom electrodes 16 constitute a first superconducting ring, allowing the bias current to flow in from the two Josephson junctions on the same side, pass through the bottom electrode 16 of the SQUID, and then flow out from the two Josephson junctions on the other side.

[0104] As an example, the first Josephson junction 28 and the second Josephson junction 29 are connected in parallel, the third Josephson junction 30 and the fourth Josephson junction 31 are connected in parallel, the first Josephson junction 28, the second Josephson junction 29 and the bottom electrode 16 form a second superconducting ring, and the third Josephson junction 30, the fourth Josephson junction 31 and the bottom electrode 16 form a third superconducting ring.

[0105] In another embodiment, a different configuration of a superconducting quantum interference device based on a Josephson junction is proposed, specifically, as follows: Figure 3 As shown, this is another equivalent circuit diagram of the superconducting quantum interference device based on Josephson junctions in this embodiment. In this embodiment, the first Josephson junction 28, the second Josephson junction 29, the third Josephson junction 30, and the fourth Josephson junction 31, which have identical structures, are distributed in pairs in two superconducting rings, and the two superconducting rings share the same bottom electrode 16. That is, the first Josephson junction 28 and the second Josephson junction 29 are connected in parallel, and the third Josephson junction 30 and the fourth Josephson junction 31 are connected in parallel. The first Josephson junction 28, the second Josephson junction 29, and the bottom electrode 16 form the second superconducting ring, and the third Josephson junction 30 and the fourth Josephson junction 31 and the bottom electrode 16 form the third superconducting ring. The bias current flows in from the two Josephson junctions on the two branches, passes through the bottom electrode 16, and then flows out from the other two Josephson junctions on each branch.

[0106] To increase the modulation depth of the output voltage of the SQUID device, a damping resistor is also required to be connected in parallel across the bottom electrode 16 of the SQUID. The damping resistor is formed in the resistive layer 23.

[0107] In summary, the present invention provides a superconducting quantum interference device based on a Josephson junction and its fabrication method. By improving the fabrication process of the Josephson junction, an organic cleaning step is added during the photoresist stripping process when forming the first passivation layer, resistive layer, and second passivation layer. This allows the sidewalls formed by the continuous vertical stacking along the sidewalls of the photoresist layer during the growth of the first passivation layer, resistive layer, and second passivation layer to be completely removed, thereby improving the quality of the subsequently deposited metal film and making the SQUID output curve less prone to resonance, thus improving the yield of the SQUID mass production process. Furthermore, based on the traditional SQUID with two Josephson junctions, the present invention adds an additional Josephson junction in series in the branch of each Josephson junction, thereby forming a SQUID with four Josephson junctions. By connecting a damping resistor in parallel across the two ends of the electrode, or by distributing four identical Josephson junctions in pairs within two superconducting rings, allowing the two superconducting rings to share the same bottom electrode, the output voltage of the SQUID can be increased, resulting in a greater output voltage modulation depth without affecting the SQUID's IV curve hysteresis. The presence of the bottom electrode also reduces interference from uniform magnetic fields in the environment, improving the SQUID's anti-interference capability. This results in higher sensitivity, lower noise, and a larger linear range for the SQUID, making the circuit less prone to lockout. Furthermore, it eliminates the need for lengthy bias lines and avoids issues such as magnetic flux crosstalk and poor magnetic flux coherence. Its footprint and design are essentially the same as traditional SQUIDs with two Josephson junctions, making layout design simpler and more convenient, thus possessing high industrial application value.

[0108] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for fabricating a superconducting quantum interference device based on a Josephson junction, characterized in that, Includes the following steps: A substrate is provided, and a stacked structure comprising a first superconducting layer, an insulating material layer and a second superconducting layer stacked sequentially is formed on the surface of the substrate, wherein the first superconducting layer has a first thickness, the second superconducting layer has a second thickness, and the first thickness is greater than the second thickness. Based on the insulating material layer and the second superconducting layer, a Josephson junction pre-junction region is defined. The insulating material layer and the second superconducting layer, excluding the Josephson junction pre-junction region, are etched to expose a portion of the first superconducting layer. The second superconducting layer on the Josephson junction pre-junction region is etched to form a first superconducting wire strip on the insulating material layer, and the bottom electrode is etched to form a first contact hole through the bottom electrode and exposing the substrate; A patterned first passivation layer is formed on the surface of the stacked structure, and the first passivation layer includes a first opening that exposes the first superconducting wire strip. A patterned resistive layer is formed on the bottom electrode, and the resistive layer covers the first passivation layer inside the first contact hole; A patterned second passivation layer is formed on the bottom electrode, the second passivation layer covers the first contact hole and the bottom electrode, and the second passivation layer includes a second opening that exposes the resistive layer; A third superconducting layer is formed on the first superconducting strip and inside the second opening. The third superconducting layer is etched to form a top electrode and a second superconducting strip. The second superconducting strip intersects with the first superconducting strip to form the Josephson junction.

2. The method for fabricating a superconducting quantum interference device according to claim 1, characterized in that, Forming a patterned first passivation layer on the surface of the stacked structure includes the following steps: A patterned first photoresist layer is formed on the surface of the bottom electrode; The first passivation layer is grown in the first contact hole based on the patterned first photoresist layer, and the first passivation layer is continuously deposited in the vertical direction on the sidewall of the first photoresist layer to form a sidewall. While stripping the first photoresist layer, an organic cleaning process is added to finally form a patterned first passivation layer, which covers the substrate and the sidewall of the bottom electrode within the first contact hole.

3. The method for fabricating a superconducting quantum interference device according to claim 1, characterized in that: The width of the Josephson knot pre-junction region is greater than the width of the Josephson knot.

4. The method for fabricating a superconducting quantum interference device according to claim 1, characterized in that: The thickness of the first superconducting layer is 100–200 nm; the thickness of the second superconducting layer is 50–100 nm; and the thickness of the third superconducting layer is 300–350 nm.

5. The method for fabricating a superconducting quantum interference device according to claim 1, characterized in that: The first superconducting layer includes at least one of a niobium nitride layer and a niobium layer; the second superconducting layer includes at least one of a niobium nitride layer and a niobium layer; and the third superconducting layer includes at least one of a niobium nitride layer and a niobium layer.

6. The method for fabricating a superconducting quantum interference device according to claim 1, characterized in that: The first passivation layer includes at least one of a silicon dioxide layer and a silicon monoxide layer; the second passivation layer includes at least one of a silicon dioxide layer and a silicon monoxide layer.

7. The method for fabricating a superconducting quantum interference device according to claim 1, characterized in that: The insulating material layer includes at least one of an aluminum layer, an aluminum oxide layer, and an aluminum nitride layer, and the thickness of the insulating material layer is 1 to 5 nm.

8. A superconducting quantum interference device based on a Josephson junction, characterized in that, The superconducting quantum interference device includes at least: Substrate; A bottom electrode is located on the substrate, and a first contact hole is formed on the surface of the bottom electrode to expose the substrate; An insulating material layer is located on the bottom electrode; The first superconducting wire is located on the insulating material layer; A first passivation layer covers the substrate and the sidewall of the bottom electrode within the first contact hole, and the first passivation layer includes a first opening that exposes the first superconducting wire. A resistive layer covering the first passivation layer within the first contact hole; A second passivation layer covers the first contact hole and the bottom electrode, and the second passivation layer includes a second opening that exposes the resistive layer. The second superconducting wire is located within the first opening and intersects with the first superconducting wire to form the Josephson knot. The Josephson knot includes a first Josephson knot, a second Josephson knot, a third Josephson knot, and a fourth Josephson knot with identical structures. A top electrode, which is located within the second opening and connected to the resistive layer and the second superconducting strip.

9. The superconducting quantum interference device according to claim 8, characterized in that: The first Josephson junction is connected in series with the third Josephson junction, and the second Josephson junction is connected in series with the fourth Josephson junction. The first Josephson junction and the second Josephson junction are symmetrically distributed, and the third Josephson junction and the fourth Josephson junction are symmetrically distributed. The first Josephson junction, the second Josephson junction, the third Josephson junction, the fourth Josephson junction, and the bottom electrode constitute a first superconducting ring.

10. The superconducting quantum interference device according to claim 8, characterized in that: The first Josephson junction and the second Josephson junction are connected in parallel, and the third Josephson junction and the fourth Josephson junction are connected in parallel. The first Josephson junction, the second Josephson junction, and the bottom electrode form a second superconducting ring, and the third Josephson junction, the fourth Josephson junction, and the bottom electrode form a third superconducting ring.

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