A circuit for generating absolute current value

Abstract

This invention relates to a current absolute value generation circuit, comprising: a current comparison circuit for generating a first current equal to the difference between a second current source and a first current source according to Kirchhoff's laws; a flip current comparison circuit for generating a second current equal to the difference between the first current source and the second current source according to Kirchhoff's laws; and a current absolute value output circuit for outputting the absolute value of either the first current or the second current. This invention can convert the difference between real-time measured target image pixels and training target pixels into a current difference.

Description

Technical Field

[0001] This invention relates to the field of semiconductor integrated circuit technology, and in particular to a current absolute value generation circuit. Background Technology

[0002] In artificial intelligence and deep learning, computer vision often requires determining the grayscale levels of image pixels. A common approach is to convert the pixel grayscale levels into corresponding voltage or current values ​​for judgment. In the learning process of neural networks, supervised learning is typically employed, which involves pre-setting a training target for the neural network and comparing it with a real-time measured target image to accelerate the learning process. This necessitates calculating the difference between the real-time measured target image pixels and the training target pixels, thus requiring a current absolute value generation circuit to accomplish this task. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a current absolute value generation circuit that can convert the difference between the target image pixels measured in real time and the training target pixels into the current difference.

[0004] The technical solution adopted by this invention to solve its technical problem is: to provide a current absolute value generation circuit, comprising:

[0005] A current comparison circuit is used to generate a first current equal to the difference between the second current source and the first current source, according to Kirchhoff's laws.

[0006] A flip-flop current comparator circuit is used to generate a second current equal to the difference between the first and second current sources, based on Kirchhoff's laws.

[0007] The absolute value output circuit is used to output the absolute value of the first current or the second current.

[0008] The current comparison circuit includes a first PMOS transistor, the gate of which is connected to the first input terminal of the absolute current output circuit, the source of which is connected to the voltage terminal, the drain of which is connected to the gate of which, the anode of the first current source is connected to the drain of the first PMOS transistor, and the cathode of which is connected to the voltage terminal; the anode of the second current source is grounded, and the cathode of which is connected to the drain of the first PMOS transistor.

[0009] The flip-current comparator circuit includes a second PMOS transistor. The gate of the second PMOS transistor is connected to the second input terminal of the absolute current output circuit. The source of the second PMOS transistor is connected to the voltage terminal. The drain of the second PMOS transistor is connected to the gate of the second PMOS transistor. The anode of the second current source is connected to the drain of the second PMOS transistor, and the cathode is connected to the voltage terminal. The anode of the first current source is grounded, and the cathode is connected to the drain of the second PMOS transistor.

[0010] The absolute current output circuit includes a third PMOS transistor and a fourth PMOS transistor. The gate of the third PMOS transistor is connected to the current comparison circuit and forms a mirror current source with the first PMOS transistor in the current comparison circuit. The source of the third PMOS transistor is connected to the voltage terminal, and the drain of the third PMOS transistor is connected to the drain of the fourth PMOS transistor. The gate of the fourth PMOS transistor is connected to the flip current comparison circuit and forms another mirror current source with the second PMOS transistor in the flip current comparison circuit. The source of the fourth PMOS transistor is connected to the voltage terminal.

[0011] Beneficial effects

[0012] Due to the adoption of the above technical solution, the present invention has the following advantages and positive effects compared with the prior art: the present invention realizes the generation of the absolute value of current, so that the system generates a positive current equal to the difference between two different current sources. Attached Figure Description

[0013] Figure 1 This is a circuit diagram of the current absolute value generation circuit according to an embodiment of the present invention;

[0014] Figure 2 This is a schematic diagram of the voltage and current waveforms of the current comparison circuit and the flip current comparison circuit as a function of time when the first current source is greater than the second current source.

[0015] Figure 3 This is a schematic diagram of the voltage and current waveforms of the current comparison circuit and the flip current comparison circuit as a function of time when the second current source is greater than the first current source.

[0016] Figure 4 This is a schematic diagram of the current waveform as a function of time in the absolute current output circuit. Detailed Implementation

[0017] The present invention will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. Furthermore, it should be understood that after reading the teachings of this invention, those skilled in the art can make various alterations or modifications to the invention, and these equivalent forms also fall within the scope defined by the appended claims.

[0018] Embodiments of the present invention relate to a current absolute value generation circuit, such as... Figure 1 As shown, it includes:

[0019] The current comparison circuit 100 is used to generate a first current equal to the difference between the second current source Iref_2 and the first current source Iref_1, according to Kirchhoff's laws.

[0020] The flip-flop current comparator circuit 200 is used to generate a second current equal to the difference between the first current source Iref_1 and the second current source Iref_2, according to Kirchhoff's laws.

[0021] The absolute value output circuit 300 is used to output the absolute value of the first current or the second current.

[0022] In this embodiment, the current comparison circuit 100 includes a first PMOS transistor. The gate of the first PMOS transistor is connected to the first input terminal of the absolute current output circuit. The source of the first PMOS transistor is connected to the voltage terminal. The drain of the first PMOS transistor is connected to the gate of the first PMOS transistor. The anode of the first current source Iref_1 is connected to the drain of the first PMOS transistor, and the cathode is connected to the voltage terminal. The anode of the second current source Iref_2 is grounded, and the cathode is connected to the drain of the first PMOS transistor.

[0023] The current comparison circuit 100 mainly consists of a first PMOS transistor with its gate and drain connected, a first current source Iref_1, and a second current source Iref_2. When the current value of the first current source Iref_1 is less than the current value of the second current source Iref_2, the potentials of the gate and drain of the first PMOS transistor are pulled down to a low level, and its gate potential V PMOS1_gate The voltage waveform changes over time as follows: Figure 2 As shown, the first PMOS transistor is turned on, through which current I flows. PMOS1 The waveform changes over time in the same way. Figure 2 As shown, according to Kirchhoff's laws, the current flowing through the first PMOS transistor is Iref_2 - Iref_1; when the current value of the first current source Iref_1 is greater than the current value of the second current source Iref_2, the potentials of the gate and drain of the first PMOS transistor are raised to a high level, and its gate potential V PMOS1_gateThe voltage waveform changes over time as follows: Figure 3 As shown, the first PMOS transistor is turned off, and no current flows through it.

[0024] The flip current comparator circuit 200 in this embodiment includes a second PMOS transistor. The gate of the second PMOS transistor is connected to the second input terminal of the absolute current output circuit. The source of the second PMOS transistor is connected to the voltage terminal. The drain of the second PMOS transistor is connected to the gate of the second PMOS transistor. The anode of the second current source Iref_2 is connected to the drain of the second PMOS transistor, and the cathode is connected to the voltage terminal. The anode of the first current source Iref_1 is grounded, and the cathode is connected to the drain of the second PMOS transistor.

[0025] The flip-flop current comparator circuit 200 consists of a second PMOS transistor with its gate and drain connected, a first current source Iref_1, and a second current source Iref_2. The first and second current sources Iref_1 and Iref_2 are identical to those in the current comparator circuit. When the current value of the second current source Iref_2 is less than the current value of the first current source Iref_1, the potentials of the gate and drain of the second PMOS transistor are pulled low, and its gate potential V0 is set to a low level. PMOS2_gate The voltage waveform changes over time as follows: Figure 3 As shown, the second PMOS transistor is turned on, through which current I flows. PMOS2 The waveform changes over time in the same way. Figure 3 As shown, according to Kirchhoff's laws, the current flowing through transistor PMOS2 is Iref_1 - Iref_2; when the current value of the second current source Iref_2 is greater than the current value of the first current source Iref_1, the potentials of the gate and drain of the second PMOS transistor are raised to a high level, and its gate potential V PMOS2_gate The voltage waveform changes over time as follows: Figure 2 As shown, the second PMOS transistor is turned off, and no current flows through it.

[0026] The absolute current output circuit includes a third PMOS transistor and a fourth PMOS transistor. The gate of the third PMOS transistor is connected to the current comparison circuit and forms a mirror current source with the first PMOS transistor in the current comparison circuit. The source of the third PMOS transistor is connected to the voltage terminal, and the drain of the third PMOS transistor is connected to the drain of the fourth PMOS transistor. The gate of the fourth PMOS transistor is connected to the flip current comparison circuit and forms another mirror current source with the second PMOS transistor in the flip current comparison circuit. The source of the fourth PMOS transistor is connected to the voltage terminal.

[0027] The absolute value output circuit mainly consists of a third PMOS transistor and a fourth PMOS transistor. The gate of the third PMOS transistor is connected to the gate of the first PMOS transistor in the current comparator circuit 100, and the gate of the fourth PMOS transistor is connected to the gate of the second PMOS transistor in the flip-current comparator circuit. This allows the output circuit to measure the absolute value of the current I flowing through the first PMOS transistor. PMOS1 (i.e., Iref_2 - Iref_1) or the current I flowing through the second PMOS transistor PMOS2 (i.e., Iref_1 - Iref_2) is mirrored into the third or fourth PMOS transistor, and the current value is obtained through the drain of the third or fourth PMOS transistor. ref_1 -I ref_2 The current of | is such that the waveform of its output current is as follows: Figure 4 As shown.

[0028] It is easy to see that the present invention realizes the generation of the absolute value of current, so that the system generates a positive current equal to the difference between two different current sources.

Claims

1. A circuit for generating the absolute value of current, characterized in that, include: A current comparison circuit is used to generate a first current equal to the difference between a second current source and a first current source, according to Kirchhoff's laws. The current comparison circuit includes a first PMOS transistor, the gate of which is connected to the first input terminal of the absolute current output circuit, the source of which is connected to a voltage terminal, and the drain of which is connected to the gate of which. The anode of the first current source is connected to the drain of the first PMOS transistor, and the cathode is connected to the voltage terminal. The anode of the second current source is grounded, and the cathode is connected to the drain of the first PMOS transistor. A flip-current comparator circuit is used to generate a second current equal to the difference between the first and second current sources, according to Kirchhoff's laws. The absolute value output circuit is used to output the absolute value of the first current or the second current.

2. The current absolute value generating circuit according to claim 1, characterized in that, The flip-current comparator circuit includes a second PMOS transistor. The gate of the second PMOS transistor is connected to the second input terminal of the absolute current output circuit. The source of the second PMOS transistor is connected to the voltage terminal. The drain of the second PMOS transistor is connected to the gate of the second PMOS transistor. The anode of the second current source is connected to the drain of the second PMOS transistor, and the cathode is connected to the voltage terminal. The anode of the first current source is grounded, and the cathode is connected to the drain of the second PMOS transistor.

3. The current absolute value generating circuit according to claim 1, characterized in that, The absolute current output circuit includes a third PMOS transistor and a fourth PMOS transistor. The gate of the third PMOS transistor is connected to the current comparison circuit and forms a mirror current source with the first PMOS transistor in the current comparison circuit. The source of the third PMOS transistor is connected to the voltage terminal, and the drain of the third PMOS transistor is connected to the drain of the fourth PMOS transistor. The gate of the fourth PMOS transistor is connected to the flip current comparison circuit and forms another mirror current source with the second PMOS transistor in the flip current comparison circuit. The source of the fourth PMOS transistor is connected to the voltage terminal.

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