Storage controller, storage device, and host storage system including storage controller
By introducing a multi-tenant power control unit and a rescheduling unit into the storage controller, the power budget is allocated according to the priority token and sub-power state, the problem of inefficient power budget allocation in the prior art is solved, and more efficient resource utilization is achieved.
Patent Information
- Application Number
- CN202411182303.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-08-30
- Filing Date
- 2024-08-27
- Publication Date
- 2025-02-28
AI Technical Summary
The prior art is difficult to effectively allocate the power budget of the data storage device to physical and virtual functions, resulting in inefficient resource utilization.
A storage controller is designed, including allocating physical functions, virtual functions and rescheduling units, and allocating power budgets according to priority tokens and sub-power states through a multi-tenant power control unit.
It realizes effective management of power budget allocation for physical and virtual functions, and improves resource utilization efficiency and system performance.
Smart Images

Figure CN119536628A_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority to Korean Patent Application No. 10-2023-0114799 filed in the Korean Intellectual Property Office on August 30, 2023, and all benefits arising therefrom, the contents of which are incorporated herein by reference in their entirety. Technical Field
[0003] The present disclosure relates to a storage controller, a storage device, and a host storage system including the storage controller. Background Art
[0004] There are existing non-volatile memory based data storage devices such as solid state drives (SSDs) and various interfaces for such data storage devices such as Serial AT Attachment (SATA), Peripheral Component Interconnect Express (PCIe), and Serial Attached SCSI (SAS). The performance of SSDs has been steadily improving, along with the amount of parallel data processing. However, conventional interfaces such as SATA are not customized for data storage devices such as SSDs, thus fundamentally limiting their capabilities. As a result, as part of the efforts to establish a standardized interface suitable for SSDs, Non-Volatile Memory Express (NVMe) was born. NVMe, a register-level interface for communication between data storage devices such as SSDs and host software, is based on the conventional PCIe bus, but is optimized for SSDs.
[0005] Meanwhile, with the development of semiconductor manufacturing technology, the operating speed of host devices such as computers, smartphones, and smart tablets that communicate with storage devices is increasing. As the operating speed of the host device increases, virtual technology that enables various virtual functions to be executed in a single host device is introduced. In addition, storage devices are constantly evolving according to their commercialization goals, and research is currently underway on a basic isolation storage system that controls power with a physical function as the minimum unit and a fully isolated storage system that controls power with a virtual function as the minimum unit. Summary of the invention
[0006] Aspects of the present disclosure provide a storage controller that efficiently allocates power budget to physical functions and virtual functions.
[0007] Aspects of the present disclosure also provide a storage device in which a power budget is efficiently allocated to physical functions and virtual functions.
[0008] Aspects of the present disclosure also provide a host storage system in which a power budget of a storage device is efficiently allocated to physical functions and virtual functions.
[0009] However, the aspects of the present disclosure are not limited to those set forth herein. The above and other aspects of the present disclosure will become more apparent to those of ordinary skill in the art to which the present disclosure pertains by referring to the detailed description of the present disclosure given below.
[0010] According to one aspect of the present disclosure, a storage controller is provided, which includes: a physical function of a physical machine assigned to a host for processing first data; a first virtual function of a first virtual machine assigned to the host for processing second data; a second virtual function of a second virtual machine assigned to the host for processing third data; a rescheduling unit configured to assign a priority token to each of the physical function, the first virtual function, and the second virtual function; and a multi-tenant power control unit configured to receive sub-power states of the physical function, the first virtual function, and the second virtual function, and to assign a power budget to each of the physical function, the first virtual function, and the second virtual function based on the assigned priority tokens and sub-power states.
[0011] According to one aspect of the present disclosure, a storage device is provided, the storage device comprising: a storage controller configured to generate a physical function assigned to a physical machine of a host for operation of a vehicle, a first virtual function assigned to a first virtual machine of the host for operation of the vehicle, and a second virtual function assigned to a second virtual machine of the host for operation of the vehicle; a memory device comprising a first memory area corresponding to the physical function, a second memory area corresponding to the first virtual function, and a third memory area corresponding to the second virtual function; and a power management circuit controlled by the storage controller to manage power supplied to each of the first memory area, the second memory area, and the third memory area, wherein the storage controller comprises: a redispatch unit an element configured to assign a priority token to each of the physical function, the first virtual function, and the second virtual function; and a multi-tenant power control unit configured to receive sub-power states of the physical function, the first virtual function, and the second virtual function, and to assign a power budget to each of the physical function, the first virtual function, and the second virtual function based on the assigned priority tokens and sub-power states of the physical function, the first virtual function, and the second virtual function, and the power management circuit is controlled by the multi-tenant power control unit to independently manage the power supplied to each of the first memory area, the second memory area, and the third memory area based on the power budget assigned to each of the physical function, the first virtual function, and the second virtual function.
[0012] According to one aspect of the present disclosure, a host storage system is provided, which includes: a host, which includes a physical machine, a first virtual machine, and a second virtual machine; a storage controller, which is configured to generate a physical function assigned to the physical machine, a first virtual function assigned to the first virtual machine, and a second virtual function assigned to the second virtual machine; and a memory device, which includes a first memory area corresponding to the physical function, a second memory area corresponding to the first virtual function, and a third memory area corresponding to the second virtual function, wherein the host is configured to provide a command, the command including a power state field for a storage device including the storage controller and the memory device and a sub-power state field for at least one of the physical function, the first virtual function, and the second virtual function, and the storage controller is configured to receive the command and allocate a power budget to at least one of the physical function, the first virtual function, and the second virtual function based on the sub-power state field of the command.
[0013] It should be noted that the effects of the present disclosure are not limited to those described above, and other effects of the present disclosure will become clear from the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The above and other aspects and features of the present disclosure will become more apparent by describing in detail various embodiments thereof with reference to the accompanying drawings, in which:
[0015] Figure 1 is a schematic diagram of a vehicle including an electronic control device according to various embodiments of the present disclosure.
[0016] Figure 2 According to each embodiment of the present disclosure Figure 1 A block diagram of a storage device.
[0017] Figure 3 is a block diagram of a host storage system according to various embodiments of the present disclosure.
[0018] Figure 4 According to each embodiment of the present disclosure Figure 3 Detailed block diagram of the host storage system.
[0019] Figure 5 According to each embodiment of the present disclosure Figure 3 Detailed block diagram of a memory device of a host storage system.
[0020] Figure 6 The present invention is a diagram showing various embodiments of the present invention. Figure 3 A flowchart of the operation of a host storage system.
[0021] Figure 7 The present invention is a diagram showing various embodiments of the present invention. Figure 6 A schematic diagram of exemplary commands issued by a host.
[0022] Figure 8 The present invention is presented for explaining various embodiments according to the present disclosure. Figure 7 A table of different sub-power states that can be included in a command.
[0023] Fig. 9 is a flow chart illustrating the operation of a storage controller according to various embodiments of the present disclosure.
[0024] Fig.10 The present invention is presented for explaining various embodiments according to the present disclosure. Figure 1 A table of data generated by sensors included in a vehicle.
[0025] Fig.11 Presented are diagrams showing the assignment of different vehicle operating modes to different vehicle safety integrity levels (ASIL) ratings according to various embodiments of the present disclosure. Fig.10 A table of priority tokens and sub-power states of sensors.
[0026] Figures 12 to 16 Presents various vehicle operation modes for explaining different vehicle operation modes for a vehicle according to various embodiments of the present disclosure. Fig.10 Table of various scenarios for sensor sharing power budget.
[0027] Fig.17 The present invention is presented for explaining various embodiments according to the present disclosure. Fig.10 Diagram of the redistribution of the power budget between sensors. DETAILED DESCRIPTION
[0028] A storage controller, a storage device, and a host storage system according to various embodiments of the present disclosure will be described with reference to the accompanying drawings.
[0029] Figure 1 is a schematic diagram of a vehicle including an electronic control device according to various embodiments of the present disclosure.
[0030] Reference Figure 1 , the vehicle 100 may include a plurality of electronic control units (ECUs) 110 and a storage device 120 .
[0031] In various embodiments, each of the ECUs 110 is operably connected (e.g., electrically, mechanically, and / or communicatively connected) to at least one of a plurality of devices provided in the vehicle 100, and can control the operation of the corresponding device based on one or more function execution commands.
[0032] In various embodiments, the plurality of devices may include a detection device 130 for detecting and collecting information for performing at least one function and a drive unit 140 for performing at least one function. The detection device 130 and the drive unit 140 may each be electrically connected to at least one of the ECUs 110.
[0033] In various embodiments, the detection device 130 may include various detection units and / or image acquisition units, and the drive unit 140 may include devices such as fans and compressors for air-conditioning devices, fans for ventilation devices, engines and motors for power devices, motors for steering devices, motors and valves for braking devices, and actuators for opening and closing vehicle doors or trunk doors.
[0034] In various embodiments, the ECU 110 may communicate with the detection device 130 and the drive unit 140 using, for example, Ethernet, low voltage differential signaling (LVDS) communication, or local interconnect network (LIN) communication.
[0035] In various embodiments, the ECU 110 may determine to start executing a function based on information collected by the detection device 130. In response to determining that the function should be executed, the ECU 110 may control the operation of the drive unit 140 that executes the corresponding function, and may also control the operation amount of the drive unit 140 based on the collected information. The ECU 110 may store the collected information in the storage device 120 or may retrieve the information stored in the storage device 120 for use.
[0036] In various embodiments, the ECU 110 may control the operation of the drive unit 140 to perform a specific function based on a corresponding function execution command input through the input unit 150. The ECU 110 may also verify settings corresponding to information input through the input unit 150, and control the operation of the drive unit 140 to perform a specific function based on the verified settings.
[0037] In various embodiments, each of the ECUs 110 may independently control one or more functions, or the ECUs 110 may cooperate with each other to control one or more functions together. For example, when the distance to the object detected by the distance detection unit is within a specific range, the ECU 110 for the collision avoidance device may output a warning sound through a speaker.
[0038] For example, the ECU 110 for the automatic driving control device can perform automatic driving by receiving navigation information, road image information and obstacle distance information by cooperating with the ECU 110 for the vehicle-mounted terminal, image acquisition unit and collision avoidance device, and controlling the power device, braking device and steering device based on the received information.
[0039] In various embodiments, the connection control unit (CCU) 160 is electrically, mechanically, and communicatively connected to each of the ECUs 110 and communicates therewith. The connection control unit (CCU) 160 may communicate directly with the ECU 110 of the vehicle 100, may communicate with an external server, and may perform communication with an external terminal through an interface.
[0040] In various embodiments, the connection control device 160 may communicate with the ECU 110 and may communicate with the server 170 through an antenna and RF communications.
[0041] In various embodiments, the connection control device 160 may wirelessly communicate with the server 170. The connection control device 160 may wirelessly communicate with the server 170 using various wireless communication methods such as Wi-Fi, wireless broadband, Global System for Mobile Communications (GSM), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Universal Mobile Telecommunications System (UMTS), Time Division Multiple Access (TDMA), Long Term Evolution (LTE), and New Broadcast (NR).
[0042] In each embodiment, except Figure 1 In addition to the components shown, the vehicle 100 may further include at least one module for operation of the vehicle 100 , such as driving.
[0043] Figure 2 yes Figure 1 A block diagram of a storage device.
[0044] Reference Figure 1 and Figure 2 , the storage device 120 may include memories 121, 122, 123, 124, and 125. The memories 121, 122, 123, 124, and 125 may include a memory (ECU_M) 121 corresponding to the ECU 110, a memory (Detector_M) 122 corresponding to the detection device 130, a memory (Driving Unit_M) 123 corresponding to the drive unit 140, a memory (Input_M) 124 corresponding to the input unit 150, and a memory (CCU_M) 125 corresponding to the connection control device 160. The memories 121, 122, 123, 124, and 125 may store data generated by their corresponding units or devices, and may provide data required for the operation of their corresponding units or devices. The memories 121, 122, 123, 124, and 125 may include a non-volatile memory such as a flash memory and / or a volatile memory.
[0045] In various embodiments, the memories 121, 122, 123, 124, and 125 may be included in the storage device 120. The ECU 110, the detection device 130, the drive unit 140, the input unit 150, and the connection control device 160 may share the storage device 120. In some embodiments, a single high-performance storage device 120 may control the ECU 110, the detection device 130, the drive unit 140, the input unit 150, and the connection control device 160 of the vehicle 100.
[0046] In the case where the vehicle 100 further includes an additional module for processing data associated with the operation of the ECU 110, the detection device 130, the drive unit 140, the input unit 150, and the connection control device 160, the storage device 120 may further include one or more additional memories corresponding to the additional modules. In this case, the ECU 110, the detection device 130, the drive unit 140, the input unit 150, and the connection control device 160 may share the storage device 120 together with the additional modules.
[0047] In various embodiments, the storage device 120 may be a peripheral component interconnect express (PCIe) storage device, and more specifically, may be a multi-port multi-function storage device. Figure 4 and Figure 5 The storage device 120 is described.
[0048] Figure 3 is a block diagram of a host storage system according to some embodiments of the present disclosure.
[0049] Reference Figure 3 , the host storage system 1000 may be a device for a vehicle, such as a mobile system, a personal computer (PC), a notebook computer, a media player, or a navigation device. The host storage system 1000 may include a host 200 and a storage device 300. The storage device 300 may include a storage controller 310, a memory device 330, and a power management circuit 340. The host 200 may include a host controller 210, a host memory 220, and a host core 230.
[0050] In various embodiments, the storage device 300 of the host storage system 1000 may correspond to Figure 1The storage device 120 of the vehicle 100. The storage device 300 may include a storage medium for storing data in response to a request of the host 200. For example, the storage device 300 may include at least one of a solid state drive (SSD), an embedded memory, or a removable external memory. If the storage device 300 is an SSD, the storage device 300 may comply with the non-volatile memory express (NVMe) standard. If the storage device 300 is an embedded memory or an external memory, the storage device 300 may comply with the universal flash storage (UFS) or embedded multimedia card (eMMC) standard. The host 200 and the storage device 300 may generate and transmit data packets according to the adopted standard protocol.
[0051] In various embodiments, the memory device 330 may include a nonvolatile memory 331 and a volatile memory 332. When the nonvolatile memory 331 of the memory device 330 includes a flash memory, the flash memory may include a two-dimensional (2D) NAND memory array or a three-dimensional (3D) NAND (or vertical NAND (VNAND)) memory array. Alternatively, the storage device 300 may include different types of nonvolatile memories. For example, the storage device 300 may adopt a magnetic random access memory (MRAM), a spin transfer torque MRAM (STT-MRAM), a conductive bridging random access memory (CBRAM), a ferroelectric random access memory (FeRAM), a phase change random access memory (PRAM) and / or a resistive random access memory (RRAM). The volatile memory 332 of the memory device 330 may include a dynamic random access memory (DRAM) and / or a static random access memory (SRAM).
[0052] In various embodiments, the host controller 210 and the host memory 220 may be implemented as separate semiconductor chips, or the host controller 210 and the host memory 220 may be integrated into the same semiconductor chip. For example, the host controller 210 may be one of a plurality of modules provided in an application processor, and the application processor may be implemented as a system on chip (SoC).
[0053] In various embodiments, the host memory 220 may be an embedded memory in the application processor or a non-volatile memory or memory module located outside the application processor. The host memory 220 may be used as a buffer memory to temporarily store data to be sent to the storage device 300 by the host 200 or received by the host 200 from the storage device 300. The host memory 220 may be implemented as a volatile memory such as SRAM or DRAM, a non-volatile memory such as PRAM, MRAM, RRAM, FRAM, or a combination of the two.
[0054] In various embodiments, the host core 230 may control the overall operation of the host 200. For example, the host core 230 may drive a plurality of machines 231 and may also drive a device driver for controlling the host controller 210. The machines 231 may correspond to modules included in the vehicle 100, such as the ECU 110, the detection device 130, the drive unit 140, the input unit 150, and the connection control device 160. The ECU 110, the detection device 130, the drive unit 140, the input unit 150, and the connection control device 160 may be included in the host core 230.
[0055] In various embodiments, the host controller 210 may manage operations such as storing data (e.g., recorded data) from a buffer of the host memory 220 into the non-volatile memory 331 and storing data (e.g., read data) from the non-volatile memory 331 into a buffer of the host memory 220.
[0056] In various embodiments, the storage controller 310 may include a host interface (I / F) 311, a memory interface (I / F) 313, and a central processing unit (CPU) 312. The storage controller 310 may also include a flash translation layer (FTL) 314, a packet manager (PCKMNG) 315, a buffer memory (BUF MEM) 316, an error correction code (ECC) engine (ECC ENG) 317, and an advanced encryption standard (AES) engine (AES ENG) 318. The storage controller 310 may also include a working memory in which the FTL 314 is loaded, and operations such as writing data to and reading data from the non-volatile memory 331 may be controlled by the CPU 312 running the FTL 314. The storage controller 310 can be configured to generate a physical function 321P ("PF") of a physical machine 231P ("PM") of the host 200 that can be assigned to operations regarding the vehicle 100, a first virtual function 321V-1 ("VF1") of a first virtual machine 231V-1 of the host 200 that can be assigned to operations regarding the vehicle 100, and a second virtual function 321V-2 ("VF2") of a second virtual machine 231V-2 of the host 200 that can be assigned to operations regarding the vehicle 100.
[0057] In various embodiments, the host interface 311 may transmit and receive data packets to and from the host 200. Data packets transmitted from the host 200 to the host interface 311 may include commands and data to be written to the nonvolatile memory 331, and data packets transmitted from the host interface 311 to the host 200 may include responses to commands or data read from the nonvolatile memory 331. The memory interface 313 may transmit data to be written to the nonvolatile memory 331 or receive data read from the nonvolatile memory 331. The memory interface 313 may be implemented to comply with a standard protocol such as Toggle or Open NAND Flash Interface (ONFI).
[0058] In various embodiments, the FTL 314 may perform various functions, such as address mapping, wear leveling, and garbage collection. Address mapping is a process of converting a logical address received from the host 200 into a physical address used to store data in the non-volatile memory 331. Wear leveling is a technique for ensuring uniform use of blocks in the non-volatile memory 331 to prevent excessive wear on a particular block of the non-volatile memory 331, which may be implemented, for example, by a firmware technique that balances the erase counts of physical blocks. Garbage collection is a technique for freeing up capacity in the non-volatile memory 331 by copying valid data from an existing block to a new block and then erasing the existing block.
[0059] In various embodiments, the packet manager 315 may generate a packet based on a protocol of an interface negotiated with the host 200 or analyze various information from a packet received from the host 200. In addition, the buffer memory 316 may temporarily store data to be written to or read from the nonvolatile memory 331. The buffer memory 316 may be configured in the storage controller 310 or may be located outside the storage controller 310.
[0060] In various embodiments, the ECC engine 317 may perform error detection and correction functions for data read from the nonvolatile memory 331. Specifically, the ECC engine 317 may generate parity bits for data to be written to the nonvolatile memory 331, and the generated parity bits may be stored in the nonvolatile memory 331 together with the write data. When reading data from the nonvolatile memory 331, the ECC engine 317 may use the parity bits read from the nonvolatile memory 331 together with the read data to detect and correct any errors in the read data, and may then output the error-corrected read data.
[0061] In various embodiments, the AES engine 318 may utilize a symmetric key algorithm to perform encryption operations and / or decryption operations on data input to the storage controller 310 .
[0062] In various embodiments, the storage controller 310 may include multiple functions 321 , a rescheduling unit 319 , and a multi-tenant power control unit 320 .
[0063] In various embodiments, the function 321 may be assigned to the machine 231 of the host 200. For example, the machine 231 may access the memory device 330 through the function 321 assigned thereto.
[0064] In various embodiments, the rescheduling unit 319 and the multi-tenant power control unit 320 may be logic in the storage controller 310 for allocating the total power budget of the storage device 300 to the functions 321. The rescheduling unit 319 may allocate a priority token to each of the functions 321.
[0065] In various embodiments, the multi-tenant power control unit 320 may allocate the total power budget of the storage device 300 to the function 321 based on the number of assigned priority tokens and the sub-power state of the function 321. In addition, the multi-tenant power control unit 320 may manage the power budget allocated to each of the functions 321, and may report the available power budget to the host 200, and the host may use the available power budget to retrieve some of the power budget allocated to the function 321 and allocate the retrieved power budget to the function that requires additional power budget. The multi-tenant power control unit 320 may be configured to receive the sub-power state of the physical function 321P ("PF"), the first virtual function 321V-1 ("VF1"), and the second virtual function 321V-2 ("VF2"), and allocate the power budget to each of the physical function 321P ("PF"), the first virtual function 321V-1 ("VF1"), and the second virtual function 321V-2 ("VF2") based on the assigned priority token and the sub-power state.
[0066] In various embodiments, the power management circuit 340 may be hardware configured and controlled by the multi-tenant power control unit 320, wherein the power management circuit 340 may independently manage the power supplied to each memory area of the memory device 330 based on the power budget allocated to each of the functions 321. The function and operation of the power management circuit 340 will be described later.
[0067] Figure 4 yes Figure 3 Detailed block diagram of the host storage system.
[0068] Reference Figure 4 , the host storage system 1000 may support a queue-based command interface method (interface method), and may also support a virtualization function. For example, the host storage system 1000 may support an NVMe interface method, and may also support a single root input / output (IO) virtualization (SR-IOV) function.
[0069] In various embodiments, the host 200 may include a host core 230 , a hypervisor / virtualization intermediary 240 , a PCIe root complex 250 , a host memory 220 , and a storage interface (I / F) 260 .
[0070] In various embodiments, Figure 3 The machine 231 may be included in the host core 230 of the host 200, and may include a physical machine 231P ("PM") and multiple virtual machines 231V-1 and 231V-2 ("VM1" and "VM2"). The physical machine 231P may be a physical hardware core or processor. The virtual machines 231V-1 and 231V-2 may be virtual cores or virtual processors created by virtualization operations of a single root input / output (IO) virtualization (SR-IOV) function, and may each independently run an operating system (OS) and applications. The OS running on the virtual machine may be referred to as a client OS. In various embodiments, a storage device 300 may be connected to both the physical machine 231P and the virtual machines 231V-1 and 231V-2.
[0071] In various embodiments, the physical machine 231P and the virtual machines 231V-1 and 231V-2 may correspond to Figure 1 Devices or units included in the vehicle 100 of the host 200, such as the ECU 110, the detection device 130, the drive unit 140, the input unit 150, and the connection control device 160. For example, the physical machine 231P and at least one of the virtual machines 231V-1 and 231V-2 may be a core or processor that processes data generated by the ECU 110 of the vehicle 100. Alternatively, when the vehicle 100 includes a sensor, at least one of the physical machine 231P and the virtual machines 231V-1 and 231V-2 may be a core or processor that processes data generated by the sensor. The physical function 321P ("PF") is allocated to the physical machine 231P of the host 200 that processes the first data, the first virtual function 321V-1 ("VF1") is allocated to the first virtual machine 231V-1 of the host 200 that processes the second data, and the second virtual function 321V-2 ("VF2") is allocated to the second virtual machine 231V-2 of the host 200 that processes the third data.
[0072] In various embodiments, the hypervisor / virtualization agent 240 may be connected to and communicate with the host core 230 and the PCIe root complex 250. The hypervisor / virtualization agent 240, which may be a software layer for building a virtualized system, may provide logically separated hardware to each of the virtual machines 231V-1 and 231V-2. The hypervisor / virtualization agent 240 may also be referred to as a virtual machine monitor (VMM) and may include firmware or software for creating and running virtual machines.
[0073] In other words, the SR-IOV capable device may be configured to include a hypervisor / virtualization agent 240, and may be presented in the PCI configuration space as multiple functions 321 having a configuration space including a base address register (BAR). The hypervisor / virtualization agent 240 may map the actual configuration space of virtual functions 321V-1 ("VF1") and 321V-2 ("VF2") to the configuration space set by the hypervisor / virtualization agent 240 as virtual machines 231V-1 and 231V-2. Therefore, the hypervisor / virtualization agent 240 may allocate virtual functions 321V-1 and 321V-2 to virtual machines 231V-1 and 231V-2, respectively.
[0074] In various embodiments, the host storage system 1000 may support virtualization functions. For example, the storage device 300 may provide a physical function 321P ("PF") for management and virtual functions 321V-1 and 321V-2 to the host 200. The physical function 321P may be allocated to a physical machine 231P, and the virtual functions 321V-1 and 321V-2 may be allocated to virtual machines 231V-1 and 231V-2.
[0075] In each embodiment, the physical function 321P may be a PCIe function of the storage device 300 supporting an SR-IOV interface, and the virtual functions 321V- 1 and 321V- 2 may also be lightweight PCIe functions of the storage device 300 supporting an SR-IOV interface.
[0076] In various embodiments, the physical function 321P may include extended capabilities for SR-IOV in the PCIe configuration space of the storage device 300. For example, the capabilities of the physical function 321P may be used to enable virtualization, as well as to configure and manage the SR-IOV functionality of the storage device 300, including exposing virtual functions 321V-1 and 321V-2. The virtual functions 321V-1 and 321V-2 are associated with the physical function 321P of the storage device 300 and may represent virtualized instances of the storage device 300. The virtual functions 321V-1 and 321V-2 may have their own unique PCIe configuration space and share the physical resources of the physical function 321P.
[0077] In the storage device 300 capable of SR-IOV, the physical function 321P is first discovered, and the PCIe configuration space of the storage device 300 is read to scan and enumerate the virtual functions 321V-1 and 321V-2 supported on the host capable of SR-IOV. Then, the virtual functions 321V-1 and 321V-2 can be allocated to the virtual machines 231V-1 and 231V-2.
[0078] In various embodiments, PCIe root complex 250 represents the root of a hierarchy and may be connected to hypervisor / virtualization intermediary 240, host memory 220, and storage interface 260. PCIe root complex 250 may connect host core 230 to host memory 220 or connect host core 230 and host memory 220 to storage interface 260.
[0079] In various embodiments, the host memory 220 may be connected to the hypervisor / virtualization intermediary 240, the host core 230, and the storage interface 260 through the PCIe root complex 250. The host memory 220 may be used as a working memory for, for example, a physical machine 231P or virtual machines 231V-1 and 231V-2 of the host core 230. In this case, applications, file systems, and device drivers may be loaded into the host memory 220.
[0080] In various embodiments, the storage interface 260 may be connected to and communicate with the PCIe root complex 250, and provide communication between the host 200 and the storage device 300. For example, the storage interface 260 may provide queue-based commands and data to the storage device 300 according to the NVMe protocol, or may receive information and data about a processed command from the storage device 300.
[0081] In various embodiments, the storage controller 310 may communicate with the host 200 through a queue-based interface method. The storage controller 310 may control the storage device 300 to store data in at least one of the plurality of nonvolatile memories 331-1 to 331-n in response to a command received from the host 200. The storage controller 310 may control the storage device 300 to send data stored in the nonvolatile memories 331-1 to 331-n to the host 200.
[0082] In various embodiments, the nonvolatile memories 331-1 to 331-n may be electrically connected to the storage controller 310 through channels CH1 to CHn, respectively, and communicate with the storage controller 310. The nonvolatile memories 331-1 to 331-n may perform operations such as storing data or reading stored data under the control of the storage controller 310.
[0083] In various embodiments, the volatile memory 332 may be used as a buffer memory to temporarily store data when data is written to or read from the nonvolatile memories 331-1 to 331-n under the control of the storage controller 310, but the present disclosure is not limited thereto.
[0084] In various embodiments, the host memory 220 may provide a storage area for storing queue commands to support both queue-based interface methods and virtualization functions. In other words, the host memory 220 may provide a separate storage area for storing queue commands to support queue-based command interface methods and virtualization functions.
[0085] In each embodiment, in order to support SR-IOV of the NVMe protocol interface method, the host memory 220 may provide a physical function management queue storage area 221-1 ("PF Admin_Q area"), a physical function I / O queue storage area 221-2 ("PFI / O_Q area"), and multiple virtual function I / O queue storage areas 222-2 and 223-2 ("VF1 I / O_Q area" and "VF2I / O_Q area"), the physical function management queue storage area 221-1 is used to store the management queue for the physical function 321P, the physical function I / O queue storage area 221-2 is used to store the I / O queue for the physical function 321P, and the multiple virtual function I / O queue storage areas 222-2 and 223-2 are used to store the I / O queue for the virtual functions 321V-1 and 321V-2. Queue commands may be stored in these storage areas using a circular queue format for the NVMe protocol.
[0086] In various embodiments, separate independent management queues may be assigned to virtual functions 321V-1 and 321V-2, respectively. For example, a virtual function management queue "VF1 Administrator Queue" may be assigned to virtual function 321V-1, and a virtual function management queue "VF2Administrator Queue" that may be independent of the virtual function management queue "VF1Administrator Queue" may be assigned to virtual function 321V-2. Therefore, virtual functions 321V-1 and 321V-2 may independently perform queue management and command / data transaction operations using their corresponding virtual function management queues.
[0087] In each embodiment, the virtual function management queue "VF1 Administrator Queue" can be assigned to the guest OS of the virtual machine 231V-1, and the virtual function 321V-1 can use the virtual function management queue stored in the virtual function management queue storage area 222-1 of the host memory 220 and the multiple virtual function I / O queues stored in the virtual function I / O queue storage area 222-2 of the host memory 220 to independently perform queue management operations and command / data exchange operations.
[0088] In each embodiment, the virtual function management queue "VF2 Administrator Queue" can be assigned to the client OS of the virtual machine 231V-2, and the virtual function 321V-2 can use the virtual function management queue stored in the virtual function management queue storage area 223-1 of the host memory 220 and the multiple virtual function I / O queues stored in the virtual function I / O queue storage area 223-2 of the host memory 220 to independently perform queue management operations and command / data exchange operations.
[0089] In various embodiments, the hypervisor / virtualization agent 240 may not need to intervene in the overall virtualization operation and may participate in SR-IOV capability initialization through, for example, the physical function 321P.
[0090] In order to store the virtual function management queues corresponding to the virtual functions 321V-1 and 321V-2, the host memory 220 may provide a storage area for storing paired management queues and I / O queues. The host memory 220 may additionally provide a plurality of virtual function management queue storage areas 222-1 ("VF1 Admin_Q area") and 223-1 ("VF2 Admin_Q area"). In various embodiments, each virtual function management queue and each virtual function I / O queue may be stored in the host memory 220 in a ring queue format.
[0091] In various embodiments, the host storage system 1000 may be implemented as a fully isolated storage system, in which the physical function 321P and the virtual functions 321V-1 and 321V-2 may be assigned independent management queues and I / O queues. The total power budget of the storage device 300 may be independently allocated to the physical function 321P and the virtual functions 321V-1 and 321V-2, and the power supplied to the memory areas corresponding to the physical function 321P and the virtual functions 321V-1 and 321V-2 in the plurality of memory areas in the memory device 330 may be independently adjusted. Figure 5 Memory areas corresponding to the physical function 321P and the virtual functions 321V- 1 and 321V- 2 , respectively, are described.
[0092] Figure 4 The host core 230 is shown to include one physical machine 231P and two virtual machines 231V-1 and 231V-2, but the present disclosure is not limited thereto. The number of physical machines and virtual machines included in the host core 230 may vary. Similarly, the number of physical functions and virtual functions included in the storage controller 310 may also vary.
[0093] also, Figure 4It is shown that one physical function 321P is allocated to one physical machine 231P and one virtual function 321V-1 or 321V-2 is allocated to one virtual machine 231V-1 or 231V-2, but the present disclosure is not limited thereto. Multiple physical functions may be allocated to one physical machine 231P, and multiple virtual functions may also be allocated to each of the virtual machines 231V-1 and 231V-2.
[0094] In various embodiments, the host storage system 1000 may include one physical machine 231P and two virtual machines 231V- 1 and 231V- 2 , and the physical machine 231P and the two virtual machines 231V- 1 and 231V- 2 are respectively allocated one physical function 321P and two virtual functions 321V- 1 and 321V- 2 .
[0095] Figure 5 yes Figure 3 Detailed block diagram of the host storage system.
[0096] Reference Figure 5 , the non-volatile memory (NVM) 331 may include a plurality of memory pages, wherein the memory pages may be subdivided into memory regions MR1, MR2, and MR3. Each of the memory pages may include a plurality of memory cells connected to a word line, and a certain number of memory pages may form a memory block. As a result, the non-volatile memory 331 may include a plurality of memory blocks.
[0097] In various embodiments, the memory regions MR1, MR2, and MR3 of the memory device 330 may include a memory page MP1, a memory page MP2, and a memory page MP3, respectively. The nonvolatile memory 331 may also include memory pages other than the memory pages MP1, MP2, and MP3.
[0098] In various embodiments, the volatile memory 332 may include regions R1, R2, and R3. The regions R1, R2, and R3 may correspond to a DRAM chip or an SRAM chip, but the present disclosure is not limited thereto.
[0099] In various embodiments, the memory device 330 may include memory regions MR1, MR2, and MR3. The memory region MR1 may include a memory page MP1 of the nonvolatile memory 331 and a region R1 of the volatile memory 332. The memory region MR2 may include a memory page MP2 of the nonvolatile memory 331 and a region R2 of the volatile memory 332. The memory region MR3 may include a memory page MP3 of the nonvolatile memory 331 and a region R3 of the volatile memory 332.
[0100] In various embodiments, each of the memory regions MR1, MR2, and MR3 of the memory device 330 may be composed of a combination of a nonvolatile memory and a volatile memory, but the present disclosure is not limited thereto. Alternatively, each of the memory regions MR1, MR2, and MR3 may include only a nonvolatile memory or only a volatile memory.
[0101] In various embodiments, memory region MR1 may be associated with physical function 321P, memory region MR2 may be associated with virtual function 321V-1, and memory region MR3 may be associated with virtual function 321V-2. Physical machine 231P may communicate with memory region MR1 and use memory region MR1, virtual machine 231V-1 may communicate with memory region MR2 and use memory region MR2, and virtual machine 231V-2 may communicate with memory region MR3 and use memory region MR3 for data storage. For example, data processed by physical machine 231P may be stored in memory region MR1, and physical machine 231P may read data stored in memory region MR1. Similarly, data processed by virtual machine 231V-1 may be stored in memory region MR2, and virtual machine 231V-1 may read data stored in memory region MR2. Similarly, data processed by virtual machine 231V-2 may be stored in memory region MR3, and virtual machine 231V-2 may read data stored in memory region MR3.
[0102] In each embodiment, data generated or processed by a device or unit of the vehicle 100 corresponding to the physical machine 231P may be stored in the memory area MR1 via the physical function 321P, or data generated or processed by a device or unit of the vehicle 100 corresponding to the physical machine 231P may be read from the memory area MR1 via the physical function 321P. In addition, data generated or processed by a device or unit of the vehicle 100 corresponding to the virtual machine 231V-1 may be stored in the memory area MR2 via the virtual function 321V-1, or data generated or processed by a device or unit of the vehicle 100 corresponding to the virtual machine 231V-1 may be read from the memory area MR2 via the virtual function 321V-1. Similarly, data processed by a device or unit of the vehicle 100 corresponding to the virtual machine 231V-2 may be stored in the memory area MR3 via the virtual function 321V-2, or data processed by a device or unit of the vehicle 100 corresponding to the virtual machine 231V-2 may be read from the memory area MR3 via the virtual function 321V-2.
[0103] In various embodiments, the amount of data generated or processed by a device or unit of the vehicle 100 may vary according to the operation mode of the vehicle 100. Therefore, the amount of power budget that should be allocated to the physical function 321P and the virtual functions 321V-1 and 321V-2 corresponding to the corresponding device or unit of the vehicle 100 may be different. Figure 5 In the host storage system 1000, independent management queues and I / O queues are allocated to the physical function 321P and the virtual functions 321V-1 and 321V-2, such as Figure 4 As a result, the amount of power budget allocated to the physical function 321P and the virtual functions 321V- 1 and 321V- 2 can be independently managed based on the operating mode of the vehicle 100 .
[0104] Figure 6 It is shown Figure 3 The same reference numerals used in the previous embodiments will continue to be used in the remainder of the present disclosure below.
[0105] Reference Figure 6 , initially, the host 200 may issue an initialization and setup command (S100) and send the initialization and setup command to the storage controller 310 (S101). The storage controller 310 may receive the initialization and setup command and may create a physical function (PF) 321P and virtual functions (VF) 321V-1 and 321V-2 (S102). Then, the host 200 may allocate the physical function 321P and the virtual functions 321V-1 and 321V-2 to the physical machine 231P and the virtual machines (VMs) 231V-1 and 231V-2, respectively (S103).
[0106] Then, the host 200 may send data about the priority between the physical machine 231P and the virtual machines 231V-1 and 231V-2 to the rescheduling unit 319 (S104). For example, the host 200 may send information about which of the physical machine 231P and the virtual machines 231V-1 and 231V-2 is expected to have high power consumption due to factors such as, for example, generating a very large amount of data or processing data quickly, or which of the physical machine 231P and the virtual machines 231V-1 and 231V-2 is expected to have relatively low power consumption to the storage controller 310 according to the operation mode (or driving mode) of the vehicle 100.
[0107] Then, the rescheduling unit 319 may allocate priority tokens to each of the physical function 321P and the virtual functions 321V-1 and 321V-2 based on the data received from the host 200 (S105). Then, the rescheduling unit 319 may send data about the priority tokens allocated to each of the physical function 321P and the virtual functions 321V-1 and 321V-2 to the multi-tenant power control unit 320 (S106). In response to the amount of processed data, the rescheduling unit 319 may be configured to allocate more priority tokens to the first virtual function 321V-1 than to the second virtual function 321V-2.
[0108] Then, the host 200 may issue a command including a power state field for the storage device 300 and sub-power state fields for the physical function 321P and the virtual functions 321V- 1 and 321V- 2 ( S107 ) and may send the command to the multi-tenant power control unit 320 ( S108 ).
[0109] Then, the multi-tenant power control unit 320 may allocate the power budget to the physical function 321P and the virtual functions 321V-1 and 321V-2 (S109) based on the power state of the storage device 300 and the number of priority tokens and the sub-power states of the physical function 321P and the virtual functions 321V-1 and 321V-2. In response to the amount of data processed, the multi-tenant power control unit 320 may be configured to allocate more power budget to the physical function 321P than to the first virtual function 321V-1.
[0110] Then, the multi-tenant power control unit 320 may send a control signal to the power management circuit 340 (S110). The power management circuit 340 may independently manage the power supplied to the memory regions MR1, MR2, and MR3 based on the control signal. The control signal may include information about the power budget allocated to the physical function 321P and the virtual functions 321V-1 and 321V-2 by the multi-tenant power control unit 320. The power management circuit 340 may manage the power supplied to the memory regions MR1, MR2, and MR3 corresponding to the physical function 321P and the virtual functions 321V-1 and 321V-2, respectively, based on the power budget allocated to each of the physical function 321P and the virtual functions 321V-1 and 321V-2.
[0111] In various embodiments, if the power budget allocated to the virtual function 321V-1 by the multi-tenant power control unit 320 is reduced, the power management circuit 340 may reduce the amount of power supplied to the memory region MR2 corresponding to the virtual function 321V-1. Conversely, if the power budget allocated to the virtual function 321V-2 by the multi-tenant power control unit 320 is increased, the power management circuit 340 may increase the amount of power supplied to the memory region MR3 corresponding to the virtual function 321V-2. Therefore, as previously described with reference to Figure 4 As mentioned, when the host storage system 1000 is implemented as a fully isolated storage system, the power management circuit 340 may independently manage power supplied to each of the memory regions MR1 , MR2 , and MR3 corresponding to the physical function 321P and the virtual functions 321V- 1 and 321V- 2 , respectively.
[0112] Then, the multi-tenant power control unit 320 may select one of the physical function 321P and the virtual functions 321V-1 and 321V-2 and may release the power budget allocated to the selected function (S112). In addition, the multi-tenant power control unit 320 may report and send information about any additional available power budget to the host 200 (S113).
[0113] In various embodiments, the host 200 may first send data about the priority between the physical machine 231P and the virtual machines 231V-1 and 231V-2 to the rescheduling unit 319, and then send a command including a power state field for the storage device 300 and a sub-power state field for the physical function 321P and the virtual functions 321V-1 and 321V-2 to the multi-tenant power control unit 320, but the present disclosure is not limited thereto. Alternatively, in some embodiments, the host 200 may first send a command including a power state field for the storage device 300 and a sub-power state field for the physical function 321P and the virtual functions 321V-1 and 321V-2 to the multi-tenant power control unit 320, and then send data about the priority between the physical machine 231P and the virtual machines 231V-1 and 231V-2 to the rescheduling unit 319.
[0114] Figure 7 It is shown Figure 6 A schematic diagram of exemplary commands issued by a host.
[0115] Return to reference Figure 4, the host 200 may send a command indicating that a specific action is to be performed to the storage device 300 and may receive a response signal to the sent command from the storage device 300. To this end, the host 200 may include a submission queue for temporarily storing commands to be sent to the storage device 300 and a completion queue for temporarily storing response signals received from the storage device 300.
[0116] Figure 7 Shown for Figure 6 Submission queue entries for commands issued by the host. Figure 7 , the NVMe standard defines a submission queue entry. A submission queue entry may consist of, for example, 16 command double words and may have a size of 64 bytes. The size of each command double word may be 4 bytes.
[0117] In various embodiments, a submission queue entry may include command double word 0 ("CDW0"), a namespace identifier ("NSID"), command double word 2 ("CDW2"), command double word 3 ("CDW3"), a metadata pointer ("MPTR"), a data pointer ("DPTR"), command double word 10 ("CDW10"), command double word 11 ("CDW11"), command double word 12 ("CDW12"), command double word 13 ("CDW13"), command double word 14 ("CDW14"), and command double word 15 ("CDW15"). However, the configuration of the submission queue entry is not limited to Figure 7 shown.
[0118] exist Figure 6 In S107, one of command double word 0, command double word 2, command double word 3, command double word 10, command double word 11, command double word 12, command double word 13, command double word 14 and command double word 15 of the submission queue entry can be used for the command issued by the host 200, including the power state field and the sub-power state field. Figure 7 It is shown that the command issued by host 200 uses command double word 10 of the submission queue entry, but the present disclosure is not limited thereto. In the following description, it is assumed that the command issued by host 200 uses any command double word, namely, command double word N ("CDWN") in the submission queue entry.
[0119] In various embodiments, the command double word N may include a power state field PS, a workload hint field WH, and a sub-power state field SPS. Figure 7 , the sub-power status field SPS may be located after the power status field PS. The sub-power status field SPS may include a plurality of bits, for example, three bits, but the present disclosure is not limited thereto.
[0120] In various embodiments, the power state field PS may include information about the power state sent by the storage controller 310. The power state may represent (or indicate) the total power budget of the storage device 300. The total power budget of the storage device 300 may be determined within the total power capacity of the storage device 300. Fig.11 The total power budget of the storage device 300 is described.
[0121] In various embodiments, the workload hint field WH may be located between the power state field and the sub-power state field. The workload hint field WH may indicate the type of workload.
[0122] In various embodiments, the sub-power state field SPS may include information about the sub-power state of at least one of the physical function 321P and the virtual functions 321V-1 and 321V-2 of the storage controller 310. Figure 8 The sub-power states of the physical function 321P and the virtual functions 321V- 1 and 321V- 2 are described.
[0123] Figure 8 Presented for explanation Figure 7 A table of different sub-power states that can be included in a command.
[0124] Reference Figure 8 , Figure 7 The sub-power state field SPS included in the command may include information about a power allocation ratio for at least one of the physical function 321P and the virtual functions 321V-1 and 321V-2 of the storage controller 310. For example, when the sub-power state field SPS is set to values 0, 1, 2, 3, 4, and 5, the power allocation ratios may be set to 120%, 100%, 80%, 60%, 40%, and 20%, respectively, but the present disclosure is not limited thereto.
[0125] As the amount of data processed by each of the physical machine 231P and the virtual machines 231V-1 and / or 231V-2 increases, the power allocation ratio for each of the physical function 321P and the virtual functions 321V-1 and / or 321V-2 may also increase. When a larger amount of power budget is allocated to each of the physical machine 231P and the virtual machines 231V-1 and 231V-2, the non-volatile memory 331 and the volatile memory 332 of the memory device 330 may be additionally used.
[0126] For example, according to the change of the operation mode of the vehicle 100, in response to the increase in the amount of data processed by the physical machine 231P in other devices or units of the vehicle 100, the host 200 may insert a sub-power state field SPS with a higher power allocation ratio for the physical function 321P into the command, and may send the command to the storage controller 310. Conversely, according to the change of the operation mode of the vehicle 100, in response to the decrease in the amount of data processed by the virtual machine 231V-1 in other devices or units of the vehicle 100, the host 200 may insert a sub-power state field SPS with a lower power allocation ratio for the virtual function 321V-1 into the command, and may send the command to the storage controller 310.
[0127] In various embodiments, as the power allocation ratio for the physical function 321P and the virtual functions 321V- 1 and 321V- 2 increases, the physical machine 231P and the virtual machines 231V- 1 and 231V- 2 may be able to process data faster.
[0128] In this way, the multi-tenant power control unit 320 of the storage controller 310 can obtain information about the sub-power states and power allocation ratios for the physical function 321P and the virtual functions 321V-1 and 321V-2 through commands such as NVMe commands received from the host 200.
[0129] Fig. 9 is a flow chart illustrating the operation of a storage controller according to some embodiments of the present disclosure.
[0130] Reference Fig. 9 , the storage controller 310 may receive data about the priority between the physical machine 231P and the virtual machines 231V-1 and 231V-2 from the host 200 (S200). The storage controller 310 may receive a command including information about the power state and the sub-power state from the host 200 (S201). Through the received command, the storage controller 310 may obtain information about the total power budget of the storage device 300 and the sub-power state and power allocation ratio for each of the physical function 321P and the virtual functions 321V-1 and 321V-2.
[0131] In various embodiments, the storage controller 310 may scan the physical function 321P and the virtual functions 321V-1 and 321V-2 (S202). Through the scanning operation, the storage controller 310 may collect information about the number of physical functions and virtual functions to which the power budget is to be allocated and the sub-power states and power allocation ratios for the physical functions and virtual functions. For example, the collected information may include the sub-power states and power allocation ratios for the physical function 321P and the virtual functions 321V-1 and 321V-2.
[0132] In various embodiments, the rescheduling unit 319 of the storage controller 310 may allocate a priority token to each of the physical function 321P and the virtual functions 321V-1 and 321V-2 based on the information obtained in S200 and S201 (S203). In S203, a larger amount of power budget may be allocated to a physical function or a virtual function having a relatively larger amount of priority tokens. Therefore, a physical machine or a virtual machine corresponding to a physical function or a virtual function allocated with a smaller amount of power budget may process data faster than other physical machines or virtual machines.
[0133] In various embodiments, the multi-tenant power control unit 320 may identify the total power budget of the storage device 300 (S204). For example, the multi-tenant power control unit 320 may identify the total power budget of the storage device 300 through the power state field PS included in the command received from the host 200 in S201.
[0134] In various embodiments, the multi-tenant power control unit 320 may allocate a power budget to each of the physical function 321P and the virtual functions 321V-1 and 321V-2 (S205). The multi-tenant power control unit 320 may allocate a power budget using the following equation (1):
[0135]
[0136] Referring to equation (1) above, the power budget may be allocated to each of the physical function 321P and the virtual functions 321V-1 and 321V-2 based on the product of the number of priority tokens allocated to the corresponding function and the power allocation ratio for the sub-power state. The greater the number of priority tokens allocated by the rescheduling unit 319 and the greater the power allocation ratio for the sub-power state, the greater the amount of power budget allocated to each of the physical function 321P and the virtual functions 321V-1 and 321V-2.
[0137] In various embodiments, the storage controller 310 may receive data regarding the operating mode of the vehicle 100 (S206). For example, if the operating mode of the vehicle 100 changes between S201 and S206, the storage controller 310 may receive data regarding the updated priority between the physical machine 231P and the virtual machines 231V-1 and 231V-2. The storage controller 310 may obtain data regarding the updated priority between the physical machine 231P and the virtual machines 231V-1 and 231V-2.
[0138] In various embodiments, the storage controller 310 may issue a command including information about the updated power state and sub-power state. The storage controller 310 may obtain information about the updated total power budget of the storage device 300 and the updated sub-power states and power allocation ratios for the physical function 321P or the virtual functions 321V-1 and 321V-2.
[0139] In each embodiment, the storage controller 310 may determine whether the sub-power state of the physical function 321P or the virtual functions 321V-1 and 321V-2 has changed (S207). The storage controller 310 may determine whether the sub-power state of the physical function 321P or the virtual functions 321V-1 and 321V-2 included in the command received from the host 200 in step S206 has changed relative to the sub-power state of the physical function 321P or the virtual functions 321V-1 and 321V-2 included in the command received from the host 200 in S201. In response, if the sub-power state of the physical function 321P and the sub-power state of the virtual functions 321V-1 and 321V-2 have not changed (S207-No), the storage controller 310 may determine whether the driving mode of the vehicle 100 has been completed (S208). Then, if it is determined in S208 that the driving mode of the vehicle 100 has been completed (S208-Yes), the storage controller 310 may terminate its operation. Alternatively, if it is determined in S208 that the driving mode of the vehicle 100 has not been completed (S208-No), the storage controller 310 may receive data on the operating mode of the vehicle 100 again (S206).
[0140] In various embodiments, if it is determined in S207 that the sub-power state of the physical function 321P or the sub-power state of the virtual functions 321V-1 and 321V-2 has changed (S207-Yes), the rescheduling unit 319 may reallocate priority tokens to the physical function 321P and each of the virtual functions 321V-1 and 321V-2 based on the data about the updated priority between the physical machine 231P and the virtual machines 231V-1 and 231V-2 received from the host 200 in S206 (S209). For example, if the changed operating mode of the vehicle 100 results in an increase in the amount of data generated or processed by devices or units of the vehicle 100 having fewer allocated priority tokens, more priority tokens may be allocated to the corresponding functions.
[0141] In various embodiments, the multi-tenant power control unit 320 may adjust the power allocation ratio for each of the physical function 321P and the virtual functions 321V-1 and 321V-2 based on the updated or changed sub-power states received in S206 (S209). Figure 8If the sub-power state of physical function 321P is initially 0 (which results in a power allocation ratio of 120% for physical function 321P) but changes to 3, the multi-tenant power control unit 320 may change the power allocation ratio for physical function 321P from 120% to 60%.
[0142] In various embodiments, if the operating mode of the vehicle 100 changes and the amount of data processed by the physical machine 231P to which the physical function 321P is assigned decreases, or if the need for fast data processing by the physical machine 231P decreases, the power allocation ratio for the physical function 321P may be reduced.
[0143] In various embodiments, the multi-tenant power control unit 320 may identify the total power budget of the storage device 300 (S210). For example, the multi-tenant power control unit 320 may identify the total power budget of the storage device 300 through the power state field PS included in the command received from the host 200 in S206.
[0144] In various embodiments, the total power budget of the storage device 300 may be adjusted according to changes in the operating mode of the vehicle 100. For example, if a device or unit of the vehicle 100 generates or processes a very large amount of data, as in a constant speed mode, the host 200 may set the total power budget for the storage device 300 higher. Conversely, if a device or unit of the vehicle 100 generates or processes a small amount of data, as in a stop mode, the host 200 may set the total power budget for the storage device 300 lower.
[0145] In various embodiments, the multi-tenant power control unit 320 may allocate the power budget to each of the physical function 321P and the virtual functions 321V-1 and 321V-2 based on equation (1) (S211). As a result, the power budget may be reallocated between the devices or units of the shared storage device 300 of the vehicle 100 according to the operation mode of the vehicle 100.
[0146] Fig.10 Presented for explanation Figure 1 A table of data generated by sensors included in a vehicle.
[0147] Reference Fig.10 The vehicle 100 may include various sensors for sensing the periphery of the vehicle 100, namely, a radar sensor, a light detection and ranging (LIDAR) sensor, a camera sensor, and an ultrasonic sensor. Each of the first module, the second module, and the third module may include at least one of the radar sensor, the light detection and ranging (LIDAR) sensor, the camera sensor, and the ultrasonic sensor.
[0148] Fig.10An example of the amount of data (eg, megabits per second (MB / s)) generated per second by each of the sensors of the vehicle 100 is shown. Fig.10 As shown, the sensors of the vehicle 100 may generate or process different amounts of data. In addition, when the operating mode of the vehicle 100 changes, the amount of data generated by each of the sensors of the vehicle 100 may be different from Fig.10 shown.
[0149] Fig.11 A diagram showing the allocation of different vehicle operating modes to different vehicle safety integrity levels (ASIL) ratings is presented. Fig.10 A table of priority tokens and sub-power states of sensors. Figures 12 to 16 Tables are presented to explain the different vehicle operating modes for the vehicle. Fig.10 Various scenarios in which power budgets are shared among sensors of the vehicle 100, and operations for sharing and reallocating power budgets among sensors of the vehicle 100 for vehicle operating modes based on ASIL ratings.
[0150] Reference Fig.11 , the vehicle 100 can be divided into five operating modes (or driving modes). There may be a case where no priority is set between sensors ("case 1"). In addition, there may be different modes according to the ASIL level of the advanced driver assistance system (ADAS) of the vehicle 100, that is, a constant speed mode corresponding to ASIL level C ("case 2"), a stop mode corresponding to ASIL level A ("case 3"), a reverse mode corresponding to ASIL level B ("case 4"), and an emergency mode corresponding to ASIL level D ("case 5").
[0151] like Fig.11 As shown, the total power capacity of the storage device 300 may be, for example, 25 W. The total power capacity of the storage device 300, such as an SSD, may be fixed to a predetermined value. In addition, a total power budget for the storage device 300 may be set within the total power capacity of the storage device 300 according to the operating mode of the vehicle 100.
[0152] For example, if the sensors of the vehicle 100 generally generate or process a very large amount of data, the total power budget of the storage device 300 may be increased within the total power capacity of the storage device 300. Conversely, if the sensors of the vehicle 100 generally generate or process a small amount of data, the total power budget of the storage device 300 may be reduced within the total power capacity of the storage device 300. Information about the total power budget of the storage device 300 may be included in the Figure 7 The power state field PS of the command.
[0153] Reference Fig.11 and Fig.12 , without targeting Fig.10 In case 1 of setting the sensor priority or sub-power state, the total power budget of the storage device 300 can be Fig.10 The power is evenly distributed among the sensors, and each sensor receives 6.25W.
[0154] Reference Fig.11 and Fig.13 , in case 2 where the vehicle 100 is in a constant speed mode corresponding to ASIL level C, more power budget may need to be allocated to the radar sensor and the LIDAR sensor compared to the camera sensor and the ultrasonic sensor. For example, during constant speed driving, the camera sensor recognizes objects and identifies colors, but cannot accurately measure the distance to the object, and therefore, the need for fast data processing by the camera sensor may be reduced. In contrast, the need for fast data processing by the radar sensor and the LIDAR sensor (which measure and detect the distance to the object) may increase.
[0155] In various embodiments, out of a total of 17 priority tokens, the rescheduling unit 319 may allocate five priority tokens to each of the radar sensor and the LIDAR sensor, four tokens to the camera sensor, and three tokens to the ultrasonic sensor.
[0156] In addition, when the vehicle 100 is traveling at a constant speed, the sensor generates a relatively large amount of data. Therefore, the host 200 can set the power allocation ratio for the functions corresponding to each sensor to 100% through the sub power state field SPS of the command sent to the storage controller 310.
[0157] In various embodiments, the amount of power budget allocated to each of the sensors may be calculated using equation (1) based on the number of assigned priority tokens for the sensor and the power allocation ratio for the sub-power state of the sensor.
[0158] Reference Fig.11 and Fig.14 , in Case 3 where the vehicle 100 is in the stop mode corresponding to ASIL level A, the importance of object recognition around the vehicle 100 may be reduced relative to the constant speed mode (i.e., Case 2). Therefore, the rescheduling unit 319 may reduce the number of priority tokens allocated to each of the radar sensor and the LIDAR sensor, while increasing the number of priority tokens allocated to the camera sensor.
[0159] When the vehicle 100 is completely stopped, the sensors generate a relatively small amount of data. In various embodiments, the host 200 may set the power allocation ratio for the functions corresponding to the respective sensors as low as 20% through the sub power state field SPS of the command sent to the storage controller 310 .
[0160] In various embodiments, the amount of power budget allocated to each of the sensors may be calculated based on the number of assigned priority tokens and the sub-power state of the sensor using equation (1). As a result, when the vehicle 100 is stationary, the total power used by the storage device 300 may be as low as 5W, saving approximately 80% of power.
[0161] Reference Fig.11 and Fig.15 In case 4, when the vehicle 100 is in the reverse mode corresponding to ASIL level B, there may be additional power consumption requirements for the rear camera of the vehicle 100. Therefore, in order to allocate more power budget to the camera sensor, the rescheduling unit 319 may increase the number of priority tokens allocated to the camera sensor.
[0162] In addition, when the vehicle 100 is in reverse, the sensor may consume relatively more power, and therefore, the power allocation ratio for the sub-power state of the sensor may be higher than that in reverse. Fig.14 In case 3, the power allocation ratio for the camera sensor may be set relatively higher. In various embodiments, the power allocation ratio for the camera sensor may be set higher than that for other sensors such as the radar sensor.
[0163] In various embodiments, the amount of power budget allocated to each of the sensors may be calculated based on the number of priority tokens allocated to the sensor and the power allocation ratio for the sub-power state of the sensor using equation (1). As a result, when the vehicle 100 is in reverse, the total power used by the storage device 300 may be approximately 11.79 W, saving approximately 53% of power.
[0164] Reference Fig.11 , Fig.13 and Fig.16 , in case 5 where the vehicle 100 is in the emergency mode corresponding to ASIL level D, the number of priority tokens allocated to each of the radar sensor, LIDAR sensor, camera sensor, and ultrasonic sensor is the same as that in the uniform speed mode (i.e., Fig.13 However, some (i.e., 20%) of the power allocation ratio for the camera sensor and ultrasonic sensor with fewer allocated priority tokens can be reallocated to the radar sensor and LIDAR sensor with more allocated priority tokens. As a result, Fig.13 Compared with the uniform speed mode in , approximately 1.33 W and 1.00 W of power can be released from the camera sensor and the ultrasonic sensor, respectively, and approximately 1.17 W of power can be additionally allocated to each of the radar sensor and the LIDAR sensor.
[0165] Fig.17 Presented for explanation Fig.10Diagram of the redistribution of the power budget between sensors.
[0166] Reference Fig.17 As mentioned previously, the sensors of the vehicle 100 that share the storage device 300 may share the total power budget of the storage device 300. The total power budget of the storage device 300 may be allocated to each of the sensors of the vehicle 100 according to the operating mode of the vehicle 100. Since the host storage system 1000 including the storage device 300 may be implemented as a fully isolated storage system, the power allocated to each of the sensors may be managed independently. For example, if an excess power budget is allocated to a camera sensor, the power budget allocated to the camera sensor may be released to save power, and the released power budget may be additionally allocated to radar sensors and LIDAR sensors that require additional power budget. The power budget allocated to the ultrasonic sensor may be independently maintained. As a result, the total power budget of the storage device 300 may be effectively managed.
[0167] The embodiments of the present disclosure have been described above with reference to the accompanying drawings, but the present disclosure is not limited thereto, but can be implemented in various different forms. It should be understood that the present disclosure can be implemented in other specific forms without changing the technical spirit or gist of the present disclosure. Therefore, it should be understood that the embodiments described herein are illustrative and non-restrictive in all aspects.
Claims
1. A storage controller, comprising: A physical function, which is allocated to a physical machine of the host for processing the first data; a first virtual function allocated to a first virtual machine of the host computer for processing second data; a second virtual function, which is allocated to a second virtual machine of the host that processes third data; a rescheduling unit configured to assign a priority token to each of the physical function, the first virtual function, and the second virtual function; as well as A multi-tenant power control unit configured to receive sub-power states of the physical function, the first virtual function, and the second virtual function, and to allocate a power budget to each of the physical function, the first virtual function, and the second virtual function based on an assigned priority token and the sub-power state.
2. The storage controller according to claim 1, wherein: In response to the number of priority tokens allocated to the physical function being greater than the number of priority tokens allocated to the first virtual function, the multi-tenant power control unit is configured to allocate more power budget to the physical function than to the first virtual function.
3. The storage controller according to claim 1, wherein: The multi-tenant power control unit is configured to allocate a power budget to the first virtual function based on a product of a number of priority tokens allocated to the first virtual function and a power allocation ratio for a sub-power state of the first virtual function.
4. The storage controller according to claim 1, wherein: The sub-power state of the physical function, the sub-power state of the first virtual function, and the sub-power state of the second virtual function are included in a non-volatile memory fast command issued by the host.
5. The storage controller according to claim 1, wherein: Each of the physical function, the first virtual function, and the second virtual function is configured to process data generated from any one of a radar sensor, a light detection and ranging sensor, a camera sensor, and an ultrasonic sensor.
6. The storage controller according to claim 5, wherein: The physical function is configured to process data generated from the camera sensor, The first virtual function is configured to process data generated from the ultrasonic sensor, The second virtual function is configured to process data generated from at least one of the radar sensor and the light detection and ranging sensor, and When the vehicle is in an emergency mode, the multi-tenant power control unit is configured to reallocate a power budget allocated to each of the physical function and the first virtual function to the second virtual function.
7. A storage device comprising: a storage controller configured to generate a physical function, a first virtual function, and a second virtual function, wherein the physical function is allocated to a physical machine of a host that processes first data, the first virtual function is allocated to a first virtual machine of the host that processes second data, and the second virtual function is allocated to a second virtual machine of the host that processes third data; a memory device comprising a first memory area corresponding to the physical function, a second memory area corresponding to the first virtual function, and a third memory area corresponding to the second virtual function; as well as a power management circuit controlled by the storage controller to manage power supplied to each of the first memory area, the second memory area, and the third memory area, in, The storage controller includes: a rescheduling unit configured to assign a priority token to each of the physical function, the first virtual function, and the second virtual function; and a multi-tenant power control unit configured to receive sub-power states of the physical function, the first virtual function, and the second virtual function, and to assign a power budget to each of the physical function, the first virtual function, and the second virtual function based on the assigned priority tokens and sub-power states of the physical function, the first virtual function, and the second virtual function, The power management circuit is controlled by the multi-tenant power control unit to independently manage power supplied to each of the first memory area, the second memory area, and the third memory area based on a power budget allocated to each of the physical function, the first virtual function, and the second virtual function.
8. The storage device according to claim 7, wherein: In response to an amount of data processed by the physical machine being greater than an amount of data processed by the first virtual machine, the multi-tenant power control unit is configured to allocate more of a power budget to the physical function than to the first virtual function.
9. The storage device according to claim 7, wherein: In response to an amount of data processed by the first virtual machine being greater than an amount of data processed by the second virtual machine, the rescheduling unit is configured to assign more priority tokens to the first virtual function than to the second virtual function.
10. The storage device according to claim 7, wherein: The memory device comprises a non-volatile memory, the non-volatile memory comprising a plurality of memory pages, The plurality of memory pages include a first memory page, a second memory page, and a third memory page, The first memory region includes a first memory page, The second memory region includes a second memory page, and The third memory region includes a third memory page.
11. The storage device according to claim 10, wherein: The memory device also includes a volatile memory, The volatile memory includes a first area, a second area and a third area, The first memory area also includes the first area of the volatile memory, The second memory area also includes the second area of the volatile memory, and The third memory area also includes the third region of the volatile memory.
12. A host storage system, comprising: A host, comprising a physical machine for processing first data, a first virtual machine for processing second data, and a second virtual machine for processing third data; a storage controller configured to generate a physical function allocated to the physical machine, a first virtual function allocated to the first virtual machine, and a second virtual function allocated to the second virtual machine; as well as a memory device comprising a first memory area corresponding to the physical function, a second memory area corresponding to the first virtual function, and a third memory area corresponding to the second virtual function, in, The host is configured to provide a command including a power state field for a storage device including the storage controller and the memory device and a sub-power state field for at least one of the physical function, the first virtual function, and the second virtual function, and The storage controller is configured to receive the command and allocate a power budget to at least one of the physical function, the first virtual function, and the second virtual function based on the sub-power state field of the command.
13. The host storage system according to claim 12, wherein: The sub-power status field consists of multiple bits.
14. The host storage system according to claim 13, wherein: The sub-power status field consists of three bits.
15. The host storage system according to claim 12, wherein: The storage controller includes a multi-tenant power control unit, and The multi-tenant power control unit is configured to identify a total power budget of the memory device and allocate the power budget to each of the physical function, the first virtual function, and the second virtual function based on a sub-power state specified in a sub-power state field of the physical function, the first virtual function, and the second virtual function included in the command.
16. The host storage system according to claim 15, wherein: The storage controller further includes a rescheduling unit, and The rescheduling unit is configured to assign a priority token to each of the physical function, the first virtual function, and the second virtual function.
17. The host storage system according to claim 16, wherein: The multi-tenant power control unit is configured to allocate a power budget to the physical function based on a product of a number of priority tokens allocated to the physical function and a power allocation ratio for a sub-power state of the physical function.
18. The host storage system according to claim 16, wherein: In response to the number of priority tokens allocated to the first virtual function being greater than the number of priority tokens allocated to the second virtual function, and the power allocation ratio for the sub-power state of the first virtual function being greater than or equal to the power allocation ratio for the sub-power state of the second virtual function, the multi-tenant power control unit is configured to allocate more power budget to the first virtual function than to the second virtual function.
19. The host storage system according to claim 15, further comprising: A power management circuit is controlled by the multi-tenant power control unit to independently manage power supplied to each of the first memory area, the second memory area, and the third memory area based on a power budget allocated to each of the physical function, the first virtual function, and the second virtual function.
20. The host storage system according to claim 19, wherein: In response to an amount of the power budget allocated to the first virtual function being greater than an amount of the power budget allocated to the second virtual function, the power management circuit is configured to reallocate some of the power supplied to the second memory region to the first memory region.
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KR1020230114799A