Memory storage consistency test method, device, equipment and storage medium

Abstract

The embodiment of the present application provides a consistency test method, device, equipment and storage medium for a memory storage device, belonging to the field of memory technology; the method includes, after the target memory storage device is initialized, determining a target test port from a plurality of data ports of the target memory storage device and establishing a test channel corresponding to the target test port one by one; data port and ODT corresponding to the data port one by one; respectively interacting with the target memory storage device through each test channel, and determining DQ test data corresponding to the test channel; reading sampled data corresponding to the DQ test data obtained based on DQS sampling from the target memory storage device; performing XOR operation on the sampled data and the corresponding DQ test data to obtain a target eye diagram corresponding to each test channel; outputting the result of judging each ODT based on the consistency condition according to the target eye diagram. The embodiment of the present application can quickly determine the ODT with inconsistent terminal impedance matching.

Description

Technical Field

[0001] The present application relates to the field of memory technology, and in particular to a method, device, equipment and storage medium for consistency testing of a memory storage device. Background Art

[0002] ODT (On-DieTermination, terminal resistance) allows interference signals to be absorbed by the circuit terminals without forming reflections on the circuit, causing an impact on the transmission of data signals. When ODT is set to the memory storage (where the memory storage is a memory based on DDR technology), it can ensure that the interference signal is completely absorbed by the circuit terminal and reduce the probability of reflection on the circuit, thereby improving the signal transmission quality of the memory storage. However, in actual applications, due to differences in the manufacturing process of memory storage, the consistency of the terminal impedance matching provided by the ODT of the memory storage cannot be met, and the impedance matching fails. Therefore, how to quickly determine the ODT with inconsistent terminal impedance matching is a technical problem that needs to be solved urgently. Summary of the invention

[0003] The main purpose of the embodiments of the present application is to provide a consistency test method, device, equipment and storage medium for a memory storage device, which can quickly determine the ODT with inconsistent terminal impedance matching.

[0004] To achieve the above-mentioned purpose, a first aspect of an embodiment of the present application provides a consistency test method for a memory storage device, the method comprising:

[0005] Initializing a target memory storage device, wherein the target memory storage device is provided with a plurality of data ports and terminal resistors ODT corresponding to the data ports one by one;

[0006] Determine a target test port from the multiple data ports and establish a test channel corresponding to the target test port one by one;

[0007] Performing data interaction with the target memory storage through each of the test channels respectively, and determining data bus signal DQ test data corresponding to the test channel;

[0008] Reading sampling data from the target memory storage; the sampling data is data obtained by sampling the data interaction process of the target memory storage based on the data selection signal DQS; the sampling data and the DQ test data are in one-to-one correspondence;

[0009] Performing XOR operation on the sampled data and the corresponding DQ test data to obtain a target eye diagram corresponding to each test channel;

[0010] According to the target eye diagram, it is judged whether the corresponding ODT meets the preset consistency condition, and the consistency test result is output according to the judgment result of each ODT.

[0011] To achieve the above-mentioned purpose, a second aspect of an embodiment of the present application provides a consistency test device for a memory storage device, comprising:

[0012] An initialization module, used for initializing a target memory storage, wherein the target memory storage is provided with a plurality of data ports and terminal resistors ODT corresponding to the data ports one by one;

[0013] A communication connection module, used to determine a target test port from the multiple data ports and establish a test channel corresponding to the target test port in a one-to-one manner;

[0014] An interaction module, used for performing data interaction with the target memory storage through each of the test channels, and determining data bus signal DQ test data corresponding to the test channel;

[0015] A sampling data acquisition module, used for reading sampling data from the target memory storage; the sampling data is data obtained by sampling the data interaction process of the target memory storage based on the data selection signal DQS; the sampling data and the DQ test data have a one-to-one correspondence;

[0016] An eye diagram generation module, used for performing XOR operation on the sampled data and the corresponding DQ test data to obtain a target eye diagram corresponding to each test channel;

[0017] The result verification module is used to determine whether the corresponding ODT meets the preset consistency condition according to the target eye diagram, and output the consistency test result according to the judgment result of each ODT.

[0018] To achieve the above-mentioned purpose, the third aspect of an embodiment of the present application proposes an electronic device, which includes a memory and a processor, the memory stores a computer program, and the processor implements the consistency testing method of the memory storage as described in any one of the first aspects above when executing the computer program.

[0019] To achieve the above-mentioned purpose, the fourth aspect of an embodiment of the present application proposes a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, it implements the consistency testing method of the memory storage device described in any one of the first aspects.

[0020] The consistency test method, device, equipment and storage medium of the memory storage proposed in the present application, by constructing the target eye diagram based on the DQ test data of the target data port and the sampling data, can directly perform multiple continuous tests on multiple target data ports of the target memory storage without the need for third-party test tools, and synchronously generate the target eye diagram related thereto, so that the test efficiency is higher. And the target eye diagram can more intuitively see whether the DQ data changes due to ODT impedance mismatch during the transmission process. At the same time, through the pre-configured consistency conditions, each target eye diagram and consistency condition can be automatically matched, so as to output the consistency test results of each ODT, further reducing the probability of human participation in the test. Therefore, compared with the related art, the embodiment of the present application can more quickly determine the ODT with inconsistent terminal impedance matching. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a flowchart of a consistency test method for a memory storage device provided by the present application;

[0022] Figure 2 It is a schematic diagram of an application scenario of the consistency test method of the memory storage provided by the present application;

[0023] Figure 3 It is a schematic diagram of the interaction between a memory storage and a test platform in one embodiment of a consistency test method for a memory storage provided by the present application;

[0024] Figure 4 It is a module schematic diagram of a memory storage consistency test device provided by the present application;

[0025] Figure 5 It is a structural diagram of the hardware structure corresponding to the consistency test method of the memory storage provided in this application. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0027] It should be noted that, although the functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first", "second", etc. in the specification, claims and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0029] First, some nouns involved in this application are analyzed:

[0030] DDR, that is, double data rate Synchronous Dynamic Random Access Memory.

[0031] ODT (On-DieTermination, terminal resistance) allows interference signals to be absorbed by the terminals of the circuit without forming reflections on the circuit, causing an impact on the transmission of data signals. When ODT is set to a memory storage device (wherein the memory storage device is a memory device based on DDR technology), it can ensure that the interference signal is completely absorbed by the circuit terminal and reduce the probability of forming reflections on the circuit, thereby improving the signal transmission quality of the memory storage device. However, in actual applications, due to differences in the manufacturing processes of memory storage devices, the consistency of the terminal impedance matching provided by the ODT of the memory storage device cannot be met, and the impedance matching fails. Therefore, how to quickly determine the ODT with inconsistent terminal impedance matching is a technical problem that needs to be solved urgently. Based on this, the embodiments of the present application provide a consistency testing method, device, equipment and storage medium for a memory storage device, which can quickly determine the ODT with inconsistent terminal impedance matching.

[0032] The consistency testing method, device, equipment and storage medium of the memory storage provided in the embodiments of the present application are specifically described through the following embodiments. First, the consistency testing method of the memory storage in the embodiments of the present application is described.

[0033] The memory storage consistency test method of the present application can be used in many general or special computer system environments or configurations. For example: personal computers, server computers, handheld devices or portable devices, tablet devices, multi-processor systems, etc. The present application can be described in the general context of computer executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The present application can also be practiced in distributed computing environments, in which tasks are performed by remote processing devices connected through a communication network. In a distributed computing environment, program modules can be located in local and remote computer storage media including storage devices.

[0034] Understandably, referring to Figure 1As shown, according to an embodiment of the present application, a method for testing the consistency of a memory storage device is provided, the method comprising:

[0035] Step S100, initializing the target memory storage, the target memory storage is provided with a plurality of data ports and terminal resistors ODT corresponding to the data ports one by one;

[0036] Step S200, determining a target test port from a plurality of data ports and establishing a test channel corresponding to the target test port in a one-to-one manner;

[0037] Step S300, respectively performing data exchange with the target memory storage through each test channel, and determining the data bus signal DQ test data corresponding to the test channel;

[0038] Step S400, reading sampled data from a target memory storage device; the sampled data is data obtained by sampling a data interaction process of the target memory storage device based on a data selection signal DQS; the sampled data and the DQ test data correspond one to one;

[0039] Step S500, performing XOR operation on the sampled data and the corresponding DQ test data to obtain a target eye diagram corresponding to each test channel;

[0040] Step S600: judging whether the corresponding ODT meets the preset consistency condition according to the target eye diagram, and outputting the consistency test result according to the judgment result of each ODT.

[0041] Therefore, by constructing a target eye diagram based on the DQ test data and sampling data of the target data port, multiple target data ports of the target memory storage can be directly tested multiple times continuously without the help of a third-party test tool, and the target eye diagram related thereto can be generated synchronously, which is more efficient. The target eye diagram can more intuitively show whether the DQ data has changed during transmission due to ODT impedance mismatch. At the same time, through the pre-configured consistency conditions, each target eye diagram and consistency condition can be automatically matched, thereby outputting the consistency test results of each ODT, further reducing the probability of human participation in the test. Therefore, the embodiment of the present application can more quickly determine the ODT with inconsistent terminal impedance matching.

[0042] The embodiment of the present application does not limit the number of target test ports, and those skilled in the art may choose to use each data port of the target memory storage as a target test port, or may select some of the data ports as target test ports.

[0043] Data interaction includes at least one of read operation interaction and write operation interaction. Those skilled in the art can select one of the two to perform data interaction according to actual needs.

[0044] The embodiments of the present application do not involve changes to the initialization of the target memory storage. There is no limitation on how to initialize the target memory storage, and those skilled in the art can selectively set it according to actual needs.

[0045] The port for sampled data read provided by the target memory is different from the port for the test channel. DQ does not affect the data channel constructed by the port for sampled data read.

[0046] The embodiment of the present application does not limit the number of DQ test data on the same test channel and the content of the DQ test data, and those skilled in the art can selectively set them according to actual conditions.

[0047] After performing XOR operation on each sample data and the corresponding DQ test data, a set of data consisting of 0 and 1 and having the same length as the DQ test data can be obtained. At this time, a target eye diagram can be generated based on the data. The embodiment of the present application does not involve how the target eye diagram is generated based on 0 and 1 data, so it will not be described in detail here.

[0048] The target eye diagram corresponds to the DQ test data one by one. The number of target eye diagrams is determined by the number of test channels and the DQ test data on the test channels. For example, there are 3 test channels, namely test channel 1, test channel 2, and test channel 3. Among them, there are 10 DQ test data in test channel 3, 2 DQ test data in test channel 2, and 7 DQ test data in test channel 1; then the target eye diagram of test channel 3 is set to 10; the target eye diagram of test channel 2 is set to 2; the target eye diagram of test channel 1 is set to 7; in this round of testing, the total number of target eye diagrams is 10+2+7=19.

[0049] Whether the ODT meets the consistency condition can be determined by comparing at least one of the area ratio, size (length and width) and shape similarity between the target eye diagram and the expected eye diagram.

[0050] For example, taking each data port in the target memory storage as a target test port, as Figure 2 As shown, the consistency test device as a test platform is integrated with a SOC interface that interacts with the target memory storage. The target memory storage is provided with N data ports. At this time, N test channels can be created. The N test channels are channel 1 to channel N. Each test channel is used to test an ODT, such as Figure 2 As shown, channel 1 can measure whether ODT1 meets the consistency condition, channel 2 can measure whether ODT2 meets the consistency condition, and channel N can measure whether ODTN meets the consistency condition.

[0051] It is understandable that data interaction with the target memory storage is performed through each test channel respectively, and data bus signal DQ test data corresponding to the test channel is determined, including:

[0052] Writing preset signal data to the target memory storage through each test channel respectively, and using the signal data as DQ test data of the corresponding test channel;

[0053] The analog test data is written to the target memory storage through each test channel respectively, and the pre-written analog test data is read from the target memory storage through each test channel to obtain the DQ test data corresponding to the test channel.

[0054] By performing both read and write tests on each test channel, the interference situations in actual scenarios can be covered as much as possible, thereby ensuring the accuracy of ODT consistency judgment.

[0055] The embodiment of the present application does not limit the number of test channels performing data interaction at the same time, nor does it limit whether each test channel performing data interaction at the same time is a write operation or a read operation. Technical personnel in this field can selectively combine them according to actual requests to cover test requirements.

[0056] It is understandable that there are multiple test channels, and data is interacted with the target memory storage through each test channel, including:

[0057] Create test threads corresponding to test channels one by one;

[0058] Each created test thread is synchronously called so that each test thread exchanges data with the target memory storage through the corresponding test channel.

[0059] By configuring multiple test threads, you can improve test efficiency while allowing more combinations of data interactions between test channels, thereby covering more scenarios.

[0060] In other embodiments, a corresponding collection thread is also created for the collection data. By synchronously executing the collection thread and the test thread, the efficiency of consistency judgment on the ODT can be accelerated.

[0061] For example, Figure 3 As shown, for N test channels, each test channel can interact with DQ test data through a corresponding test thread, and at the same time, the collection data j1 and so on corresponding to the DQ test data are collected through the corresponding collection thread.

[0062] It is understandable that there are multiple target eye diagrams corresponding to the same test channel; the DQ test data corresponding to multiple target eye diagrams in the same test channel are the same; according to the target eye diagram, judging whether the corresponding ODT meets the preset consistency conditions includes:

[0063] Perform eye diagram averaging processing on each target eye diagram corresponding to the same DQ test data in the same test channel to obtain a mean eye diagram;

[0064] According to the mean eye diagram and the remaining un-averaged target eye diagram in the corresponding test channel, the target eye diagram of the corresponding test channel is updated;

[0065] According to the updated target eye diagram, determine whether the corresponding ODT meets the consistency condition.

[0066] By first performing eye diagram averaging processing, each type of DQ test data corresponds to a target eye diagram for ODT consistency condition judgment, thereby reducing the computational complexity of consistency condition judgment.

[0067] It is understandable that the target eye diagrams corresponding to the same DQ test data in the same test channel are subjected to eye diagram averaging to obtain the average eye diagram, including:

[0068] Obtain the distribution trend of each target eye diagram corresponding to the same DQ test data in the same test channel;

[0069] According to the distribution trend, the target eye diagram outside the preset distribution interval is deleted to update the target eye diagram of the test channel;

[0070] The distance mean is calculated according to the coordinate points of each target eye diagram corresponding to the same DQ test data in the same test channel after update to obtain the mean eye diagram.

[0071] For example, if 80% of the eye diagrams in the target eye diagrams corresponding to the same DQ test data in the same test channel are distributed in an interval with a length of [x1, x2] and a width of [y1, y2], it means that the eye diagrams outside the distribution interval corresponding to [x1, x2] and [y1, y2] may be abnormal due to other factors, so that the abnormalities caused by the ODT function itself can be eliminated in this way, further improving the accuracy of the consistency judgment of the ODT. The embodiment of the present application does not limit how to set the distribution interval, and those skilled in the art can selectively set it according to actual conditions.

[0072] The distance mean calculation of the coordinate points of each target eye diagram means that the y coordinate values ​​of each coordinate point with the same x coordinate value are averaged along the x-axis coordinate, and the x coordinate values ​​of each coordinate point with the same y coordinate value are averaged along the y coordinate.

[0073] It is understandable that there are multiple target eye diagrams corresponding to the same test channel; according to the target eye diagram, it is judged whether the corresponding ODT meets the preset consistency conditions, including:

[0074] According to the consistency condition, the eye diagram threshold corresponding to each ODT is obtained;

[0075] For each target eye diagram, the target eye diagram is compared with the corresponding eye diagram threshold to obtain a comparison result;

[0076] According to each comparison result, determine the target eye diagram ratio when each ODT meets the preset eye diagram threshold;

[0077] When the target eye diagram ratio is greater than a preset threshold ratio, it is determined that the corresponding ODT meets the consistency condition.

[0078] The eye diagram threshold may include at least one of an eye diagram area threshold, a length threshold, and a width threshold. When multiple eye diagram thresholds are set, any one of which is not satisfied indicates that the target eye diagram does not meet the eye diagram threshold condition.

[0079] For example, the target eye diagram of ODT1 is set to have 10, which are eye Figure 1 ~Eye diagram 10, the eye diagram threshold includes the eye diagram area threshold and width threshold. Figure 1 If the eye diagram threshold is met but the width threshold is not met, the eye is judged as Figure 1 The case where the preset eye diagram threshold is not met, and the other eye diagrams can be obtained in the same way. Assume that the eye Figure 1 ~If 4 out of 10 eye diagrams do not meet the preset eye diagram threshold, the target eye diagram ratio is 6 / 10=0.6; when 0.6 is greater than the threshold ratio, it is determined that ODT1 meets the consistency condition. When 0.6 is less than or equal to the threshold ratio, it is determined that ODT1 does not meet the preset threshold condition.

[0080] By setting the threshold ratio, the test abnormality caused by other interference situations can be further reduced, thereby improving the accuracy of ODT judgment.

[0081] It is understandable that there are multiple target memory storage devices, and the consistency test results are output according to the judgment results of each ODT, including:

[0082] Obtaining a judgment result of each ODT, and determining a deviation value of each ODT according to the judgment result;

[0083] The deviation value of the ODT corresponding to each data port is displayed in a preset deviation coordinate system with a preset rendering color; wherein the rendering color of the same data port in different types of target memory storages is the same, and the rendering colors of different data ports in the same target memory storage are different.

[0084] The deviation value may be an area deviation value, or a size deviation value (such as a length deviation value, a width deviation value), or a combination of any one or two of the area deviation value and the length deviation value or the width deviation value. This embodiment of the present application does not limit this, and those skilled in the art may selectively set it according to actual conditions.

[0085] By rendering the same data port with the same color, we can see the impact trend of ODT at the same position on the transmission of memory storage. By displaying the deviation value of each data port, we can further see the deviation size of each data port, so as to determine the direction of calibration.

[0086] Understandably, referring to Figure 4 As shown, a memory storage consistency test device provided by the present application includes:

[0087] The initialization module 100 is used to initialize the target memory storage, and the target memory storage is provided with a plurality of data ports and terminal resistors ODT corresponding to the data ports one by one;

[0088] The communication connection module 200 is used to determine a target test port from a plurality of data ports and establish a test channel corresponding to the target test port in a one-to-one manner;

[0089] The interaction module 300 is used to perform data interaction with the target memory storage through each test channel, and determine the data bus signal DQ test data corresponding to the test channel;

[0090] The sampling data acquisition module 400 is used to read the sampling data from the target memory storage; the sampling data is the data obtained by sampling the data interaction process of the target memory storage based on the data selection signal DQS; the sampling data and the DQ test data correspond one to one;

[0091] The eye diagram generation module 500 is used to perform XOR operation on the sampled data and the corresponding DQ test data to obtain the target eye diagram corresponding to each test channel;

[0092] The result verification module 600 is used to determine whether the corresponding ODT meets the preset consistency condition according to the target eye diagram, and output the consistency test result according to the determination result of each ODT.

[0093] The embodiment of the present application also provides an electronic device, the electronic device includes a memory and a processor, the memory stores a computer program, and the processor implements the above-mentioned memory consistency test method when executing the computer program. The electronic device can be any smart terminal including a tablet computer, a car computer, etc.

[0094] See also Figure 5 , Figure 5The hardware structure of an electronic device of another embodiment is illustrated, and the electronic device includes:

[0095] The processor 501 may be implemented by a general-purpose CPU (Central Processing Unit), a microprocessor, an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of the present application;

[0096] The memory 502 may be a NAND flash, and the relevant program code is stored in the memory 502, and is called by the processor 501 to execute the consistency test method of the memory storage of the embodiment of the present application;

[0097] Input / output interface 503, used to implement information input and output;

[0098] Communication interface 504, used to realize communication interaction between the device and other devices, which can be realized through wired mode (such as USB, network cable, etc.) or wireless mode (such as mobile network, WIFI, Bluetooth, etc.);

[0099] A bus 505 that transmits information between various components of the device (e.g., the processor 501, the memory 502, the input / output interface 503, and the communication interface 504);

[0100] The processor 501 , the memory 502 , the input / output interface 503 and the communication interface 504 are connected to each other in communication within the device via the bus 505 .

[0101] An embodiment of the present application also provides a computer-readable storage medium, which is a computer-readable storage medium that stores a computer program. When the computer program is executed by a processor, it implements the consistency testing method of the above-mentioned memory storage.

[0102] The memory, as a non-transient computer-readable storage medium, can be used to store non-transient software programs and non-transient computer executable programs. In addition, the memory may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some embodiments, the memory may optionally include a memory remotely disposed relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0103] The embodiments described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Those skilled in the art will appreciate that with the evolution of technology and the emergence of new application scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0104] Those skilled in the art will appreciate that the technical solutions shown in the figures do not constitute a limitation on the embodiments of the present application, and may include more or fewer steps than shown in the figures, or a combination of certain steps, or different steps.

[0105] The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separated, that is, they may be located in one place or distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0106] Those skilled in the art will appreciate that all or some of the steps in the methods disclosed above, and the functional modules / units in the systems and devices may be implemented as software, firmware, hardware, or a suitable combination thereof.

[0107] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0108] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0109] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the above units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0110] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0111] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0112] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including multiple instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, referred to as ROM), random access memory (Random Access Memory, referred to as RAM), disk or optical disk and other media that can store programs.

[0113] The preferred embodiments of the present invention are described above with reference to the accompanying drawings, but the scope of the rights of the present invention is not limited thereto. Any modification, equivalent substitution and improvement made by a person skilled in the art without departing from the scope and essence of the present invention should be within the scope of the rights of the present invention.

Claims

1. A method for testing the consistency of a memory storage device, characterized in that: The method comprises: Initializing a target memory storage device, wherein the target memory storage device is provided with a plurality of data ports and terminal resistors ODT corresponding to the data ports one by one; Determine a target test port from the multiple data ports and establish a test channel corresponding to the target test port one by one; Performing data interaction with the target memory storage through each of the test channels respectively, and determining data bus signal DQ test data corresponding to the test channel; Reading sampling data from the target memory storage; the sampling data is data obtained by sampling the data interaction process of the target memory storage based on the data selection signal DQS; the sampling data and the DQ test data are in one-to-one correspondence; Performing XOR operation on the sampled data and the corresponding DQ test data to obtain a target eye diagram corresponding to each test channel; According to the target eye diagram, judging whether the corresponding ODT meets the preset consistency condition, and outputting the consistency test result according to the judgment result of each ODT; There are multiple target eye diagrams corresponding to the same test channel; the DQ test data corresponding to the multiple target eye diagrams in the same test channel are the same; judging whether the corresponding ODT meets the preset consistency condition according to the target eye diagram includes: Performing eye diagram averaging processing on the target eye diagrams corresponding to the same DQ test data in the same test channel to obtain a mean eye diagram; According to the mean eye diagram and the remaining unaveraged target eye diagram in the corresponding test channel, updating the target eye diagram of the corresponding test channel; Determining whether the corresponding ODT meets the consistency condition according to the updated target eye diagram; The step of performing eye diagram averaging processing on the target eye diagrams corresponding to the same DQ test data in the same test channel to obtain the average eye diagram includes: Obtaining the distribution trend of each target eye diagram corresponding to the same DQ test data in the same test channel; According to the distribution trend, the target eye diagram outside the preset distribution interval is deleted to update the target eye diagram of the test channel; Calculate the distance mean according to the coordinate points of each target eye diagram corresponding to the same DQ test data in the same test channel after update, to obtain the mean eye diagram; There are multiple target memory storage devices, and the consistency test results are output according to the judgment results of each ODT, including: Obtaining a judgment result of each of the ODTs, and determining a deviation value of each of the ODTs according to the judgment result; The deviation value of the ODT corresponding to each of the data ports is displayed in a preset deviation coordinate system with a preset rendering color; wherein the rendering colors of the same data ports in different types of target memory storages are the same, and the rendering colors of different data ports in the same target memory storages are different.

2. The method for testing the consistency of a memory storage device according to claim 1, wherein: The respectively performing data interaction with the target memory storage through each of the test channels, and determining the data bus signal DQ test data corresponding to the test channel, comprises: Writing preset signal data into the target memory storage through each of the test channels respectively, and using the signal data as DQ test data of the corresponding test channel; The analog test data is written into the target memory storage through each of the test channels respectively, and the analog test data written in advance is read from the target memory storage through each of the test channels to obtain the DQ test data corresponding to the test channel.

3. The method for testing the consistency of a memory storage device according to claim 1, wherein: There are multiple test channels, and data interaction with the target memory storage is performed through each of the test channels, including: Create a test thread corresponding to each test channel one by one; Each created test thread is synchronously called so that each test thread exchanges data with the target memory storage through the corresponding test channel.

4. The method for testing the consistency of a memory storage device according to claim 1, wherein: The step of judging, according to the target eye diagram, whether the corresponding ODT meets a preset consistency condition includes: According to the consistency condition, obtaining the eye diagram threshold corresponding to each of the ODTs; For each of the target eye diagrams, the target eye diagram is compared with the corresponding eye diagram threshold to obtain a comparison result; Determine, according to each of the comparison results, a target eye diagram ratio when each of the ODTs meets a preset eye diagram threshold; When the target eye diagram ratio is greater than a preset threshold ratio, it is determined that the corresponding ODT meets the consistency condition.

5. A memory storage consistency test device, characterized in that: include: An initialization module, used for initializing a target memory storage, wherein the target memory storage is provided with a plurality of data ports and terminal resistors ODT corresponding to the data ports one by one; A communication connection module, used to determine a target test port from the multiple data ports and establish a test channel corresponding to the target test port in a one-to-one manner; An interaction module, used for performing data interaction with the target memory storage through each of the test channels, and determining data bus signal DQ test data corresponding to the test channel; A sampling data acquisition module, used for reading sampling data from the target memory storage; the sampling data is data obtained by sampling the data interaction process of the target memory storage based on the data selection signal DQS; the sampling data and the DQ test data have a one-to-one correspondence; An eye diagram generation module, used for performing XOR operation on the sampled data and the corresponding DQ test data to obtain a target eye diagram corresponding to each test channel; A result verification module, used to determine whether the corresponding ODT meets the preset consistency condition according to the target eye diagram, and output a consistency test result according to the determination result of each ODT; There are multiple target eye diagrams corresponding to the same test channel; the DQ test data corresponding to the multiple target eye diagrams in the same test channel are the same; and the result verification module is further used for: Obtaining the distribution trend of each target eye diagram corresponding to the same DQ test data in the same test channel; According to the distribution trend, the target eye diagram outside the preset distribution interval is deleted to update the target eye diagram of the test channel; Perform distance mean calculation according to the coordinate points of each target eye diagram corresponding to the same DQ test data in the same test channel after update to obtain a mean eye diagram; According to the mean eye diagram and the remaining unaveraged target eye diagram in the corresponding test channel, updating the target eye diagram of the corresponding test channel; Determining whether the corresponding ODT meets the consistency condition according to the updated target eye diagram; Wherein, the target memory storage is provided with a plurality of memory devices, and the result verification module is further used for: Obtaining a judgment result of each of the ODTs, and determining a deviation value of each of the ODTs according to the judgment result; The deviation value of the ODT corresponding to each of the data ports is displayed in a preset deviation coordinate system with a preset rendering color; wherein the rendering colors of the same data ports in different types of target memory storages are the same, and the rendering colors of different data ports in the same target memory storages are different.

6. An electronic device, characterized in that: The electronic device includes a memory and a processor, the memory stores a computer program, and the processor implements the memory storage consistency testing method according to any one of claims 1 to 4 when executing the computer program.

7. A computer-readable storage medium storing a computer program, characterized in that: The computer program, when executed by a processor, implements the memory storage consistency testing method described in any one of claims 1 to 4.

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