Auxiliary power supply circuit and energy storage system

Abstract

The invention provides an auxiliary power supply circuit and an energy storage system, and relates to the technical field of power supplies. The auxiliary power supply circuit comprises a transformer; the first input circuit is electrically connected with a first primary coil of the transformer, and the first input circuit comprises a first pulse width modulation chip and a first input source; the second input circuit is electrically connected with a second primary coil of the transformer, and the second input circuit comprises a second pulse width modulation chip and a second input source; the interlocking circuit is electrically connected with the first pulse width modulation chip and the second pulse width modulation chip, and the first pulse width modulation chip and the second pulse width modulation chip are interlocked through the interlocking circuit; and the at least two output circuits are electrically connected with the secondary coil of the transformer, and the output circuits are used for outputting power supply signals. The integration level of the auxiliary power supply can be improved, the standby power consumption is remarkably reduced, meanwhile, the occupied space can be reduced, and the hardware cost is reduced.

Description

Technical Field

[0001] The present application relates to the field of power supply technology, and in particular to an auxiliary power supply circuit and an energy storage system. Background Art

[0002] In the related art, bidirectional power supplies, including bidirectional ACDC (alternating current-to-direct current) power supplies or bidirectional DCDC (direct current-to-direct current) power supplies, are widely used in the field of new energy. When any port of a bidirectional energy storage system is powered on, it is necessary to be able to wake up the entire energy storage system. Therefore, it is necessary to provide weak current signal power for the entire bidirectional energy storage system by setting up multiple auxiliary power supplies. For example, in an energy storage system, an auxiliary power supply needs to be set up on both the battery side and the energy storage converter (Power Conversion System, PCS) side.

[0003] The design of multiple auxiliary power supplies takes up a lot of space and is costly. Summary of the invention

[0004] The present application aims to at least solve the problem in the prior art or related art that multiple auxiliary power supplies are required to be provided in the energy storage system, which occupies a large space and is costly.

[0005] To this end, a first aspect of the present application provides an auxiliary power supply circuit.

[0006] A second aspect of the present application provides an energy storage system.

[0007] In view of this, the first aspect of the present application provides an auxiliary power supply circuit, the auxiliary power supply circuit comprising: a transformer; a first input circuit, the first input circuit is electrically connected to the first primary coil of the transformer, the first input circuit comprises a first pulse width modulation chip and a first input source; a second input circuit, the second input circuit is electrically connected to the second primary coil of the transformer, the second input circuit comprises a second pulse width modulation chip and a second input source; an interlocking circuit, the interlocking circuit is electrically connected to both the first pulse width modulation chip and the second pulse width modulation chip, the first pulse width modulation chip and the second pulse width modulation chip are interlocked through the interlocking circuit; at least two output circuits, the output circuit is electrically connected to the secondary coil of the transformer, and the output circuit is used to output a power supply signal.

[0008] In this technical solution, the auxiliary power supply circuit includes multiple inputs and multiple outputs, wherein the multiple inputs include a first input circuit and a second input circuit. For a bidirectional energy storage system, the first input circuit and the second input circuit are respectively connected to different power supplies of the bidirectional energy storage system. Exemplarily, the number of output circuits may be 2, 3, ... N.

[0009] The transformer includes a primary coil and a secondary coil. Exemplarily, the transformer is an auxiliary power transformer, which can play a role in high-frequency isolation and energy transmission and storage. The primary coil of the transformer includes a first primary coil and a second primary coil, and the first primary coil and the second primary coil are electrically connected to the first input circuit and the second input circuit respectively. Among them, the first input circuit and the second input circuit are respectively provided with a first pulse width modulation chip and a second pulse width modulation chip, and the first input circuit is protected from overvoltage, overcurrent and voltage stabilization by the first pulse width modulation chip. Similarly, the second input circuit is protected from overvoltage, overcurrent and voltage stabilization by the second pulse width modulation chip.

[0010] The auxiliary power supply circuit also includes an interlocking circuit, through which the first pulse width modulation chip and the second pulse width modulation chip can be interlocked. Among them, only one of the first input circuit and the second input circuit is working, and correspondingly, only one of the first pulse width modulation chip and the second pulse width modulation chip is working at the same time. Exemplarily, the first pulse width modulation chip and the second pulse width chip are chips of the same type, and the functional pin configurations of the chips are the same.

[0011] When the first input source of the first input circuit is powered on, the first pulse width modulation chip works, the first input circuit converts the rectified signal of the first input source into a high-frequency pulse voltage, the transformer transforms the high-frequency pulse voltage, and obtains a stable DC power output after being rectified by the output circuit.

[0012] The present application can provide multiple stable DC power outputs through an auxiliary power supply circuit, which can improve the integration of the auxiliary power supply, significantly reduce standby power consumption, and at the same time reduce space occupancy and reduce hardware costs.

[0013] In addition, the auxiliary power supply circuit in the above technical solution provided by the present application may also have the following additional technical features:

[0014] In some technical solutions of the present application, optionally, the first input circuit includes: a first capacitor, the first capacitor is connected in parallel with the first input source, the first end of the first capacitor is electrically connected to the first end of the first primary coil, and the second end of the first capacitor is grounded; a first power switching device, the first end of the first power switching device is electrically connected to the second end of the first primary coil, and the second end of the first power switching device is grounded; wherein, the first pulse width modulation chip is electrically connected to the control end of the first power switching device, the first pulse width modulation chip is used to output a first drive signal to the control end of the first power switching device, and the first drive signal is used to drive the first power switching device to convert the DC signal of the first input source into a voltage pulse signal.

[0015] In this technical solution, the first input circuit includes a first capacitor and a first power switch device. The first capacitor is a buffer capacitor, which has the functions of power supply dynamic buffering, absorbing circuit high-frequency pulse spikes, and filtering interference. The first power switch device is a high-frequency power switch device. When the electrical signal input by the first input source is a DC signal, the first power switch device can convert the input DC signal into a high-frequency voltage pulse signal and provide it to the transformer through high-frequency switching action. Exemplarily, the first power switch device is a power switch tube.

[0016] In some technical solutions, the control terminal of the first power switch device is electrically connected to the first pulse width modulation chip, and the first pulse width modulation chip can provide a driving signal for controlling the high-speed switching of the first power switch device. In other technical solutions, the driving signal of the first power switch device can be adjusted and compensated by other peripheral devices.

[0017] In some technical solutions of the present application, optionally, the second input circuit includes: a second capacitor, the second capacitor is connected in parallel with the second input source, the first end of the second capacitor is electrically connected to the first end of the second primary coil, and the second end of the second capacitor is grounded; a second power switching device, the first end of the second power switching device is electrically connected to the second end of the second primary coil, and the second end of the second power switching device is grounded; wherein, the second pulse width modulation chip is electrically connected to the control end of the second power switching device, the second pulse width modulation chip is used to output a second drive signal to the control end of the second power switching device, and the second drive signal is used to drive the second power switching device to convert the DC signal of the second input source into a voltage pulse signal.

[0018] In this technical solution, the second input circuit includes a second capacitor and a second power switch device. The second capacitor is a buffer capacitor, which has the functions of power supply dynamic buffering, absorbing circuit high-frequency pulse spikes and filtering interference. The second power switch device is a high-frequency power switch device. When the electrical signal input by the second input source is a DC signal, the second power switch device can convert the input DC signal into a high-frequency voltage pulse signal and provide it to the transformer through high-frequency switching action. Exemplarily, the first power switch device and the second power switch device are both power switch tubes.

[0019] Among them, in some technical solutions, the control end of the second power switch device is electrically connected to the second pulse width modulation chip, and the second pulse width modulation chip can provide a driving signal for controlling the high-speed switching of the second power switch device. In other technical solutions, the driving signal of the second power switch device can be adjusted and compensated by other peripheral devices.

[0020] In some technical solutions of the present application, optionally, at least two output circuits include a first output circuit and a second output circuit; the first output circuit includes: a first diode, the positive electrode of the first diode is electrically connected to the first end of the first secondary coil of the transformer; a first output capacitor, the first end of the first output capacitor is electrically connected to the negative electrode of the first diode, and the second end of the first output capacitor is electrically connected to the second end of the first secondary coil; the second output circuit includes: a second diode, the positive electrode of the second diode is electrically connected to the first end of the second secondary coil of the transformer; a second output capacitor, the first end of the second output capacitor is electrically connected to the negative electrode of the second diode, and the second end of the second output capacitor is electrically connected to the second end of the second secondary coil.

[0021] In the technical solution, the auxiliary power supply circuit includes two output circuits as an example to illustrate the present application. It is assumed that at least two output circuits include a first output circuit and a second output circuit. Exemplarily, the circuit structures of the first output circuit and the second output circuit are the same.

[0022] Wherein, the first output circuit includes a first diode and a first output capacitor, and the second output circuit includes a second diode and a second output capacitor. Assuming that the first input circuit is powered on, the first power switch device switches at a high frequency under the drive of the first pulse width modulation chip. When the first power switch device is turned on, the transformer stores energy, the first diode and the second diode are not turned on, and the first output capacitor and the second output capacitor provide energy to the load. When the first power switch device is turned off, the first diode and the second diode are turned on, the transformer releases energy, and the first output capacitor and the second output capacitor store energy. Exemplarily, the first pulse width modulation chip can achieve a stable output voltage of the output circuit by adjusting the driving duty cycle of the first power switch device.

[0023] Similarly, when the second input circuit is powered on, the second power switch device switches at a high frequency, and when the second power switch device is turned on, the transformer stores energy, the first diode and the second diode are not turned on, and the first output capacitor and the second output capacitor provide energy to the load. When the second power switch device is turned off, the first diode and the second diode are turned on, the transformer releases energy, and the first output capacitor and the second output capacitor store energy.

[0024] In some technical solutions of the present application, optionally, the auxiliary power supply circuit also includes: a sampling circuit, which is electrically connected to the output circuit, the first pulse width modulation chip and the second pulse width modulation chip, and the sampling circuit is used to collect the output voltage of the output circuit and output a feedback signal to the first pulse width modulation chip and the second pulse width modulation chip based on the output voltage.

[0025] In this technical solution, the auxiliary power supply circuit includes a sampling circuit, which collects the output voltage of the output circuit and outputs a feedback signal to the first pulse width modulation chip and the second pulse width modulation chip. The corresponding pulse width modulation chip generates a driving signal of a corresponding duty cycle through loop control and compensation according to the feedback signal to drive the corresponding power switch device. The pulse width modulation chip also has overvoltage protection and overcurrent protection functions. When the pulse width modulation chip, including the first pulse width modulation chip and the second pulse width modulation chip, detects that the feedback signal of the sampling circuit exceeds the set threshold, it immediately triggers an overcurrent protection action or an overvoltage protection action, locks the pulse drive output, and realizes the protection function.

[0026] The present application sets a sampling circuit to collect the output voltage of the multi-channel output circuit, so that the auxiliary energy storage system can realize sampling closed-loop control, thereby improving the control response speed and control accuracy of the auxiliary power supply circuit.

[0027] In some technical solutions of the present application, optionally, the sampling circuit includes: a first resistor, a first end of the first resistor is electrically connected to the output circuit; a first optocoupler device, a first input end of the first optocoupler device is electrically connected to the second end of the first resistor, and an output end of the first optocoupler device is electrically connected to a first pulse width modulation chip and a second pulse width modulation chip; a second resistor, a first end of the second resistor is electrically connected to the output circuit; a third resistor, a first end of the third resistor is electrically connected to the second resistor, and a second end of the third resistor is grounded; a voltage stabilizer device, a first end of the voltage stabilizer device is electrically connected to the second input end of the first optocoupler device, a second end of the voltage stabilizer device is grounded, and a control end of the voltage stabilizer device is electrically connected to the second end of the second resistor.

[0028] In this technical solution, the sampling circuit includes a first optocoupler device, which is used as an optocoupler isolation. The sampling circuit also includes a first resistor, a second resistor, a third resistor and a voltage stabilizing device. Among them, the first resistor and the second resistor are connected to the output circuit, specifically to the output capacitor, for detecting the voltage value across the output capacitor. The third resistor is connected in series with the second resistor. The voltage stabilizing device can be a voltage stabilizing diode or a precision controllable voltage stabilizing source, such as a TL431 voltage stabilizing integrated circuit.

[0029] In the case where the input circuit and the output circuit do not share a common ground, isolated sampling is performed through the first optocoupler device, so that electrical isolation between the input circuit and the output circuit can be achieved, thereby meeting safety requirements.

[0030] In some technical solutions of the present application, optionally, the sampling circuit also includes: a fourth resistor, a first end of the fourth resistor is electrically connected to the second input end of the first optocoupler device; a third capacitor, a first end of the third capacitor is electrically connected to the second end of the fourth resistor, and a second end of the third capacitor is electrically connected to the control end of the voltage stabilizing device.

[0031] In this technical solution, the sampling circuit includes a fourth resistor and a third capacitor, the fourth resistor is connected in series with the second input end of the first optocoupler device, and the third capacitor is connected in series with the fourth resistor. By setting the fourth resistor and the third capacitor, the sampling signal can be filtered to improve the sampling accuracy.

[0032] In some technical solutions of the present application, optionally, the interlock circuit includes a first interlock circuit and a second interlock circuit, wherein the input end of the first interlock circuit is electrically connected to the first pulse width modulation chip, the output end of the first interlock circuit is electrically connected to the second pulse width modulation chip, the input end of the second interlock circuit is electrically connected to the second pulse width modulation chip, and the output end of the second interlock circuit is electrically connected to the first pulse width modulation chip.

[0033] In this technical solution, the interlocking circuit includes a first interlocking circuit and a second interlocking circuit, wherein, when the first pulse width modulation chip is working, the first interlocking circuit receives the working signal of the first pulse width modulation chip, and pulls down the pin of the second pulse width chip, so that the second pulse width modulation chip stops working. When the second pulse width modulation chip is working, the second interlocking circuit receives the working signal of the second pulse width modulation chip, and pulls down the pin of the first pulse width chip, so that the first pulse width modulation chip stops working. The present application realizes the working interlocking of the first pulse width modulation chip and the second pulse width modulation chip through the first interlocking circuit and the second interlocking circuit.

[0034] In some technical solutions of the present application, optionally, the first interlocking circuit includes: a second optocoupler, a first input end of the second optocoupler is electrically connected to the first pulse width modulation chip, and an output end of the second optocoupler is electrically connected to the second pulse width modulation chip; a first transistor, a collector of the first transistor is electrically connected to the second input end of the second optocoupler, an emitter of the first transistor is grounded, and a base of the first transistor is electrically connected to the first pulse width modulation chip; a fifth resistor, a first end of the fifth resistor is electrically connected to the first pulse width modulation chip, and a second end of the fifth resistor is electrically connected to the first input end of the second optocoupler; a sixth resistor, a first end of the sixth resistor is electrically connected to the output end of the second optocoupler, and a second end of the sixth resistor is electrically connected to the second pulse width modulation chip; a seventh resistor, a first end of the seventh resistor is electrically connected to the base of the first transistor, and a second end of the seventh resistor is electrically connected to the first pulse width modulation chip; an eighth resistor, a first end of the eighth resistor is electrically connected to the base of the first transistor, and a second end of the eighth resistor is grounded; and a fourth capacitor, the fourth capacitor is connected in parallel with the eighth resistor.

[0035] In an embodiment of the present application, the first interlocking circuit includes a second optocoupler and a first transistor, and the first pulse width modulation chip and the second pulse width modulation chip realize working interlocking at any time through the interlocking circuit, and only one of the first pulse width modulation chip and the second pulse width modulation chip works at the same time. Among them, the first end of the second optocoupler is electrically connected to the first pulse width modulation chip, the base of the first transistor is electrically connected to the first pulse width modulation chip, the collector of the first transistor is electrically connected to the second end of the second optocoupler, and the emitter of the first transistor is grounded. When the first pulse width modulation chip is working, the first pulse width modulation chip outputs a voltage signal, the first transistor is turned on, so that the primary diode of the second optocoupler is saturated and turned on, the secondary transistor of the second optocoupler is turned on, the pin of the second pulse width modulation chip is pulled low, and the second pulse width modulation chip stops working.

[0036] The first interlocking circuit also includes a fifth resistor, a sixth resistor and a seventh resistor, wherein the fifth resistor is the input resistor of the second optocoupler, and the fifth resistor is connected in series between the first pulse width modulation chip and the first input terminal of the second optocoupler. The sixth resistor is the output resistor of the second optocoupler, and the sixth resistor is connected in series to the output terminal of the second optocoupler. The seventh resistor is connected in series between the first pulse width modulation chip and the base of the first transistor. The eighth resistor is connected in parallel with the fourth capacitor to form an RC filter circuit, which can filter out clutter on the line and improve the system control accuracy.

[0037] The second optical coupler device can achieve electrical isolation based on the interlocking of the first pulse width modulation chip and the second pulse width modulation chip, so that safety requirements are met when the first input circuit and the second output circuit do not share a common ground.

[0038] In some technical solutions of the present application, optionally, the second interlocking circuit includes: a third optocoupler, a first input end of the third optocoupler is electrically connected to the second pulse width modulation chip, and an output end of the third optocoupler is electrically connected to the first pulse width modulation chip; a second triode, a collector of the second triode is electrically connected to the second input end of the third optocoupler, an emitter of the second triode is grounded, and a base of the second triode is electrically connected to the second pulse width modulation chip; a ninth resistor, a first end of the ninth resistor is electrically connected to the second pulse width modulation chip, and a second end of the ninth resistor is electrically connected to the first input end of the third optocoupler; a tenth resistor, a first end of the tenth resistor is electrically connected to the output end of the third optocoupler, and a second end of the tenth resistor is electrically connected to the first pulse width modulation chip; an eleventh resistor, a first end of the eleventh resistor is electrically connected to the base of the second triode, and a second end of the eleventh resistor is electrically connected to the second pulse width modulation chip; a twelfth resistor, a first end of the twelfth resistor is electrically connected to the base of the second triode, and a second end of the twelfth resistor is grounded; a fifth capacitor, and the fifth capacitor is connected in parallel with the twelfth resistor.

[0039] In an embodiment of the present application, the second interlocking circuit includes a third optocoupler and a second transistor. The first pulse width modulation chip and the second pulse width modulation chip realize working interlocking at any time through the interlocking circuit, and only one of the first pulse width modulation chip and the second pulse width modulation chip works at the same time. Among them, the first end of the third optocoupler is electrically connected to the second pulse width modulation chip, the base of the second transistor is electrically connected to the second pulse width modulation chip, the collector of the second transistor is electrically connected to the second end of the third optocoupler, and the emitter of the second transistor is grounded. When the second pulse width modulation chip is working, the second pulse width modulation chip outputs a voltage signal, the second transistor is turned on, so that the primary diode of the third optocoupler is saturated and turned on, the secondary transistor of the third optocoupler is turned on, the pin of the first pulse width modulation chip is pulled low, and the first pulse width modulation chip stops working.

[0040] The second interlocking circuit also includes a ninth resistor, a tenth resistor and an eleventh resistor, wherein the ninth resistor is the input resistor of the third optocoupler, and the ninth resistor is connected in series between the first pulse width modulation chip and the first input terminal of the third optocoupler. The tenth resistor is the output resistor of the third optocoupler, and the tenth resistor is connected in series to the output terminal of the third optocoupler. The eleventh resistor is connected in series between the first pulse width modulation chip and the base of the second transistor. The twelfth resistor is connected in parallel with the fifth capacitor to form an RC filter circuit, which can filter out clutter on the line and improve the system control accuracy.

[0041] The third optical coupler device can achieve electrical isolation based on the interlocking of the first pulse width modulation chip and the second pulse width modulation chip, so that safety requirements are met when the first input circuit and the second output circuit do not share a common ground.

[0042] The second aspect of the present application proposes an energy storage system, including an auxiliary power supply circuit as provided in any of the above technical solutions, and therefore also includes all the beneficial effects of the auxiliary power supply circuit provided in any of the above technical solutions. To avoid repetition, they will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0044] Figure 1 A schematic diagram showing the structure of an auxiliary power supply circuit in some embodiments of the present application is shown;

[0045] Figure 2 A circuit diagram showing an auxiliary power supply circuit of some embodiments of the present application;

[0046] Figure 3 A circuit diagram showing a sampling circuit of some embodiments of the present application;

[0047] Figure 4A A circuit diagram showing a first interlock circuit of some embodiments of the present application;

[0048] Figure 4B A circuit diagram showing a second interlock circuit of some embodiments of the present application;

[0049] Figure 5 A schematic structural diagram of a pulse width modulation chip according to some embodiments of the present application is shown.

[0050] Reference numerals:

[0051] 100 auxiliary power supply circuit, 102 first input circuit, 104 second input circuit, 106 first primary coil, 108 second primary coil, 110 first pulse width modulation chip, 112 second pulse width modulation chip, 114 output circuit, 1142 first output circuit, 1144 second output circuit, 116 secondary coil, 1162 first secondary coil, 1164 second secondary coil, 118 sampling circuit, 120 voltage stabilizing device, 122 interlocking circuit, 1222 first interlocking circuit, 1224 second interlocking circuit;

[0052] T1 transformer, C1 first capacitor, V1 first input source, V2 second input source, Q1 first power switch device, C2 second capacitor, Q2 second power switch device, D1 first diode, D2 second diode, C3 first output capacitor, C4 second output capacitor, R3 first resistor, R1 second resistor, R2 third resistor, U1 first optocoupler device, R0 fourth resistor, C0 third capacitor, U2 second optocoupler device, Q13 first transistor, R132 fifth resistor, R133 sixth resistor, R134 seventh resistor, R135 eighth resistor, C156 fourth capacitor, U3 third optocoupler device, Q14 second transistor, R142 ninth resistor, R143 tenth resistor, R144 eleventh resistor, R145 twelfth resistor, C166 fifth capacitor. DETAILED DESCRIPTION

[0053] In order to more clearly understand the above-mentioned purposes, features and advantages of the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

[0054] In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application may also be implemented in other ways different from those described herein. Therefore, the scope of protection of the present application is not limited to the specific embodiments disclosed below.

[0055] Refer to the following Figures 1 to 5An auxiliary power supply circuit and an energy storage system provided according to some embodiments of the present application are described.

[0056] In some embodiments of the present application, an auxiliary power supply circuit is provided. Figure 1 shows a schematic diagram of the structure of the auxiliary power supply circuit of some embodiments of the present application, Figure 2 A circuit diagram of an auxiliary power supply circuit of some embodiments of the present application is shown, such as Figure 1 and Figure 2 As shown, the auxiliary power supply circuit 100 includes: a transformer T1; a first input circuit 102, the first input circuit 102 is electrically connected to the first primary coil 106 of the transformer T1, and the first input circuit 102 includes a first pulse width modulation chip 110 and a first input source V1; a second input circuit 104, the second input circuit 104 is electrically connected to the second primary coil 108 of the transformer T1, and the second input circuit 104 includes a second pulse width modulation chip 112 and a second input source V2; an interlocking circuit 122, the interlocking circuit 122 is electrically connected to both the first pulse width modulation chip 110 and the second pulse width modulation chip 112, and the first pulse width modulation chip 110 and the second pulse width modulation chip 112 are interlocked through the interlocking circuit 122; at least two output circuits 114, the output circuit 114 is electrically connected to the secondary coil 116 of the transformer T1, and the output circuit 114 is used to output a power supply signal.

[0057] In this embodiment, the auxiliary power supply circuit 100 includes multiple inputs and multiple outputs, wherein the multiple inputs include a first input circuit 102 and a second input circuit 104. For a bidirectional energy storage system, the first input circuit 102 and the second input circuit 104 are respectively connected to different power supplies of the bidirectional energy storage system. Exemplarily, the number of output circuits 114 can be 2, 3, ... N.

[0058] The transformer T1 includes a primary coil and a secondary coil 116. Exemplarily, the transformer T1 is an auxiliary power transformer T1, which can play the role of high-frequency isolation and energy transmission and storage. The primary coil of the transformer T1 includes a first primary coil 106 and a second primary coil 108, and the first primary coil 106 and the second primary coil 108 are electrically connected to the first input circuit 102 and the second input circuit 104 respectively. Among them, the first input circuit 102 and the second input circuit 104 are respectively provided with a first pulse width modulation chip 110 and a second pulse width modulation chip 112, and the first input circuit 102 is protected from overvoltage, overcurrent and voltage stabilization by the first pulse width modulation chip 110. Similarly, the second input circuit 104 is protected from overvoltage, overcurrent and voltage stabilization by the second pulse width modulation chip 112.

[0059] The auxiliary power supply circuit 100 further includes an interlocking circuit 122, through which the first pulse width modulation chip 110 and the second pulse width modulation chip 112 can be interlocked. Among them, only one of the first input circuit 102 and the second input circuit 104 is working, and correspondingly, only one of the first pulse width modulation chip 110 and the second pulse width modulation chip 112 is working at the same time. Exemplarily, the first pulse width modulation chip 110 and the second pulse width chip are chips of the same type, and the functional pin configurations of the chips are the same.

[0060] When the first input source V1 of the first input circuit 102 is powered on, the first pulse width modulation chip 110 works, the first input circuit 102 converts the rectified signal of the first input source V1 into a high-frequency pulse voltage, the transformer T1 transforms the high-frequency pulse voltage, and obtains a stable DC power output after being rectified by the output circuit 114.

[0061] The present application can provide multiple stable DC power outputs through an auxiliary power supply circuit 100, can improve the integration of the auxiliary power supply, reduce the number of auxiliary power supply circuits 100, can effectively reduce the system standby power consumption, and improve efficiency. At the same time, due to the reduction in the number of components, the space occupied by the printed circuit board is reduced, the power density is higher, and the cost can be effectively reduced. Since multiple auxiliary power supply circuits are no longer set in the system, the power switching control logic is simpler, less prone to conflict, and the reliability is significantly improved.

[0062] In some embodiments of the present application, optionally, Figure 2 As shown, the first input circuit 102 includes: a first capacitor C1, the first capacitor C1 is connected in parallel with the first input source V1, the first end of the first capacitor C1 is electrically connected to the first end of the first primary coil 106, and the second end of the first capacitor C1 is grounded; a first power switch device Q1, the first end of the first power switch device Q1 is electrically connected to the second end of the first primary coil 106, and the second end of the first power switch device Q1 is grounded; wherein, a first pulse width modulation chip 110 is electrically connected to the control end of the first power switch device Q1, and the first pulse width modulation chip 110 is used to output a first drive signal to the control end of the first power switch device Q1, and the first drive signal is used to drive the first power switch device Q1 to convert the DC signal of the first input source V1 into a voltage pulse signal.

[0063] In this embodiment, the first input circuit 102 includes a first capacitor C1 and a first power switch device. The first capacitor C1 is a buffer capacitor, which has the functions of power supply dynamic buffering, absorbing circuit high-frequency pulse spikes, and filtering interference. The first power switch device is a high-frequency power switch device. When the electrical signal input by the first input source V1 is a DC signal, the first power switch device can convert the input DC signal into a high-frequency voltage pulse signal and provide it to the transformer T1 through a high-frequency switching action. Exemplarily, the first power switch device is a power switch tube.

[0064] In some embodiments, the control terminal of the first power switch device is electrically connected to the first pulse width modulation chip 110, and the first pulse width modulation chip 110 can provide a driving signal for controlling the high-speed switching of the first power switch device. In other embodiments, the driving signal of the first power switch device can be adjusted and compensated by other peripheral devices.

[0065] In some embodiments of the present application, optionally, Figure 2 As shown, the second input circuit 104 includes: a second capacitor C2, the second capacitor C2 is connected in parallel with the second input source V2, the first end of the second capacitor C2 is electrically connected to the first end of the second primary coil 108, and the second end of the second capacitor C2 is grounded; a second power switch device Q2, the first end of the second power switch device Q2 is electrically connected to the second end of the second primary coil 108, and the second end of the second power switch device Q2 is grounded; wherein, a second pulse width modulation chip 112 is electrically connected to the control end of the second power switch device Q2, and the second pulse width modulation chip 112 is used to output a second drive signal to the control end of the second power switch device Q2, and the second drive signal is used to drive the second power switch device Q2 to convert the DC signal of the second input source V2 into a voltage pulse signal.

[0066] In this embodiment, the second input circuit 104 includes a second capacitor C2 and a second power switch device Q2. The second capacitor C2 is a buffer capacitor, which has the functions of power supply dynamic buffering, absorbing circuit high-frequency pulse spikes, and filtering interference. The second power switch device Q2 is a high-frequency power switch device. When the electrical signal input by the second input source V2 is a DC signal, the second power switch device Q2 can convert the input DC signal into a high-frequency voltage pulse signal and provide it to the transformer T1 through a high-frequency switching action. Exemplarily, the first power switch device and the second power switch device Q2 are both power switch tubes.

[0067] In some embodiments, the control terminal of the second power switch device Q2 is electrically connected to the second pulse width modulation chip 112, and the second pulse width modulation chip 112 can provide a driving signal for controlling the high-speed switching of the second power switch device Q2. In other embodiments, the driving signal of the second power switch device Q2 can be adjusted and compensated by other peripheral devices.

[0068] In some embodiments of the present application, optionally, Figure 2 As shown, at least two output circuits 114 include a first output circuit 1142 and a second output circuit 1144; the first output circuit 1142 includes: a first diode D1, the positive electrode of the first diode D1 is electrically connected to the first end of the first secondary coil 1162 of the transformer T1; a first output capacitor C3, the first end of the first output capacitor C3 is electrically connected to the negative electrode of the first diode D1, and the second end of the first output capacitor C3 is electrically connected to the second end of the first secondary coil 1162; the second output circuit 1144 includes: a second diode D2, the positive electrode of the second diode D2 is electrically connected to the first end of the second secondary coil 1164 of the transformer T1; a second output capacitor C4, the first end of the second output capacitor C4 is electrically connected to the negative electrode of the second diode D2, and the second end of the second output capacitor C4 is electrically connected to the second end of the second secondary coil 1164.

[0069] In this embodiment, the auxiliary power supply circuit 100 includes two output circuits 114 as an example to illustrate the present application. It is assumed that at least two output circuits 114 include a first output circuit 1142 and a second output circuit 1144. Exemplarily, the circuit structures of the first output circuit 1142 and the second output circuit 1144 are the same.

[0070] Among them, the first output circuit 1142 includes a first diode D1 and a first output capacitor C3, and the second output circuit 1144 includes a second diode D2 and a second output capacitor C4. Assuming that the first input circuit 102 is powered on, the first power switch device Q1 switches at high frequency under the drive of the first pulse width modulation chip 110. When the first power switch device is turned on, the transformer T1 stores energy, the first diode D1 and the second diode D2 are not turned on, and the first output capacitor C3 and the second output capacitor C4 provide energy to the load. When the first power switch device is turned off, the first diode D1 and the second diode D2 are turned on, the transformer T1 releases energy, and the first output capacitor C3 and the second output capacitor C4 store energy. Exemplarily, the first pulse width modulation chip 110 can achieve a stable output voltage of the output circuit 114 by adjusting the driving duty cycle of the first power switch device.

[0071] Similarly, when the second output circuit 1144 is powered on, the second power switch device Q2 switches at a high frequency. When the second power switch device is turned on, the transformer T1 stores energy, the first diode D1 and the second diode D2 are not turned on, and the first output capacitor C3 and the second output capacitor C4 provide energy to the load. When the second power switch device is turned off, the first diode D1 and the second diode D2 are turned on, the transformer T1 releases energy, and the first output capacitor C3 and the second output capacitor C4 store energy.

[0072] In some embodiments of the present application, optionally, Figure 3 1 shows a circuit diagram of the sampling circuit 118 of some embodiments of the present application, such as Figure 3 As shown, the auxiliary power supply circuit 100 also includes: a sampling circuit 118, which is electrically connected to the output circuit 114, the first pulse width modulation chip 110 and the second pulse width modulation chip 112. The sampling circuit 118 is used to collect the output voltage of the output circuit 114 and output a feedback signal to the first pulse width modulation chip 110 and the second pulse width modulation chip 112 based on the output voltage.

[0073] In this embodiment, the auxiliary power supply circuit 100 includes a sampling circuit 118, which collects the output voltage of the output circuit 114 and outputs a feedback signal to the first pulse width modulation chip 110 and the second pulse width modulation chip 112. The corresponding pulse width modulation chip generates a driving signal of a corresponding duty cycle through loop control and compensation according to the feedback signal to drive the corresponding power switch device. The pulse width modulation chip also has overvoltage protection and overcurrent protection functions. When the pulse width modulation chip, including the first pulse width modulation chip 110 and the second pulse width modulation chip 112, detects that the feedback signal of the sampling circuit 118 exceeds the set threshold, the overcurrent protection action or overvoltage protection action is immediately triggered, and the pulse drive output is locked to achieve the protection function.

[0074] The present application sets a sampling circuit 118 to collect the output voltage of the multi-channel output circuit 114, so that the auxiliary energy storage system can implement sampling closed-loop control, thereby improving the control response speed and control accuracy of the auxiliary power supply circuit 100.

[0075] In some embodiments of the present application, optionally, Figure 3As shown, the sampling circuit 118 includes: a first resistor R3, a first end of the first resistor R3 is electrically connected to the output circuit 114; a first optocoupler device U1, a first input end of the first optocoupler device U1 is electrically connected to the second end of the first resistor R3, and an output end of the first optocoupler device U1 is electrically connected to the first pulse width modulation chip 110 and the second pulse width modulation chip 112; a second resistor R1, a first end of the second resistor R1 is electrically connected to the output circuit 114; a third resistor R2, a first end of the third resistor R2 is electrically connected to the second resistor R1, and a second end of the third resistor R2 is grounded; a voltage stabilizer device 120, a first end of the voltage stabilizer device 120 is electrically connected to the second input end of the first optocoupler device U1, a second end of the voltage stabilizer device 120 is grounded, and a control end of the voltage stabilizer device 120 is electrically connected to the second end of the second resistor R1.

[0076] In this embodiment, the sampling circuit 118 includes a first optocoupler device U1, which is used as an optocoupler isolation. The sampling circuit 118 also includes a first resistor R3, a second resistor R1, a third resistor R2 and a voltage stabilizing device 120. Among them, the first resistor R3 and the second resistor R1 are connected to the output circuit 114, specifically to the output capacitor, for the first detection of the voltage value V0 across the output capacitor C3. The third resistor R2 is connected in series with the second resistor R1. The voltage stabilizing device 120 can be a voltage stabilizing diode or a precision controllable voltage stabilizing source, such as a TL431 voltage stabilizing integrated circuit.

[0077] In the case where the input circuit and the output circuit 114 do not share a common ground, isolated sampling is performed through the first optical coupler device U1, so that electrical isolation between the input circuit and the output circuit 114 can be achieved, thereby meeting safety requirements.

[0078] In some embodiments of the present application, optionally, Figure 3 As shown, the sampling circuit 118 also includes: a fourth resistor R0, a first end of the fourth resistor R0 is electrically connected to the second input end of the first optocoupler device; a third capacitor C0, a first end of the third capacitor C0 is electrically connected to the second end of the fourth resistor R0, and a second end of the third capacitor C0 is electrically connected to the control end of the voltage stabilizing device 120.

[0079] In this embodiment, the sampling circuit 118 includes a fourth resistor R0 and a third capacitor C0, the fourth resistor R0 is connected in series with the second input terminal of the first optocoupler device U1, and the third capacitor C0 is connected in series with the fourth resistor R0. By setting the fourth resistor R0 and the third capacitor C0, the sampling signal can be filtered to improve the sampling accuracy.

[0080] In some embodiments of the present application, optionally, the interlock circuit 122 includes a first interlock circuit 1222 and a second interlock circuit 1224, wherein the input end of the first interlock circuit 1222 is electrically connected to the first pulse width modulation chip 110, the output end of the first interlock circuit is electrically connected to the second pulse width modulation chip 112, the input end of the second interlock circuit 1224 is electrically connected to the second pulse width modulation chip 112, and the output end of the second interlock circuit 1224 is electrically connected to the first pulse width modulation chip 110.

[0081] In the embodiment of the present application, the interlock circuit includes a first interlock circuit 1222 and a second interlock circuit 1224, wherein when the first pulse width modulation chip 110 is working, the first interlock circuit 1222 receives the working signal of the first pulse width modulation chip 110, and pulls down the pin of the second pulse width chip, so that the second pulse width modulation chip 112 stops working. When the second pulse width modulation chip 112 is working, the second interlock circuit 1224 receives the working signal of the second pulse width modulation chip 112, and pulls down the pin of the first pulse width chip, so that the first pulse width modulation chip 110 stops working. The present application realizes the working interlock of the first pulse width modulation chip 110 and the second pulse width modulation chip 112 through the first interlock circuit 1222 and the second interlock circuit 1224.

[0082] In some embodiments of the present application, optionally, Figure 4A A circuit diagram of a first interlock circuit of some embodiments of the present application is shown, such as Figure 4A As shown, the first interlocking circuit 1222 includes: a second optocoupler device U2, a first input end of the second optocoupler device U2 is electrically connected to the first pulse width modulation chip 110, and an output end of the second optocoupler device U2 is electrically connected to the second pulse width modulation chip 112; a first transistor Q13, a collector of the first transistor Q13 is electrically connected to the second input end of the second optocoupler device U2, an emitter of the first transistor Q13 is grounded, and a base of the first transistor Q13 is electrically connected to the first pulse width modulation chip 110; a fifth resistor R132, a first end of the fifth resistor R132 is electrically connected to the first pulse width modulation chip 110, and a second end of the fifth resistor R132 is electrically connected to the second optocoupler device U2 a sixth resistor R133, a first end of the sixth resistor R133 is electrically connected to the output end of the second optocoupler device U2, and a second end of the sixth resistor R133 is electrically connected to the second pulse width modulation chip 112; a seventh resistor R134, a first end of the seventh resistor R134 is electrically connected to the base of the first transistor Q13, and a second end of the seventh resistor R134 is electrically connected to the first pulse width modulation chip 110; an eighth resistor R135, a first end of the eighth resistor R135 is electrically connected to the base of the first transistor Q13, and a second end of the eighth resistor R135 is grounded; a fourth capacitor C156, and the fourth capacitor C156 is connected in parallel with the eighth resistor R135.

[0083] In the embodiment of the present application, the first interlocking circuit 1222 includes a second optocoupler device U2 and a first transistor Q13. The first pulse width modulation chip 110 and the second pulse width modulation chip 112 are interlocked at any time through the interlocking circuit 122. Only one of the first pulse width modulation chip 110 and the second pulse width modulation chip 112 works at the same time. Among them, the first end of the second optocoupler device U2 is electrically connected to the first pulse width modulation chip 110, the base of the first transistor Q13 is electrically connected to the first pulse width modulation chip 110, the collector of the first transistor Q13 is electrically connected to the second end of the second optocoupler device U2, and the emitter of the first transistor Q13 is grounded. When the first pulse width modulation chip 110 is working, the first pulse width modulation chip 110 outputs a voltage signal, the first transistor Q13 is turned on, so that the primary diode of the second optocoupler device U2 is saturated and turned on, the secondary transistor of the second optocoupler device U2 is turned on, the pin of the second pulse width modulation chip 112 is pulled low, and the second pulse width modulation chip 112 stops working.

[0084] The first interlocking circuit 1222 also includes a fifth resistor R132, a sixth resistor R133 and a seventh resistor R134, wherein the fifth resistor R132 is the input resistor of the second optocoupler U2, and the fifth resistor R132 is connected in series between the first pulse width modulation chip 110 and the first input terminal of the second optocoupler U2. The sixth resistor R133 is the output resistor of the second optocoupler U2, and the sixth resistor R133 is connected in series to the output terminal of the second optocoupler U2. The seventh resistor R134 is connected in series between the first pulse width modulation chip 110 and the base of the first transistor Q13. The eighth resistor R135 is connected in parallel with the fourth capacitor C156 to form an RC filter circuit, which can filter out clutter on the line and improve the system control accuracy.

[0085] The second optocoupler device U2 can achieve electrical isolation based on the interlocking of the first pulse width modulation chip 110 and the second pulse width modulation chip 112, so that safety requirements are met when the first input circuit 102 and the second output circuit 1144 do not share a common ground.

[0086] In some embodiments of the present application, optionally, Figure 4B A circuit diagram of a second interlock circuit of some embodiments of the present application is shown, such as Figure 4BAs shown, the second interlocking circuit 1224 includes: a third optical coupler U3, a first input end of the third optical coupler U3 is electrically connected to the second pulse width modulation chip 112, and an output end of the third optical coupler U3 is electrically connected to the first pulse width modulation chip 110; a second triode Q14, a collector of the second triode Q14 is electrically connected to the second input end of the third optical coupler U3, an emitter of the second triode Q14 is grounded, and a base of the second triode Q14 is electrically connected to the second pulse width modulation chip 112; a ninth resistor R142, a first end of the ninth resistor R142 is electrically connected to the second pulse width modulation chip 112, and a second end of the ninth resistor R142 is electrically connected to a first end of the third optical coupler U3 The input end is electrically connected; a tenth resistor R143, a first end of the tenth resistor R143 is electrically connected to the output end of the third optocoupler device U3, and a second end of the tenth resistor R143 is electrically connected to the first pulse width modulation chip 110; an eleventh resistor R144, a first end of the eleventh resistor R144 is electrically connected to the base of the second transistor Q14, and a second end of the eleventh resistor R144 is electrically connected to the second pulse width modulation chip 112; a twelfth resistor R145, a first end of the twelfth resistor R145 is electrically connected to the base of the second transistor Q14, and a second end of the twelfth resistor R145 is grounded; a fifth capacitor C166, and the fifth capacitor C166 is connected in parallel with the twelfth resistor R145.

[0087] In the embodiment of the present application, the second interlocking circuit 1224 includes a third optocoupler device U3 and a second triode Q14, and the first pulse width modulation chip and the second pulse width modulation chip realize working interlocking at any time through the interlocking circuit, and only one of the first pulse width modulation chip and the second pulse width modulation chip works at the same time. Among them, the first end of the third optocoupler device U3 is electrically connected to the second pulse width modulation chip, the base of the second triode Q14 is electrically connected to the second pulse width modulation chip, the collector of the second triode Q14 is electrically connected to the second end of the third optocoupler device U3, and the emitter of the second triode Q14 is grounded. When the second pulse width modulation chip is working, the second pulse width modulation chip outputs a voltage signal, and the second triode Q14 is turned on, so that the primary diode of the third optocoupler device U3 is saturated and turned on, the secondary transistor of the third optocoupler device U3 is turned on, the pin of the first pulse width modulation chip is pulled low, and the first pulse width modulation chip stops working.

[0088] The second interlocking circuit 1224 also includes a ninth resistor R142, a tenth resistor R143 and an eleventh resistor R144, wherein the ninth resistor R142 is the input resistor of the third optocoupler U3, and the ninth resistor R142 is connected in series between the first pulse width modulation chip and the first input terminal of the third optocoupler U3. The tenth resistor R143 is the output resistor of the third optocoupler U3, and the tenth resistor R143 is connected in series to the output terminal of the third optocoupler U3. The eleventh resistor R144 is connected in series between the first pulse width modulation chip and the base of the second transistor Q14. The twelfth resistor R145 is connected in parallel with the fifth capacitor C166 to form an RC filter circuit, which can filter out clutter on the line and improve the system control accuracy.

[0089] The third optical coupler U3 can achieve electrical isolation based on the interlocking of the first pulse width modulation chip and the second pulse width modulation chip, so that safety requirements are met when the first input circuit and the second output circuit do not share a common ground.

[0090] In some embodiments of the present application, Figure 5 The structure diagram of the pulse width modulation chip of some embodiments of the present application is shown as follows: Figure 5 As shown, taking the first pulse width modulation chip 110 as an example, the first pulse width modulation chip 110 includes 8 pins. Among them, pin 1 COMP is connected to the interlock circuit 122 and the sampling circuit 118. Pin 2 VFB is the inverting input pin of the error amplifier. Pin 3 ISENSE is the input current sensing pin. Pin 6 OUTPUT is used to output a drive signal to the first power switch device Q1, and the frequency of the drive signal output by pin 6 OUTPUT is determined by the input signal of pin 4 RT / CT. Pin 5 GROUND is a ground pin, and pin 7 VCC is connected to the power supply. Pin 8 VREF is electrically connected to the interlock circuit 122. Exemplarily, the output voltage of pin 8 VREF of the first pulse width modulation chip 110 is 5V, and pin 1 COMP of the second pulse width modulation chip 112 is pulled down by the interlock circuit 122, so that the second pulse width modulation chip 112 does not output a drive signal. The driving signal outputted by the pin 6 OUTPUT of the first pulse width modulation chip 110 can be directly connected to the first power switch device Q1 . The pin 6 OUTPUT of the first pulse width modulation chip 110 has a certain driving capability, and the maximum output current can reach 1A.

[0091] Exemplarily, when the auxiliary power supply circuit 100 is working, the No. 6 pin OUTPUT of the first pulse width modulation chip 110 outputs a driving signal, and the first power switch device Q1 switches at a high frequency. When the first power switch device Q1 is turned on, the transformer T1 stores energy, the first diode D1 and the second diode D2 are not turned on, and the first output capacitor C3 and the second output capacitor C4 output energy. When the first power switch device Q1 is turned off, the first diode D1 and the second diode D2 are turned on, the transformer T1 releases energy, and the first output capacitor C3 and the second output capacitor C4 store energy.

[0092] The present application integrates multiple auxiliary power circuits, reduces the number of auxiliary power circuits 100, can effectively reduce the system standby power consumption, and improve efficiency. At the same time, due to the reduction in the number of components, the space occupied by the printed circuit board is reduced, the power density is higher, and the cost can be effectively reduced. Since multiple auxiliary power circuits are no longer set in the system, the power switching control logic is simpler, less likely to conflict, and the reliability is significantly improved.

[0093] In some embodiments of the present application, an energy storage system is proposed, including an auxiliary power supply circuit as provided in any of the above embodiments, and therefore also includes all the beneficial effects of the auxiliary power supply circuit as provided in any of the above embodiments. To avoid repetition, they will not be repeated here.

[0094] In the description of this application, the term "plurality" refers to two or more than two. Unless otherwise clearly defined, the terms "upper" and "lower" indicate positions or positional relationships based on the positions or positional relationships described in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on this application. The terms "connect", "install", "fixed", etc. should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0095] In the description of the present application, the description of the terms "one embodiment", "some embodiments", "specific embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In the present application, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0096] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. An auxiliary power supply circuit, characterized in that: The auxiliary power supply circuit comprises: transformer; A first input circuit, the first input circuit is electrically connected to the first primary coil of the transformer, and the first input circuit includes a first pulse width modulation chip and a first input source; a second input circuit, the second input circuit being electrically connected to the second primary coil of the transformer, the second input circuit comprising a second pulse width modulation chip and a second input source; An interlocking circuit, wherein the interlocking circuit is electrically connected to both the first pulse width modulation chip and the second pulse width modulation chip, and the first pulse width modulation chip and the second pulse width modulation chip are interlocked through the interlocking circuit; At least two output circuits, the output circuits are electrically connected to the secondary coil of the transformer, and the output circuits are used to output power supply signals.

2. The auxiliary power supply circuit according to claim 1, characterized in that: The first input circuit comprises: a first capacitor, the first capacitor is connected in parallel with the first input source, a first end of the first capacitor is electrically connected to a first end of the first primary coil, and a second end of the first capacitor is grounded; a first power switch device, wherein a first end of the first power switch device is electrically connected to a second end of the first primary coil, and a second end of the first power switch device is grounded; Among them, the first pulse width modulation chip is electrically connected to the control end of the first power switching device, and the first pulse width modulation chip is used to output a first drive signal to the control end of the first power switching device, and the first drive signal is used to drive the first power switching device to convert the DC signal of the first input source into a voltage pulse signal.

3. The auxiliary power supply circuit according to claim 1, characterized in that: The second input circuit comprises: a second capacitor, the second capacitor being connected in parallel with the second input source, a first end of the second capacitor being electrically connected to a first end of the second primary coil, and a second end of the second capacitor being grounded; a second power switch device, wherein a first end of the second power switch device is electrically connected to a second end of the second primary coil, and a second end of the second power switch device is grounded; Among them, the second pulse width modulation chip is electrically connected to the control end of the second power switching device, and the second pulse width modulation chip is used to output a second drive signal to the control end of the second power switching device, and the second drive signal is used to drive the second power switching device to convert the DC signal of the second input source into a voltage pulse signal.

4. The auxiliary power supply circuit according to claim 1, characterized in that: The at least two output circuits include a first output circuit and a second output circuit; The first output circuit comprises: a first diode, wherein an anode of the first diode is electrically connected to a first end of a first secondary coil of the transformer; a first output capacitor, wherein a first end of the first output capacitor is electrically connected to the cathode of the first diode, and a second end of the first output capacitor is electrically connected to the second end of the first secondary coil; The second output circuit comprises: a second diode, wherein an anode of the second diode is electrically connected to a first end of a second secondary coil of the transformer; A second output capacitor, wherein a first end of the second output capacitor is electrically connected to the cathode of the second diode, and a second end of the second output capacitor is electrically connected to the second end of the second secondary coil.

5. The auxiliary power supply circuit according to any one of claims 1 to 4, characterized in that: The auxiliary power supply circuit also includes: A sampling circuit, wherein the sampling circuit is electrically connected to the output circuit, the first pulse width modulation chip and the second pulse width modulation chip, and the sampling circuit is used to collect the output voltage of the output circuit and output a feedback signal to the first pulse width modulation chip and the second pulse width modulation chip based on the output voltage.

6. The auxiliary power supply circuit according to claim 5, characterized in that: The sampling circuit comprises: a first resistor, wherein a first end of the first resistor is electrically connected to the output circuit; A first optocoupler device, wherein a first input end of the first optocoupler device is electrically connected to a second end of the first resistor, and an output end of the first optocoupler device is electrically connected to the first pulse width modulation chip and the second pulse width modulation chip; a second resistor, a first end of the second resistor being electrically connected to the output circuit; a third resistor, a first end of the third resistor being electrically connected to the second resistor, and a second end of the third resistor being grounded; A voltage stabilizing device, wherein a first end of the voltage stabilizing device is electrically connected to the second input end of the first optocoupler device, a second end of the voltage stabilizing device is grounded, and a control end of the voltage stabilizing device is electrically connected to the second end of the second resistor.

7. The auxiliary power supply circuit according to claim 6, characterized in that: The sampling circuit also includes: a fourth resistor, a first end of the fourth resistor being electrically connected to the second input end of the first optocoupler device; A third capacitor, wherein a first end of the third capacitor is electrically connected to a second end of the fourth resistor, and a second end of the third capacitor is electrically connected to a control end of the voltage stabilizing device.

8. The auxiliary power supply circuit according to any one of claims 1 to 4, characterized in that: The interlock circuit includes a first interlock circuit and a second interlock circuit, wherein the input end of the first interlock circuit is electrically connected to the first pulse width modulation chip, the output end of the first interlock circuit is electrically connected to the second pulse width modulation chip, the input end of the second interlock circuit is electrically connected to the second pulse width modulation chip, and the output end of the second interlock circuit is electrically connected to the first pulse width modulation chip.

9. The auxiliary power supply circuit according to claim 8, characterized in that: The first interlock circuit comprises: a second optocoupler device, wherein a first input end of the second optocoupler device is electrically connected to the first pulse width modulation chip, and an output end of the second optocoupler device is electrically connected to the second pulse width modulation chip; a first triode, wherein the collector of the first triode is electrically connected to the second input end of the second optocoupler device, the emitter of the first triode is grounded, and the base of the first triode is electrically connected to the first pulse width modulation chip; a fifth resistor, wherein a first end of the fifth resistor is electrically connected to the first pulse width modulation chip, and a second end of the fifth resistor is electrically connected to the first input end of the second optocoupler device; a sixth resistor, wherein a first end of the sixth resistor is electrically connected to the output end of the second optocoupler device, and a second end of the sixth resistor is electrically connected to the second pulse width modulation chip; a seventh resistor, wherein a first end of the seventh resistor is electrically connected to the base of the first transistor, and a second end of the seventh resistor is electrically connected to the first pulse width modulation chip; an eighth resistor, a first end of the eighth resistor being electrically connected to the base of the first transistor, and a second end of the eighth resistor being grounded; A fourth capacitor is connected in parallel with the eighth resistor.

10. The auxiliary power supply circuit according to claim 8, characterized in that: The second interlock circuit comprises: A third optocoupler device, wherein a first input end of the third optocoupler device is electrically connected to the second pulse width modulation chip, and an output end of the third optocoupler device is electrically connected to the first pulse width modulation chip; a second triode, wherein the collector of the second triode is electrically connected to the second input terminal of the third optocoupler device, the emitter of the second triode is grounded, and the base of the second triode is electrically connected to the second pulse width modulation chip; a ninth resistor, wherein a first end of the ninth resistor is electrically connected to the second pulse width modulation chip, and a second end of the ninth resistor is electrically connected to the first input end of the third optocoupler device; a tenth resistor, wherein a first end of the tenth resistor is electrically connected to the output end of the third optocoupler device, and a second end of the tenth resistor is electrically connected to the first pulse width modulation chip; an eleventh resistor, a first end of the eleventh resistor being electrically connected to the base of the second transistor, and a second end of the eleventh resistor being electrically connected to the second pulse width modulation chip; a twelfth resistor, a first end of the twelfth resistor being electrically connected to the base of the second transistor, and a second end of the twelfth resistor being grounded; A fifth capacitor is connected in parallel with the twelfth resistor.

11. An energy storage system, characterized in that: include: The auxiliary power supply circuit according to any one of claims 1 to 10.

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