A method and system for capture and demodulation based on vde signals

Abstract

The present application belongs to the field of spacecraft receiving equipment, and particularly relates to a capture and demodulation method and system based on VDE signals. The capture and demodulation method based on VDE signals provided by the present application is a method with low equipment complexity, and the same process is adopted for different links, different parameters are selected, and the equipment complexity is reduced. Compared with the prior art, the present application does not distinguish whether a pilot exists in a data frame, and both data frames with and without pilots can be captured and demodulated; the selection of the maximum M path and the iteration judgment can be adjusted according to system requirements and hardware resource conditions. According to the difference between the noise mean value and the peak value, the present application completes the maximum peak capture in different signal-to-noise ratio environments.

Description

Technical Field

[0001] This invention belongs to the field of spacecraft receiving equipment, specifically relating to a method and system for acquiring and demodulating VDE signals. Technical Background

[0002] As the core of VDES, VDE is used to transmit large amounts of complex, multi-structured information, enabling high-bandwidth data communication for VDES. VDE's various link modes include different frame header lengths, different encoding / decoding methods, different modulation schemes, different channel rates, different pilot insertion lengths, and whether or not pilots are inserted. The existence of multiple link modes complicates demodulation equipment. Existing VDEs have numerous acquisition and tracking types under different modes, and conventional acquisition and tracking methods cannot cover the two main application scenarios of pilot insertion or no pilot insertion. To reduce receiver resource consumption, the various link modes of VDE signals are analyzed, and a single acquisition and demodulation process is adopted, with different parameters configured to adapt to multiple link modes. Summary of the Invention

[0003] In view of the above problems, this application proposes a method for capturing and demodulating VDE signals, which can use the same capture and demodulation process and unify the commonly used VDE Link modes.

[0004] To address these issues, this application employs the following technical solution: a method for capturing and demodulating VDE signals, comprising:

[0005] S1. Receive the VDE signal, perform digital-to-analog conversion after sampling by the ADC, and accumulate the I and Q channels by N times the channel rate to form the input signal;

[0006] S2. Perform frame header conjugate complex multiplication on the input signal, and perform the first peak search on the complex multiplication result to obtain the coarse frequency offset;

[0007] S3. Based on the coarse frequency offset, perform frequency offset classification, and compensate for the frequency offset of the frame header conjugate complex multiplication result according to the classified frequency offset.

[0008] S4. Perform a second peak search on the compensation signal to obtain a fine frequency offset, and record the time when the second peak occurs as the timing time; at the same time, compare the second peak search result with the maximum value of multiple range values ​​after frequency offset grading to determine the largest M channel;

[0009] S5. Compensate the maximum M channels with N times the frequency and phase, and add it to the data rate;

[0010] S6. Select data according to the data format of Link mode, and unify the data formats with and without pilot signals;

[0011] S7. The selected data is descrambled and decoded, and then CRC is used for verification to recover the data.

[0012] Furthermore, the N times channel rate is accumulated to 4 times.

[0013] Furthermore, the first peak search of the obtained complex multiplication result described in S2 is as follows: after padding the search results with zeros, the FFT is calculated. When the maximum peak value of the FFT exceeds the threshold, the frequency corresponding to the maximum peak value is the coarse frequency offset.

[0014] Furthermore, the frequency offset classification described in S3 is based on the cached data of the conjugate complex multiplication result described in S2.

[0015] Furthermore, the second peak search described in S4 specifically involves: zero-padding the compensation signal and then calculating the FFT; determining the peak value as the FFT exceeding a threshold; recording the peak value as the fine frequency offset; and recording the time when the peak value occurs as the timing point.

[0016] Furthermore, in the compensation frequency and phase described in S5, a fine frequency offset is used to compensate for the I-channel and Q-channel data, and the data is accumulated according to the data rate.

[0017] Furthermore, the data selection according to the Link mode data format described in S6 involves selecting the I and Q data after compensation for fine frequency offset sequentially from the timed position according to the selected Link mode. If there is a pilot, the pilot point needs to be skipped to unify the pilot and non-pilot modes of the VDE signal and select the data before it is sent to the descrambling and decoding unit.

[0018] Furthermore, the CRC verification method described in S7 is as follows: if the verification passes, the data is directly restored; if the verification fails, M channels are reselected from the remaining frequency offset segments, with a maximum of K iterations.

[0019] The second technical solution of this application provides a VDE signal-based acquisition and demodulation system for completing the above method, including a VDE signal acquisition module and a VDE signal demodulation module;

[0020] The VDE signal acquisition module includes:

[0021] ADC sampling module: used to convert the VDE signal received by the receiver into an input signal;

[0022] I-channel and Q-channel N-times channel rate accumulation module: used to accumulate the I-channel and Q-channel rates to initially improve the signal-to-noise ratio;

[0023] Frame header conjugate module: used to generate local frame header conjugate data and multiply it with the I-channel and Q-channel signals accumulated to N times the channel rate;

[0024] Zero-padding and FFT calculation: After zero-padding the complex multiplication result of the frame header conjugate module, the FFT is calculated, and the first peak is searched to obtain the frequency corresponding to the peak exceeding the threshold as the coarse frequency offset.

[0025] Data caching module: used to cache the signal after conjugate complex multiplication of the frame header;

[0026] Frequency banding module: used to band the signal frequency, read the buffer (the conjugate result of the frame header after multiplication with the signal), and perform frequency offset compensation on the buffer data according to the frequency offset band value. After frequency offset compensation, the signal is searched for peaks again, and the peak values ​​of multiple bands are compared. The frequency corresponding to the second peak is the fine frequency offset. The appearance of the second peak is used as the timing moment. The fine frequency offset controls the DDS to generate compensation and multiplication with the signal.

[0027] Maximum value comparison module and maximum M-path selection module: used to perform maximum value comparison and select the maximum M-path;

[0028] Frequency and phase compensation module: used to generate the real and imaginary part signals of DDS based on the captured correct frequency offset, multiply them by the received data I and Q channels, and complete the frequency offset and phase compensation after banding;

[0029] Accumulated to data rate module: This module accumulates N times the rate of compensation for frequency offset and phase onto the data rate to further improve the signal-to-noise ratio.

[0030] The VDE signal demodulation module includes:

[0031] Link mode parameter selection module: used to select data according to the data format of Link mode, and to unify the data format with and without pilots;

[0032] Descrambling module: Used to descramble data;

[0033] Decoding module: Used to input the code into the corresponding decoder according to the decoding format used, and complete the decoding.

[0034] CRC check module: Determines whether the data passes the check. If the check passes, the data is directly restored. If the check fails, M channels are reselected from the remaining frequency offset segments, with a maximum iteration of K times.

[0035] Beneficial effects: The VDE-based signal acquisition and demodulation method provided by this invention has low equipment complexity, uses the same process for different links, and reduces equipment complexity by selecting different parameters. Furthermore, this invention has the following advantages compared to existing technologies:

[0036] (1) This invention does not distinguish whether a data frame has a pilot; both data frames with and without pilots can be captured and demodulated.

[0037] (2) The selection of the maximum M-path module and the decision module for whether to continue iteration in this invention can be adjusted according to system requirements and hardware resources.

[0038] (3) Based on the difference between the noise mean and the peak value, the present invention achieves maximum peak value capture under different signal-to-noise ratio environments. Attached Figure Description

[0039] Figure 1 This is a schematic diagram of the VDE signal acquisition and demodulation method of the present invention.

[0040] Figure 2 This is a schematic diagram illustrating the working principle of the Link mode data selection in this invention. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0042] To address these issues, this application employs the following technical solution: a method for capturing and demodulating VDE signals, comprising:

[0043] The second technical solution of this application provides a VDE signal-based acquisition and demodulation system for completing the above method, including a VDE signal acquisition module and a VDE signal demodulation module;

[0044] like Figure 1 As shown: Embodiments of this application provide a method for capturing and demodulating VDE signals, including:

[0045] S1. Receives the VDE signal, performs digital-to-analog conversion after sampling by the ADC, and accumulates the I and Q channels by N times the channel rate to form the input signal.

[0046] The ADC sampling uses an AD9361 digital-to-analog converter, and the accumulation calculation module uses a ZYNQ 7035 FPGA chip. The N-times channel rate accumulation is 4 times, that is, the I-channel and Q-channel are respectively accumulated at N times the channel rate. Considering the timing accuracy of burst signals, an N=4 channel rate accumulation is sufficient. A higher accumulation rate can bring higher timing accuracy, but it will consume more resources. Therefore, a 4 times signal rate is selected for accumulation.

[0047] S2. Perform frame header conjugate complex multiplication on the input signal, and perform the first peak search on the complex multiplication result to obtain the coarse frequency offset.

[0048] In the frame header conjugate complex multiplication, the VDE signal Link mode has a frame header of 27 and 48 bits in length. Its conjugate sequence is stored as a local code group. Correlation matching is performed on the input signal, and the FFT is calculated after zero padding of the search results. The value of the FFT exceeding the threshold is recorded as the maximum peak value, and the frequency corresponding to the maximum peak value is recorded as the coarse frequency offset.

[0049] It should be noted that the number of FFT points is P, which is generally taken as 8192; the maximum peak value exceeds the threshold (D times the noise mean is used as the threshold, which is generally 2 to 4).

[0050] Understandably, after performing the conjugate multiplication of the frame header, the result of the conjugate multiplication needs to be cached to facilitate quick reading of the cache during subsequent frequency offset classification.

[0051] S3. Based on the coarse frequency offset, perform frequency offset classification, and compensate for the frequency offset of the frame header conjugate complex multiplication result according to the classified frequency offset.

[0052] The frequency offset grading is based on the cached data of the conjugate complex multiplication result described in S2. The data cache and frequency grading are performed according to channel rate * 4 / P, generally divided into 9 grades (-4 * channel rate * 4 / P, -3 * channel rate * 4 / P, -2 * channel rate * 4 / P, -1 * channel rate * 4 / P, coarse frequency offset, 1 * channel rate * 4 / P, 2 * channel rate * 4 / P, 3 * channel rate * 4 / P, 4 * channel rate * 4 / P). After reading the cached data, frequency offset compensation is performed according to the 9 grades to obtain the compensated data.

[0053] S4. Perform a second peak search on the compensation signal to obtain a fine frequency offset, and record the time when the second peak occurs as the timing time; at the same time, compare the second peak search result with the maximum value of multiple gear values ​​after frequency offset grading to determine the largest M path; specifically, calculate FFT after zero padding of the compensation signal, and determine the peak value when the FFT exceeds the threshold. The peak value is recorded as fine frequency offset, and the time when the peak occurs is the timing time.

[0054] Specifically, the maximum value comparison module and the maximum M-channel selection module compare the maximum peak value found in the second search after frequency grading, and select the largest M-channel data. Generally, an M value of 3 is selected. The judgment condition is that the peak value of the middle grading level is greater than or equal to the peak values ​​of the two grading levels. At this point, the frequency offset is correctly captured, and the moment when the maximum value appears is used as the timing point.

[0055] S5. Compensate the maximum M channels with N times the frequency and phase rate, and add it to the data rate.

[0056] In the compensation frequency and phase, the time when the maximum value found in the second search occurs is used as the timing point. Based on the M-channel fine frequency offset obtained according to the grading situation, a DDS is generated to compensate the I-channel and Q-channel data. The compensation frequency and phase module determines the fine frequency offset and phase, which is a prerequisite for the Link mode parameter selection module to select the I-channel and Q-channel data to be demodulated.

[0057] The data rate accumulation module adds N times the rate of frequency offset and phase compensation to the data rate, thereby improving the signal-to-noise ratio.

[0058] S6. Select data according to the data format of Link mode, and unify the data formats with and without pilot signals.

[0059] The data selection according to the Link mode data format involves sequentially selecting the I and Q channels after frequency offset compensation, based on the selected Link mode, starting from the timing point. If a pilot is present, the pilot point needs to be skipped. This unifies the pilot-containing and pilot-free modes of the VDE signal, selecting the data before it is sent to the descrambling and decoder. The Link mode parameter selection module unifies the pilot-containing and pilot-free data formats, facilitating subsequent descrambling and decoding processing and simplifying the receiver equipment.

[0060] The compensation frequency and phase module preferably uses an AD9361 digital-to-analog converter from Analog Devices and a ZYNQ 7035 from AMD. It converts the received RF signal to 110MHz sampled baseband I and Q channels. The accumulated data rate of the baseband signal is divided using an NCO method, tightly coupling the enable signal to the 110MHz master clock. The entire receiver module uses a single master clock, with the remaining divided clocks triggered by pulse enable signals. The location of the maximum value calculated by zero-padded FFT corresponds to the coarse frequency offset. Based on this coarse offset, frequency banding and compensation are performed, and the search continues for a fine frequency offset until the input demodulation conditions are met. Then, depending on the Link mode, an enable signal is generated, corresponding to the I and Q channel data to be demodulated. The compensation frequency and phase module can extract pilot data independently of subsequent data.

[0061] like Figure 2 The diagram illustrates the working principle of Link mode data selection. It accumulates N times the rate used to compensate for minor frequency offset and phase deviation onto the data rate, thereby improving the signal-to-noise ratio. Data is selected according to the Link mode data format, generating corresponding enable signals (corresponding to the I and Q channels of the data accumulated at the data rate). Data containing pilot signals is skipped; data without pilot signals is selected based on its length.

[0062] S7. The selected data is descrambled and decoded, and then CRC is used for verification to recover the data.

[0063] Specifically, the descrambling process involves first storing the data in a buffer, reading it according to the length of a serial frame, and then sending it to the descrambling buffer to complete the descrambling.

[0064] Specifically, the decoding process involves feeding the data into the appropriate decoder according to the chosen decoding format to complete the decoding.

[0065] Specifically, the CRC verification method is as follows: if the verification passes, the data is directly restored; if the verification fails, M channels are reselected from the remaining frequency offset segments, with a maximum of K iterations.

[0066] The second embodiment of this application discloses a system for implementing the above-described VDE signal acquisition and demodulation method, including a VDE signal acquisition module and a VDE signal demodulation module;

[0067] The VDE signal acquisition module includes:

[0068] ADC sampling module: used to convert the VDE signal received by the receiver into an input signal;

[0069] I-channel and Q-channel N-times channel rate accumulation module: used to accumulate the I-channel and Q-channel rates to initially improve the signal-to-noise ratio;

[0070] Frame header conjugate module: used to generate local frame header conjugate data and multiply it with the I-channel and Q-channel signals accumulated to N times the channel rate;

[0071] Zero-padding and FFT calculation: After zero-padding the complex multiplication result of the frame header conjugate module, the FFT is calculated, and the first peak is searched to obtain the frequency corresponding to the peak exceeding the threshold as the coarse frequency offset.

[0072] Data caching module: used to cache the signal after conjugate complex multiplication of the frame header;

[0073] Frequency banding module: used to band the signal frequency, read the buffer (the conjugate result of the frame header after multiplication with the signal), and perform frequency offset compensation on the buffer data according to the frequency offset band value. After frequency offset compensation, the signal is searched for peaks again, and the peak values ​​of multiple bands are compared. The frequency corresponding to the second peak is the fine frequency offset. The appearance of the second peak is used as the timing moment. The fine frequency offset controls the DDS to generate compensation and multiplication with the signal.

[0074] Maximum value comparison module and maximum M-path selection module: used to perform maximum value comparison and select the maximum M-path;

[0075] Frequency and phase compensation module: used to generate the real and imaginary part signals of DDS based on the captured correct frequency offset, multiply them by the received data I and Q channels, and complete the frequency offset and phase compensation after banding;

[0076] Accumulated to data rate module: This module accumulates N times the rate of compensation for frequency offset and phase onto the data rate to further improve the signal-to-noise ratio.

[0077] The VDE signal demodulation module includes:

[0078] Link mode parameter selection module: used to select data according to the data format of Link mode, and to unify the data format with and without pilots;

[0079] Descrambling module: Used to descramble data;

[0080] Decoding module: Used to input the code into the corresponding decoder according to the decoding format used, and complete the decoding.

[0081] CRC check module: Determines whether the data passes the check. If the check passes, the data is directly restored. If the check fails, M channels are reselected from the remaining frequency offset segments, with a maximum iteration of K times.

[0082] This application uses a VDE signal received by a receiver in a specific instance as an example to illustrate the working process:

[0083] Taking the Link26 signal as an example, the VDE signal received by the AD9361's ADC sampling module is 110MHz;

[0084] The I-channel and Q-channel N-times channel rate accumulation modules accumulate the I-channel and Q-channel rates. The accumulated rate is 33600*4=134400Hz. The accumulation rate is generated by 110M in the form of NCO and used as an enable signal, which is aligned with the data accumulated to 134400Hz.

[0085] The frame header conjugate module generates local frame header conjugate data (4 times the sampling points), which is then multiplied by the accumulated I and Q signals up to 134400Hz, and the data is buffered by the buffer data module.

[0086] The result of the complex multiplication is padded with 8084 zeros (8192-27*4=1940) to 8192 points. The FFT is calculated, and the peak value exceeding the threshold is searched. The corresponding frequency is the coarse frequency offset, and the first peak search is completed.

[0087] Based on the coarse frequency offset, the signal frequency is divided into nine levels (coarse frequency offset, coarse frequency offset ±16.4Hz, coarse frequency offset ±32.8Hz, coarse frequency offset ±65.6Hz, and coarse frequency offset ±131.25Hz). The buffer (the conjugate result of the frame header after multiplication with the signal) is read, and frequency offset compensation is performed on the buffer data according to the frequency offset level value. The frequency offset compensation signal is then subjected to a second peak search, and the peak values ​​of multiple levels are compared. The frequency corresponding to the second peak is the fine frequency offset. The occurrence of the second peak is used as the timing point, and the maximum of 3 channels is selected to complete the frequency offset and phase compensation after the leveling. Afterward, it is accumulated to a data rate of 33600Hz to further improve the signal-to-noise ratio.

[0088] The Link26 pilot interval is 27. The pilot points are skipped, and the data is selected for subsequent processing. The selected data is converted from parallel to serial data and sent to the descrambling module to complete the data descrambling. According to the decoding format used, it is sent to the corresponding decoder to complete the decoding. The decoded data is sent to the CRC check module. If the check passes, the data is directly restored. If the check fails, 3 channels are reselected from the remaining frequency offsets, with a maximum of 3 iterations.

[0089] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications, equivalent substitutions, and improvements made by those skilled in the art within the scope of the technology disclosed in the present invention, and within the spirit and principles of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A method for capturing and demodulating VDE signals, characterized in that, Includes the following steps: S1. Receive the VDE signal, perform digital-to-analog conversion after sampling by the ADC, and accumulate the I and Q channels by N times the channel rate to form the input signal; S2. Perform frame header conjugate complex multiplication on the input signal, and perform the first peak search on the complex multiplication result to obtain the coarse frequency offset; S3. Based on the coarse frequency offset, perform frequency offset classification, and compensate for the frequency offset of the frame header conjugate complex multiplication result according to the classified frequency offset. S4. Perform a second peak search on the compensation signal to obtain a fine frequency offset, and record the time when the second peak occurs as the timing time; at the same time, compare the second peak search result with the maximum value of multiple range values ​​after frequency offset grading to determine the largest M channel; S5. Compensate the maximum M channels with N times the frequency and phase, and add it to the data rate; S6. Select data according to the data format of Link mode, and unify the data formats with and without pilot signals; S7. The selected data is descrambled and decoded, and then CRC is used for verification to recover the data; Specifically, S6 describes data selection according to the Link mode data format, which involves selecting the I and Q data after compensation for fine frequency offset sequentially from the selected Link mode. If a pilot exists, the pilot point needs to be skipped to unify the pilot and non-pilot modes of the VDE signal, and then select the data before it is sent to the descrambling and decoder.

2. The method according to claim 1, characterized in that, The N times the channel rate is accumulated to 4 times.

3. The method according to claim 1, characterized in that, The first peak search for the obtained complex multiplication result described in S2 is as follows: after padding the search results with zeros, the FFT is calculated. When the maximum peak value of the FFT exceeds the threshold, the frequency corresponding to the maximum peak value is the coarse frequency offset.

4. The method according to claim 1, characterized in that, The second peak search described in S4 is as follows: after zero-padding the compensation signal, the FFT is calculated, and the peak value is determined when the FFT result exceeds the threshold. The frequency value corresponding to the peak value is recorded as the fine frequency offset, and the time when the peak occurs is the timing time.

5. The method according to claim 1, characterized in that, In the compensation frequency and phase of S5, a fine frequency offset is used to compensate for the I-channel and Q-channel data, and the data is accumulated according to the data rate.

6. The method according to claim 1, characterized in that, The CRC verification method described in S7 is as follows: if the verification passes, the data is directly restored; if the verification fails, M channels are reselected from the remaining frequency offset segments, with a maximum of K iterations.

7. A VDE signal acquisition and demodulation system, used to perform the VDE signal acquisition and demodulation method according to any one of claims 1-6, characterized in that, Includes a VDE signal acquisition module and a VDE signal demodulation module; The VDE signal acquisition module includes: ADC sampling module: used to convert the VDE signal received by the receiver into an input signal; I-channel and Q-channel N-times channel rate accumulation module: used to accumulate the I-channel and Q-channel rates to initially improve the signal-to-noise ratio; Frame header conjugate module: used to generate local frame header conjugate data and multiply it with the I-channel and Q-channel signals accumulated to N times the channel rate; Zero-padding and FFT calculation: After zero-padding the complex multiplication result of the frame header conjugate module, the FFT is calculated, and the first peak is searched to obtain the frequency corresponding to the peak exceeding the threshold as the coarse frequency offset. Data caching module: used to cache the signal after conjugate complex multiplication of the frame header; Frequency banding module: used to band the signal frequency, read the buffer, that is, the frame header conjugate result after multiplication with the signal, and perform frequency offset compensation on the buffer data according to the frequency offset band value. After frequency offset compensation, the signal is searched for a second peak, and the peak values ​​of multiple bands are compared. The frequency corresponding to the second peak is the fine frequency offset. The appearance of the second peak is used as the timing moment. The fine frequency offset controls the DDS to generate compensation and multiplication with the signal. Maximum value comparison module and maximum M-path selection module: used to perform maximum value comparison and select the maximum M-path; The frequency and phase compensation module is used to generate the real and imaginary part signals of DDS based on the captured correct frequency offset, multiply them by the received data I and Q channels, and complete the frequency offset and phase compensation after banding. The I and Q channel data are selected sequentially after fine frequency offset compensation, starting from the timing time. If there is a pilot, the pilot point needs to be skipped to unify the pilot and non-pilot modes of the VDE signal and select the data before sending it to the descrambling and decoding unit. Accumulated to data rate module: This module accumulates N times the rate of compensation for frequency offset and phase onto the data rate to further improve the signal-to-noise ratio. The VDE signal demodulation module includes: Link mode parameter selection module: used to select data according to the data format of Link mode, and unify the data format with and without pilots; Descrambling module: Used to descramble data; Decoding module: Used to input the code into the corresponding decoder according to the decoding format used, and complete the decoding. CRC check module: Determines whether the data passes the check. If the check passes, the data is directly restored. If the check fails, M channels are reselected from the remaining frequency offset segments, with a maximum iteration of K times.

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