A p-dipole material Ga2o3-based moscap device and a preparation method thereof
By inserting a Ga2O3 dipole layer at the SiO2/HfO2 interface and preparing Ga2O3 thin films using PE-ALD technology, the problem of Vt displacement saturation in traditional Al2O3 materials during multi-threshold voltage modulation was solved, achieving efficient VFB modulation and low EOT variation in MOSCAP devices and improving device performance.
Patent Information
- Application Number
- CN202411490382.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-24
- Publication Date
- 2025-11-28
- Estimated Expiration
- 2044-10-24
AI Technical Summary
In the implementation of multi-threshold voltage modulation, Al2O3 as a p-dipole material suffers from Vt displacement saturation, carrier mobility degradation, and reliability degradation. Furthermore, the increased complexity of three-dimensional deposition and photolithography processes limits chip size and device performance.
Using Ga2O3 as a novel p-dipole material, a Ga2O3 dipole layer is inserted into the SiO2/HfO2 interface through plasma-enhanced atomic layer deposition (PE-ALD) technology. Combined with annealing and electrode fabrication processes, the flat band voltage (VFB) of the MOSCAP device is positively modulated over a wide range and the thin film has near-zero thickness variation.
A Ga2O3 thin film with minimal increase in equivalent oxide thickness (EOT), significant positive VFB offset and high dielectric constant was achieved, solving the problem of VFB saturation in traditional Al2O3 materials, and improving device performance and the application potential of multi-threshold voltage technology.
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Abstract
Description
Technical Field
[0001] This invention relates to the field of metal-oxide-semiconductor capacitor (MOSCAP) device fabrication technology, specifically to a MOSCAP device based on p-dipole material Ga2O3 and its fabrication method. Background Technology
[0002] With the continuous advancement of CMOS integration technology, multi-threshold voltage modulation technology has become an important research direction for advanced logic circuit technology nodes. The traditional solution involves using complex photolithography and other processes to achieve threshold voltages in different regions of the chip. V t This differs from other technologies, such as the transition from planar transistors to FinFETs. However, as advanced process technologies enter the Gate-All-Around (GAA) era, the limitations of chip size and the increasing complexity of three-dimensional deposition, lithography, and etching processes make the development of a new technology to achieve multiple threshold voltages urgent.
[0003] In recent years, a method has been developed using ultrathin dipole layers to achieve... V t Controllable and tunable dipole engineering techniques have attracted widespread attention from researchers. These ultrathin dipole layers are typically intercalated into SiO2 (IL) and HfO2 (high-strength dipole layers). k Between layers, to adjust the flat band voltage of the transistor. V FB )and V t .according to V t The direction of adjustment of these dipoles can be divided into two categories: n-type dipoles and p-type dipoles, which are used to realize NMOS (N-type metal-oxide-semiconductor) devices. V t The forward and reverse controllable modulation is possible. To date, research on n-dipole materials is relatively mature, but research on p-dipole materials remains relatively limited. Al₂O₃, as a common p-dipole material, has wide applications and is widely studied in industry and academia. However, due to the inherent suppression mechanism of Al coating technology, it also presents its own limitations. V t Problems such as displacement saturation and degradation of carrier mobility and reliability caused by long-range Coulomb scattering make it crucial to explore a new p-dipole material.
[0004] According to the existing dipole formation theory and the prediction of molecular dynamics calculation, Ga2O3 is expected to be a p-dipole candidate material. A potential new p-dipole material needs to meet the following characteristics: 1. It has a relatively high k value to achieve a low EOT sacrifice, so as to realize the threshold voltage regulation of the film zero thickness; 2. It can realize a larger V FB offset and regulation range to meet the needs of multi-threshold voltage technology; 3. The prepared film has high quality, which avoids the increase of device leakage current. SUMMARY
[0005] The purpose of the present application is to provide a MOSCAP device based on a new p-dipole material Ga2O3 and a preparation method thereof. The present application uses a new p-dipole replacement material to prepare a MOSCAP device, and by introducing a Ga2O3 dipole layer, a significant flat band voltage V FB ) positive offset is realized; the present application inserts the Ga2O3 grown by plasma enhanced atomic layer deposition (PE-ALD) between the SiO2 interface layer / HfO2 to construct a MOSCAP device, the preparation process is simple, and the prepared MOSCAP device can realize a large range of positive modulation of flat band voltage and threshold regulation with almost zero thickness change of the film.
[0006] The purpose of the present application is realized by the following technical solutions.
[0007] A preparation method of a MOSCAP device based on a p-dipole material Ga2O3, comprising the following steps:
[0008] (1) using (100) crystal direction p-type doped Si as a substrate, high-temperature thermal oxidation in O2 atmosphere to grow a high-quality SiO2 interface layer (IL) film;
[0009] (2) on the surface of the SiO2 film obtained in step (1), using plasma enhanced atomic layer deposition (PE-ALD) to grow Ga2O3 films of different thicknesses to form a dipole layer, and then depositing a HfO2 film;
[0010] (3) annealing the device of step (2) in a specific gas environment, temperature, time and specific annealing method to repair the oxide defects in the film and between the films;
[0011] (4) on the surface of the device obtained in step (3), patterning the contact electrode area by ultraviolet (UV) lithography, and preparing the corresponding electrodes on the film surface by electron beam evaporation (EBE) and liftoff process.
[0012] (5) For the device of step (4), a hydrofluoric acid (HF) solution is used to etch the back of the device, remove the natural oxide layer on the back, and grow a back electrode of a certain thickness by EBE process.
[0013] In the above step (1), the doping concentration of the Si substrate is 1.0 x 10 15 -1.0 x 10 17 cm -3 , the thermal oxidation temperature is set to 500-800℃, and the time is 5-10 min; before thermal oxidation, a standard RCA cleaning process is used to remove the natural oxide layer on the surface of the Si substrate.
[0014] In the above step (2), the process conditions for growing Ga2O3 film by plasma-enhanced atomic layer deposition (PE-ALD) are as follows: trimethylgallium (TMGa) is used as Ga source, the pulse time is 0.1-2 s, the oxygen source is selected as O2 plasma, the radio frequency power is 50-200 W, the time is 0.5-5 s, the deposition temperature is 200-300℃, and the deposition rate is 0.05-0.07 nm / cycle; the process conditions for depositing HfO2 film are as follows: tetrakis (dimethylamino) hafnium (TDMAHf) is used as Hf source, the pulse time is 0.1-2 s, the oxygen source is selected as O2 plasma, the radio frequency power is 50-200 W, the time is 0.5-5 s, the deposition temperature is 200-300℃, and the deposition rate is 0.12-0.20 nm / cycle.
[0015] In the above step (2), the thickness of the Ga2O3 film is 0.6-3 nm, and the thickness of the HfO2 film is 4-6 nm.
[0016] In the above step (3), the annealing atmosphere is nitrogen (N2) or argon (Ar), the set annealing temperature is 500-1000℃, the annealing time is 1 ms-15 s, and the annealing method is rapid thermal annealing (RTP) or laser annealing.
[0017] In the above step (4), the lateral size of the contact electrode region is 50-100 μm, and the electrode structure is W (50-100 nm) or TiN (5-10 nm) / W (50-100 nm).
[0018] In the above step (5), the time for HF solution wet etching is 1-5 min; after wet etching, acetone, isopropyl alcohol, and deionized water are used for ultrasonic cleaning to remove the particles and contaminants on the back, and the ultrasonic time of acetone, isopropyl alcohol, and deionized water is 2-5 min; the back electrode is Ni (50-100 nm).
[0019] The application also provides a MOSCAP device based on p-dipole material Ga2O3 and a preparation method thereof. After inserting the Ga2O3 layer, the device realizes a huge flat band voltage EOT with a very small equivalent oxide thickness (EOT). V FB forward shift.
[0020] The principle of the application is as follows:
[0021] The MOSCAP device based on the novel p-dipole material Ga2O3 of the application inserts a Ga2O3 dipole layer at the IL / HfO2 interface of the device by PE-ALD technology, introduces p-dipole at the IL / Ga2O3 and Ga2O3 / HfO2 interfaces, and then reduces the IL / high- k layer valence band offset (VBO), so as to realize a large-scale positive modulation of the flat band voltage of the MOSCAP device. Meanwhile, the ALD-grown Ga2O3 has a high dielectric constant (~10), and the equivalent oxide thickness (EOT) caused by the inserted thin dipole layer is also very small, so that the threshold control with a nearly zero thickness change of the film can be realized. EOT
[0022] Compared with the prior art, the application has the following beneficial effects:
[0023] 1. The Ga2O3 film grown by PE-ALD is dense, uniform and adjustable in thickness, and realizes a very small EOT increase before and after the insertion of the dipole layer.
[0024] 2. By inserting Ga2O3 material at the IL / high- k interface, p-dipole is introduced, so that a huge V FB forward shift is realized.
[0025] 3. The energy band alignment analysis of the IL / HfO2 and IL / Ga2O3 / HfO2 heterostructures is performed by XPS valence band spectrum and core level fine spectrum, and it is proved from the change of the valence band step that Ga2O3 is a very potential p-dipole material.
[0026] 4. In the present application, the Ga2O3 thin film based on ALD growth is amorphous and has a high dielectric constant. As a dipole layer inserted between SiO2 / HfO2, it can achieve a flat-band voltage positive adjustment of 1.09-1.59 V under the same thickness, while the traditional Al2O3 as a p-dipole material can generally only achieve a flat-band voltage shift of 0.1-0.5 V under the same thickness (0.6-3 nm). The present application solves the problem of V FB adjustment saturation. BRIEF DESCRIPTION OF DRAWINGS
[0027] Figure 1 A schematic diagram of a p-Si / SiO2 substrate structure of an embodiment of the present application.
[0028] Figure 2 A schematic diagram of a p-Si / SiO2 / Ga2O3 / HfO2 device thin film structure of an embodiment of the present application.
[0029] Figure 3 A schematic diagram of a device on which a photoresist mask layer is spin-coated of an embodiment of the present application.
[0030] Figure 4 A schematic diagram of a MOSCAP device structure of an embodiment of the present application.
[0031] Figure 5 A plot of a capacitance-voltage curve of a device of an embodiment of the present application tested at 1 MHz.
[0032] Figure 6 A plot of flat-band voltage and equivalent oxide thickness of a device of an embodiment of the present application as a function of dipole layer thickness.
[0033] Figure 7 A plot of conductance extracted by parallel conductance method of a device of an embodiment of the present application as a function of test frequency.
[0034] Figure 8 A plot of distribution of interface trap defects in the energy band of a device of an embodiment of the present application.
[0035] Figure 9 A schematic diagram of energy band alignment of a dielectric layer of a device of an embodiment of the present application; a) 0 nm Ga2O3, b) 10 cycles, c) 20 cycles, d) 30 cycles. DETAILED DESCRIPTION
[0036] In order to make the technical means, creative features, purposes and effects achieved by the present application easy to understand, the present application will be further described in detail below in conjunction with the embodiments and drawings, but the embodiments of the present application are not limited thereto. EMBODIMENT
[0037] A MOSCAP device based on a new p-dipole material Ga2O3, the preparation steps of which are as follows:
[0038] (1) Using p-type doped Si with a (100) crystal orientation as a substrate, the doping concentration is 1.0×10 15 cm -3 . A standard RCA cleaning process is used to remove the natural oxide layer on the surface of the Si substrate. A 2 nm thick high-quality SiO2 film is grown by a tube furnace device at 600 ℃ for 5 min in an O2 atmosphere, and the resulting structure is as shown in Figure 1 ;
[0039] (2) On the surface of the SiO2 film obtained in step (1), a PE-ALD technique is used, with TMGa as the Ga source, a pulse time of 0.2 s, an oxygen source selected as O2 plasma, a radio frequency power of 100 W, a time of 1 s, a deposition temperature of 250 ℃, a deposition rate of 0.65 nm / cycle, and a Ga2O3 film is grown at 0 / 10 / 15 / 20 / 30 cycles to form a dipole layer. At the same time, TDMAHf is used as the Hf source, a pulse time of 0.2 s, an oxygen source selected as O2 plasma, a radio frequency power of 100 W, a time of 4 s, a deposition temperature of 250 ℃, a deposition rate of 0.15 nm / cycle, and a HfO2 film is re-deposited at 40 cycles, as shown in Figure 2 ;
[0040] (3) The device of step (2) is annealed at a high temperature of 800 ℃ for 15 s in an N2 atmosphere in a rapid thermal annealing furnace (RTP) to repair oxide defects in the film and between the films;
[0041] (4) On the surface of the device obtained in step (3), a contact electrode area is patterned by ultraviolet (UV) lithography, as shown in Figure 3 , and a 50 nm W electrode is patterned on the surface of the film by EBE and liftoff processes;
[0042] (5) For the device of step (4), the back of the device is etched with an HF solution for 2 min to remove the natural oxide layer on the back, and the back is cleaned with acetone, isopropyl alcohol and deionized water for 3 min at a power of 40 W to remove particulate matter and contaminants, and a 50 nm Ni back electrode is grown by an EBE process to obtain a MOSCAP device with a p-Si / IL / Ga2O3 / HfO2 / W structure, as shown in Figure 4 .
[0043] The MOSCAP device based on the new p-dipole material Ga2O3 prepared in this example is based on the p-dipole induced by the Ga2O3 insertion layer, so that the capacitance-voltage curve of the MOSCAP device is significantly positively shifted compared with the control device (device without Ga2O3 insertion), and the shift amount increases with the increase of the thickness of the inserted Ga2O3 and tends to be saturated, as shown in Figure 5 The Δ V of the device is extracted by calculation FB and EOT The parameter variation trend with the number of ALD cycles of Ga2O3 is shown in Figure 6 By inserting a Ga2O3 layer of 10-30 cycles, the MOSCAP device realizes a positive controllable shift of up to 1.09-1.59 V with only a sacrifice of 0.05-0.36 nm EOT . V FB The MOSCAP device of this example with 20 cycles of Ga2O3 insertion has a relationship between conductance (G) G and frequency (f) ω extracted by capacitance-frequency test, and the distribution of the device interface trap defects in the energy band extracted by parallel conductance method, as shown in Figure 7 and Figure 8 The MOSCAP device of this example has an interface trap defect of the order of 10 12 eV -1 cm -2 , which is at the same performance level as other reported p-dipole material MOSCAP devices.
[0044] The energy band alignment diagram of IL / HfO2 and IL / Ga2O3 / HfO2 heterostructures drawn by XPS valence band spectrum and core level fine spectrum is shown in Figure 9 The VBO at the interface of the control SiO2 / HfO2 device is 1.02, and after adding 10 / 20 / 30 cycles of Ga2O3, the Ga2O3 forms p-dipoles at the interfaces of SiO2 and HfO2, respectively, so that the VBO between SiO2 and HfO2 decreases to 0.81 / 0.69 / 0.62 eV, respectively, which is consistent with the positive shift trend of the capacitance-voltage curve in the electrical test, confirming that ALD Ga2O3 is a very potential p-dipole material. This new p-dipole material realizes a huge V FB positive control with very small EOT, which makes up for the shortcomings of p-dipole materials and provides a new potential optional material for the development of future multi-threshold technology. EMBODIMENT
[0045] A MOSCAP device based on a new p-dipole material Ga2O3, the preparation steps of which are as follows:
[0046] (1) Using p-type doped Si with a (100) crystal orientation as a substrate, the doping concentration is 1.0×10 17 cm -3 . A standard RCA cleaning process is used to remove the natural oxide layer on the surface of the Si substrate. A 3 nm thick high-quality SiO2 film is grown by a tube furnace device at 800 ℃ for 3 min in an O2 atmosphere, and the resulting structure is as shown in Figure 1 ;
[0047] (2) On the surface of the SiO2 film obtained in step (1), a PE-ALD technique is used, with TMGa as the Ga source, a pulse time of 0.5 s, an oxygen source selected as O2 plasma, a radio frequency power of 150 W, a time of 2 s, a deposition temperature of 270 ℃, a deposition rate of 0.70 nm / cycle, a Ga2O3 film grown for 0 / 10 / 15 / 20 / 30 cycles to form a dipole layer, and at the same time, TDMAHf is used as the Hf source, a pulse time of 0.4 s, an oxygen source selected as O2 plasma, a radio frequency power of 150 W, a time of 5 s, a deposition temperature of 270 ℃, a deposition rate of 0.17 nm / cycle, and a HfO2 film deposited for 20 cycles, as shown in Figure 2 ;
[0048] (3) The device of step (2) is annealed in a laser annealing device at a high temperature of 700 ℃ for 1 ms in an N2 atmosphere to repair oxide defects in the film and between the films;
[0049] (4) On the surface of the device obtained in step (3), a contact electrode area is patterned by ultraviolet (UV) lithography, as shown in Figure 3 , and a 70 nm W electrode is patterned on the surface of the film by EBE and liftoff processes;
[0050] (5) For the device of step (4), HF solution is used to etch the back of the device for 3 min to remove the natural oxide layer on the back, acetone, isopropyl alcohol and deionized water are used to clean the back for 2 min at a power of 60 W to remove particles and contaminants, and a 70 nm Ni back electrode is grown by the EBE process to obtain a MOSCAP device with a p-Si / IL / Ga2O3 / HfO2 / W structure, as shown in Figure 4 .
[0051] The performance characteristics of the MOSCAP device based on the novel p-dipole material Ga2O3 prepared in this embodiment are similar to those in Example 1, and will not be repeated here.
[0052] In the above, the device with a Ga2O3 thickness of 0 was used as a control group. Compared with the control group, the MOSCAP device with the addition of a Ga2O3 dipole layer exhibited a lower hysteresis curve and only increased the equivalent oxide thickness by a very small amount. EOT ), while achieving significant V FB Positive regulation overcomes the limitations of traditional Al2O3 dipole materials. V FB The issue of saturation in the adjustment amount. This invention confirms that Ga2O3 is a promising new p-dipole material, showing broad application prospects in the development of multi-threshold technologies at advanced process nodes.
[0053] The above embodiments are preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, changes, substitutions, combinations, or simplifications made without departing from the essence and principle of the present invention should be considered as equivalent substitutions and are included within the scope of protection of the present invention.
Claims
1. A method for fabricating a MOSCAP device based on p-dipole material Ga2O3, characterized in that, The method comprises the following steps: (1) using p-type doped Si with a (100) crystal orientation as a substrate, high-temperature thermal oxidation is performed in an O2 atmosphere to grow a high-quality SiO2 interface layer film; (2) on the surface of the SiO2 film obtained in step (1), a Ga2O3 film with a certain thickness is grown by plasma-enhanced atomic layer deposition (PE-ALD) to form a dipole layer, and then a HfO2 film is deposited; (3) the device obtained in step (2) is annealed to repair oxide defects in the film and between the films; (4) on the surface of the device obtained in step (3), a contact electrode area is patterned by ultraviolet (UV) lithography, and corresponding electrodes are prepared on the surface of the film by electron beam evaporation (EBE) and liftoff processes; (5) for the device in step (4), a back portion of the device is etched by a hydrofluoric acid solution to remove a natural oxide layer on the back portion, and a back electrode with a certain thickness is grown by an electron beam evaporation (EBE) process.
2. The production method according to claim 1, characterized by, The doping concentration of the Si substrate in step (1) is 1.0 x 10 15 -1.0 x 10 17 cm -3 -3, the thermal oxidation temperature is set to 500-800 ℃, and the time is 5-10 min; before thermal oxidation, a standard RCA cleaning process is used to remove the natural oxide layer on the surface of the Si substrate.
3. The production method according to claim 1, characterized by, In step (2), the process conditions for growing the Ga2O3 film by PE-ALD are as follows: trimethylgallium (TMGa) is used as a Ga source, the pulse time is 0.1-2 s, the oxygen source is selected as O2 plasma, the radio frequency power is 50-200 W, the time is 0.5-5 s, the deposition temperature is 200-300 DEG C, and the deposition rate is 0.05-0.07 nm / cycle; and the process conditions for depositing the HfO2 film are as follows: tetrakis(dimethylamino)hafnium (TDMAHf) is used as an Hf source, the pulse time is 0.1-2 s, the oxygen source is selected as O2 plasma, the radio frequency power is 50-200 W, the time is 0.5-5 s, the deposition temperature is 200-300 DEG C, and the deposition rate is 0.12-0.20 nm / cycle.
4. The production method according to claim 1, characterized by, In step (2), the thickness of the Ga2O3 film is 0.6-3 nm, and the thickness of the HfO2 film is 2-6 nm.
5. The production method according to claim 1, characterized by, In step (3), the annealing atmosphere is nitrogen or argon, the set annealing temperature is 500-1000 DEG C, the annealing time is 1 ms-15 s, and the annealing mode is laser annealing or rapid thermal annealing (RTP).
6. The production method according to claim 1, characterized by, In step (4), the lateral size of the contact electrode area is 50-100 mu m, the electrode is W or TiN / W, the thickness of the TiN is 5-10 nm, and the thickness of the W is 50-100 nm.
7. The production method according to claim 1, characterized by, In step (5), the time for wet etching by the HF solution is 1-5 min; after the wet etching, the device back portion is cleaned by ultrasonic cleaning with acetone, isopropyl alcohol and deionized water in sequence to remove particulate matter and contaminants, and the ultrasonic cleaning time is 2-5 min; and the back electrode is Ni with a thickness of 50-100 nm.
8. A MOSCAP device based on p-dipole material Ga2O3, characterized in that, The device is prepared by the method according to any one of claims 1-7.
Citation Information
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