GaN power device with multiple rows of islands controlled by multiple bias signals

By introducing a multi-biased signal control multi-island structure into GaN HEMT devices, the problem of device on-resistance degradation is solved, and device performance improvement and system stability is enhanced.

CN119545840AActive Publication Date: 2025-02-28UNIV OF ELECTRONICS SCI & TECH OF CHINA +1
View PDF 6 Cites 0 Cited by

Patent Information

Application Number
CN202411256929.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-09
Publication Date
2025-02-28
Estimated Expiration
2044-09-09

AI Technical Summary

Technical Problem

GaN HEMT devices are prone to on-resistance degradation problems during use, resulting in reduced device performance and reduced reliability, especially in high-voltage and high-power power electronic systems.

Method used

The GaN power device structure of multi-biased signals is used to control multi-islands, and a multi-island structure is introduced between the gate-drain electrodes. It consists of metal/P-GaN and metal/AlGaN Schottky junctions and the charge injection and decimation of P and S islands is controlled through independent bias circuits to achieve the charge self-balancing of the device under multi-biased conditions.

Benefits of technology

Controlling the multi-island structure through multi-bias signal can effectively suppress dynamic on-resistance degradation, improve device performance and reliability, and improve system stability and voltage resistance.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119545840A_ABST
    Figure CN119545840A_ABST
Patent Text Reader

Abstract

The invention belongs to the technical field of power semiconductors, and particularly relates to a GaN power device with multiple rows of islands controlled by multiple bias signals. On the basis of a PGaN gate enhanced GaN HEMT device structure, multiple rows of islands are additionally arranged on the surface of an AlGaN barrier layer, and the multiple rows of islands are controlled by a biasing circuit. Normal conduction and turn-off of the device are the same as those of a PGaN gate enhanced GaN HEMT, and due to the existence of the P island, a depletion region can be effectively expanded, so that the withstand voltage of the device is improved, and compared with a traditional PGaN gate enhanced GaN HEMT device, the withstand voltage of the device is improved. The bias circuit is controlled through dynamic changes of density or concentration of traps and electrons and holes, carriers can be injected into the device through multiple islands controlled by digital bias, charge dynamic compensation in the working process of the device is achieved through controllable carrier injection and trap capture, and therefore the effect of restraining dynamic on-resistance degradation is achieved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The invention belongs to the technical field of power semiconductors, and in particular relates to a GaN power device with multiple islands controlled by multiple bias signals. Background Art

[0002] With the growing demand for high efficiency, energy saving, and intelligent miniaturization in power electronic systems, the development of a new generation of high-efficiency and high-speed power semiconductor technology has become the focus of the industry. As a third-generation semiconductor material that has gradually emerged in the past two decades, gallium nitride has emerged in the power semiconductor market with its excellent physical properties such as wide band gap, high electron mobility, and high critical breakdown electric field. As an important application form of GaN materials, GaN high electron mobility transistors (GaN HEMTs) have gradually penetrated into industrial and telecommunication power supply applications including data communications, base stations, uninterruptible power supplies (UPS), and industrial lidar.

[0003] GaN HEMT has shown great application potential in power electronic systems with its excellent high frequency, high power density and high temperature working ability. However, despite the many significant advantages of GaN HEMT, in practical applications, the degradation of its on-resistance has become a key factor restricting its further performance improvement. Dynamic on-resistance degradation is mainly manifested in the decrease of saturation current and maximum transconductance, and the increase of threshold voltage and on-resistance after the device is subjected to strong electric field shock, which seriously affects the performance and reliability of the device. Suppressing the degradation of on-resistance of GaN HEMT devices is of great significance for improving device performance, extending service life, and improving system stability and reliability. Especially in high-voltage and high-power power electronic systems, the excellent high-voltage resistance and extremely fast switching speed of GaNHEMT can significantly improve system efficiency, but the dynamic on-resistance degradation seriously limits its performance. Suppressing the degradation of on-resistance of GaN HEMT devices is the key to improving device performance and promoting the development of GaN power semiconductor technology. By deeply studying the causes and mechanisms of the current collapse phenomenon and combining it with advanced device design and packaging technology, we can develop GaN HEMT devices with higher performance and reliability, providing strong support for the efficient, intelligent and miniaturized development of power electronic systems. Therefore, the development of GaN HEMT devices that can effectively suppress the degradation of on-resistance is of great significance for promoting the further development of GaN power semiconductor technology. Summary of the invention

[0004] In view of the above problems, the present invention proposes a new structure of a GaN power device with multiple islands controlled by multiple bias signals, introduces a multiple island structure between the gate and the drain, and the P island is composed of a metal / P-GaN Schottky junction, and the S island is composed of a metal / AlGaN Schottky junction. At the same time, the P island and the S island are controlled by independent bias circuits, providing injection and extraction paths for unbalanced charges and introducing self-balancing charges. With the support of the bias circuit, the device charge self-balancing is achieved under multiple bias conditions, thereby suppressing the degradation of dynamic on-resistance.

[0005] Here we define multi-column islands, as shown in the following table. Figure 2 As shown, a P island or S island with the same X, Y coordinates but different Z coordinates constitutes an island chain, and multiple island chains with different X coordinates constitute multiple island chains. The islands constituting each island chain can be only P islands, only N islands, or N islands and P islands together constitute an island chain. When applying a bias circuit to multiple island chains, it is not based on one island chain as a unit, but on each island as a unit. The P island is controlled by the bias circuit 1, and the S island is controlled by the bias circuit 2.

[0006] The technical solution adopted by the present invention is:

[0007] A GaN power device with multiple islands controlled by multiple bias signals, comprising a substrate layer 1, a nucleation layer 2, a GaN buffer layer 3 and a non-intentionally doped GaN channel layer 4 stacked in sequence from bottom to top; a drain 7 and a source 8 are respectively provided at both ends of the upper surface of the GaN channel layer 4, an AlGaN barrier layer 5 is provided on the upper surface of the GaN channel layer 4 between the drain 7 and the source 8, and the thickness of the AlGaN barrier layer 5 is less than that of the drain 7 and the source 8; a P-type GaN material layer 6 is provided on the upper surface of the AlGaN barrier layer 5 near the source 8, and a gate metal 9 is provided on the P-type GaN material layer 6; the upper surface of the AlGaN barrier layer 5 between the P-type GaN material layer 6 and the source 8 has The passivation layer 10, the upper surface of the AlGaN barrier layer 5 between the P-type GaN material layer 6 and the drain 7 has multiple columns of islands arranged along the lateral direction of the device, each column of islands is composed of multiple islands arranged at intervals along the longitudinal direction of the device, and the islands include S islands composed of the first metal 12 and P islands composed of the P-type GaN layer 11 and the second metal 13. All P islands are controlled by one bias circuit, and S islands are controlled by another bias circuit; the passivation layer 10 is used to isolate the islands from each other, the islands from each other, the islands from the P-type GaN material layer 6, and the islands from the drain 7.

[0008] Furthermore, the islands are divided into two rows, the islands on the side close to the gate metal 9 are all P islands, and the islands on the side close to the drain 7 are all S islands.

[0009] Furthermore, the archipelago is divided into two rows, and each row of islands is composed of P islands and S islands distributed alternately.

[0010] Furthermore, the P islands and the S islands appear to have regular or symmetrical geometric shapes in a top view.

[0011] Furthermore, the material used for the substrate layer 1 is silicon carbide, sapphire or Al2O3; the material used for the passivation layer 10 is silicon nitride or silicon dioxide.

[0012] The beneficial effect of the present invention is that, compared with the traditional GaN HEMT device which may cause the on-resistance to degrade during use, the device can release electrons or holes into the device through the bias circuits on the multiple columns of islands, balance the electron traps or hole traps on the surface and inside the device through the action of charges, reduce the influence of the traps on the electrical properties of the device, and inhibit the on-resistance degradation of the device during use. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a schematic structural diagram of the GaN power device of the present invention.

[0014] Figure 2 It is a schematic diagram of the 3D structure of the GaN power device of the present invention.

[0015] Figure 3 This is a schematic diagram of the principle of suppressing on-resistance degradation of the GaN power device of the present invention.

[0016] Figure 4 It is a schematic diagram of the first island shape in the GaN power device of the present invention.

[0017] Figure 5 Schematic diagram of the second island shape in the GaN power device of the present invention.

[0018] Figure 6 Schematic diagram of the third island shape in the GaN power device of the present invention.

[0019] Figure 7 Schematic diagram of the fourth island shape in the GaN power device of the present invention.

[0020] Figure 8 Schematic diagram of the fifth island shape in the GaN power device of the present invention.

[0021] Fig. 9 It is a schematic diagram comparing the drain current and dynamic on-resistance curves of the GaN power device of the present invention and the traditional P-type GaN gate enhancement GaN HEMT. DETAILED DESCRIPTION

[0022] The technical solution of the present invention is described in detail below in conjunction with the attached drawings.

[0023] like Figure 2As shown, the structure of the present invention includes, from bottom to top, a substrate layer 1, a nucleation layer 2, a GaN Buffer layer 3, an unintentionally doped GaN channel layer 4, and an AlGaN barrier layer 5, wherein the unintentionally doped GaN channel layer 4 and the AlGaN barrier layer 5 form a heterojunction structure, and a gate P-type GaN material layer 6 is provided above the AlGaN barrier layer, and the gate P-type GaN material layer is connected to the gate metal 9 to form a Schottky contact to realize an enhanced device; metal 7 and metal 8 are provided at both ends of the AlGaN barrier layer, which are the drain and the source, respectively, and both form ohmic contact with the semiconductor material. Multiple islands are introduced between the drain and the gate, including a P island composed of a P-type GaN layer and a metal 13, and an S island composed of a metal 12, an ohmic contact is formed between the metal 13 and the P-type GaN layer 11, and a Schottky contact is formed between the metal 12 and the AlGaN barrier layer below. The AlGaN barrier layer 5 is covered with a passivation layer 10 , and the islands constituting the plurality of island columns are isolated from each other by the passivation layer 10 .

[0024] The working principle of the GaN power device with multiple islands controlled by multiple bias signals of the present invention is described below.

[0025] The normal working principle of the GaN power device with multiple islands controlled by multiple bias signals of the present invention is as follows:

[0026] The GaN power device with multiple columns of islands controlled by multiple bias signals of the present invention has the same working principle as the traditional pGaN enhanced GaN HEMT device in the forward conduction state, the gate applies a forward bias greater than the threshold voltage, the gate is in the on state, the two-dimensional electron gas under the gate is restored, a bias is applied between the drain and source, and a current is formed between the drain and source. Due to the existence of multiple columns of islands, the 2DEG under the island will be depleted, so the drain-source current passes between the islands, which is also the reason why the columns of islands are not continuous. Under the withstand voltage condition, the gate does not apply a bias, the 2DEG under the gate is depleted, the 2DEG in the channel layer is discontinuous, the device is in the withstand voltage state, and then the drain-source voltage increases, the device is normally penetrated, and a certain bias is applied on the P island, which is conducive to the depletion of the 2DEG under the P island, which helps to expand the depletion area, thereby improving the withstand voltage, so that the GaN power device with multiple columns of islands controlled by multiple bias signals has a certain withstand voltage improvement compared with the traditional PGaN gate GaN HEMT device.

[0027] like Figure 3 As shown, the working principle of the GaN power device with multiple islands controlled by multiple bias signals of the present invention and the principle of suppressing dynamic on-resistance degradation are as follows:

[0028] The bias circuit is controlled by dynamically changing the density or concentration of traps, electrons and holes. The bias circuit output signal is applied to the P island and the S island. Under the action of the signal, the P island and the S island inject carriers into the device. The dynamic compensation of the charge in the device is achieved through controllable carrier injection and trap capture, thereby achieving the effect of suppressing the degradation of dynamic on-resistance. The simulation results are shown in Figure 2. Fig. 9 As shown, Fig. 9 (a) is a comparison of the drain current of the device of the present invention and the conventional PGaN-gate GaN HEMT device. Fig. 9 (b) is a comparison of the dynamic on-resistance of the device of the invention and the traditional PGaN-gate GaN HEMT device. The structural device can effectively suppress the on-resistance degradation.

[0029] The multi-bias signal controlled multi-island GaN power device of the invention may have the following variations:

[0030] 1. Two non-staggered columns and square islands with multiple bias signals to control GaN power devices with multiple columns of islands, such as Figure 4 shown.

[0031] 2. Two staggered columns and square islands with multiple bias signals to control GaN power devices with multiple columns of islands, such as Figure 5 shown.

[0032] 3. Two staggered columns and multiple bias signals of triangular islands control GaN power devices with multiple columns of islands, such as Figure 6 shown.

[0033] 4. Two staggered columns and circular islands with multiple bias signals to control GaN power devices with multiple columns of islands, such as Figure 7 shown.

[0034] 5. Staggered three-column, square islands with multiple bias signals to control GaN power devices with multiple islands, such as Figure 8 shown.

[0035] It should be noted that only some variations are introduced above. There are many variations on the number, shape and arrangement of islands. The number, shape, arrangement and position of islands are not limited to the above-mentioned ones. The above-described structure and drawings cannot be understood as limitations on the present invention.

Claims

1. A GaN power device with multiple islands controlled by multiple bias signals, characterized in that: The invention comprises a substrate layer (1), a nucleation layer (2), a GaN buffer layer (3) and an unintentionally doped GaN channel layer (4) which are stacked in sequence from bottom to top; a drain electrode (7) and a source electrode (8) are respectively provided at two ends of the upper surface of the GaN channel layer (4); an AlGaN barrier layer (5) is provided on the upper surface of the GaN channel layer (4) between the drain electrode (7) and the source electrode (8); the thickness of the AlGaN barrier layer (5) is less than the thickness of the drain electrode (7) and the source electrode (8); a P-type GaN material layer (6) is provided on the side of the upper surface of the AlGaN barrier layer (5) close to the source electrode (8); a gate metal (9) is provided on the P-type GaN material layer (6); the AlGaN barrier layer (5) between the P-type GaN material layer (6) and the source electrode (8) is provided. The upper surface of the barrier layer (5) is provided with a passivation layer (10); the upper surface of the AlGaN barrier layer (5) between the P-type GaN material layer (6) and the drain (7) is provided with a plurality of islands arranged in the lateral direction of the device; each island column is composed of a plurality of islands arranged at intervals in the longitudinal direction of the device; the islands include S islands composed of a first metal (12) and P islands composed of a P-type GaN layer (11) and a second metal (13); all P islands are controlled by a bias circuit, and S islands are controlled by another bias circuit; the passivation layer (10) is used to isolate the islands from each other, the islands from each other, the islands from the P-type GaN material layer (6), and the islands from the drain (7).

2. The GaN power device with multiple islands controlled by multiple bias signals according to claim 1, characterized in that: There are two islands in the chain. The islands on the side close to the gate metal (9) are all P islands, and the islands on the side close to the drain (7) are all S islands.

3. The GaN power device with multiple islands controlled by multiple bias signals according to claim 1, characterized in that: The archipelago is divided into two rows, and each row of islands is composed of P islands and S islands distributed at intervals.

4. The GaN power device with multiple islands controlled by multiple bias signals according to claim 1, characterized in that: P-islands and S-islands appear as regular or symmetrical geometric shapes in a top view.

5. The GaN power device with multiple islands controlled by multiple bias signals according to claim 1, characterized in that: The material used for the substrate layer (1) is silicon carbide, sapphire or Al2O3; the material used for the passivation layer (10) is silicon nitride or silicon dioxide.

Citation Information

Patent Citations

  • Circuit structure having islands between source and drain

    CN103137681A

  • Transistors having on-chip integrated photon source or photonic-ohmic drain to facilitate de-trapping electrons trapped in deep traps of transistors

    CN107004705A

  • Heterojunction power device and manufacturing method thereof

    CN112768505A

  • Multi-channel GaN HEMT (High Electron Mobility Transistor) device with multi-column columnar gate structure

    CN117393598A

  • Transistors having on-chip integrared photon source or photonic-ohmic drain to faciliate de-trapping electrons trapped in deep traps of transistors

    WO2016074642A1