Display substrate and display device

Abstract

The present disclosure provides a display substrate and a display device, which belong to the field of display technology and are intended to improve the light-emitting performance of the display substrate. The display substrate comprises: a substrate, on which a plurality of sub-pixels are arranged, and the sub-pixels comprise: a first electrode, a first light-emitting layer, a charge generation layer, a second light-emitting layer, an electron transport layer, and a second electrode; a first distance exists between a surface of the second light-emitting layer close to the charge generation layer and a surface of the electron transport layer close to the second electrode, a second distance exists between a surface of the first electrode close to the first light-emitting layer and a surface of the first light-emitting layer facing away from the charge generation layer, and a third distance exists between a surface of the first light-emitting layer facing away from the charge generation layer and a surface of the second light-emitting layer close to the charge generation layer; an absolute value of a difference between the third distance and the first distance and a ratio between an absolute value of a difference between the third distance and the second distance are within a first preset range.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate and a display device. Background Art

[0002] Currently, the current efficiency of an OLED (Organic Light-Emitting Diode) device is improved by stacking multiple light-emitting units. However, the performance of the stacked OLED device still needs to be improved. Summary of the Invention

[0003] Based on the background technology, the present disclosure provides a display substrate and a display device.

[0004] In a first aspect of the present disclosure, a display substrate is provided, comprising:

[0005] substrate;

[0006] A plurality of sub-pixels are provided on the substrate, and the sub-pixels include:

[0007] a first electrode, a first light-emitting layer located on one side of the first electrode, a charge generation layer located on the first light-emitting layer facing away from the first electrode, a second light-emitting layer located on a side of the charge generation layer facing away from the first light-emitting layer, an electron transport layer located on a side of the second light-emitting layer facing away from the charge generation layer, and a second electrode located on a side of the electron transport layer facing away from the first electrode;

[0008] wherein a first distance exists between a surface of the second light-emitting layer close to the charge generation layer and a surface of the electron transport layer close to the second electrode, a second distance exists between a surface of the first electrode close to the first light-emitting layer and a surface of the first light-emitting layer facing away from the charge generation layer, and a third distance exists between a surface of the first light-emitting layer facing away from the charge generation layer and a surface of the second light-emitting layer close to the charge generation layer;

[0009] The ratio of the absolute value of the difference between the third distance and the first distance to the absolute value of the difference between the third distance and the second distance is within a first preset range.

[0010] Optionally, the plurality of sub-pixels include a first sub-pixel emitting red light, a second sub-pixel emitting green light, and a third sub-pixel emitting blue light, and the first sub-pixel, the second sub-pixel, and the third sub-pixel have different first preset ranges.

[0011] Optionally, the first preset range of the first sub-pixel is 2.5-5, the first preset range of the second sub-pixel is 0.8-3, and the first preset range of the third sub-pixel is 0.5-1.5.

[0012] Optionally, a difference between the second distance of the first sub-pixel and the second distance of the second sub-pixel takes a first absolute value, and a difference between the second distance of the second sub-pixel and the second distance of the third sub-pixel takes a second absolute value;

[0013] The ratio of the first absolute value to the second absolute value is between 1 and 2.

[0014] Optionally, a difference between the first distance of the first sub-pixel and the first distance of the second sub-pixel takes a third absolute value, and a difference between the first distance of the second sub-pixel and the first distance of the third sub-pixel takes a fourth absolute value;

[0015] A ratio of the third absolute value to the fourth absolute value is between 0.8 and 1.5.

[0016] Optionally, the ratio of the thickness of the charge generating layer to the distance between the first electrode and the second electrode in the sub-pixel is within a second preset range; wherein the second preset range of the first sub-pixel is 0.06-0.15, the second preset range of the second sub-pixel is 0.08-0.13, and the second preset range of the third sub-pixel is 0.12-0.15.

[0017] Optionally, the distance between the first electrode and the second electrode in the first subpixel is 2500-3000 angstroms, the distance between the first electrode and the second electrode in the second subpixel is 2050-2500 angstroms, and the distance between the first electrode and the second electrode in the third subpixel is 1500-2000 angstroms.

[0018] Optionally, the charge generation layer includes an n-type charge generation layer and a p-type charge generation layer, the n-type charge generation layer is located on the side of the first light-emitting layer away from the first electrode, and the p-type charge generation layer is located between the n-type charge generation layer and the second light-emitting layer.

[0019] Optionally, the p-type charge generation layer includes a first host material and a first dopant, wherein the first host material includes an organic material having a large steric hindrance group, and the large steric hindrance group includes at least a benzene ring;

[0020] The n-type charge generation layer includes a second host material and a second dopant, wherein the second host material includes an organic material having at least two N heterocyclic groups.

[0021] Optionally, the structural formula of the first host material is shown in general formula (1):

[0022]

[0023] Where X is CR a R b or N, a, b are integers from 0 to 4 respectively;

[0024] L1 and L2 are independent of each other and are direct bonds, substituted or unsubstituted C6~C 60 aryl groups;

[0025] Ar1 and Ar2 are each independently hydrogen, deuterium, a halogen group, a nitrile group, a nitro group, a hydroxyl group, a carbonyl group, an ester group, an imide group, an amino group, a substituted or unsubstituted silyl group, a substituted or unsubstituted boron group, a substituted or unsubstituted alkyl group, a substituted or unsubstituted cycloalkyl group, a substituted or unsubstituted alkoxy group, a substituted or unsubstituted aryloxy group, a substituted or unsubstituted alkylthio group, a substituted or unsubstituted arylthio group, a substituted or unsubstituted alkylsulfonyl group, a substituted or unsubstituted arylsulfonyl group, a substituted or unsubstituted a substituted or unsubstituted alkenyl group, a substituted or unsubstituted aralkyl group, a substituted or unsubstituted aralkenyl group, a substituted or unsubstituted alkylaryl group, a substituted or unsubstituted alkylamino group, a substituted or unsubstituted aralkylamino group, a substituted or unsubstituted heteroarylamino group, a substituted or unsubstituted arylamino group, a substituted or unsubstituted arylheteroarylamino group, a substituted or unsubstituted arylphosphino group, a substituted or unsubstituted phosphine oxide group, a substituted or unsubstituted aryl group, or a substituted or unsubstituted heterocyclic group;

[0026] R1, R2, R3, and R4 are each independently selected from deuterium, a halogen group, a cyano group, a heteroaryl group having 3 to 20 carbon atoms, an aryl group having 6 to 20 carbon atoms, a trialkylsilyl group having 3 to 12 carbon atoms, a triarylsilyl group having 18 to 30 carbon atoms, an alkyl group having 1 to 5 carbon atoms, a haloalkyl group having 1 to 10 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, a heterocycloalkyl group having 2 to 10 carbon atoms, a cycloalkyl group having 5 to 10 carbon atoms, Cycloalkenyl, heterocycloalkenyl having 4 to 10 carbon atoms, alkoxy having 1 to 10 carbon atoms, alkylthio having 1 to 10 carbon atoms, aryloxy having 6 to 18 carbon atoms, arylthio having 6 to 18 carbon atoms, phosphino having 6 to 24 carbon atoms, alkylsulfonyl having 6 to 18 carbon atoms, trialkylphosphino having 3 to 18 carbon atoms, trialkylboryl having 3 to 18 carbon atoms, or optionally bonded to an adjacent group to form a ring.

[0027] Optionally, the structural formula of the first dopant is shown in general formula (2):

[0028]

[0029] wherein X1 and X2 are each independently one of C, N, and Si;

[0030] Y1 and Y2 are each independently one of O, N, and S;

[0031] Each group of Ar1-Ar4 is independently substituted or unsubstituted halogen, substituted or unsubstituted cyano, substituted or unsubstituted phenyl, substituted or unsubstituted biphenyl, substituted or unsubstituted terphenyl, substituted or unsubstituted fluorene; substituted or unsubstituted adamantane, substituted or unsubstituted heteroaryl;

[0032] R1 and R2 are each independently deuterium, a halogen group, a cyano group, a substituted or unsubstituted heteroaryl group having 3 to 20 carbon atoms, a substituted or unsubstituted aryl group having 6 to 20 carbon atoms, a substituted or unsubstituted alkyl group having 1 to 5 carbon atoms, a substituted or unsubstituted haloalkyl group having 1 to 10 carbon atoms, a substituted or unsubstituted cycloalkyl group having 3 to 10 carbon atoms, a substituted or unsubstituted heterocycloalkyl group having 2 to 10 carbon atoms, a substituted or unsubstituted alkoxy group having 1 to 10 carbon atoms, a substituted or unsubstituted alkylthio group having 1 to 10 carbon atoms, a substituted or unsubstituted aryloxy group having 6 to 18 carbon atoms, an arylthio group having 6 to 18 carbon atoms, a phosphinoyl group having 6 to 24 carbon atoms, or a substituted or unsubstituted alkylsulfonyl group having 6 to 18 carbon atoms;

[0033] a and b are each independently an integer of 1 to 5.

[0034] Optionally, the doping ratio of the first dopant in the first host material is 3-15%.

[0035] Optionally, in the general formula (1), the group where X is located includes any one of the following:

[0036] as well as

[0037] Optionally, the structural formula of the second host material is shown in general formula (3):

[0038]

[0039] wherein X1-X4 are N or C(R1), and X1-X4 contain at least 2 N;

[0040] R1 is selected from hydrogen, deuterium, substituted or unsubstituted C1-C 60 Alkyl, substituted or unsubstituted C2-C 60 Alkenyl, substituted or unsubstituted C2-C 60Alkynyl, substituted or unsubstituted C1-C 60 Alkoxy, substituted or unsubstituted C3-C 10 Cycloalkyl, substituted or unsubstituted C1-C 10 Heterocycloalkyl, substituted or unsubstituted C3-C 10 Cycloalkenyl, substituted or unsubstituted C2-C 10 Heterocycloalkenyl, substituted or unsubstituted C6-C 60 Aryl, substituted or unsubstituted C6-C 60 Aryloxy, substituted or unsubstituted C6-C 60 Arylthio, substituted or unsubstituted C6-C 60 Heteroaryl group, substituted or unsubstituted monovalent non-aromatic condensed polycyclic group, substituted or unsubstituted monovalent non-aromatic condensed heteropolycyclic group;

[0041] Ar1, Ar2, Ar3, Ar4 are the same or different, and Ar1-Ar4 are each independently one selected from the following: hydrogen; deuterium; tritium; halogen; cyano; nitro; C6-C 60 Aryl; C2-C containing at least one heteroatom from O, N, S, Si and P 60 Heterocyclic group; C3-C 60 Aliphatic ring and C6-C 60 Aromatic ring fused group; C1-C 50 Alkyl; C2-C 20 Alkenyl; C2-C 20 Alkynyl; C1-C 30 Alkoxy; C6-C 30 Aryloxy; C3-C 60 Alkylsilyl; C 18 -C 60 Arylsilyl, and C8-C 60 Alkylarylsilyl;

[0042] The second dopant includes any one of an alkali metal, an alkaline earth metal, a transition metal, or a compound of an alkali metal, an alkaline earth metal, or a transition metal.

[0043] Optionally, the doping ratio of the second dopant in the second host material is 0.5-1.5%.

[0044] Optionally, the display substrate further includes:

[0045] a hole blocking layer located between the first light-emitting layer and the n-type charge generation layer, wherein the absolute value of the difference between the lowest unoccupied molecular orbital energy level of the hole blocking layer and the lowest unoccupied molecular orbital energy level of the n-type charge generation layer is less than or equal to 0.5 eV;

[0046] The hole transport layer is located between the second light-emitting layer and the p-type charge generation layer, and the absolute value of the difference between the highest occupied molecular orbital energy level of the hole transport layer and the highest occupied molecular orbital energy level of the p-type charge generation layer is less than or equal to 0.3 eV.

[0047] A second aspect of the present disclosure provides a display device comprising the display substrate described in the first aspect.

[0048] The present disclosure provides a display substrate comprising: a substrate on which a plurality of sub-pixels are arranged, wherein the sub-pixels include:

[0049] a first electrode, a first light-emitting layer located on one side of the first electrode, a charge generation layer located on the first light-emitting layer facing away from the first electrode, a second light-emitting layer located on a side of the charge generation layer facing away from the first light-emitting layer, an electron transport layer located on a side of the second light-emitting layer facing away from the charge generation layer, and a second electrode located on a side of the electron transport layer facing away from the first electrode;

[0050] wherein a first distance exists between a surface of the second light-emitting layer close to the charge generation layer and a surface of the electron transport layer close to the second electrode, a second distance exists between a surface of the first electrode close to the first light-emitting layer and a surface of the first light-emitting layer facing away from the charge generation layer, and a third distance exists between a surface of the first light-emitting layer facing away from the charge generation layer and a surface of the second light-emitting layer close to the charge generation layer;

[0051] wherein a ratio of an absolute value of a difference between the third distance and the first distance to an absolute value of a difference between the third distance and the second distance is within a first preset range;

[0052] Therefore, the present disclosure limits the multiple layers between the first electrode and the second electrode in the sub-pixel to within a first preset thickness relationship range. In this case, the first light-emitting layer and the second light-emitting layer can be located in the enhanced region of the optical cavity formed between the first electrode and the second electrode, thereby improving the light extraction efficiency of the display substrate.

[0053] The above description is only an overview of the technical solution of the present disclosure. In order to more clearly understand the technical means of the present disclosure, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present disclosure more obvious and easy to understand, the specific implementation methods of the present disclosure are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or related technologies, the following is a brief introduction to the drawings required for the description of the embodiments or related technologies. Obviously, the drawings described below are some embodiments of the present disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without inventive efforts. It should be noted that the scales in the drawings are for illustration only and do not represent the actual scale.

[0055] Figure 1 Schematic diagrams of the structures of OLED devices are shown, wherein a shows a schematic diagram of the structure of a single OLED light-emitting unit, and b shows a schematic diagram of the structure of a stacked two OLED light-emitting units;

[0056] Figure 2 A schematic structural diagram of a display substrate provided by an embodiment of the present disclosure is shown;

[0057] Figure 3 A schematic structural diagram of a display substrate provided in another embodiment of the present disclosure is shown;

[0058] Figure 4 A schematic diagram of the transient luminescence spectrum when a single pixel in a display panel is lit in the related art is shown;

[0059] Figure 5 A schematic diagram of the light-emitting principle of the light-emitting device in an embodiment of the present disclosure is shown;

[0060] Figure 6 A schematic structural diagram of a display substrate in an example provided by the present disclosure is shown;

[0061] Figure 7 Shows the use of Figure 6 After the light-emitting device shown forms a display panel, a transient light emission spectrum diagram when a single pixel in the display panel is lit;

[0062] Figure 8 Shown Figure 6 Reliability curve of the light emitting device on the display substrate shown;

[0063] Figure 9 A schematic structural diagram of a display device provided by an embodiment of the present disclosure is shown;

[0064] Figure 10 Shown Figure 9 A schematic structural diagram of a display substrate of a display device shown;

[0065] Figure 11 Shown Figure 10 A schematic structural diagram of a gate driving circuit in a display substrate shown;

[0066] Figure 12Shown Figure 10 A schematic structural diagram of a pixel driving circuit in a display substrate shown;

[0067] Description of reference numerals:

[0068] 10a, first sub-pixel; 10b, second sub-pixel; 10c, third sub-pixel; 11, first electrode; 121, hole injection layer; 122, first hole transport layer; 123, first electron blocking layer; 124, first light-emitting layer; 124R, first red sub-light-emitting layer; 124G, first green sub-light-emitting layer; 124B, first blue sub-light-emitting layer; 125, first hole blocking layer; 126, second electron transport layer; 131, n-type charge generation layer; 132, p-type charge generation layer; 141, second hole transport layer; 142, second electron blocking layer; 143, second light-emitting layer; 143R, second red sub-light-emitting layer; 143G, second green sub-light-emitting layer; 143B, second blue sub-light-emitting layer; 144, second hole blocking layer; 145, first electron transport layer; 146, electron injection layer; 15, second electrode;

[0069] 1000. Display device; 100. Display panel; 10. Light-emitting device stack; 20. Pixel driving circuit stack; 201. Substrate; 202. First gate insulating layer; 203. Second gate insulating layer; 204. Interlayer insulating layer; 205. Source and drain electrode layer; 21. Active layer; 22. First metal layer; 23. Second metal layer; 241. Source electrode; 242. Drain electrode; 30. Pixel driving circuit; 40. Gate driving circuit. DETAILED DESCRIPTION

[0070] To make the above-mentioned purposes, features, and advantages of the present disclosure more clearly understood, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of them. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments of the present disclosure without creative work are within the scope of protection of the present disclosure.

[0071] In the related art, refer to Figure 1 , Figure 1 Two structural diagrams of OLED devices are shown. A traditional OLED light-emitting unit generally includes a light-emitting layer (EML), a hole transport layer (HTL) and an electron transport layer (ETL). Figure 1 In order to make the OLED device have a higher current efficiency, a stacked OLED is usually used, wherein, Figure 1As shown in b, a stacked OLED device is generally formed by stacking two or more light-emitting units, which are connected by a charge generation layer (CGL) in the middle. Compared with traditional OLEDs, stacked OLED devices have higher efficiency and longer life. Currently, improving the light-emitting performance of OLEDs is still a research focus.

[0072] In view of this, the present disclosure provides a display substrate and a display device, which limit the thickness relationship between different layers in two light-emitting units so that the first light-emitting layer and the second light-emitting layer can be located in a microcavity enhancement region in a microcavity structure, thereby improving the light extraction efficiency of the display substrate.

[0073] Reference Figure 2 , Figure 2 FIG. 1 shows a schematic structural diagram of a display substrate provided by an embodiment of the present disclosure. Figure 2 As shown, the substrate of the display substrate can be a rigid material or a flexible transparent material, that is, the display substrate can be flexible or rigid. The display substrate specifically includes:

[0074] a substrate (not shown);

[0075] A plurality of sub-pixels are provided on the substrate, and the sub-pixels include:

[0076] a first electrode 11, a first light-emitting layer 124 located on one side of the first electrode 11, a charge generation layer 13 located on a side of the first light-emitting layer 124 facing away from the first electrode 11, a second light-emitting layer 143 located on a side of the charge generation layer 13 facing away from the first light-emitting layer 124, an electron transport layer 145 located on a side of the second light-emitting layer 143 facing away from the charge generation layer 13, and a second electrode 15 located on a side of the electron transport layer 145 facing away from the first electrode 11;

[0077] A first distance exists between a surface of the second light-emitting layer 143 close to the charge generation layer 13 and the electron transport layer 145 close to the second electrode 15; a second distance exists between a surface of the first electrode 11 close to the first light-emitting layer 124 and a surface of the first light-emitting layer 124 facing away from the charge generation layer 13; and a third distance exists between a surface of the first light-emitting layer 124 facing away from the charge generation layer 13 and a surface of the second light-emitting layer 143 close to the charge generation layer 13.

[0078] The ratio of the absolute value of the difference between the third distance and the first distance to the absolute value of the difference between the third distance and the second distance is within a first preset range.

[0079] In this embodiment, the plurality of sub-pixels may include a light-emitting device composed of two stacked light-emitting units emitting light of the same color, wherein one of the light-emitting units includes a first light-emitting layer 124, and the other light-emitting unit includes a second light-emitting layer 143. In other words, the light emitted by the first light-emitting layer 124 and the second light-emitting layer 143 has the same color. The materials of the first light-emitting layer 124 and the second light-emitting layer 143 may be the same or different. When the materials of the first light-emitting layer 124 and the second light-emitting layer 143 are the same, the wavelengths of the light emitted by the first light-emitting layer 124 and the second light-emitting layer 143 are exactly the same, resulting in a higher color purity of the emitted light. When the materials of the first light-emitting layer 124 and the second light-emitting layer 143 are different, the wavelengths of the light emitted by the first light-emitting layer 124 and the second light-emitting layer 143 can differ by less than 20 nm through material selection, thereby ensuring that the light emitted from the display substrate has no significant color difference.

[0080] In which, for each sub-pixel, the corresponding areas of the first light-emitting layer 124 and the second light-emitting layer 143 may include multiple sub-light-emitting layers of different colors, so that different sub-pixels emit light of different colors. For example, when the multiple sub-pixels include red sub-pixels, green sub-pixels and blue sub-pixels, the first light-emitting layer 124 and the second light-emitting layer 143 can be divided into red sub-light-emitting layers, green sub-light-emitting layers and blue sub-light-emitting layers.

[0081] It can be understood that in order to make each light-emitting unit have better light-emitting efficiency, the display substrate also includes a hole injection layer 121, a first hole transport layer 122 and a first electron blocking layer 123 between the first electrode 11 and the first light-emitting layer 124, a first hole blocking layer 125 located between the charge generation layer 13 and the first light-emitting layer 124, a second hole transport layer 141 and a second electron blocking layer 142 located between the charge generation layer 13 and the second light-emitting layer 143, a second hole blocking layer 144 located between the second light-emitting layer 143 and the electron transport layer 145, and an electron injection layer 146 located between the electron transport layer 15 and the second electrode 15.

[0082] It should be noted that the first electrode 11 of this embodiment is a reflective material, and the second electrode 15 is a semi-transmissive and semi-reflective material. In this way, a microcavity structure can be formed between the first electrode 11 and the second electrode 15, so that the light emitted from the first light-emitting layer 124 and the second light-emitting layer 143 can move repeatedly in the microcavity structure, interfere with each other and be enhanced, thereby making the display substrate have a higher light extraction efficiency, and the cavity length L of the microcavity structure is L = iλ / 2, λ is the wavelength, and i is a positive integer. At this cavity length, the emitted light is light with a specific wavelength, which makes the light emitted from the display substrate have a higher color purity.

[0083] When the first electrode 11 and the second electrode 15 form a microcavity structure, the microcavity structure can enhance light of a specific wavelength and improve the light extraction efficiency. When the light-emitting layer is located in a specific area of ​​the microcavity structure, the light extraction efficiency is further enhanced. Therefore, the position of the light-emitting layer can be adjusted by adjusting the thickness of multiple film layers in the display substrate so that the light-emitting layer can be located in the enhanced area, so that the display substrate has better light extraction efficiency. It can be understood that the cavity length of the microcavity structure is different, and the wavelength of light that can be enhanced is also different. The cavity length of the microcavity structure and the position of the light-emitting layer in the microcavity structure can be determined according to the wavelength of the light emitted by the light-emitting layer. Among them, different colors of light correspond to different wavelengths. The thickness of the film layer can be adjusted according to the color of the light emitted by the first light-emitting layer 124 and the second light-emitting layer 143, so that the display substrate has better light extraction efficiency. Among them, the first light-emitting layer 124 and the second light-emitting layer 143 can include multiple sub-light-emitting layers. The thickness of the film layer in the area where the sub-light-emitting layer is located can be adjusted according to the light emitted by the sub-light-emitting layer so that different sub-light-emitting layers are located in the enhanced area of ​​their microcavity structure.

[0084] Specifically, Figure 1 For example, the first distance from the side surface of the second light-emitting layer 143 close to the charge generation layer 13 to the side surface of the electron transport layer 15 close to the second electrode 16 is L1, the second distance from the side surface of the first electrode 11 close to the first light-emitting layer 12 to the side surface of the first light-emitting layer 12 away from the charge generation layer 13 is L2, and the third distance from the side surface of the first light-emitting layer 12 away from the charge generation layer 13 to the side surface of the second light-emitting layer 143 close to the charge generation layer 13 is L3. Then the first distance L1, the second distance L2 and the third distance L3 satisfy the absolute value of the difference between L3 and L1 and the ratio of the absolute value of the difference between L3 and L1, which are located in a first preset range. When the display substrate meets this condition, the first light-emitting layer 124 and the second light-emitting layer 143 can both be located in the enhanced area of ​​the microcavity structure, so that the display substrate has better light extraction efficiency.

[0085] It should be noted that the colors of light emitted by different sub-pixels in the display substrate can be the same or different. Since the wavelengths of light of different colors are different, the cavity lengths of the microcavity structure formed between the first electrode and the second electrode in the sub-pixels emitting light of different colors are different, and the positions of the enhancement regions of the microcavity structures are different. Therefore, the first preset range of the sub-pixel pairs emitting light of different colors needs to be determined based on the colors of the light emitted by the sub-pixels.

[0086] In this example, after determining the thickness of each film layer between the first electrode 11 and the second electrode 15 in each sub-pixel based on the thickness relationship, the material of each film layer can be selected based on the thickness of each film layer. In this way, the material of each film layer can be a material with excellent performance at a specific thickness, so that the prepared display substrate has excellent performance.

[0087] In one example, the charge generation layer 13 is used to inject electrons into the first light-emitting layer 12 and inject holes into the second light-emitting layer 143. The charge generation layer 13 may include a single film layer or a multi-layer film layer. When the charge generation layer 13 includes a single film layer, the charge generation layer 13 includes p-type semiconductor material and n-type semiconductor material, which is beneficial to reducing the overall thickness of multiple film layers in the display substrate. When the charge generation layer 13 includes multiple film layers, the charge generation layer 13 may include at least two film layers, the film layer close to the first light-emitting layer 12 includes n-type semiconductor material, and the film layer close to the second light-emitting layer 143 includes p-type semiconductor material.

[0088] By adopting the display substrate provided by the embodiment of the present disclosure, by defining the relationship between a first distance between a side surface of the second light-emitting layer 143 close to the charge generation layer 13 and a side surface of the electron transport layer 15 close to the second electrode 16, a second distance between a side surface of the first electrode 11 close to the first light-emitting layer 12 and a side surface of the first light-emitting layer 12 facing away from the charge generation layer 13, and a third distance between a side surface of the first light-emitting layer 12 facing away from the charge generation layer 13 and a side surface of the second light-emitting layer 143 close to the charge generation layer 13, the first light-emitting layer 12 and the second light-emitting layer 143 are both located in the enhanced region of the microcavity structure between the first electrode 11 and the second electrode 16, thereby enabling the display substrate to have better light extraction efficiency.

[0089] In one example, the plurality of sub-pixels may include a first sub-pixel 10a, a second sub-pixel 10b, and a third sub-pixel 10c. Figure 1 The first light-emitting layer 124 may include a first red sub-light-emitting layer 124R, a first green sub-light-emitting layer 124G and a first blue sub-light-emitting layer 124B, and the second light-emitting layer 143 may include a second red sub-light-emitting layer 143R, a second green sub-light-emitting layer 143G and a second blue sub-light-emitting layer 143B. The sub-light-emitting layers of the same color correspond to each other, that is, the orthographic projection of the first red sub-light-emitting layer 124R on the substrate overlaps with the orthographic projection of the second red sub-light-emitting layer 143R on the substrate, the orthographic projection of the first green sub-light-emitting layer 124G on the substrate overlaps with the orthographic projection of the second green sub-light-emitting layer 143G on the substrate, and the orthographic projection of the first blue sub-light-emitting layer 124B on the substrate overlaps with the orthographic projection of the second blue sub-light-emitting layer 143B on the substrate.

[0090] In this embodiment, the first preset ranges of sub-pixels of different colors in the display substrate are different, that is, the first preset range of the first sub-pixel 10a, the first preset range of the second sub-pixel 10b and the first preset range of the third sub-pixel 10c are all different.

[0091] The wavelength of light emitted by the first sub-pixel 10a is between 440-490 nm, the wavelength of light emitted by the second sub-pixel 10b is between 500-540 nm, and the wavelength of light emitted by the third sub-pixel 10c is between 600-650 nm. Therefore, the wavelengths of the first sub-pixel 10a, the second sub-pixel 10b, and the third sub-pixel 10c are different, and the optical cavity lengths of their microcavity structures are different. Therefore, when the light-emitting layers of the first sub-pixel 10a, the second sub-pixel 10b, and the third sub-pixel 10c are located in the enhancement region of the microcavity structure, their corresponding thicknesses are different, and thus the first preset ranges of the sub-pixels emitting light of different colors are different.

[0092] Specifically, the first preset range of the first sub-pixel 10a is 2.5-5, the first preset range of the second sub-pixel 10b is 0.8-3, and the first preset range of the third sub-pixel 10c is 0.5-1.5. When the absolute value of the difference between the third distance and the first distance in different sub-pixels and the ratio of the absolute value of the difference between the third distance and the second distance are both within their corresponding first preset ranges, the first light-emitting layer 12 and the second light-emitting layer 143 can both be located in the enhanced area of ​​the microcavity structure, so that the display substrates have higher light extraction efficiency.

[0093] Specifically, for the first sub-pixel 10a, its first distance L1, second distance L2, and third distance L3 satisfy the condition shown in formula (1):

[0094]

[0095] For the second sub-pixel 10b, its first distance L1, second distance L2, and third distance L3 satisfy the condition shown in formula (2):

[0096]

[0097] For the third sub-pixel 10c, its first distance L1, second distance L2, and third distance L3 satisfy the condition shown in formula (3):

[0098]

[0099] For example, in the first sub-pixel 10a, the ratio of the absolute value of the difference between the third distance and the first distance to the absolute value of the difference between the third distance and the second distance may be 2.5, 3, 3.5, 4, 4.5 or 5, etc.; in the second sub-pixel 10b, the ratio of the absolute value of the difference between the third distance and the first distance to the absolute value of the difference between the third distance and the second distance may be 0.8, 1.2, 1.6, 2, 2.4 or 2.8, etc.; in the third sub-pixel 10c, the ratio of the absolute value of the difference between the third distance and the first distance to the absolute value of the difference between the third distance and the second distance may be 0.5, 0.8, 1, 1.3 or 1.5, etc.

[0100] Among them, Figure 1 As shown, the display substrate includes, in the direction from the first electrode 11 to the second electrode 15, a hole injection layer 121, a first hole transport layer 122, a first electron blocking layer 123, a first light-emitting layer 124, a first hole blocking layer 125, a charge generation layer 13, a second hole transport layer 141, a second electron blocking layer 142, a second light-emitting layer 143, a second hole blocking layer 144, a second electron transport layer 145, and an electron injection layer 15. The first distance can represent the sum of the thicknesses of the three film layers of the second light-emitting layer 143, the second hole blocking layer 134 and the second electron transport layer 145, the second distance can represent the sum of the thicknesses of the four film layers of the hole injection layer 121, the first hole transport layer 122, the first electron blocking layer 123 and the first light-emitting layer 124, and the third distance can represent the sum of the thicknesses of the three film layers of the first hole blocking layer 125, the charge generation layer 13 and the second hole transport layer 141.

[0101] In another example, Figure 2 As shown, Figure 2 FIG. 1 shows a schematic structural diagram of a display substrate provided by another embodiment of the present disclosure. Figure 2 As shown, compared to Figure 1 The display substrate shown further includes a first electron transport layer 126 located between the charge generation layer 13 and the first hole blocking layer 125. In this case, the third distance represents the sum of the thicknesses of the first hole blocking layer 125, the first electron transport layer 126, the charge generation layer 13 and the second hole transport layer 141.

[0102] In one example, the first light-emitting layer 124 and the second light-emitting layer 143 can be formed of a phosphorescent host material and a dopant, a fluorescent host material and a dopant, or an excimer complex and a dopant. Of course, they can also be formed of at least two of the above.

[0103] For example, the first red sub-light-emitting layer 124R and the second red sub-light-emitting layer 143R corresponding to the first sub-pixel 10a, and the first green sub-light-emitting layer 124G and the second green sub-light-emitting layer 143G corresponding to the second sub-pixel 10b may include a host material and a guest material. The host material is an exciplex. Using an exciplex as a host material can effectively regulate the carrier balance in the light-emitting layer, effectively control the exciton recombination area, and increase the utilization rate of excitons. The first blue sub-light-emitting layer 124B and the second blue sub-light-emitting layer 143B corresponding to the third sub-pixel 10c can be a single light-emitting layer or a stacked structure.

[0104] Specifically, the host material of the first red light-emitting sub-layer 124R and the second red light-emitting sub-layer 143R can be selected from the DCM series of materials, such as DCM, DCJTB, or DCJTT, and the guest material can be a metal complex, such as Ir(piq)2(acac), PtOEP, Ir(btp)2(acac), etc. The materials of the first red light-emitting sub-layer 124R and the second red light-emitting sub-layer 143R can be the same or different, and the difference in the wavelength of the light emitted by the two sub-layers is within 20 nm.

[0105] The main materials of the first green sub-light-emitting layer 124G and the second green sub-light-emitting layer 143G may include coumarin dyes, quinacridone copper derivatives, polycyclic aromatic hydrocarbons, diamine anthracene derivatives, and carbazole derivatives, such as DMQA, BA-NPB, Alq3, etc., and the guest materials may be metal complexes, such as Ir(ppy)3, Ir(ppy)2(acac), etc.; wherein, the materials of the first green sub-light-emitting layer 124G and the second green sub-light-emitting layer 143G may be the same or different, and the difference in the wavelength of light emitted by the two is within 20nm.

[0106] The main materials of the first blue sub-light-emitting layer 124B and the second blue sub-light-emitting layer 143B may include anthracene derivatives ADN, MADN, etc.; the guest materials may include pyrene derivatives, fluorene derivatives, perylene derivatives, styrylamine derivatives, metal complexes, etc., such as TBPe, BDAVBi, DPAVBi, FIrpic, etc.; wherein, when the main material contains two materials, the two materials are isomers, homologues or excited radical complexes; wherein, the materials of the first blue sub-light-emitting layer 124B and the second blue sub-light-emitting layer 143B may be the same or different, and the difference in wavelength of the light emitted by the two is within 20nm.

[0107] In one embodiment, the light-emitting layer and the electron blocking layer are formed separately in different sub-pixels in the display substrate, while other layers are shared. The relationship between the second distances in different sub-pixels can be defined so that the first sub-light-emitting layers in different sub-pixels are all located in the enhanced region of their corresponding microcavity structures. Specifically, the first absolute value of the difference between the second distance of the first sub-pixel 10a and the second distance of the second sub-pixel 10b is taken, and the second absolute value of the difference between the second distance of the second sub-pixel 10b and the second distance of the third sub-pixel 10c is taken; and the ratio of the first absolute value to the second absolute value is between 1 and 2.

[0108] Specifically, different sub-pixels in the display substrate satisfy the following conditions shown in formula (4):

[0109]

[0110] Wherein, L2(R) represents the second distance in the first sub-pixel 10a, L2(G) represents the second distance in the second sub-pixel 10b, and L2(B) represents the second distance in the third sub-pixel 10c.

[0111] For example, the ratio of the first absolute value to the second absolute value may be 1, 1.2, 1.4, 1.6, 1.8, or 2, etc.

[0112] The ratio of the first absolute value to the second absolute value can be adjusted to be between 1 and 2 by adjusting the thickness of the first sub-light-emitting layer of different sub-pixels. In the case where the display substrate also includes an electron blocking layer, the thickness of the first sub-light-emitting layer corresponding to each sub-pixel and the electron blocking layer of each sub-pixel can also be adjusted to achieve the adjustment of the ratio of the first absolute value to the second absolute value. By adjusting the ratio of the first absolute value to the second absolute value to be between 1 and 2, the cavity length of the microcavity structure corresponding to different sub-pixels can be adjusted, and the first sub-light-emitting layers corresponding to different sub-pixels can all be located in the enhanced area of ​​their microcavity structures, thereby improving the light extraction efficiency of the display substrate.

[0113] Similarly, the relationship between the first distances of multiple different sub-pixels in the display substrate can also be limited so that the second sub-light-emitting layers corresponding to the multiple different sub-pixels are also located in the enhanced region of the microcavity structure. Specifically, the third absolute value is taken for the difference between the first distance corresponding to the first sub-pixel 10a and the first distance corresponding to the second sub-pixel 10b, and the fourth absolute value is taken for the difference between the first distance corresponding to the second sub-pixel 10b and the first distance of the third sub-pixel 10c; and the ratio of the third absolute value to the fourth absolute value is between 0.8 and 1.5.

[0114] Specifically, the first distance between different sub-pixels in the display substrate satisfies the condition shown in the following formula (5):

[0115]

[0116] Wherein, L1(R) represents the first distance in the first sub-pixel 10a, L1(G) represents the first distance in the second sub-pixel 10b, and L1(B) represents the first distance in the third sub-pixel 10c.

[0117] For example, the ratio of the third absolute value to the fourth absolute value may be 0.8, 1, 1.2, 1.5, and so on.

[0118] In this embodiment, the second distance from the side of the second light-emitting layer 143 close to the charge generation layer 13 to the side of the electron transport layer 15 close to the second electrode 16 includes the thickness of the second light-emitting layer 143, the thickness of the second hole blocking layer and the thickness of the electron transport layer 15. Among them, the second hole blocking layer and the electron transport layer of different sub-pixels in the display substrate can be common. The ratio of the third absolute value to the fourth absolute value can be adjusted to be between 0.8 and 1.5 by adjusting the thickness of the second sub-light-emitting layer corresponding to different sub-pixels. In this way, the three colors of red, green and blue can be balanced, the photoelectric properties of the display substrate can be optimized, and the white light efficiency can be optimized.

[0119] In one embodiment, to achieve carrier balance between the first light-emitting layer 124 and the second light-emitting layer 143, the ratio of the thickness of the charge generation layer 13 to the total thickness of the multiple film layers in the display substrate can be limited to a second preset range, so that the mobility of electrons during the process of electron injection from the charge generation layer 13 into the first light-emitting layer 124 is equivalent to the mobility of holes during the process of hole injection from the charge generation layer 13 into the second light-emitting layer 143. If the distance between the first electrode 11 and the second electrode 15 varies in different sub-pixels in the display substrate, and the charge generation layer 13 is common to different sub-pixels in the display substrate, then different sub-pixels have different second preset ranges. Specifically, the second preset range for the first sub-pixel 10a is 0.06-0.15, the second preset range for the second sub-pixel 10b is 0.08-0.13, and the second preset range for the third sub-pixel 10c is 0.12-0.15.

[0120] For example, the ratio of the thickness of the charge generation layer 13 to the distance between the first electrode 11 and the second electrode 15 in the first sub-pixel 10a can be 0.06, 0.08, 0.1, 0.12 or 0.14, etc.; the ratio of the thickness of the charge generation layer 13 to the distance between the first electrode 11 and the second electrode 15 in the second sub-pixel 10b can be 0.08, 0.1, 0.12 or 0.13, etc.; the ratio of the thickness of the charge generation layer 13 to the distance between the first electrode 11 and the second electrode 15 in the third sub-pixel 10c can be 0.12, 0.13, 0.14 or 0.15, etc.

[0121] For any of the above embodiments, the distance between the first electrode 11 and the second electrode 15 in the first sub-pixel 10a is 2500-3000 angstroms, the distance between the first electrode 11 and the second electrode 15 in the second sub-pixel 10b is 2050-2500 angstroms, and the distance between the first electrode 11 and the second electrode 15 in the third sub-pixel 10c is 1500-2000 angstroms.

[0122] For example, the distance between the first electrode 11 and the second electrode 15 in the first sub-pixel 10a is 2500 angstroms, 2600 angstroms, 2700 angstroms, 2800 angstroms or 2900 angstroms, the distance between the first electrode 11 and the second electrode 15 in the second sub-pixel 10b is 2050 angstroms, 2200 angstroms or 2450 angstroms, etc., and the distance between the first electrode 11 and the second electrode 15 in the third sub-pixel 10c is 1500 angstroms, 1600 angstroms, 1700 angstroms or 2000 angstroms, etc.

[0123] In this embodiment, in the display substrate, the cavity length of the microcavity structure is the product of the refractive indices of the multiple film layers between the first electrode 11 and the second electrode 15 in the sub-pixel. Therefore, limiting the total thickness of the multiple film layers can limit the cavity length of the microcavity structure, so that the optical cavity lengths of different sub-pixels are located in the same period, thereby avoiding phase differences in the emitted light.

[0124] In one example, after determining the thickness of each film layer in the display substrate, the material of each film layer can be selected according to the thickness, wherein the first electrode 11 is an anode, which can be a high-performance function electrode, such as transparent oxide ITO (Indium tin oxide), IZO, etc., or a composite electrode formed by ITO / Ag / ITO, Ag / IZO, CNT / ITO, CNT / IZO, GO / ITO, GO / IZO, etc.; the hole injection layer 121 can include inorganic oxides such as molybdenum oxide, titanium oxide, vanadium oxide, rhenium oxide, ruthenium oxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide, silver oxide, tungsten oxide, manganese oxide, etc., and can also include dopants of a strong electron-withdrawing system, such as F4TCNQ, HATCN, etc., and can also be formed by doping p-type materials on the basis of hole transport materials; the electron blocking layer 123 can be aromatic amines or carbide. Azole materials, such as CBP, PCzPA, etc.; the hole blocking layer and the electron transport layer may include aromatic heterocyclic compounds, such as imidazole derivatives such as benzimidazole derivatives, imidazopyridine derivatives, benzimidazolephenanthridine derivatives; oxazine derivatives such as pyrimidine derivatives and triazine derivatives; quinoline derivatives, isoquinoline derivatives, phenanthroline derivatives, etc., compounds containing a nitrogen-containing six-membered ring structure (also including compounds having a phosphine oxide-based substituent on the heterocyclic ring, specifically OXD-7, TAZ, p-EtTAZ, BPhen, BCP, etc.); the electron injection layer 146 is generally an alkali metal or metal, such as LiF, Yb, Mg, Ca, or a compound of Yb, Mg, and Ca.

[0125] It should be noted that the charge generation layer 13 structure between the two light-emitting layers in a stacked OLED not only serves to connect the individual light-emitting units, but also needs to generate charge and rapidly transfer and inject the generated charge into the light-emitting unit, ensuring efficient electron and hole generation and transfer between the two light-emitting layers, allowing for sufficient recombination within the light-emitting layers. In stacked OLED devices, efficient charge generation, rapid charge transfer, and effective charge injection are essential and significantly impact device performance. Therefore, improvements to the charge generation layer 13 can help enhance the performance of the display substrate.

[0126] It is understandable that when multiple film layers are formed on a substrate, the sub-light emitting layers of different colors and the electron blocking layers corresponding to the different sub-light emitting layers are formed separately, and the remaining film layers with the same function are generally formed together, such as the charge generation layer 13 and the hole transport layer. Since the lateral resistance of the charge generation layer 13 is relatively small, among the sub-pixels that emit light of different colors at the same time, the turn-on voltage of the sub-pixel that emits blue light is greater than the turn-on voltage of the sub-pixel that emits green light, and the turn-on voltage of the sub-pixel that emits red light is greater. This results in that when a single sub-pixel emits light, the adjacent sub-pixels are also lit. For example, referring to Figure 4 , Figure 4 An exemplary crosstalk phenomenon diagram is shown, as shown in FIG. Figure 4 As shown, the horizontal axis represents wavelength and the vertical axis represents light intensity. The wavelength range of blue light is 440nm-475nm, the wavelength range of green light is 492nm-577nm, and the wavelength range of red light is 622nm-760nm. When the green sub-pixel is working, there is a smaller peak in the wavelength range of red light, which makes the red sub-pixel emit light when the green sub-pixel is working, resulting in color crosstalk.

[0127] Therefore, continue to refer to Figure 1 The charge generation layer includes an n-type charge generation layer 131 and a p-type charge generation layer 132. The n-type charge generation layer 131 is located on the side of the first light-emitting layer 10 away from the first electrode 11, and the p-type charge generation layer 132 is located between the n-type charge generation layer 131 and the second light-emitting layer 143.

[0128] In this embodiment, an n-type charge generation layer 131 and a p-type charge generation layer 132 are used to inject electrons into the first light-emitting layer 12 and to inject holes into the second light-emitting layer 143, respectively. By using the n-type charge generation layer 131 and the p-type charge generation layer 132 to realize carrier migration, the formation of a PN junction inside the charge generation layer can be avoided, thereby reducing the lateral transmission of charges and improving the crosstalk problem of the display panel.

[0129] In which, when the first light-emitting layer 12 and the second light-emitting layer 143 include multiple sub-light-emitting layers of different colors, the orthographic projection of the n-type charge generation layer 131 on the display substrate covers the orthographic projections of the multiple sub-light-emitting layers on the display substrate, and the orthographic projection of the p-type charge generation layer 132 on the display substrate covers the orthographic projections of the multiple sub-light-emitting layers on the display substrate, so that the n-type charge generation layer 131 can inject electrons into the first red sub-light-emitting layer 121, the first green sub-light-emitting layer 122 and the first blue sub-light-emitting layer 123, and the p-type charge generation layer 132 can inject holes into the second red sub-light-emitting layer 141, the second green sub-light-emitting layer 142 and the second blue sub-light-emitting layer 143.

[0130] It can be understood that in the stacked light-emitting units, the charge generation layer 13 not only connects the various light-emitting units, but also generates charges, transports charges, and injects charges into adjacent layers. Therefore, by optimizing the material of the charge generation layer 13, rapid generation of carriers, rapid transport of carriers, and effective injection of carriers can be achieved.

[0131] Specifically, the p-type charge generation layer 132 includes a first host material and a first dopant, wherein the first host material includes an organic material having a large steric hindrance group, and the large steric hindrance group includes at least a benzene ring;

[0132] The n-type charge generation layer 131 includes a second host material and a second dopant. The second host material includes an organic material having at least two N heterocyclic groups.

[0133] In this embodiment, the first host material of the p-type charge generation layer 132 is an organic material having large steric hindrance groups. This can reduce the efficiency of lateral charge migration in the p-type charge generation layer 132, thereby improving crosstalk. To ensure that the p-type charge generation layer 132 has a good hole injection effect, a first dopant is also introduced into the p-type charge generation layer 132. This first dopant can include a common p-type semiconductor material, an organic material having a strong electron-withdrawing group, or the like.

[0134] The second host material of the n-type charge generation layer 131 is an organic material having at least two nitrogen-containing heterocyclic groups. This type of organic material has excellent electron transport capabilities, enabling the electron flow generated by the pin structure formed between the p-type charge generation layer 132 and the n-type charge generation layer 131 to be quickly transferred through the n-type charge generation layer 131 to the first light-emitting layer 124. The second dopant is an alkali metal and its compound, a material with good electron transport capabilities.

[0135] Specifically, the structural formula of the first host material is shown in general formula (1):

[0136]

[0137] Wherein, X is CRaRb or N, and a and b are integers of 0 to 4;

[0138] L1 and L2 are independent of each other and are direct bonds, substituted or unsubstituted C6~C 60 aryl groups;

[0139] Ar1 and Ar2 are each independently hydrogen, deuterium, a halogen group, a nitrile group, a nitro group, a hydroxyl group, a carbonyl group, an ester group, an imide group, an amino group, a substituted or unsubstituted silyl group, a substituted or unsubstituted boron group, a substituted or unsubstituted alkyl group, a substituted or unsubstituted cycloalkyl group, a substituted or unsubstituted alkoxy group, a substituted or unsubstituted aryloxy group, a substituted or unsubstituted alkylthio group, a substituted or unsubstituted arylthio group, a substituted or unsubstituted alkylsulfonyl group, a substituted or unsubstituted arylsulfonyl group, a substituted or unsubstituted a substituted or unsubstituted alkenyl group, a substituted or unsubstituted aralkyl group, a substituted or unsubstituted aralkenyl group, a substituted or unsubstituted alkylaryl group, a substituted or unsubstituted alkylamino group, a substituted or unsubstituted aralkylamino group, a substituted or unsubstituted heteroarylamino group, a substituted or unsubstituted arylamino group, a substituted or unsubstituted arylheteroarylamino group, a substituted or unsubstituted arylphosphino group, a substituted or unsubstituted phosphine oxide group, a substituted or unsubstituted aryl group, or a substituted or unsubstituted heterocyclic group;

[0140] R1, R2, R3, and R4 are each independently selected from deuterium, a halogen group, a cyano group, a heteroaryl group having 3 to 20 carbon atoms, an aryl group having 6 to 20 carbon atoms, a trialkylsilyl group having 3 to 12 carbon atoms, a triarylsilyl group having 18 to 30 carbon atoms, an alkyl group having 1 to 5 carbon atoms, a haloalkyl group having 1 to 10 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, a heterocycloalkyl group having 2 to 10 carbon atoms, a carbon atom having 1 to 5 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, a heterocycloalkyl group having 2 to 10 carbon atoms, a carbon atom having 1 to 5 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, a cycloalkyl group having 2 to 10 carbon atoms, a cycloalkyl group having 3 to 20 carbon atoms, a cycloalkyl group having 3 to 20 carbon atoms, a cycloalkyl group having 3 to 12 ... Cycloalkenyl groups having 5 to 10 carbon atoms, heterocycloalkenyl groups having 4 to 10 carbon atoms, alkoxy groups having 1 to 10 carbon atoms, alkylthio groups having 1 to 10 carbon atoms, aryloxy groups having 6 to 18 carbon atoms, arylthio groups having 6 to 18 carbon atoms, phosphino groups having 6 to 24 carbon atoms, alkylsulfonyl groups having 6 to 18 carbon atoms, trialkylphosphino groups having 3 to 18 carbon atoms, and trialkylboryl groups having 3 to 18 carbon atoms. Alternatively, the group may be bonded to an adjacent group to form a ring.

[0141] In this embodiment, the organic compound using this structural formula includes at least four benzene rings, which makes the first main material have a larger spatial configuration. The larger spatial configuration blocks electron migration, increases the lateral resistance of the charge generation layer, and thus improves the crosstalk of the display panel.

[0142] In one example, the group where X in the general formula (1) is located includes any of the following: as well as That is, the substituent at X includes at least one aromatic group, so that the first host material has a larger stereo configuration, the lateral resistance of the p-type charge generation layer is increased, and the lateral transmission of the charge is reduced, thereby improving crosstalk.

[0143] Specifically, the first host material may be any one of the following structural formulas:

[0144]

[0145]

[0146]

[0147] In one example, the structural formula of the first dopant is shown in formula (2):

[0148]

[0149] wherein X1 and X2 are each independently one of C, N, and Si;

[0150] Y1 and Y2 are each independently one of O, N, and S;

[0151] Each group of Ar1-Ar4 is independently substituted or unsubstituted halogen, substituted or unsubstituted cyano, substituted or unsubstituted phenyl, substituted or unsubstituted biphenyl, substituted or unsubstituted terphenyl, substituted or unsubstituted fluorene; substituted or unsubstituted adamantane, substituted or unsubstituted heteroaryl;

[0152] R1 and R2 are each independently deuterium, a halogen group, a cyano group, a substituted or unsubstituted heteroaryl group having 3 to 20 carbon atoms, a substituted or unsubstituted aryl group having 6 to 20 carbon atoms, a substituted or unsubstituted alkyl group having 1 to 5 carbon atoms, a substituted or unsubstituted haloalkyl group having 1 to 10 carbon atoms, a substituted or unsubstituted cycloalkyl group having 3 to 10 carbon atoms, a substituted or unsubstituted heterocycloalkyl group having 2 to 10 carbon atoms, a substituted or unsubstituted alkoxy group having 1 to 10 carbon atoms, a substituted or unsubstituted alkylthio group having 1 to 10 carbon atoms, a substituted or unsubstituted aryloxy group having 6 to 18 carbon atoms, an arylthio group having 6 to 18 carbon atoms, a phosphinoyl group having 6 to 24 carbon atoms, or a substituted or unsubstituted alkylsulfonyl group having 6 to 18 carbon atoms;

[0153] a and b are each independently an integer of 1 to 5.

[0154] In this embodiment, since the substituents Ar1-Ar4 are all electron-withdrawing groups, the first dopant contains more electron-withdrawing groups. By doping the compound with the first host material, the conductivity of the p-type charge generation layer 132 can be enhanced.

[0155] For example, the first dopant may include any one of the following structural formulas:

[0156]

[0157]

[0158] Among them, the doping ratio of the first dopant in the first main material is 3%-15%. The p-type charge generation layer formed by the first dopant and the first main material with this doping ratio can improve the charge transfer effect while reducing the lateral transfer of charges and improving the crosstalk problem of the display panel.

[0159] For example, the doping ratio of the first dopant in the first host material may be 3%, 6%, 9%, 12% or 15%, etc.

[0160] In one embodiment, the structural formula of the second host material is shown in formula (3):

[0161]

[0162] R1 is selected from hydrogen, deuterium, substituted or unsubstituted C1-C 60 Alkyl, substituted or unsubstituted C2-C 60 Alkenyl, substituted or unsubstituted C2-C 60 Alkynyl, substituted or unsubstituted C1-C 60 Alkoxy, substituted or unsubstituted C3-C 10 Cycloalkyl, substituted or unsubstituted C1-C 10 Heterocycloalkyl, substituted or unsubstituted C3-C 10 Cycloalkenyl, substituted or unsubstituted C2-C10 heterocycloalkenyl, substituted or unsubstituted C6-C60 aryl, substituted or unsubstituted C6-C60 aryloxy, substituted or unsubstituted C6-C60 arylthio, substituted or unsubstituted C6-C60 heteroaryl, substituted or unsubstituted monovalent non-aromatic condensed polycyclic group, substituted or unsubstituted monovalent non-aromatic condensed heteropolycyclic group;

[0163] Ar1, Ar2, Ar3, Ar4 are the same or different, and Ar1-Ar4 are each independently one selected from the following: hydrogen; deuterium; tritium; halogen; cyano; nitro; C6-C 60 Aryl; C2-C containing at least one heteroatom from O, N, S, Si and P 60 Heterocyclic group; C3-C 60 Aliphatic ring and C6-C 60 Aromatic ring fused group; C1-C 50 Alkyl; C2-C 20 Alkenyl; C2-C 20 Alkynyl; C1-C 30 Alkoxy; C6-C 30 Aryloxy; C3-C 60 Alkylsilyl; C 18 -C60 Arylsilyl, and C8-C 60 Alkylarylsilyl;

[0164] The second dopant includes at least one of an alkali metal, an alkaline earth metal, a transition metal, or a compound of an alkali metal, an alkaline earth metal, or a transition metal.

[0165] For example, the second host material may include any one of the following structural formulas:

[0166]

[0167]

[0168] In this embodiment, an organic material containing an N heterocycle is used as the second host material. Since the compound has a deeper LUMO energy level, the energy barrier at the interface between the n-type charge generation layer and the p-type charge generation layer is reduced, and the interface degradation caused by the accumulation of carriers due to the high energy barrier at the interface is reduced. At the same time, the compound shown in general formula 3 has sp2 hybridized nitrogen atoms, which makes this type of compound have excellent electron transport ability, and can make the electron flow generated by the pin structure formed in the p-type charge generation layer and the n-type charge generation layer quickly transferred from the n-type charge generation layer to the first light-emitting layer, thereby increasing the carrier migration rate. In addition, the sp2 hybridized nitrogen atom and the lone pair of electrons of N can form a complex with the metal or metal compound in the second dopant, thereby inhibiting the crystallization of the second host material and improving the uniformity of the interface, thereby improving the charge flow in the multiple film layers in the display substrate and reducing the driving voltage when the pixel is lit.

[0169] Illustratively, the second dopant may be an alkali metal such as lithium (Li), sodium (Na), potassium (K), or cesium (Cs), or an alkali metal or alkaline earth metal such as magnesium (Mg), strontium (Sr), barium (Ba), or radium (Ra), and oxides thereof.

[0170] The doping ratio of the second dopant in the second host material is 0.5%-1.5%.

[0171] For example, the doping ratio of the second dopant in the second host material may be 0.5%, 0.8%, 1.1%, 1.3% or 1.5%, etc.

[0172] In this embodiment, by regulating the proportion of the first dopant in the first main material and the proportion of the second dopant in the second main material, while taking into account the role of the charge generation layer 13, the lateral resistance of the charge generation layer is increased and the lateral movement of carriers is reduced, thereby improving the crosstalk of the display panel.

[0173] In one embodiment, continue to refer to Figure 1, the display substrate further includes:

[0174] The first hole blocking layer 125 is located between the first light-emitting layer 12 and the n-type charge generation layer 131, and the absolute value of the difference between the lowest unoccupied molecular orbital energy level of the first hole blocking layer 125 and the lowest unoccupied molecular orbital energy level of the n-type charge generation layer 131 is less than or equal to 0.5 eV;

[0175] The second hole transport layer 141 is located between the second light-emitting layer 143 and the p-type charge generation layer 132. The absolute value of the difference between the highest occupied molecular orbital energy level of the second hole transport layer 141 and the highest occupied molecular orbital energy level of the p-type charge generation layer 132 is less than or equal to 0.3 eV.

[0176] Specifically, when the LUMO energy level of the first hole blocking layer 125 and the LUMO energy level of the n-type charge generation layer 131 are less than or equal to 0.5 eV, there is a low energy level transfer barrier between the n-type charge generation layer 131 and the first hole blocking layer 125, which facilitates the electrons in the n-type charge generation layer 131 to be transferred to the first hole blocking layer 125, and then transferred from the first hole blocking layer 125 to the first light-emitting layer 124; similarly, when the difference between the HOMO energy level of the second hole transport layer 141 and the HOMO energy level of the p-type electron generation layer 132 is less than or equal to 0.3 eV, there is a low transfer barrier between the p-type electron generation layer 132 and the second hole transport layer 141, so that the p-type charge generation layer 132 can inject holes into the second hole transport layer 141, and then transfer them from the second hole transport layer 141 to the second light-emitting layer 143.

[0177] In one example, referring to Figure 5 , Figure 5 The migration process of the carriers in this embodiment is shown in FIG. Figure 5 As shown, when the display substrate is driven by current, holes migrate from the highest occupied molecular orbital energy level of the ITO of the anode to the highest occupied molecular orbital energy level of the hole injection layer HIL, until they migrate to the light-emitting layer EML, and electrons migrate from the lowest unoccupied molecular orbital energy level of the n-type charge generation layer N-CGL to the lowest unoccupied molecular orbital energy level of the electron transport layer, until they migrate to the light-emitting layer EML, and then the holes and electrons recombine in the EML to emit light. Considering that the transmission rate of electrons and the transmission rate of holes in the light-emitting unit are not consistent, the transmission rate of electrons is generally higher than that of holes, which results in the recombination of holes and electrons not in the middle of the light-emitting layer, but on the side close to the hole transport layer, which easily affects the life of the light-emitting layer. Therefore, the energy level relationship between the two adjacent layers can be limited, the transmission rate of electrons can be reduced and the transmission rate of holes can be increased, so that the transmission rate of holes is close to the transmission rate of electrons, and the recombination of electrons and holes can be achieved as much as possible in the middle of the light-emitting layer, thereby improving the life of the display substrate.

[0178] Specifically, the energy level relationship between the hole blocking layer and the adjacent electron transport layer satisfies that the absolute value of the difference between the lowest unoccupied molecular orbital energy level of the hole blocking layer and the lowest unoccupied molecular orbital energy level of the electron transport layer is between 0.4eV and 1eV, which can increase the energy level barrier between the hole blocking layer and the electron transport layer and slow down the electron transmission efficiency; the absolute value of the difference between the highest occupied molecular orbital energy level of the hole transport layer and the highest occupied molecular orbital energy level of the electron blocking layer is between 0.3eV and 0.4eV, and the hole transmission rate is accelerated by reducing the energy level barrier between the hole transport layer and the electron blocking layer.

[0179] For the display substrate of this embodiment, when an exciton complex is used as the main material of the light-emitting layer, it includes a p-type main material and an n-type main material, wherein the p-type main material receives holes injected into the light-emitting layer by the hole transport layer, and the n-type main material receives electrons injected into the light-emitting layer by the electron transport layer, thereby forming excitons and recombining in the light-emitting layer to achieve radiative luminescence. Therefore, the energy level relationship between different main materials in the light-emitting layer and the adjacent layers is limited, so that holes and electrons can be quickly transmitted to the light-emitting layer while avoiding the migration of holes and electrons to the opposite film layer.

[0180] Specifically, the energy level relationship between the adjacent light-emitting layer and the electron blocking layer is as follows: the absolute value of the difference between the highest occupied molecular orbital energy level of the p-type host material in the light-emitting layer and the highest occupied molecular orbital energy level of the electron blocking layer is less than 0.3 eV. By reducing the energy level gap between the light-emitting layer and the electron blocking layer, the transmission rate of holes from the electron blocking layer to the p-type host material in the light-emitting layer can be increased; at the same time, the absolute value of the difference between the highest occupied molecular orbital energy level of the p-type host material in the light-emitting layer and the highest occupied molecular orbital energy level of the hole blocking layer is greater than or equal to 0.3 eV. In this way, holes transmitted to the light-emitting layer are blocked by the hole blocking layer, preventing them from being transmitted to the other side of the light-emitting layer and reducing the device life. As a result, holes can be quickly transmitted to the light-emitting layer and prevented from continuing to transmit to one side of the electron transport layer.

[0181] For adjacent light-emitting layers and hole-blocking layers, the energy level relationship between the two is as follows: the absolute value of the difference between the lowest unoccupied molecular orbital energy level of the n-type host material in the light-emitting layer and the lowest unoccupied molecular orbital energy level of the hole-blocking layer is less than or equal to 0.3 eV. This can reduce the energy level gap between the light-emitting layer and the electron-blocking layer, thereby increasing the electron transfer rate during the process of electron transfer from the hole-blocking layer to the light-emitting layer. At the same time, the absolute value of the difference between the lowest unoccupied molecular orbital energy level of the n-type host material in the light-emitting layer and the lowest unoccupied molecular orbital energy level of the electron-blocking layer is greater than or equal to 0.3 eV, thereby causing electrons transferred to the light-emitting layer to be blocked by the electron-blocking layer, preventing them from being transferred to the other side of the light-emitting layer and reducing the device life. Thus, by respectively limiting the energy level relationship between the p-type host material and the n-type host material in the light-emitting layer and the adjacent layers of the light-emitting layer, electrons and holes can recombine in the light-emitting layer, thereby improving the light extraction efficiency of the device.

[0182] Among them, the SCLC method is used to test the mobility of the material. Different film layers have different carrier mobilities. Specifically, the mobility of the hole blocking layer ranges from 10 -7 ~10 -9 cm 2 V -1 s -1 @5000V 1 / 2 / m 1 / 2 , the mobility of the electron transport layer ranges from 10 -5 ~10 -7 cm 2 V -1 s -1 @5000V 1 / 2 / m 1 / 2 , the mobility of the hole transport layer is in the range of 10 -4 ~10 -6 cm 2 V -1 s -1 @5000V 1 / 2 / m 1 / 2 , the mobility of the electron transport layer ranges from 10 -4 ~10 -7 cm 2 V -1 s -1 @5000V 1 / 2 / m 1 / 2 , the mobility of the n-type charge generation layer is in the range of 10 -5 ~10 -7 cm 2 V -1 s -1 @5000V 1 / 2 / m 1 / 2 , mobility range of p-type charge generation layer: 10-4 ~10 -6 cm 2 V -1 s -1 @5000V 1 / 2 / m 1 / 2 .

[0183] By adopting the display substrate provided by the embodiment of the present disclosure, by respectively limiting the relationship between L1, L2 and L3 in the red sub-pixel 10a, the green sub-pixel 10b and the blue sub-pixel 10c, and the relationship between L1 and L2 between the red sub-pixel 10a, the green sub-pixel 10b and the blue sub-pixel 10c, and adopting an organic material including a large steric hindrance group as the first main material, an organic material including a plurality of strong electron-withdrawing groups as the first dopant to form a p-type charge generation layer, and an organic material including a heterocyclic group containing at least two Ns as the second main material to form an n-type charge generation layer, the display substrate has higher light extraction efficiency and higher color purity, and can also improve the color crosstalk of the display panel.

[0184] In order to enable those skilled in the art to better understand the performance of the display substrate provided by the embodiments of the present application, the performance of the light-emitting devices and the display substrate formed after integration of some exemplary embodiments are tested and compared.

[0185] Reference Figure 6 , Figure 6 The specific structure of the display substrate used in this example is shown in FIG. Figure 6 As shown, the display substrate includes, in stacking order: an anode, a hole injection layer (HIL), a first hole transport layer (HTL-1), a first electron blocking layer (EBL-1), a first light-emitting layer (EML1), an n-type charge generation layer (NCGL), a p-type charge generation layer (PCGL), a second hole transport layer (HTL-2), a second electron blocking layer (EBL-2), a second light-emitting layer (EML2), a second hole blocking layer (HBL-2), an electron transport layer (ETL), and a cathode. It should be noted that this is only a schematic diagram of the display substrate; the total thickness of the film layers in the actual regions where the sub-pixels of different colors are located may vary.

[0186] Among them, the thickness of the hole injection layer is 5-30nm, the thickness of the first hole transport layer is 80-120nm, the thickness of the first hole blocking layer is 5-15nm, the thickness of the n-type charge generation layer is 15-25nm, the thickness of the p-type charge generation layer is 5-15nm, the thickness of the second hole transport layer is 30-70nm, the thickness of the second hole blocking layer is 4-15nm, the thickness of the electron transport layer is 20-100nm, and the thickness of the cathode is 10-20nm. Among them, the first electron blocking layer, the first light-emitting layer and the second light-emitting layer are different according to different light-emitting devices. In the red light-emitting device, the thickness of the first electron blocking layer is 60-100nm, the thickness of the first light-emitting layer is 30-60nm, and the thickness of the second light-emitting layer is 30-60nm; in the green light-emitting device, the thickness of the first electron blocking layer is 20-50nm, the thickness of the first light-emitting layer is 20-50nm, and the thickness of the second light-emitting layer is 20-50nm; in the blue light-emitting device, the thickness of the first electron blocking layer is 5-15nm, the thickness of the first light-emitting layer is 10-40nm, and the thickness of the second light-emitting layer is 10-40nm.

[0187] The specific preparation steps of the display substrate include:

[0188] 1. After ultrasonic treatment of the glass plate with ITO in a cleaning agent, rinse with deionized water, and ultrasonically degrease in an acetone-ethanol mixed solvent, bake in a clean environment until the moisture is completely removed.

[0189] 2. Place the dried ITO-coated glass substrate in a vacuum chamber and evacuate to 1×10 -5 ~1×10 -6 , a hole injection material doped with 5% of the first hole transport material is evaporated on the anode layer to form a hole injection layer.

[0190] 3. Vapor-deposit a first hole transport material on the hole injection layer to form a first hole transport layer.

[0191] 4. Evaporating an electron blocking material on the first hole transport layer to form a first electron blocking layer.

[0192] 5. Evaporate a luminescent material on the first electron blocking layer to form a first luminescent layer.

[0193] 6. Vacuum-evaporate a first hole-blocking material on the first light-emitting layer to form a first hole-blocking layer.

[0194] 7. Deposit an n-type charge generation material with a Yb doping ratio of 1% on the first hole blocking layer, and deposit a p-type charge generation material with a dopant doping ratio of 5% on top of the n-type charge generation material to form a charge generation layer.

[0195] 8. A second hole transport material is evaporated on the charge generation layer to form a second hole transport layer.

[0196] 9. Vapor-deposit a second electron blocking material on the second hole transport layer to form a second electron blocking layer.

[0197] 10. Evaporate a light-emitting material on the second electron blocking layer to form a second light-emitting layer.

[0198] 11. Vacuum evaporate a second hole blocking material on the second light-emitting layer to form a second hole blocking layer.

[0199] 12. Vacuum evaporate an electron transport material on the second hole blocking layer to form an electron transport layer.

[0200] 13. Yb was vacuum-deposited with a thickness of 1 nm on the electron transport layer to form an electron injection layer.

[0201] 14. Mg and Ag are evaporated on the electron injection layer in a mass ratio of 1:9 to form a cathode.

[0202] The materials of each layer are shown in Table 1 below:

[0203] Table 1 Materials used in each functional layer used in this embodiment

[0204]

[0205]

[0206] First, a strong flashlight is used to illuminate the formed display substrate to achieve the brightness of HBM (High Brightness Mode). The temperature changes at different time intervals are recorded to test the reliability of multiple film layers corresponding to each sub-pixel in the display substrate. Figure 8 The test result diagram shown in Figure 8 As shown, curve 1 shows the dependence curve of multiple functional layers included in the first distance L1 among the multiple film layers, curve 2 shows the dependence curve of multiple functional layers included in the second distance L2 among the multiple film layers, and curve 3 shows the dependence curve of multiple functional layers included in the third distance L3 among the multiple film layers.

[0207] The light-emitting devices corresponding to multiple sub-pixels of different colors in the display substrate obtained using the above method and materials were tested, and the performance data obtained are shown in Table 2-4:

[0208] Table 2 Performance data of an embodiment of a red light emitting device

[0209] R devices Formula 1 Voltage efficiency life Example 1 Formula 1=6 100％ 82％ 102％ Example 2 Formula 1=1 103％ 89％ 101％ Example 3 Formula 1=2.77 100％ 100％ 100％

[0210] Table 3 Performance data of green light emitting device examples

[0211] G devices Formula 2 Voltage efficiency life Example 1 Formula 2=4 100％ 92％ 99％ Example 2 Formula 2=0.5 101％ 88％ 96％ Example 3 Formula 2=2.36 100％ 100％ 100％

[0212] Table 4 Performance data of the embodiment of the blue light emitting device

[0213] B device Formula 3 Voltage efficiency life Example 1 Formula 3=4 100％ 90％ 95％ Example 2 Formula 3=0.2 102％ 93％ 98％ Example 3 Formula 3=0.94 100％ 100％ 100％

[0214] According to the above embodiment, when the ratio of the absolute value of the difference between L3 and L1 in the display substrate to the absolute value of the difference between L3 and L1 is within the first preset range, it has a lower turn-on voltage and can achieve both better luminous efficiency and better device life.

[0215] After the charge generation layer is improved by using the materials provided in the embodiment of the present disclosure to obtain a display substrate, the performance of the light-emitting devices corresponding to the sub-pixels of different colors in the display substrate with the optimized materials is tested. In the comparative example, the first host material of the p-type charge generation layer is The first dopant is The second host material of the n-type charge generation layer is The second doping material is Yb, and the final performance data is shown in Table 5-7 below:

[0216] Table 5 Performance data of red light emitting devices

[0217]

[0218]

[0219] Table 6 Performance data of green light emitting devices

[0220]

[0221] Table 7 Performance data of blue light emitting devices

[0222]

[0223]

[0224] According to the test results of the above embodiments, the light-emitting device corresponding to the charge generation layer formed by providing the first main material, the first dopant and the second main material in this embodiment has a lower driving voltage, higher luminous efficiency and longer device life than the light-emitting device obtained from conventional materials.

[0225] After integrating multiple light-emitting devices on a display substrate, the performance of the resulting display panel was tested, and the test results are shown in the following table:

[0226] Table 8 Crosstalk data of display panels formed by different embodiments

[0227]

[0228]

[0229] According to Table 8, after the display panel is formed using the display substrate provided by this embodiment, the crosstalk of the display panel can be basically controlled to be below 5%, wherein, when the first host material of the p-type charge generation layer is structural formula 1-12, the first dopant is structural formula 2-5, the doping ratio of the first dopant in the first host material is 5%, and the second host material of the n-type charge generation layer is structural formula 3-1, the second dopant is Yb, and the doping ratio of the second dopant in the second host material is 0.5%, the crosstalk of the display panel can be controlled to be below 2%, and, referring to Figure 7 , Figure 7 An example diagram after improving crosstalk is shown, as Figure 7 As shown, when a single pixel emits light, other pixels do not emit light simultaneously. This shows that the display panel formed using the display substrate provided by this embodiment has improved crosstalk. Therefore, using the display substrate provided by the embodiment of the present disclosure can reduce the driving voltage of the light-emitting device, improve the light extraction efficiency and device life of the light-emitting device, and can also improve the crosstalk problem of the display panel.

[0230] Based on the same inventive concept, the present disclosure further provides a display device, comprising the display substrate described in any of the above embodiments.

[0231] In this embodiment, the display device may be an electroluminescent display device, specifically an organic light-emitting diode (OLED) or a quantum dot light-emitting diode (QLED). Specifically, the display device 1000 is used as an example in the embodiment of the present disclosure.

[0232] Reference Figure 9 , Figure 9 A schematic structural diagram of a display device is shown. Figure 9 As shown, the display device includes: a display panel 1000, a circuit board, a driver chip and other electronic components, and the driver chip is used to drive the display panel 1000 to display.

[0233] For example, taking the display panel 1000 as an OLED (Organic Light-Emitting Diode) display panel, the display panel 1000 includes a display substrate 100 , which is any of the display substrates described in the above embodiments.

[0234] Among them, reference Figure 10 , Figure 10 A schematic diagram of the specific structure of the display substrate 100 is shown. Figure 10 As shown, the display substrate 100 further includes a base 201 and a pixel driving circuit stack 20 located on the base 201. The pixel driving circuit 20 includes a plurality of pixel driving circuits 30, which are used to drive the light emitting device stack 10 to emit light.

[0235] Specifically, the light-emitting device stack 10 includes the stack described in the light-emitting substrate described in any of the above embodiments, that is, it includes two stacked light-emitting units. When the first electrode 11 and the second electrode 12 are connected to the circuit, the first electrode 11 injects holes into the adjacent hole injection layer 121, and the second electrode 15 injects electrons into the adjacent electron injection layer 145. At the same time, the n-type charge generation layer 131 injects electrons into the adjacent first hole blocking layer 125, and the p-type charge generation layer 132 injects holes into the adjacent second hole transport layer 141, and causes the holes and electrons to migrate to the first light-emitting layer 124 and the second light-emitting layer 143 to form excitons. The excitons return to the ground state through radiation transition and emit photons, so that both the first light-emitting layer 124 and the second light-emitting layer 143 emit light.

[0236] Among them, reference Figure 11 and Figure 12 , Figure 11 Schematic diagram of the structure of the gate drive circuit in this embodiment is shown. Figure 12 A schematic diagram of a pixel driving circuit in this embodiment is shown. The display substrate 1000 includes a display area A and a peripheral area S disposed around the display area A. The display area A includes multiple gate lines G, multiple data lines D, and multiple sub-pixel areas Q'. The multiple gate lines G and multiple data lines D intersect with each other to define multiple sub-pixel areas Q' arranged in an array within the display area A. A pixel driving circuit 30 is disposed in each sub-pixel area Q' for driving the corresponding light-emitting device stack 10 to emit light. The gate lines G are used to provide scanning signals to the pixel driving circuit 10. The data lines D are used to provide data signals to the pixel driving circuit 10.

[0237] The peripheral area S is used to house the gate drive circuit 40 connected to the pixel drive circuit 30. SR1, SR2, and SR3 represent sequentially arranged shift registers, and multiple shift registers are cascaded to form the gate drive circuit 40. Iput represents a signal input terminal. The Iput terminal of the first-stage shift register SR1 receives a start signal STV. Oput represents a signal output terminal, for example, outputting a scan signal to the corresponding pixel drive circuit 10.

[0238] Continue to refer to Figure 2 The pixel driving circuit stack 20 includes an active layer 21, a first gate insulating layer 202, a first metal layer 22, a second gate insulating layer 203, a second metal layer 23, an interlayer insulating layer 204, and a source-drain electrode layer 205, which are sequentially disposed on a substrate 201. The source-drain electrode layer 205 includes a source electrode 241 and a drain electrode 242. The material of the active layer 21 may include indium gallium zinc oxide (IGaZnO) or polysilicon, which can be selected based on the application of the transistor. For example, if the transistor is a driving transistor, the active layer may be made of polysilicon; if the transistor is a reset transistor or a compensation transistor, the active layer may be made of indium gallium zinc oxide (IGaZnO).

[0239] In one example, the film layer of the display substrate 100 further includes a passivation layer (not shown in the figure), a first planarization layer (not shown in the figure), and a second planarization layer (not shown in the figure).

[0240] For example, the material of the first planarization layer and the second planarization layer includes polyimide, and the material of the first gate insulating layer 202 , the second gate insulating layer 203 and the interlayer insulating layer 203 includes any one of silicon nitride and silicon oxide.

[0241] In some embodiments of the present disclosure, the pixel driving circuit 30 may be a 7T1C, 8T1C, or 9T1C circuit, where T represents a transistor, and the number preceding T represents the number of transistors. C represents a capacitor, and the number preceding C represents the number of capacitors. For example, 7T1C represents 7 transistors and 1 capacitor. The following example illustrates a 7T1C pixel driving circuit 40. It should be understood that some embodiments of the present disclosure are not limited to this.

[0242] Reference Figure 12 The pixel driving circuit 30 includes: a first reset transistor T1, a compensation transistor T2, a driving transistor T3, a data writing transistor T4, a first light emission control transistor T5, a second light emission control transistor T6 and a second reset transistor T7.

[0243] The first reset transistor T1 includes a gate, a first electrode, and a second electrode. The gate of the first reset transistor T1 is electrically connected to the first reset signal line Reset1, the first electrode of the first reset transistor T1 is electrically connected to the first initialization signal line Vinit1, and the second electrode of the first reset transistor T1 is electrically connected to the third node N3. The first reset transistor T1 is configured to reset the gate of the drive transistor T3 in response to a reset signal received at the first reset signal line Reset1.

[0244] The compensation transistor T2 includes a gate, a first electrode, and a second electrode. The gate of the compensation transistor T2 is electrically connected to the second scan signal line Gate2, the first electrode of the compensation transistor T2 is electrically connected to the first node N1, and the second electrode of the compensation transistor T2 is electrically connected to the third node N3. The compensation transistor T2 is configured to reset or threshold-compensate the driving transistor T3 in response to a scan signal received at the second scan signal line Gate2.

[0245] The driving transistor T3 includes a gate, a first electrode, and a second electrode. The gate of the driving transistor T3 is electrically connected to the first node N1, the first electrode of the driving transistor T3 is electrically connected to the second node N2, and the second electrode of the driving transistor T3 is electrically connected to the third node N3. The driving transistor T3 is configured to generate a driving current signal.

[0246] The data write transistor T4 includes a gate, a first electrode, and a second electrode. The gate of the data write transistor T4 is electrically connected to the first scan signal line Gate1, the first electrode of the data write transistor T4 is electrically connected to the data signal line Data, and the second electrode of the data write transistor T4 is electrically connected to the second node N2. The data write transistor T4 is configured to transmit a data signal received on the data signal line Data to the driving transistor T3 in response to a scan signal received on the first scan signal line Gate1.

[0247] The first emission control transistor T5 includes a gate, a first electrode, and a second electrode. The gate of the first emission control transistor T5 is electrically connected to the emission control signal line EM, the first electrode of the first emission control transistor T5 is electrically connected to the power signal line VDD, and the second electrode of the first emission control transistor T5 is electrically connected to the second node N2. The first emission control transistor T5 is configured to transmit a power signal received on the power signal line VDD to the driving transistor T3 in response to the emission control signal received on the emission control signal line EM.

[0248] The second emission control transistor T6 includes a gate, a first electrode, and a second electrode. The gate of the second emission control transistor T6 is electrically connected to the emission control signal line EM, the first electrode of the second emission control transistor T6 is electrically connected to the third node N3, and the second electrode of the second emission control transistor T6 is electrically connected to the fourth node N4. The second emission control transistor T6 is configured to transmit a driving current signal to the light-emitting device stack 10 in response to a light-emitting control signal received on the light-emitting control signal line EM, thereby driving the light-emitting device stack 10 to emit light.

[0249] like Figure 12 As shown, the second reset transistor T7 includes a gate, a first electrode, and a second electrode. The gate of the second reset transistor T7 is electrically connected to the second reset signal line Reset2, the first electrode of the second reset transistor T7 is electrically connected to the second initialization signal line Vinit2, and the second electrode of the second reset transistor T7 is electrically connected to the fourth node N4. The second reset transistor T7 is configured to: in response to a reset signal received at the second reset signal line Reset2, transmit the initialization signal received at the second initialization signal line Vinit2 to the light-emitting device stack 10 to reset the light-emitting device stack 10.

[0250] Exemplarily, the anode of the light emitting device stack 10 is electrically connected to the fourth node N4, and the cathode of the light emitting device stack 10 is electrically connected to the reference voltage line VSS.

[0251] It should be noted that the first electrode of the transistor disclosed herein is one of the source and drain of the transistor, and the second electrode is the other of the source and drain of the transistor. Since the source and drain of the transistor can be symmetrical in structure, the source and drain can be structurally indistinguishable. In other words, the first electrode and the second electrode of the transistor in the embodiments of the present disclosure can be structurally indistinguishable. For example, in the case where the transistor is a P-type transistor, the first electrode of the transistor is the source, and the second electrode is the drain; for example, in the case where the transistor is an N-type transistor, the first electrode of the transistor is the drain, and the second electrode is the source.

[0252] In the circuit provided by the embodiments of the present disclosure, nodes do not represent actual components, but represent the junction points of related electrical connections in the circuit diagram. That is, these nodes are nodes formed by the equivalent junction points of related electrical connections in the circuit diagram.

[0253] The pixel driving circuit 30 further includes a capacitor Cst including a first plate Cst1 and a second plate Cst2 . The first plate Cst1 of the capacitor Cst is electrically connected to the first node N1 , and the second plate Cst2 of the capacitor Cst is electrically connected to the power signal line VDD.

[0254] Among them, the pixel driving circuit 30 adopts an LTPO (Low Temperature Polycrystalline Oxide) circuit, that is, a pixel driving circuit 30 includes both a low-temperature polycrystalline silicon (LTPS) thin film transistor and an oxide (Oxide) thin film transistor. The low-temperature polycrystalline silicon thin film transistor has a strong load capacity, and the oxide (Oxide) thin film transistor has a small off-state current and a stronger charge retention ability than the low-temperature polycrystalline silicon thin film transistor. In this way, the pixel driving circuit 40 can achieve higher charge mobility and better stability.

[0255] For example, the compensation transistor T2 can be an oxide thin film transistor, and is an N-type transistor, that is, it is turned on at a high level. The first reset transistor T1, the drive transistor T3, the data write transistor T4, the first emission control transistor T5, the second emission control transistor T6, and the second reset transistor T7 are all low-temperature polysilicon thin film transistors (LTPTs) P-type transistors, and are turned on at a low level. Using an oxide thin film transistor for the compensation transistor T2 can effectively prevent leakage from the first node N1.

[0256] It should be noted that the above examples of the first reset transistor T1 , compensation transistor T2 , drive transistor T3 , data writing transistor T4 , first emission control transistor T5 , second emission control transistor T6 and second reset transistor T7 are not limitations on transistor types.

[0257] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0258] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity, or device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, commodity, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, commodity, or device that includes the element.

[0259] The display substrate and display device provided by the present disclosure are introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present disclosure. The description of the above embodiments is only used to help understand the method and core idea of ​​the present disclosure. At the same time, for those skilled in the art, according to the idea of ​​the present disclosure, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present disclosure.

[0260] Other embodiments of the present disclosure will readily occur to those skilled in the art after considering the specification and practicing the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the following claims.

[0261] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes can be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

[0262] References herein to "one embodiment," "an embodiment," or "one or more embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present disclosure. Furthermore, please note that instances of the phrase "in one embodiment" do not necessarily all refer to the same embodiment.

[0263] In the description provided herein, numerous specific details are described. However, it is understood that embodiments of the present disclosure may be practiced without these specific details. In some instances, well-known methods, structures, and techniques are not shown in detail so as not to obscure the understanding of this description.

[0264] In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in the claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present disclosure may be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In a unit claim enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third etc. does not indicate any order. These words may be interpreted as names.

[0265] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present disclosure.

Claims

1. A display substrate, characterized in that: include: substrate; A plurality of sub-pixels are provided on the substrate, and the sub-pixels include: a first electrode, a first light-emitting layer located on one side of the first electrode, a charge generation layer located on the first light-emitting layer facing away from the first electrode, a second light-emitting layer located on a side of the charge generation layer facing away from the first light-emitting layer, an electron transport layer located on a side of the second light-emitting layer facing away from the charge generation layer, and a second electrode located on a side of the electron transport layer facing away from the first electrode; wherein a first distance exists between a surface of the second light-emitting layer close to the charge generation layer and a surface of the electron transport layer close to the second electrode, a second distance exists between a surface of the first electrode close to the first light-emitting layer and a surface of the first light-emitting layer close to the charge generation layer, and a third distance exists between a surface of the first light-emitting layer close to the charge generation layer and a surface of the second light-emitting layer close to the charge generation layer; wherein a ratio of an absolute value of a difference between the third distance and the first distance to an absolute value of a difference between the third distance and the second distance is within a first preset range; Among them, the multiple sub-pixels include a first sub-pixel that emits red light, a second sub-pixel that emits green light, and a third sub-pixel that emits blue light. The first sub-pixel, the second sub-pixel, and the third sub-pixel have different first preset ranges. The first preset range of the first sub-pixel is 2.5-5, the first preset range of the second sub-pixel is 0.8-3, and the first preset range of the third sub-pixel is 0.5-1.

5.

2. The display substrate according to claim 1, wherein: Taking a first absolute value for a difference between the second distance of the first sub-pixel and the second distance of the second sub-pixel, and taking a second absolute value for a difference between the second distance of the second sub-pixel and the second distance of the third sub-pixel; The ratio of the first absolute value to the second absolute value is between 1 and 2.

3. The display substrate according to claim 1, wherein Taking a third absolute value of a difference between a first distance of the first sub-pixel and a first distance of the second sub-pixel, and taking a fourth absolute value of a difference between a first distance of the second sub-pixel and a first distance of the third sub-pixel; A ratio of the third absolute value to the fourth absolute value is between 0.8 and 1.

5.

4. The display substrate according to claim 1, wherein The ratio of the thickness of the charge generating layer to the total thickness of the distance between the first electrode and the second electrode in the sub-pixel is within a second preset range; wherein the second preset range of the first sub-pixel is 0.06-0.15, the second preset range of the second sub-pixel is 0.08-0.13, and the second preset range of the third sub-pixel is 0.12-0.

15.

5. The display substrate according to any one of claims 1 to 4, characterized in that: The distance between the first electrode and the second electrode in the first subpixel is 2500-3000 angstroms, the distance between the first electrode and the second electrode in the second subpixel is 2050-2500 angstroms, and the distance between the first electrode and the second electrode in the third subpixel is 1500-2000 angstroms.

6. The display substrate according to claim 1, wherein: The charge generation layer includes an n-type charge generation layer and a p-type charge generation layer. The n-type charge generation layer is located on the side of the first light-emitting layer away from the first electrode, and the p-type charge generation layer is located between the n-type charge generation layer and the second light-emitting layer.

7. The display substrate according to claim 6, wherein: The p-type charge generation layer includes a first host material and a first dopant, wherein the first host material includes an organic material having a large steric hindrance group, and the large steric hindrance group includes at least a benzene ring; The n-type charge generation layer includes a second host material and a second dopant, wherein the second host material includes an organic material having at least two N heterocyclic groups.

8. The display substrate according to claim 7, wherein: The structural formula of the first host material is shown in general formula (1): Wherein, X is CRaRb or N, and a and b are integers of 0 to 4; L1 and L2 are independent of each other and are direct bonds, substituted or unsubstituted C6~C 60 aryl groups; Ar1 and Ar2 are each independently hydrogen, deuterium, a halogen group, a nitrile group, a nitro group, a hydroxyl group, a carbonyl group, an ester group, an imide group, an amino group, a substituted or unsubstituted silyl group, a substituted or unsubstituted boron group, a substituted or unsubstituted alkyl group, a substituted or unsubstituted cycloalkyl group, a substituted or unsubstituted alkoxy group, a substituted or unsubstituted aryloxy group, a substituted or unsubstituted alkylthio group, a substituted or unsubstituted arylthio group, a substituted or unsubstituted alkylsulfonyl group, a substituted or unsubstituted arylsulfonyl group, a substituted or unsubstituted a substituted or unsubstituted alkenyl group, a substituted or unsubstituted aralkyl group, a substituted or unsubstituted aralkenyl group, a substituted or unsubstituted alkylaryl group, a substituted or unsubstituted alkylamino group, a substituted or unsubstituted aralkylamino group, a substituted or unsubstituted heteroarylamino group, a substituted or unsubstituted arylamino group, a substituted or unsubstituted arylheteroarylamino group, a substituted or unsubstituted arylphosphino group, a substituted or unsubstituted phosphine oxide group, a substituted or unsubstituted aryl group, or a substituted or unsubstituted heterocyclic group; R1, R2, R3, and R4 are each independently selected from deuterium, a halogen group, a cyano group, a heteroaryl group having 3 to 20 carbon atoms, an aryl group having 6 to 20 carbon atoms, a trialkylsilyl group having 3 to 12 carbon atoms, a triarylsilyl group having 18 to 30 carbon atoms, an alkyl group having 1 to 5 carbon atoms, a haloalkyl group having 1 to 10 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, a heterocycloalkyl group having 2 to 10 carbon atoms, a cycloalkyl group having 5 to 10 carbon atoms, Cycloalkenyl, heterocycloalkenyl having 4 to 10 carbon atoms, alkoxy having 1 to 10 carbon atoms, alkylthio having 1 to 10 carbon atoms, aryloxy having 6 to 18 carbon atoms, arylthio having 6 to 18 carbon atoms, phosphino having 6 to 24 carbon atoms, alkylsulfonyl having 6 to 18 carbon atoms, trialkylphosphino having 3 to 18 carbon atoms, trialkylboryl having 3 to 18 carbon atoms, or optionally bonded to an adjacent group to form a ring.

9. The display substrate according to claim 7, wherein: The structural formula of the first dopant is shown in general formula (2): wherein X1 and X2 are each independently one of C, N, and Si; Y1 and Y2 are each independently one of O, N, and S; Each group of Ar1-Ar4 is independently substituted or unsubstituted halogen, substituted or unsubstituted cyano, substituted or unsubstituted phenyl, substituted or unsubstituted biphenyl, substituted or unsubstituted terphenyl, substituted or unsubstituted fluorene; substituted or unsubstituted adamantane, substituted or unsubstituted heteroaryl; R1 and R2 are each independently deuterium, a halogen group, a cyano group, a substituted or unsubstituted heteroaryl group having 3 to 20 carbon atoms, a substituted or unsubstituted aryl group having 6 to 20 carbon atoms, a substituted or unsubstituted alkyl group having 1 to 5 carbon atoms, a substituted or unsubstituted haloalkyl group having 1 to 10 carbon atoms, a substituted or unsubstituted cycloalkyl group having 3 to 10 carbon atoms, a substituted or unsubstituted heterocycloalkyl group having 2 to 10 carbon atoms, a substituted or unsubstituted alkoxy group having 1 to 10 carbon atoms, a substituted or unsubstituted alkylthio group having 1 to 10 carbon atoms, a substituted or unsubstituted aryloxy group having 6 to 18 carbon atoms, an arylthio group having 6 to 18 carbon atoms, a phosphinoyl group having 6 to 24 carbon atoms, or a substituted or unsubstituted alkylsulfonyl group having 6 to 18 carbon atoms; a and b are each independently an integer of 1 to 5.

10. The display substrate according to claim 7, wherein: The doping ratio of the first dopant in the first host material is 3-15%.

11. The display substrate according to claim 8, wherein In the general formula (1), the group where X is located includes any of the following:

12. The display substrate according to claim 7, wherein: The structural formula of the second host material is shown in general formula (3): wherein X1-X4 are N or C(R1), and X1-X4 contain at least 2 N; R1 is selected from hydrogen, deuterium, substituted or unsubstituted C1-C 60 Alkyl, substituted or unsubstituted C2-C 60 Alkenyl, substituted or unsubstituted C2-C 60 Alkynyl, substituted or unsubstituted C1-C 60 Alkoxy, substituted or unsubstituted C3-C 10 Cycloalkyl, substituted or unsubstituted C1-C 10 Heterocycloalkyl, substituted or unsubstituted C3-C 10 Cycloalkenyl, substituted or unsubstituted C2-C 10 Heterocycloalkenyl, substituted or unsubstituted C6-C 60 Aryl, substituted or unsubstituted C6-C 60 Aryloxy, substituted or unsubstituted C6-C 60 Arylthio, substituted or unsubstituted C6-C 60 Heteroaryl group, substituted or unsubstituted monovalent non-aromatic condensed polycyclic group, substituted or unsubstituted monovalent non-aromatic condensed heteropolycyclic group; Ar1, Ar2, Ar3, Ar4 are the same or different, and Ar1-Ar4 are each independently one selected from the following: hydrogen; deuterium; tritium; halogen; cyano; nitro; C6-C 60 Aryl; C2-C containing at least one heteroatom from O, N, S, Si and P 60 Heterocyclic group; C3-C 60 Aliphatic ring and C6-C 60 Aromatic ring fused ring group; C1-C 50 Alkyl; C2-C 20 Alkenyl; C2-C 20 Alkynyl; C1-C 30 Alkoxy; C6-C 30 Aryloxy; C3-C 60 Alkylsilyl; C 18 -C 60 Arylsilyl, and C8-C60 alkylarylsilyl; The second dopant includes at least one of an alkali metal, an alkaline earth metal, a transition metal, or a compound of an alkali metal, an alkaline earth metal, or a transition metal.

13. The display substrate according to claim 7, wherein: The doping ratio of the second dopant in the second host material is 0.5-1.5%.

14. The display substrate according to claim 6, wherein: The display substrate further includes: a hole blocking layer located between the first light-emitting layer and the n-type charge generation layer, wherein the absolute value of the difference between the lowest unoccupied molecular orbital energy level of the hole blocking layer and the lowest unoccupied molecular orbital energy level of the n-type charge generation layer is less than or equal to 0.5 eV; The hole transport layer is located between the second light-emitting layer and the p-type charge generation layer, and the absolute value of the difference between the highest occupied molecular orbital energy level of the hole transport layer and the highest occupied molecular orbital energy level of the p-type charge generation layer is less than or equal to 0.3 eV.

15. A display device, characterized in that: include: The display substrate according to any one of claims 1 to 14.

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