Light-emitting display device

Abstract

One aspect of the present disclosure is directed to providing a light-emitting display apparatus in which a test light-emitting device capable of providing information about a cause of a pixel defect is provided in a transmission unit. The light-emitting display apparatus includes a substrate including a light-emitting area displaying an image and a transmissive area through which light is transmitted, a pixel disposed in the light-emitting area, and a test light-emitting device connected to a light-emitting device disposed in the pixel and disposed in the transmissive area.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Korean Patent Application No. 10-2023-01114342, filed on August 30, 2023, which is incorporated herein by reference as if fully set forth herein. Technical Field

[0003] The present disclosure relates to a light emitting display device. Background Art

[0004] The light-emitting display device is mounted on or provided in an electronic product such as a television, a monitor, a notebook computer, a smart phone, a tablet computer, an electronic pad, a wearable device, a watch phone, a portable information device, a navigation device, or a vehicle control display device to display an image.

[0005] A light-emitting display panel applied to a light-emitting display device may include a transmissive region through which external light is transmitted. The transmissive region may occupy a large portion of a total area of ​​the light-emitting display panel.

[0006] Therefore, among the pixels provided in the light-emitting display panel, a defective pixel that does not output light is more visible to the user's eyes in a light-emitting display panel including a transmission area than in a light-emitting display panel not including a transmission area. In addition, it is difficult to clearly determine the cause of the defective pixel.

[0007] Therefore, it is difficult to perform a repair process on a defective pixel, and thus, a defect rate of a light-emitting display panel including a transmission area may be greater than a defect rate of a light-emitting display panel not including a transmission area.

[0008] The above background is a part of the present disclosure in designing the present disclosure, or is technical information obtained through the process of designing the present disclosure, but may not be regarded as a known technology disclosed to the public before the present disclosure is disclosed. Summary of the invention

[0009] Accordingly, the present disclosure is directed to a light emitting display device that substantially obviates one or more problems due to limitations and disadvantages of the related art.

[0010] One aspect of the present disclosure is directed to providing a light-emitting display apparatus in which a test light-emitting device capable of providing information on a cause of a pixel defect is provided in a transmission unit.

[0011] Additional advantages and features of the present disclosure will be set forth in part in the following description, and in part will become apparent to those of ordinary skill in the art after examining the following, or may be learned from the practice of the present disclosure. The objectives and other advantages of the present disclosure may be realized and obtained through the structures particularly pointed out in the written description, its claims, and the drawings.

[0012] To achieve these and other advantages and in accordance with the purposes of the present disclosure, as embodied and broadly described herein, a light-emitting display device is provided, the light-emitting display device including a substrate, pixels disposed in a light-emitting area, and a test light-emitting device connected to the light-emitting device disposed in the pixels and disposed in a transmission area, the substrate including a light-emitting area that displays an image and a transmission area through which light is transmitted.

[0013] It is to be understood that both the foregoing general description and the following detailed description of the present disclosure are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this application. They illustrate embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure. In the drawings:

[0015] Figure 1 is an exemplary diagram showing a configuration of a light emitting display device according to an embodiment of the present disclosure;

[0016] Figure 2 is an exemplary diagram showing a structure of a pixel applied to a light-emitting display device according to an embodiment of the present disclosure;

[0017] Figure 3 is an exemplary diagram showing the structure of a control driver applied to a light emitting display device according to an embodiment of the present disclosure;

[0018] Figure 4 is an exemplary diagram showing a structure of a gate driver applied to a light emitting display device according to an embodiment of the present disclosure;

[0019] Figure 5 is an exemplary diagram showing a structure of a data driver applied to a light emitting display device according to an embodiment of the present disclosure;

[0020] Figure 6 It is shown that the arrangement Figure 1 A plan view of pixels in a region K;

[0021] Figure 7 is another exemplary diagram showing the structure of a pixel applied to a light-emitting display device according to an embodiment of the present disclosure;

[0022] Figure 8 is an exemplary diagram showing a light emitting area and a transmissive area applied to a light emitting display device according to an embodiment of the present disclosure;

[0023] Fig. 9 is another exemplary diagram showing a light emitting area and a transmissive area applied to a light emitting display device according to an embodiment of the present disclosure;

[0024] Fig.10 is an exemplary diagram showing a cross-sectional surface of a light-emitting display panel applied to a light-emitting display device according to an embodiment of the present disclosure;

[0025] Fig.11 It shows Figure 6 A plan view of area A;

[0026] Fig.12 It is shown along Fig.11 An exemplary illustration of a cross-sectional surface taken along line AA' of FIG.

[0027] Fig.13 It is shown along Fig.11 An exemplary illustration of a cross-sectional surface taken along line BB' of FIG.

[0028] Fig.14 yes Fig.13 an enlarged cross-sectional view of area B1 is shown; and

[0029] Fig.15 yes Fig.13 An enlarged cross-sectional view of area B2 is shown. DETAILED DESCRIPTION

[0030] Reference will now be made in detail to exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or like parts.

[0031] The advantages and features of the present disclosure and its implementation methods will be explained by the following embodiments described with reference to the accompanying drawings. However, the present disclosure can be embodied in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art.

[0032] The shapes, sizes, ratios, angles, and quantities disclosed in the drawings for describing the embodiments of the present disclosure are merely examples, and therefore, the present disclosure is not limited to the details shown. Similar reference numerals refer to similar elements throughout. In the following description, when it is determined that a detailed description of a related known function or configuration unnecessarily obscures the main points of the present disclosure, the detailed description will be omitted. When "including", "having", and "comprising" described in this specification are used, another part may be added unless "only" is used. Unless otherwise specified, terms in the singular may include plural forms.

[0033] When constructing an element, the element is interpreted as including an error or tolerance range even though there is no explicit description of such error or tolerance range.

[0034] When describing a positional relationship, for example, when the positional relationship between two parts is described as, for example, "on," "over," "below," and "adjacent," one or more other parts may be disposed between the two parts, unless more restrictive terms such as "just" or "directly" are used.

[0035] When describing temporal relationships, for example, when a temporal order is described as, for example, "after," "subsequently," "next," and "before," discontinuities may be included unless more restrictive terms such as "just," "immediately," or "directly" are used.

[0036] It should be understood that although the terms "first", "second", etc. can be used to describe various elements in this article, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the present disclosure, the first element can be referred to as the second element, and similarly, the second element can be referred to as the first element.

[0037] When describing the elements of the present disclosure, the terms "first", "second", "A", "B", "(a)", "(b)", etc. may be used. These terms are intended to identify the corresponding elements from other elements, and the basis, order or quantity of the corresponding elements should not be limited by these terms. The expression that an element is "connected", "coupled" or "attached" to another element or layer - unless otherwise specified, the element or layer can be not only directly connected or attached to another element or layer, but also indirectly connected or attached to another element or layer through one or more intervening elements or layers "disposed" or "interposed" between the elements or layers.

[0038] The term "at least one" should be understood to include any and all combinations of one or more of the related listed items. For example, the meaning of "at least one of the first item, the second item, and the third item" means a combination of two or more of the first item, the second item, and the third item, as well as all items set forth in the first item, the second item, or the third item.

[0039] As those skilled in the art can fully understand, the features of the various embodiments of the present disclosure can be coupled or combined with each other in part or in whole, and can technically realize various mutual operations of driving and each other. The embodiments of the present disclosure can be performed independently of each other, or can be performed together in a mutually dependent relationship.

[0040] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0041] Figure 1 is an exemplary diagram showing a configuration of a light emitting display device according to an embodiment of the present disclosure, Figure 2 is an exemplary diagram showing the structure of a pixel applied to a light-emitting display device according to an embodiment of the present disclosure, Figure 3 is an exemplary diagram showing the structure of a control driver applied to a light emitting display device according to an embodiment of the present disclosure, Figure 4 is an exemplary diagram showing the structure of a gate driver applied to a light emitting display device according to an embodiment of the present disclosure, and Figure 5 is an exemplary diagram showing a structure of a data driver applied to a light emitting display device according to an embodiment of the present disclosure.

[0042] The light-emitting display device according to the embodiment of the present disclosure can be used as various electronic devices. The electronic device can be, for example, a television, a monitor, etc.

[0043] like Figure 1 As shown, the light-emitting display device according to an embodiment of the present disclosure may include: a light-emitting display panel 100, the light-emitting display panel 100 includes a display area DA for displaying an image and a non-display area NDA arranged outside the display area DA; a gate driver 200 that supplies a gate signal GS to a plurality of gate lines GL1 to GLg arranged in the display area DA of the display panel 100; a data driver 300 that supplies a data voltage Vdata to a plurality of data lines DL1 to DLd arranged in the display area DA of the display panel 100; a control driver 400 that controls the driving of the gate driver 200 and the data driver 300; and a power supply 500 that supplies power to the control driver 400, the gate driver 200, the data driver 300 and the light-emitting display panel 100.

[0044] The light-emitting display panel 100 may include a display area DA and a non-display area NDA. Gate lines GL1 to GLg, data lines DL1 to DLd, and pixels P may be disposed in the display area DA. Thus, an image may be output in the display area DA. Here, g and d are natural numbers. The non-display area NDA may surround the periphery of the display area DA.

[0045] like Figure 2 As shown, a pixel P included in the light-emitting display panel 100 may include a pixel driving circuit PDC including a switching transistor Tsw1, a storage capacitor Cst, a driving transistor Tdr, and a sensing transistor Tsw2, and a light-emitting device ED connected to the pixel driving circuit PDC.

[0046] A first terminal of the driving transistor Tdr may be connected to a first voltage supply line through which a first voltage EVDD is supplied, and a second terminal of the driving transistor Tdr may be connected to the light emitting device ED.

[0047] A first terminal of the switching transistor Tsw1 may be connected to the data line DL, a second terminal of the switching transistor Tsw1 may be connected to the gate of the driving transistor Tdr, and a gate of the switching transistor Tsw1 may be connected to the gate line GL.

[0048] The data voltage Vdata may be supplied through the data line DL from the data driver 300. The gate signal GS may be supplied through the gate line GL from the gate driver 200. The gate signal GS may include a gate pulse GP for turning on the switching transistor Tsw1 and a gate-off signal for turning off the switching transistor Tsw1.

[0049] The sensing transistor Tsw2 may be provided for measuring the threshold voltage or mobility of the driving transistor Tdr, or for supplying the reference voltage Vref to the pixel driving circuit PDC. The first terminal of the sensing transistor Tsw2 may be connected to the second terminal of the driving transistor Tdr and the light emitting device ED, the second terminal of the sensing transistor Tsw2 may be connected to the sensing line SL, the reference voltage Vref is supplied through the sensing line SL, and the gate of the sensing transistor Tsw2 may be connected to the sensing control line SCL, the sensing control signal SCS is supplied through the sensing control line SCL.

[0050] The sensing line SL may be connected to the data driver 300, and may be connected to the power source 500 through the data driver 300. For example, a reference voltage Vref supplied from the power source 500 may be supplied to the pixel through the sensing line SL, a sensing signal transmitted from the pixel P may be converted into a digital sensing signal in the data driver 300, and the digital sensing signal may be transmitted to the control driver 400.

[0051] The light emitting device ED may include a first electrode supplied with a first voltage EVDD through a driving transistor Tdr, a second electrode connected to a second voltage supply line PLB through which the second voltage is supplied, and a light emitting layer disposed between the first electrode and the second electrode.

[0052] like Figure 2 As shown, the pixel P applied to the present disclosure may include a test light emitting device TED disposed between an anode of the light emitting device ED and a gate of the switching transistor Tsw2.

[0053] The following will refer to Figures 6 to 15 The structure and function of the test light emitting device TED are described in detail.

[0054] The structure of the pixel P applied to the present disclosure is not limited to Figure 2 Therefore, the structure of the pixel P can be changed into various shapes.

[0055] The control driver 400 may realign the input image data Ri, Gi, and Bi transmitted from the external system by using the timing synchronization signal TSS transmitted from the external system 600 , and may generate a data control signal DCS to be supplied to the data driver 300 and a gate control signal GCS to be supplied to the gate driver 200 .

[0056] For this reason, Figure 3 As shown, the control driver 400 may include a data aligner 430, a control signal generator 420, an input unit 410, and an output unit 440. The data aligner realigns the input image data Ri, Gi, and Bi to generate image data Data and transmits the image data Data to the data driver 300. The control signal generator generates a gate control signal GCS and a data control signal DCS by using a timing synchronization signal TSS. The input unit 410 transmits the timing synchronization signal TSS transmitted from the external system 600 to the control signal generator 420 and transmits the input image data Ri, Gi, and Bi transmitted from the external system 600 to the data aligner 430. The output unit 440 supplies the image data Data generated by the data aligner 430 and the data control signal DCS generated by the control signal generator 420 to the data driver 300, and supplies the gate control signal GCS generated by the control signal generator 420 to the gate driver 200.

[0057] The control signal generator 420 may generate a power control signal supplied to the power supply 500 .

[0058] The control driver 400 may further include a storage unit for storing various information. The storage unit 450 may be included in the control driver 400, such as Figure 3 As shown, but can be separated from the control driver 400 and independently provided.

[0059] The external system 600 may perform a function of driving and controlling the driver 400 and the electronic device.

[0060] For example, when the electronic device is a television (TV), the external system 600 may receive various sound information, image information, and letter information through a communication network, and may transmit the received image information to the control driver 400. For example, the external system 600 may convert the image information into input image data Ri, Gi, and Bi, and transmit the input image data Ri, Gi, and Bi to the control driver 400.

[0061] The power supply 500 may generate various powers and supply the generated powers to the control driver 400 , the gate driver 200 , the data driver 300 , and the light-emitting display panel 100 .

[0062] The gate driver 200 may be directly embedded in the non-display area NDA by using a gate in panel (GIP) type, or the gate driver 200 may be disposed in the display area DA in which the light emitting device ED is disposed, or may be disposed on a chip on film mounted in the non-display area NDA.

[0063] The gate driver 200 may supply gate pulses GP1 to GPg to the gate lines GL1 to GLg.

[0064] The switching transistor Tsw1 may be turned on when the gate pulse GP generated by the gate driver 200 is supplied to the gate of the switching transistor Tsw1 included in the pixel P. When the switching transistor Tsw1 is turned on, the pixel P may be supplied with a data voltage Vdata supplied through the data line DL.

[0065] When the gate-off signal generated by the gate driver 200 is supplied to the switching transistor Tsw1, the switching transistor Tsw1 may be turned off. When the switching transistor Tsw1 is turned off, the data voltage may no longer be supplied to the pixel P.

[0066] The gate signal GS supplied to the gate line GL may include a gate pulse GP and a gate-off signal.

[0067] In order to supply gate pulses GP1 to GPg to the gate lines GL1 to GLg, as shown in FIG. Figure 4 As shown, the gate driver 200 may include stages ST1 to STg connected to the gate lines GL1 to GLg.

[0068] Each of the stages ST1 to STg may be connected to one gate line GL, but may be connected to at least two gate lines GL.

[0069] In order to generate the gate pulses GP1 to GPg, the gate start signal VST and at least one gate clock GCLK generated by the control signal generator 420 may be transmitted to the gate driver 200. For example, the gate start signal VST and at least one gate clock GCLK may be included in the gate control signal GCS.

[0070] One of the stages ST1 to STg may be driven by the gate start signal VST to output a gate pulse GP to the gate line GL. The gate pulse GP may be generated by the gate clock GCLK.

[0071] At least one of the signals output from the stage ST outputting the gate pulse may be supplied to another stage ST to drive the other stage ST. Therefore, the gate pulse may be output in the other stage ST.

[0072] For example, the stages ST may be sequentially driven to sequentially supply the gate pulses GP to the gate lines GL.

[0073] The data driver 300 may supply a data voltage Vdata to the data lines DL1 to DLd.

[0074] For this reason, Figure 5 As shown, the data driver 300 may include a shift register 310 that outputs a sampling signal, a latch 320 that latches the image data Data received from the control driver 400, a digital-to-analog converter 330 that converts the image data Data sent from the latch 320 into a data voltage Vdata and outputs the data voltage Vdata, and an output buffer 340 that outputs the data voltage sent from the digital-to-analog converter 300 to the data line DL based on a source output enable signal SOE.

[0075] The shift register 310 may output a sampling signal by using the data control signal DCS received from the control signal generator 420. For example, the data control signal DCS transmitted to the shift register 310 may include a source start pulse SSP and a source shift clock signal SSC.

[0076] The latch 320 may latch the image data Data sequentially received from the control driver 400 and then simultaneously output the image data Data to the digital-to-analog converter 330 based on the sampling signal.

[0077] The digital-to-analog converter 330 may convert the image data Data transmitted from the latch 320 into a data voltage Vdata and output the data voltage Vdata.

[0078] The output buffer 340 may simultaneously output the data voltage Vdata transmitted from the digital-to-analog converter 330 to the data lines DL1 to DLd of the light-emitting display panel 100 based on the source output enable signal SOE transmitted from the control signal generator 420 .

[0079] To this end, the output buffer 340 may include a buffer 341 storing the data voltage Vdata transmitted from the digital-to-analog converter 330 and a switch 342 outputting the data voltage Vdata stored in the buffer 341 to the data line DL based on a source output enable signal SOE.

[0080] For example, when the switch 342 is turned on based on the source output enable signal SOE simultaneously supplied to the switch 342 , the data voltage Vdata stored in the buffer 341 may be supplied to the data lines DL1 to DLd through the switch 342 .

[0081] The data voltage Vdata supplied to the data lines DL1 to DLd may be supplied to the pixels P connected to the gate line GL supplied with the gate pulse GP.

[0082] Figure 6 It is shown that the arrangement Figure 1 In the following description, the pixel in the region K is omitted or briefly described. Figures 1 to 5 The details are the same or similar to those described.

[0083] A light emitting display panel applied to a light emitting display device according to an embodiment of the present disclosure may include a transmission area TA and a non-transmission area NTA.

[0084] For example, the display area DA of the light-emitting display panel 100 may include a transmission area TA (or referred to as a transparent area) and a non-transmission area NTA.

[0085] The transmission area TA may be an area that allows most of the light incident from the outside to pass through. The non-transmission area NTA may be an area that does not transmit most of the light incident from the outside. In addition, the non-transmission area NTA may refer to an area where the pixel P is disposed. Thus, the non-transmission area NTA is less transmissive to external light than the transmission area TA.

[0086] Due to the transmissive area TA, an object or a background located on the rear side of the light-emitting display panel 100 may be seen from the front side of the light-emitting display panel 100 .

[0087] The non-transmission area NTA may be disposed between adjacent transmission areas TA, and the pixels P and the signal lines may be disposed in the non-transmission area NTA.

[0088] In particular, the non-transmission area NTA may include a light emitting area EA in which light is emitted and a non-light emitting area NEA in which light is not emitted.

[0089] Light may be emitted by the light emitting device ED in the emission area EA of the non-transmission area NTA, and a pixel driving circuit PDC configuring a pixel P and a signal line connected to the pixel may be disposed in the non-emission area of ​​the non-transmission area NTA.

[0090] In the following description, the light emitting area EA may refer to a pixel P, a light emitting device ED outputting light, an anode configuring the light emitting device ED, or an area actually outputting light.

[0091] A bank surrounding the light emitting area EA may be provided in the non-light emitting area.

[0092] The signal line may include a first signal line extending in a first direction (or Y-axis direction) in the non-transmission area NTA and a second signal line extending in a second direction (or X-axis direction) different from the first direction. For example, the first signal line may include a data line DL and a sensing line SL, and the second signal line may include a gate line GL and a sensing control line SCL.

[0093] A unit pixel UP including at least three pixels P may be provided in the non-transmission area NTA. White light may be emitted by the unit pixel UP. Hereinafter, for ease of description, a unit pixel UP including four pixels P1, P2, P3, and P4 will be used as an example to describe the light emitting display device according to an embodiment of the present disclosure.

[0094] For example, the unit pixel UP may include a first pixel P1, a second pixel P2, a third pixel P3, and a fourth pixel P4.

[0095] The first pixel P1 may include a first light emitting area EA emitting light of a first color, the second pixel P2 may include a second light emitting area EA emitting light of a second color, the third pixel P3 may include a third light emitting area EA emitting light of a third color, and the fourth pixel P4 may include a fourth light emitting area EA emitting light of a fourth color.

[0096] For example, the first light emitting area EA may emit blue light, the second light emitting area EA may emit red light, the third light emitting area EA may emit green light, and the fourth light emitting area EA may emit white light.

[0097] However, in addition to the combination of pixels emitting the above colors, the unit pixel UP may also be configured to include a combination of pixels emitting other colors. For example, as described above, the four pixels P1, P2, P3, and P4 may emit blue light, red light, green light, and white light, but the present disclosure is not limited thereto. Therefore, the four pixels P1, P2, P3, and P4 may emit another combination of color light.

[0098] The transmission area TA may be disposed between adjacent non-transmission areas NTA, and the light emitting device ED and the pixel driving circuit PDC configuring the pixels P1, P2, P3, and P4 may not be disposed in the transmission area TA.

[0099] For example, non-transmissive elements or opaque elements may not be provided in the transmission area TA, and thus, the transmission area TA may be an area having high light transmittance.

[0100] For example, the transmission area TA may not overlap with the pixel driving circuit PDC configuring the pixels P1, P2, P3, and P4. In addition, the transmission area TA may not overlap with the light emitting device configuring the pixels P1, P2, P3, and P4.

[0101] For example, Figure 6 As shown, the transmission areas TA may be arranged along the first direction (or the Y-axis direction), and may be alternately arranged with the non-transmission areas NTA along the second direction (or the X-axis direction).

[0102] In this case, as described above, the second signal line including the gate line GL and the sensing control line SCL may be disposed along the second direction (or the X-axis direction). Therefore, the second signal line may intersect the transmission area TA disposed along the first direction (or the Y-axis direction). For example, the second signal line may extend from the non-transmission area NTA to the transmission area TA, and may extend through the transmission area TA to reach another non-transmission area NTA.

[0103] As another example, the transmission area TA may be arranged to surround the non-transmission area NTA, or the non-transmission area NTA may be arranged to surround the transmission area TA.

[0104] In the following description, when there is no need to distinguish four pixels P1 , P2 , P3 , and P4 configuring the unit pixel UP, each of the four pixels may be referred to as a pixel P.

[0105] A color filter may be provided to each pixel P. The color of light emitted from each pixel P may be determined by the color of the color filter.

[0106] However, each pixel P may not be provided with a color filter, and in this case, the light emitting device provided in each pixel P may output light of any one color.

[0107] The transmission area TA may be disposed on the left or right side of four pixels P1 , P2 , P3 , and P4 disposed in the unit pixel UP.

[0108] For example, a transmission area TA (e.g., a first transmission area) through which light is transmitted may be provided on the left side of the first pixel P1 and the third pixel P3 provided on the left side of the n-th data line DLn provided in the substrate 101. In addition, a transmission area TA (e.g., a second transmission area) through which light is transmitted may be provided on the right side of the second pixel P2 and the fourth pixel P4 provided on the right side of the n-th data line DLn.

[0109] The light emitting device ED may be provided in each of the light emitting areas EA1, EA2, EA3, and EA4. The light emitting device ED may include an anode supplied with a first voltage EVDD through a driving transistor Tdr, a cathode connected to a second voltage supply line PLB, and a light emitting layer provided between the anode and the cathode, and the second voltage is supplied through the second voltage supply line PLB. Figure 6 The rectangular frame indicated as the light emitting area EA in FIG. 4 may be an anode. For example, the anodes configuring the pixel P may be electrically and physically separated from each other, and light may be output from the light emitting layer overlapping the anode.

[0110] Therefore, the range of the pixel P may be determined by the anode, and the range of the emission area EA may be determined by the anode. Figure 6 A rectangular box indicated as the light emitting area EA in FIG. 4 may be represented as an anode.

[0111] In this case, the light emitting device ED disposed in the light emitting area EA may be connected to the test light emitting device TED disposed in the transmissive area TA on the left or right side of the light emitting area EA.

[0112] The test light emitting device TED may be provided between the light emitting device ED and a sensing control line SCL connected to a gate of a sensing transistor Tsw2 provided in the pixel P. For example, the test light emitting device TED may be connected to an anode of the light emitting device ED and a gate of the sensing transistor Tsw2.

[0113] Here, as described above, the sensing control line SCL may be one of the second signal lines extending from the emission area EA to the transmission area TA. For example, the second signal line may be disposed along the second direction (or the X-axis direction), intersecting the transmission area TA disposed along the first direction (or the Y-axis direction), extending from the non-transmission area NTA to the transmission area TA, and extending through the transmission area TA to another non-transmission area NTA.

[0114] In particular, the anode of the light emitting device ED disposed in the light emitting area EA may be connected to the anode of the test light emitting device TED (hereinafter, simply referred to as a test anode).

[0115] For example, as mentioned above, when Figure 6 When the square frame indicated as the emission area EA is the anode of the light emitting device ED disposed in the emission area EA, the anode of the light emitting device ED may be connected to the test light emitting device TED disposed in the transmission area TA on the left or right side of the emission area EA.

[0116] To provide additional description, the transmission area TA may be disposed on the left or right side of the emission area EA.

[0117] For example, when the transmission area TA is disposed on the left side of the emission area EA, the anode of the light emitting device in the emission area EA may extend to the transmission area TA on the left side and may be connected to the test anode of the test light emitting device TED in the transmission area TA.

[0118] When the transmission area TA is disposed on the right side of the emission area EA, the anode of the light emitting device in the emission area EA may extend to the transmission area TA on the right side and may be connected to the test anode of the test light emitting device TED in the transmission area TA.

[0119] In this case, since the pixel P disposed in the emission area EA is provided with the sensing transistor Tsw2 connected to the sensing control line SCL, the emission area EA may be adjacent to the sensing control line SCL.

[0120] Therefore, the test light emitting device TED may also be adjacent to the sensing control line SCL. Therefore, the test light emitting device TED may be connected to the sensing control line SCL, and in particular, a cathode of the test light emitting device TED (hereinafter, referred to as a test cathode) may be connected to the sensing control line SCL.

[0121] In this case, Figure 6 , a light emitting display panel is shown in which one sensing control line SCL is connected to the pixel at the upper end of the sensing control line SCL and to the pixel at the lower end of the sensing control line SCL. Figure 6 2 shows a light emitting display panel, in which a test light emitting device TED disposed at an upper end of a sensing control line SCL and a test light emitting device TED disposed at a lower end of the sensing control line SCL are connected to one sensing control line SCL.

[0122] However, when the sensing control line SCL is connected only to pixels arranged in a row in the second direction (X-axis direction), only the test light emitting device TED arranged at the upper end of the sensing control line SCL can be connected to the sensing control line SCL, or only the test light emitting device TED arranged at the lower end of the sensing control line SCL can be connected to the sensing control line SCL.

[0123] Here, the upper end or the lower end of the sensing control line SCL refers to Figure 6 , which senses the upward or downward direction of the control line SCL as shown in FIG.

[0124] To provide additional description, the number and structure of the test light emitting devices TED connected to the sensing control line SCL may be changed according to the structure of the pixel driving circuit PDC and the driving method of the pixel driving circuit, and the like.

[0125] refer to Figure 2 A connection structure of the test light emitting device TED, the light emitting device ED, and the sensing control line SCL is described.

[0126] like Figure 2 As described above, the test light emitting device TED may be disposed between the light emitting device ED and the sensing control line SCL connected to the gate of the sensing transistor Tsw2 disposed in the pixel P. As shown in FIG.

[0127] For example, the test light emitting device TED may include a test anode connected to the anode of the light emitting device ED, a test light emitting layer disposed on the test anode, and a test cathode disposed on the test light emitting layer and connected to the gate of the sensing transistor Tsw2 in the pixel P.

[0128] In this case, a first terminal of the sensing transistor Tsw2 may be connected to the anode of the light emitting device ED and the test anode, a second terminal of the sensing transistor Tsw2 may be connected to the sensing line SL, and a gate of the sensing transistor Tsw2 may be connected to the sensing control line SCL and the test cathode.

[0129] In the following, reference will be made to Figures 7 to 9 A method of determining a cause of a defective pixel by using the light emitting display device according to an embodiment of the present disclosure is described.

[0130] Figure 7 is another exemplary diagram showing the structure of a pixel applied to a light-emitting display device according to an embodiment of the present disclosure, Figure 8 is an exemplary diagram showing a light emitting area and a transmissive area applied to a light emitting display device according to an embodiment of the present disclosure, and Fig. 9 is another exemplary diagram illustrating a light emitting area and a transmissive area applied to a light emitting display device according to an embodiment of the present disclosure.

[0131] First, in a manufacturing process of a light-emitting display device according to an embodiment of the present disclosure, a defective pixel determination process may be performed to determine whether a defective pixel exists.

[0132] The defective pixel determination process may be performed directly through the user's eyes, but may also be performed using various types of optical devices.

[0133] For a light-emitting display panel determined to have a defective pixel, a process of determining a cause of the defective pixel may be performed.

[0134] For this reason, Figure 7 As shown, a high voltage VH may be supplied to the cathode of the light emitting device ED, and a low voltage VL lower than the high voltage VH may be supplied to the sensing control line SCL. The high voltage VH may be, for example, a first voltage EVDD, and the low voltage VL may be, for example, a second voltage EVSS. In particular, the second voltage EVSS may be a ground voltage.

[0135] For example, the defect cause determination device may supply a high voltage VH to cathodes commonly provided in the light emitting devices ED of the light emitting display panel 100 , and supply a low voltage VL to a sensing control line SCL provided in the light emitting display panel 100 .

[0136] However, when a user uses a light-emitting display device, such as Figure 2 As shown, a low voltage (e.g., the second voltage EVSS) is supplied to the cathode of the light-emitting device ED, and a high voltage (e.g., the first voltage EVDD) higher than the low voltage is supplied to the anode of the light-emitting device LED, and a sensing control signal SCS that turns on or off the sensing transistor Tsw2 is supplied to the sensing control line SCL.

[0137] In other words, in the process of determining the cause of the defective pixel, a high voltage (e.g., the first voltage EVDD) is supplied to the cathode of the light-emitting device ED, and when the user uses the light-emitting display device, a low voltage (e.g., the second voltage EVSS) is supplied to the cathode of the light-emitting device ED.

[0138] In this case, the control driver 400, the gate driver 200, and the data driver 300 are normally driven. Therefore, the pixel driving circuit PDC can be driven in the same method as when a user uses a light emitting display device.

[0139] Therefore, if Figure 8 As shown, when the defective pixel is caused by the light emitting device ED and the pixel driving circuit PDC is normal, no light is output from the light emitting device ED, and light is output from the test light emitting device TED. That is, the defective light emitting device ED is turned off, and the test light emitting device TED is turned on.

[0140] For example, when the light emitting device ED is defective and the pixel driving circuit PDC is normal, the anode and cathode of the light emitting device ED may be short-circuited. Therefore, the high voltage VH supplied to the cathode of the light emitting device ED may be supplied to the test anode of the test light emitting device TED. Figure 7 In addition, the current and voltage generated in the pixel driving circuit PDC can also be supplied to the test anode of the test light emitting device TED.

[0141] In this case, since the test cathode is connected to the sensing control line SCL, the low voltage VL may be supplied to the test cathode through the sensing control line SCL.

[0142] That is, a high voltage VH, for example, a first voltage EVDD, may be supplied to a test anode of the test light emitting device TED, and a low voltage VL, for example, a second voltage EVSS, may be supplied to a test cathode of the test light emitting device TED.

[0143] Therefore, a normal voltage can be supplied to the test anode and the test cathode of the test light emitting device TED. Figure 8 As shown, the test light emitting device TED may be turned on, and thus light may be output from the test light emitting device TED.

[0144] In this case, the user can determine that the cause of the defective pixel is in the light emitting device.

[0145] Afterwards, the user may perform a more accurate analysis of the light emitting device ED provided in the defective pixel, and based on this, may perform a repair process of repairing the light emitting device ED.

[0146] Finally, as described above, in order to determine the cause of the defective pixel, a high voltage VH may be supplied to the cathode, such as Figure 7 As shown, a low voltage VL lower than the high voltage VH may be supplied to the sensing control line SCL.

[0147] In this case, the control driver 400, the gate driver 200, and the data driver 300 are normally driven. Therefore, the pixel driving circuit PDC can be driven in the same method as when a user uses a light emitting display device.

[0148] Therefore, if Fig. 9 As shown, when the cause of the defective pixel is the pixel driving circuit PDC and the light emitting device ED is normal, no light is output from the light emitting device ED, and no light is output from the test light emitting device TED. That is, the normal light emitting device ED is turned off, and the test light emitting device TED is also turned off.

[0149] For example, since a high voltage (e.g., the first voltage EVDD) is supplied to the anode and cathode of the normal light emitting device ED, light is not output from the light emitting device ED. Therefore, the high voltage VH supplied to the cathode of the light emitting device ED cannot be supplied to the test anode of the test light emitting device TED. Therefore, the test light emitting device TED cannot be driven by the high voltage VH supplied to the cathode of the light emitting device ED, and thus cannot output light.

[0150] In this case, if the pixel driving circuit PDC is driven normally, the driving transistor Tdr can be turned on normally, and therefore, the first voltage EVDD as a high voltage can be supplied to the test anode of the test light-emitting device TED, and the current can be supplied to the test anode through the driving transistor Tdr. In this case, because the test cathode is connected to the sensing control line SCL, the low voltage VL can be supplied to the test cathode through the sensing control line SC.

[0151] Therefore, if the pixel driving circuit PDC is normally driven, the first voltage EVDD and the current may be supplied to the anode of the test light emitting device TED, and thus, light may be output from the test light emitting device TED.

[0152] However, if the pixel driving circuit PDC is defective, the driving transistor Tdr cannot be turned on normally. Therefore, the first voltage EVDD as a high voltage and the current cannot be supplied to the test anode, and thus, light cannot be output from the test light emitting device TED.

[0153] Therefore, if Fig. 9 As shown, when both the light emitting device ED and the test light emitting device TED are turned off, the user can determine that the cause of the defective pixel is in the pixel driving circuit PDC.

[0154] Afterwards, the user may perform a more accurate analysis of the pixel driving circuit PDC provided in the defective pixel, and based on this, may perform a repair process of repairing the pixel driving circuit PDC.

[0155] That is, according to the light emitting display apparatus according to the embodiment of the present disclosure, it can be confirmed whether a defective pixel is caused by a defect in the light emitting device or a defect in the pixel driving circuit PDC.

[0156] If the cause of a defect is identified, a repair process that can address the cause of the defect can be conducted more quickly and accurately.

[0157] Therefore, the yield rate of the light-emitting display panel can be improved, and the manufacturing cycle of the light-emitting display device including the light-emitting display panel can be shortened.

[0158] In the following, reference will be made to Figures 10 to 15The detailed structure of the light emitting display device for performing the above functions according to the embodiment of the present disclosure is described. Figures 1 to 9 The details are the same or similar to those described.

[0159] Fig.10 1 is an exemplary diagram showing a cross-sectional surface of a light-emitting display panel applied to a light-emitting display device according to an embodiment of the present disclosure. Fig.10 , a cross-sectional surface of a region where a driving transistor Tdr and a light emitting device ED are provided in a light emitting display panel is shown. That is, Fig.10 A cross-sectional surface of a pixel P is shown.

[0160] like Fig.10 As shown in the figure, the light-emitting display panel 100 applied to the light-emitting display device according to the embodiment of the present disclosure may include a substrate 101, a pixel driving circuit layer PDL arranged on the substrate 101, a planarization layer 106 arranged on the pixel driving circuit layer PDL to cover the pixel driving circuit layer PDL, an anode AN arranged on the planarization layer 106, a light-emitting layer EL arranged on the anode AN, a cathode CA arranged on the light-emitting layer EL, and an encapsulation layer 107 covering the cathode CA.

[0161] First, the substrate 101 may be a glass substrate or a plastic substrate, but is not limited thereto, and may be formed of one of various films.

[0162] A pixel driving circuit layer PDL including a driving transistor Tdr may be disposed on the substrate 101 .

[0163] A pixel driving circuit PDC including a driving transistor Tdr may be provided in the pixel driving circuit layer PDL. Figure 2 As described above, the pixel driving circuit PDC may include a switching transistor Tsw1, a storage capacitor Cst, a driving transistor Tdr, and a sensing transistor Tsw2. For example, at least two transistors may be provided in the pixel driving circuit layer PDL.

[0164] Each transistor may include an active layer AC including a semiconductor, a gate insulating layer 103 disposed on the active layer AC, and a gate G disposed on the gate insulating layer 103 .

[0165] The gate G may be covered by a gate insulating layer 104 , and various electrodes or wires may be disposed on the gate insulating layer.

[0166] The electrodes or wires disposed on the insulating layer 104 may be covered by the passivation layer 105 , and the passivation layer 105 may be covered by the planarization layer 106 .

[0167] For example, Fig.10The driving transistor Tdr shown may include an active layer AC disposed on a buffer layer 102, a gate insulating layer 103 disposed on the active layer AC, a gate G disposed on the insulating layer 103, an insulating layer 104 covering an upper end of the gate G, a first voltage supply line PLA connected to a first terminal of the driving transistor Tdr, and a passivation layer 105 covering the first voltage supply line PLA. In this case, other transistors disposed in the pixel driving circuit PDC may also be formed to be similar to Fig.10 The shape is similar to the driving transistor Tdr shown in FIG.

[0168] However, the structures of the driving transistor Tdr and other transistors are not limited to Fig.10 The structure of the driving transistor Tdr is shown in . Therefore, the structure of the driving transistor Tdr and other transistors can be changed into various shapes.

[0169] In this case, if Fig.10 As shown in , a light blocking plate LS may be disposed at a lower end of the driving transistor Tdr in order to block external light incident on the active layer AC during a manufacturing process of the light emitting display device or when the light emitting display device is used.

[0170] The light blocking plate LS may be connected to any one of the gate, the first terminal, and the second terminal of the driving transistor Tdr.

[0171] Another light blocking plate formed on the same layer as the light blocking plate LS may be used as various lines, such as a data line.

[0172] Therefore, each of the light blocking plate LS and the other light blocking plate may be provided in a floating state, or may be connected to a signal line to which a voltage is supplied.

[0173] A light shielding plate LS may or may not be provided at the lower end of other transistors provided in the pixel driving circuit layer PDL. That is, the light shielding plate LS may be provided not only at the lower end of the driving transistor Tdr, but also at the lower end of another transistor that needs to block light, and may be provided in an area that needs to block light in an area where no transistor is provided.

[0174] The light blocking plate LS may be disposed on the substrate 101 , the light blocking plate LS may be covered by the buffer layer 102 , and the active layer AC may be disposed on the buffer layer 102 .

[0175] In addition, data lines DL, gate lines GL, sensing control lines SCL, sensing lines SL, and first voltage supply lines PLA connected to the pixel driving circuit PDC may be disposed in the pixel driving circuit layer PDL.

[0176] Hereinafter, a common name of the data line DL, the gate line GL, the sensing control line SCL, the sensing line SL, and the first voltage supply line PLA may be a signal line. That is, at least one signal line may be provided in the pixel driving circuit layer PDL.

[0177] In addition, as described above, the signal line may include a first signal line extending in a first direction (or Y-axis direction) in the non-transmission area NTA, and a second signal line extending in a second direction (or X-axis direction) different from the first direction in the non-transmission area NTA. For example, the first signal line may include a data line DL and a sensing line SL, and the second signal line may include a gate line GL and a sensing control line SCL.

[0178] Each of the buffer layer 102, the gate insulating layer 103, the insulating layer 104, and the passivation layer 105 may be formed of at least one inorganic layer, or at least one organic layer, or at least one inorganic layer and at least one organic layer. The buffer layer 102, the gate insulating layer 103, the insulating layer 104, and the passivation layer 105 may perform an insulating function. Therefore, each of the buffer layer 102, the gate insulating layer 103, the insulating layer 104, and the passivation layer 105 may be referred to as an insulating functional layer.

[0179] The gate electrode of the driving transistor Tdr, the light shielding plate LS, and the signal line are metal. Therefore, a layer provided with at least one of the gate electrode, the light shielding plate LS, and the signal line may be referred to as a metal layer.

[0180] That is, the pixel driving circuit layer PDL may include at least two metal layers and at least two insulating functional layers.

[0181] The planarization layer 106 may be disposed on the pixel driving circuit layer PDL.

[0182] The planarization layer 106 may perform a function of planarizing the uneven upper surface of the pixel driving circuit layer PDL. To this end, the planarization layer 106 may be formed to have a greater thickness than the pixel driving circuit layer PDL, and accordingly, the upper surface of the planarization layer 106 may be planarized.

[0183] The planarization layer 106 may be formed of at least one organic layer, or at least one inorganic layer, or at least one inorganic layer and at least one organic layer.

[0184] An anode An may be provided on the planarization layer 106. The anode may configure the light emitting device ED.

[0185] like Figure 2 and Fig.10As shown, the anode AN is electrically connected to the driving transistor Tdr provided in the pixel driving circuit layer PDL, and is patterned for each pixel P. Therefore, the anodes AN provided in the pixels P are physically and electrically separated from each other.

[0186] The anode AN can be formed of a transparent metal such as indium tin oxide (ITO) or indium zinc oxide (IZO), and can be formed of an opaque metal such as silver (Ag), aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), nickel (Ni), chromium (Cr) and tungsten (W).

[0187] The bank BK may be provided in the planarization layer 106 and may include an opening portion through which the anode AN is exposed.

[0188] For example, the bank BK covers the outer edge of the anode AN to form an opening portion through which light is output from the pixel P. That is, Fig.10 The region of the anode AN not covered by the bank BK is shown as an opening portion. The opening portion may be a light emitting area EA.

[0189] To provide additional description, the bank BK covers the outer edge of the anode AN and may be disposed in the display area DA of the substrate 101 such that the anode AN is exposed.

[0190] The bank BK can prevent light from overlapping between adjacent pixels.

[0191] The bank BK may be formed of at least one inorganic layer, or at least one organic layer, or at least one inorganic layer and at least one organic layer.

[0192] The light emitting layer EL may be provided on the entire surface of the substrate 101 to cover the anode AN and the bank BK.

[0193] The light emitting layer EL may include one of an organic light emitting layer, an inorganic light emitting layer and a quantum dot light emitting layer. Alternatively, the light emitting layer EL may include a stack or combination structure of an organic light emitting layer (or an inorganic light emitting layer) and a quantum dot light emitting layer.

[0194] The light emitting layer EL may include a hole injection layer (HIL), a hole transport layer (HTL), a hole blocking layer (HBL), an electron injection layer (EIL), an electron transport layer (ETL), an electron blocking layer (EBL), and a charge generation layer (CGL).

[0195] In the case where the light-emitting layer EL emits white light, the light-emitting layer EL may include a hole injection layer (HIL) / hole transport layer (HTL), a blue organic layer, an electron injection layer (EIL) / charge generation layer (CGL) / electron transport layer (ETL), a red organic layer, a yellow-green organic layer, an electron injection layer (EIL) / charge generation layer (CGL) / electron transport layer (ETL), a green organic layer, an electron injection layer (EIL) / electron transport layer (ETL) and an organic buffer layer, which are sequentially stacked on the anode AN.

[0196] The light emitting layer EL may include a plurality of layers having various stacking orders in addition to the layers having the stacking order as described above.

[0197] The cathode CA may be disposed on the light emitting layer EL, and particularly, may be disposed in the display area DA and the non-display area NDA in a plate shape.

[0198] For example, the cathode CA configuring the light emitting device ED may be formed as one plate. Therefore, the cathode CA described below may refer to an electrode covering one light emitting device ED, or may refer to an electrode covering all light emitting devices ED.

[0199] However, the cathode electrode CA may be disposed in the display area DA so as to be separated from the test cathode electrode disposed in the transmission area TA.

[0200] In the case where the light emitting device ED emits white light, a color filter may be provided under the anode AN or on the cathode.

[0201] For example, when the light-emitting display panel 100 uses a top emission type, the color filter may be disposed at the upper end of the cathode CA, and when the light-emitting display panel 100 uses a bottom emission type, the color filter may be disposed at the lower end of the anode AN.

[0202] Finally, the cathode CA may be covered by an encapsulation layer 107 .

[0203] The encapsulation layer 107 may be formed of at least one organic layer, or at least one inorganic layer, or at least one inorganic layer and at least one organic layer.

[0204] Moisture and oxygen flowing in from the outside are blocked by the encapsulation layer 107 and may not flow into the light emitting layer EL.

[0205] The color filter may be disposed on the encapsulation layer 107. In this case, the color filter and the encapsulation layer 107 may be covered by an encapsulation substrate.

[0206] However, as described above, a color filter may be provided at the lower end of the anode AN.

[0207] The above cross-sectional structures can be commonly applied to Figure 6All luminous areas EA are shown.

[0208] Fig.11 It is shown Figure 6 A plan view of area A, Fig.12 It is shown along Fig.11 An exemplary illustration of a cross-sectional surface taken along line AA' of Fig.13 It is shown along Fig.11 An exemplary illustration of a cross-sectional surface taken along line BB' of Fig.14 yes Fig.13 is an enlarged cross-sectional view of the area B1 shown in FIG. Fig.15 yes Fig.13 An enlarged cross-sectional view of region B2 is shown in FIG.

[0209] As described above, the test light emitting device TED may be connected to the light emitting device ED provided in the pixel P, and may be provided in the transmission area TA.

[0210] For example, the test light emitting device TED disposed in the transmission area TA may be connected to the light emitting device ED disposed in the light emitting area EA.

[0211] In this case, the test light emitting device TED may be provided between the light emitting device ED and a sensing control line SCL connected to a gate of a sensing transistor Tsw2 provided in the pixel P.

[0212] The sensing control line SCL may extend from the emission area EA to the transmission area TA, and may extend to another emission area EA through the transmission area TA.

[0213] For this reason, Figure 2 and Figure 7 As shown, the test light emitting device TED may include a test anode connected to the anode of the light emitting device ED, a test light emitting layer disposed on the test anode, and a test cathode disposed on the anode and connected to the gate of the sensing transistor Tsw2 disposed in the pixel P.

[0214] In this case, a first terminal of the sensing transistor Tsw2 may be connected to the anode and the test anode, a second terminal of the sensing transistor Tsw2 may be connected to the sensing line SL, and a gate of the sensing transistor Tsw2 may be connected to the sensing control line SCL and the test cathode.

[0215] That is to say, Figure 6 As described in the description and as Figures 11 to 15 As shown in FIG. , the anode AN of the light emitting device ED is separated from the test anode TAN of the test light emitting device TED and may be connected to the test anode TAN through a connection line CL.

[0216] To provide additional information, the test anode TAN can be connected directly to the anode AN, or as Figures 11 to 15 As shown, the connection to the anode AN may be made through a connection line CL provided in a layer different from the test anode TAN and the anode AN.

[0217] First, refer to Fig.11 , the test light emitting device TED including the test anode TAN, the test cathode TCA and the test light emitting layer may be surrounded by the outer anode OAN, and the anode AN may be spaced apart from the test anode TAN (the outer anode OAN is between the anode AN and the test anode TAN). In one embodiment, the outer anode OAN is not connected to the test anode TAN and the anode AN. Fig.11 As shown, the outer anode OAN surrounds boundary holes BH1, BH2, BH3 and BH4.

[0218] The anode AN and the test anode AN may be connected by a connection line CL. In this case, the connection line CL may be provided in a different layer from the test anode TAN and the anode TA.

[0219] In this case, the anode AN may be connected to one side of the connection line CL through the first contact hole CH1 , and the test anode TAN may be connected to the other side of the connection line CL through the second contact hole CH2 .

[0220] That is, as described above, the test anode TAN, the anode AN and the outer anode OAN may be formed in the same layer but may be separated from each other. In particular, the test anode TAN may be completely separated from the anode AN by the above structure and may be electrically connected to the anode AN by the connection line CL.

[0221] To provide additional description, the outer anode OAN may be formed in the process of physically separating the test anode TAN and the anode AN.

[0222] The outer anode OAN may be disposed in the transmission area TA. That is, the outer anode OAN surrounding the test anode TAN may be disposed in the transmission area TA together with the test anode TAN, and the anode AN may be disposed in the emission area EA (or the non-transmission area NTA).

[0223] The light emitting layer EL and the cathode CA extending from the light emitting area EA may be disposed on the external anode OAN. Fig.10 As shown, the light emitting layer EL and the cathode CA of the light emitting device ED provided in the pixel P may extend to the upper end of the external anode OAN.

[0224] The cathode CA disposed on the outer anode OAN may be separated from the test cathode TCA disposed on the test anode TAN. That is, the cathode CA on the outer anode OAN is disconnected from the test cathode TCA.

[0225] For example, the cathode CA and the test cathode TCA may be separated in the first, second, third, and fourth boundary holes BH1, BH2, BH3, and BH4, which surround the test cathode TCA and the test anode TAN.

[0226] To provide additional description, such as Fig.10 The cathode CA of the light emitting device ED disposed in the light emitting area EA as shown may extend to the transmission area TA, for example, may extend to the transmission area TA as shown in FIG. Fig.11 The outer anode OAN surrounding the test light emitting device TED is shown. In this case, the cathode CA can be separated from the test cathode TCA in the first to fourth boundary holes BH1 to BH4. That is, the test cathode TCA of the test light emitting device TED can be separated from the cathode CA of the light emitting device ED.

[0227] The test cathode TCA can be connected to the sense control line SCL, such as Figure 6 and Fig.11 As shown in Figure 2 As shown in , the sensing control line SCL may be connected to the gate of the sensing transistor Tsw2 provided in the pixel P, the first terminal of the sensing transistor Tsw2 may be connected to the anode AN of the light emitting device ED, and the second terminal of the sensing transistor Tsw2 may be connected to the sensing line SL.

[0228] The test cathode TCA and cathode CA may be separated by an undercut provided on the outer side of the test light emitting device TED. That is, in a plan view of the light emitting display device, the undercut between the test light emitting device TED and the light emitting device ED disconnects the test cathode TCA and cathode CA from each other.

[0229] For example, Fig.11 As shown, the first to fourth boundary holes BH1 to BH4 are formed on the outer side of the test light emitting device TED, and undercuts may be formed in the first to fourth boundary holes BH1 to BH4.

[0230] In this case, bordering the undercut, the test cathode TCA cannot be extended further, and bordering the undercut, the cathode CA cannot be extended further.

[0231] For example, when the cathode material is deposited in the entire display area DA, the cathode material may be separated by undercutting. In this case, the cathode material disposed on one side of the undercut may form the cathode CA, and the cathode material disposed on the other side of the undercut may form the test cathode TCA.

[0232] Therefore, the test cathode TCA and the cathode CA may be separated by an undercut provided at the outer side of the test light emitting device TED. The undercut may be provided in the first to fourth boundary holes BH1 to BH4.

[0233] Next, Fig.12 Shown along Fig.11 The cross-sectional surface is taken along the line AA' shown in FIG. That is, Fig.12 A connection structure of the anode AN disposed in the emission area EA and the test anode TAN disposed in the transmission area TA is shown, and an arrangement structure of the external anode OAN and the test anode TAN is shown.

[0234] The test light emitting device TED including the test anode TAN, the test cathode TCA and the test light emitting layer TEL may be surrounded by an outer anode OAN, and the anode AN may be separated from the test anode TAN, wherein the outer anode OAN is interposed between the anode AN and the test anode TAN. Figure 12-13 As shown, the test light emitting layer TEL is on the test anode TAN and the test cathode TCA is on the test light emitting layer TEL, so that the test light emitting layer TEL is between the test anode TAN and the test cathode TCA.

[0235] The anode AN and the test anode TAN may be connected by a connection line CL. In particular, the connection line CL may be provided on a different layer from the test anode TAN and the anode TA.

[0236] For example, Fig.12 As shown, a connection line CL may be disposed on the gate insulating layer 103, and an insulating layer 104, a passivation layer 105, and a planarization layer 106 may be disposed on the connection line CL. An anode AN and a test anode TAN may be disposed on the planarization layer 106.

[0237] A first contact hole CH1 passing through the planarization layer 106, the passivation layer 105 and the insulating layer 104 may be formed in a region where the anode AN and the connection line CL overlap. A second contact hole CH2 passing through the planarization layer 106, the passivation layer 105 and the insulating layer 104 may be formed in a region where the test anode TAN and the connection line CL overlap.

[0238] One side of the connection line CL may be exposed through the first contact hole CH1 , and the other side of the connection line CL may be exposed through the second contact hole CH2 .

[0239] In this case, the anode AN may be connected to one side of the connection line CL through the first contact hole CH1 , and the test anode TAN may be connected to the other side of the connection line CL through the second contact hole CH2 .

[0240] Thus, the anode AN may be connected to the test anode TAN via a connection line CL.

[0241] The test anode TAN, the anode AN, and the outer anode OAN may be formed in the same layer. However, as described above, the anode AN and the test anode TAN are separated from each other and may be connected by a connection line CL.

[0242] In this case, the outer anode OAN and the test anode TAN may be separated from each other in the first boundary hole BH1 and the second boundary hole BH2 and not electrically connected.

[0243] like Fig.11 and Fig.12 As shown, the first to fourth boundary holes BH1 to BH4 may be formed on the outer side of the test light emitting device TED, and undercuts may be formed in the first to fourth boundary holes BH1 to BH4.

[0244] The undercut may be formed by a process in which the passivation layer 105 disposed under the material forming the outer anode OAN and the test anode TAN (hereinafter referred to as the anode material) is etched more than the anode material in the etching process for forming the first to fourth boundary holes BH1 to BH4. That is, in the first to fourth boundary holes BH1 to BH4, the end of the outer anode OAN and the end of the test anode TAN protrude from the end of the passivation layer 105.

[0245] In the first boundary hole BH1 to the fourth boundary hole BH4, the space formed by the end of the anode OAN, the end of the test anode TAN, the passivation layer 105 arranged under the anode AN, the passivation layer 105 arranged under the end of the test anode TAN, and the insulating layer 104 arranged under the passivation layer 105 is called undercut.

[0246] In this case, the test cathode TCA cannot extend further in the undercut, and the cathode CA cannot extend further in the undercut.

[0247] For example, when the cathode material is deposited on the anode AN and the test anode TAN, the cathode material cannot be continuously arranged along the side surface forming the undercut. Therefore, the cathode material can be separated in the undercut, and thus the test cathode TCA and the cathode CA can be separated by the undercut.

[0248] Next, Fig.13 Shown along Fig.11 The cross-sectional surface is taken along the line BB' shown in FIG. That is, Fig.13 An arrangement structure of a test anode TAN and an external anode OAN disposed in the transmission area TA is shown.

[0249] As described above, in the region where the test anode TAN and the connection line CL overlap, the second contact hole BH2 passing through the planarization layer 106 , the passivation layer 105 , and the insulating layer 104 may be formed.

[0250] The other side of the connection line CL may be exposed through the second contact hole CH2 , and the test anode TAN may be connected to the other side of the connection line CL through the second contact hole CH2 .

[0251] Thus, the anode AN may be connected to the test anode TAN via a connection line CL.

[0252] The outer anode OAN and the test anode TAN may be separated from each other in the first to fourth boundary holes BH1 to BH4 and not electrically connected.

[0253] In this case, the test anode TAN may extend to the first boundary hole BH1, the second boundary hole BH2 and the fourth boundary hole BH4, as shown in FIG. Fig.11 and Fig.13 However, the test anode TAN may not extend to the third boundary hole BH3.

[0254] Therefore, the test anode TAN and the outer anode OAN may be separated in the third boundary hole BH3. In this case, the test anode TAN may not be disposed in the third boundary hole BH3. For example, in order to minimize the area of ​​the test anode TAN, the test anode TAN may not extend to the third boundary hole BH3.

[0255] Undercuts may be formed in the first to fourth boundary holes BH1 to BH4 .

[0256] As described above, bordering the undercut, the test cathode TCA cannot extend further, and bordering the undercut, the cathode CA cannot extend further.

[0257] Next, Fig.14 yes Fig.13 An enlarged exemplary illustration of the area B1 shown in FIG.

[0258] The test light emitting device TED including the test anode TAN, the test cathode TCA, and the test light emitting layer TEL may be surrounded by the outer anode OAN, and the outer anode OAN may be spaced apart from the test anode TAN in the first to fourth boundary holes BH1 to BH4.

[0259] In particular, if Fig.13 and Fig.14 As shown, the third boundary hole BH3 may be provided with only the outer anode OAN, and thus, the outer anode OAN may be separated from the test anode TAN.

[0260] The light emitting layer EL and the cathode CA extending from the light emitting area EA may be disposed on the external anode OAN. Fig.10 As shown, the light emitting layer EL and the cathode CA configuring the light emitting device ED disposed in the pixel P may extend to the upper end of the external anode OAN.

[0261] In this case, the cathode CA disposed on the external anode OAN may be separated from the test cathode TCA disposed on the test anode TAN. Therefore, the cathode CA is not electrically connected to the test cathode TCA.

[0262] For example, the cathode CA and the test cathode TCA may be separated in the first boundary hole BH1, the second boundary hole BH2, the third boundary hole BH3, and the fourth boundary hole BH4.

[0263] That is, the first to fourth boundary holes BH1 to BH4 are formed on the outer side of the test light emitting device TED, and undercuts may be formed in the first to fourth boundary holes BH1 to BH4.

[0264] Therefore, the light emitting layer EL and the cathode CA extending from the light emitting area EA to the third boundary hole BH3 may be separated from the test cathode TCA and the test light emitting layer TEL by the undercut provided in the third boundary hole BH3.

[0265] In this case, if Fig.14 As shown, the third contact hole CH3 in which the sensing control line SCL is exposed may be disposed in a region adjacent to the third boundary hole BH3.

[0266] For example, Fig.14 As shown in FIG. 1 , a sensing control line SCL may be disposed on the gate insulating layer 103, and the sensing control line SCL may be exposed through a third contact hole CH3 formed by removing at least one of the insulating layer 104, the passivation layer 105, and the planarization layer 106. That is, a portion of the sensing control line SCL overlaps a portion of the boundary hole (e.g., BH3). A portion of the test cathode electrode TCA is directly connected to the portion of the sensing control line SCL in the boundary hole BH3 via the third contact hole CH3.

[0267] In this case, the test cathode TCA may be connected to the sensing control line SCL through the third contact hole CH3.

[0268] Therefore, in the process of determining the cause of the defective pixel, the low voltage VL may be supplied from the sensing control line SCL to the test cathode TCA.

[0269] at last, Fig.15 yes Fig.13 An enlarged exemplary illustration of the area B2 shown in FIG.

[0270] That is to say, as reference Fig.14 As described above, the test cathode TCA can be connected to the sensing control line SCL through the third contact hole CH3. Fig.15 As shown, the test cathode TCA may be disposed on the bank BK, and the test light emitting layer TEL may be disposed between the bank BK and the test cathode TCA.

[0271] The test anode TAN may be disposed on a planarization layer 106 formed lower than the bank BK.

[0272] In this case, the test light emitting layer TEL and the test cathode TCA disposed on the bank BK may extend along the side surface of the bank BK. Fig.15 As shown in , it is set on the test anode TAN.

[0273] Therefore, the test light emitting device TED including the test anode TAN, the test light emitting layer TEL and the test cathode TCA may be formed.

[0274] According to the present disclosure as described above, the test light emitting device TED may be formed in a shape independent of the light emitting device ED, and may be formed in a size much smaller than that of the light emitting device ED.

[0275] The test light emitting device TED may be used in the process of determining the cause of a defective pixel, and the test light emitting device TED may be used to determine whether the defect cause of the defective pixel is caused by the light emitting device ED or the pixel driving circuit PDC.

[0276] When a user uses the light-emitting display device, a sensing control signal SCS turning on or off the sensing transistor Tsw2 may be supplied to the test cathode TCA of the test light-emitting device TED. Therefore, light may not be output from the test light-emitting device TED through the sensing control signal SCS.

[0277] However, even if light is output from the test light emitting device TED by sensing the control signal SCS, since the size of the test light emitting device TED may be formed much smaller than that of the light emitting device ED, a user may not recognize the light output from the test light emitting device TED.

[0278] Features of the light emitting display device according to the embodiment of the present disclosure are briefly summarized as follows.

[0279] A light-emitting display device according to an embodiment of the present disclosure includes: a substrate including a light-emitting area that displays an image and a transmission area through which light is transmitted; pixels arranged in the light-emitting area; and a test light-emitting device connected to the light-emitting device arranged in the pixel and in the transmission area.

[0280] The test light emitting device is disposed between the light emitting device and a sensing control line connected to a gate of a sensing transistor disposed in a pixel.

[0281] The sensing control line extends from the light emitting area to the transmissive area.

[0282] The test light emitting device includes a test anode connected to an anode of the light emitting device, a test light emitting layer disposed on the test anode, and a test cathode disposed on an upper end of the test anode and connected to a gate of a sensing transistor disposed in a pixel.

[0283] A first terminal of the sensing transistor is connected to an anode of the light emitting device and a test anode, a second terminal of the sensing transistor is connected to a sensing line, and a gate of the sensing transistor is connected to a sensing control line and a test cathode.

[0284] The test anode is connected to the anode through a connection line provided on a layer different from that of the test anode and the anode.

[0285] The test light-emitting device is surrounded by an outer anode, and the anode is spaced apart from the test anode configuring the test light-emitting device, wherein the outer anode is interposed between the anode and the test anode.

[0286] The anode and the test anode are connected by a connecting wire.

[0287] The anode is connected to one side of the connection line through a first contact hole, and the test anode is connected to the other side of the connection line through a second contact hole.

[0288] The external anode is disposed in the transmission region.

[0289] A light emitting layer and a cathode extending from the light emitting region are disposed on the external anode.

[0290] The cathode disposed on the outer anode is separated from the test cathode disposed on the test anode.

[0291] The test cathode of the test light emitting device is separated from the cathode of the light emitting device.

[0292] The test cathode is connected to a sensing control line connected to a gate of a sensing transistor disposed in a pixel, a first terminal of the sensing transistor is connected to an anode of the light emitting device, and a second terminal of the sensing transistor is connected to the sensing line.

[0293] The test cathode and the cathode are separated by an undercut provided on the outer side of the test light-emitting device.

[0294] The anode of the light emitting device is connected to a test anode of the test light emitting device.

[0295] The light-emitting display device according to the present disclosure can be applied to all electronic devices including light-emitting display panels. For example, the light-emitting display device according to the present disclosure can be applied to virtual reality (VR) devices, augmented reality (AR) devices, mobile devices, video phones, smart watches, watch phones or wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, bending devices, electronic notebooks, electronic books, PMP (portable multimedia player), PDA (personal digital assistant), MP3 players, mobile medical devices, desktop PCs, laptop PCs, netbook computers, workstations, navigation, car navigation, vehicle display devices, televisions, wallpaper display devices, signage devices, gaming devices, laptops, monitors, cameras, video cameras, and home appliances.

[0296] According to the light-emitting display device according to the embodiment of the present disclosure, during the manufacturing process of the light-emitting display device, it can be clearly determined whether the cause of the defective pixel is the light-emitting device or the pixel driving circuit, and thus, an appropriate repair process can be performed on the defective pixel.

[0297] Therefore, the final number of defective pixels can be reduced, and the number of defective light-emitting display panels can be reduced.

[0298] The above-mentioned features, structures and effects of the present disclosure are included in at least one embodiment of the present disclosure, but are not limited to only one embodiment. In addition, the features, structures and effects described in at least one embodiment of the present disclosure can be realized by a combination or modification of other embodiments by those skilled in the art. Therefore, the contents associated with the combination and modification should be interpreted as being within the scope of the present disclosure.

[0299] It is obvious to those skilled in the art that various modifications and changes can be made in the present disclosure without departing from the spirit or scope of the present disclosure. Therefore, it is intended that the present disclosure covers modifications and changes of the present disclosure as long as they fall within the scope of the appended claims and their equivalents.

Claims

1. A light-emitting display device, comprising: a substrate including a light emitting region that displays an image and a transmissive region through which light is transmitted; A pixel, wherein the pixel is arranged in the light emitting area; as well as A test light emitting device is connected to the light emitting device disposed in the pixel and disposed in the transmission area.

2. The light emitting display device according to claim 1, wherein: The test light emitting device is disposed between the light emitting device and a sensing control line connected to a gate of a sensing transistor disposed in the pixel.

3. The light emitting display device according to claim 2, wherein: The sensing control line extends from the light emitting area to the transmission area.

4. The light emitting display device according to claim 1, wherein: The test lighting device comprises: a test anode connected to the first anode of the light emitting device; a test light-emitting layer, the test light-emitting layer being disposed on the test anode; and A test cathode is disposed on an upper end of the test anode and connected to a gate of a sensing transistor disposed in the pixel.

5. The light emitting display device according to claim 4, wherein: A first terminal of the sensing transistor is connected to a first anode of the light emitting device and the test anode, A second terminal of the sensing transistor is connected to a sensing line, and The gate of the sensing transistor is connected to a sensing control line and the test cathode.

6. The light emitting display device according to claim 4, wherein: The test anode is connected to the first anode through a connection line provided on a different layer from the test cathode and the first anode.

7. The light emitting display device according to claim 1, wherein: The test light emitter is surrounded by an outer anode, and The first anode is spaced apart from a test anode configured with the test light emitting device, and the external anode is interposed between the anode and the test anode.

8. The light emitting display device according to claim 7, wherein: The first anode and the test anode are connected via a connecting wire.

9. The light emitting display device according to claim 7, wherein: The first anode is connected to one side of the connection line through a first contact hole, and the test anode is connected to the other side of the connection line through a second contact hole.

10. The light emitting display device according to claim 7, wherein: The external anode is disposed in the transmission region.

11. The light emitting display device according to claim 7, wherein: A light emitting layer and a cathode extending from the light emitting region are disposed on the external anode.

12. The light emitting display device according to claim 11, wherein: The cathode disposed on the external anode is separated from a test cathode disposed on the test anode.

13. The light emitting display device according to claim 1, wherein: The test cathode of the test light emitting device is separated from the cathode of the light emitting device.

14. The light emitting display device according to claim 13, wherein: The test cathode is connected to the sensing control line, The sensing control line is connected to a gate of a sensing transistor provided in the pixel, A first terminal of the sensing transistor is connected to a first anode of the light emitting device, and A second terminal of the sensing transistor is connected to a sensing line.

15. The light emitting display device according to claim 13, wherein: The test cathode and the cathode are separated by an undercut provided on the outer side of the test light-emitting device.

16. The light emitting display device according to claim 1, wherein: The first anode of the light emitting device is connected to a test anode of the test light emitting device.

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