A method, apparatus, terminal equipment, and storage medium for fault location in a distribution network containing distributed power sources.

Abstract

This invention discloses a method, apparatus, terminal equipment, and storage medium for fault location in distribution networks containing distributed generation (DG). It calculates the node current matrix and node voltage matrix of the DG in adjacent nodes based on the target current matrix, target voltage matrix, line impedance matrix, and line admittance matrix of the current target node, and then constructs a fault simulation model. By assuming a fault occurs between the target node and the adjacent nodes, it calculates the fault voltage matrix of the virtual fault location. The virtual fault location corresponding to the fault voltage matrix is ​​then compared with the fault distance to the target node and the length of the target line to confirm whether the fault location in the distribution network is on the current target line. Therefore, this invention fully considers the impact of DG on line voltage and current and achieves rapid fault location in distribution networks by solving the fault simulation model.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of power technology, and in particular to a power distribution network fault location method and device containing distributed power sources, a terminal device and a storage medium. BACKGROUND

[0002] Faults or short circuits in power distribution networks are considered to be the main cause of system user power supply interruption and responsible for power quality disturbances. One of the effective ways to improve these indicators is to develop and apply short circuit location algorithms. Because the faster and more accurate they locate, the power system can be quickly restored, thereby reducing the time of supply interruption and the damage caused.

[0003] Traditional power distribution network fault location algorithms are usually based on fault impedance. By comparing the changes in current and voltage data before and after the fault, or using the information of circuit breaker tripping and relay action, combined with the topology and parameters of the system, impedance measurement technology is used to locate the fault position. This method is effective in many cases, but they are not accurate enough or slow in response for complex or multi-fault scenarios, and when there are distributed power sources in the power distribution network, the impedance algorithm may be difficult to accurately analyze the relationship between voltage and current, thereby affecting the reliability of fault location. SUMMARY

[0004] The embodiments of the present application provide a power distribution network fault location method and device containing distributed power sources, terminal equipment and storage medium, which fully considers the influence of distributed power sources on line voltage and current, and realizes the rapid positioning of power distribution network faults by solving the fault simulation model.

[0005] An embodiment of the present application provides a power distribution network fault location method containing distributed power sources, comprising:

[0006] Obtaining the topology of the power distribution network, the line impedance matrix of the lines between nodes, the line admittance matrix of the lines between nodes, the current matrix of the starting node, and the voltage matrix of the starting node; wherein, except for the starting node, other nodes in the power distribution network are loaded with distributed power sources;

[0007] According to the topology, the line impedance matrix, the line admittance matrix, the current matrix and the voltage matrix, repeatedly performing fault location operation until the fault position of the power distribution network is determined;

[0008] Wherein, the fault location operation comprises:

[0009] Obtaining the target node, the target current matrix of the target node, and the target voltage matrix; wherein, initially, the target node is the starting node;

[0010] According to the topology structure, an adjacent node adjacent to the target node is determined, and a target impedance matrix and a target admittance matrix of a target line between the target node and the adjacent node are determined;

[0011] According to the target current matrix, the target voltage matrix, the target impedance matrix, and the target admittance matrix, a node current matrix of a distributed power supply in the adjacent node is calculated;

[0012] According to the target current matrix, the target voltage matrix, and the node current matrix, a fault simulation model of the target line is constructed; wherein the fault simulation model is used to assume that a virtual fault position is located between the target node and the adjacent node, and calculate a fault voltage matrix of the virtual fault position;

[0013] The fault simulation model is solved to calculate the fault voltage matrix, and determine a target fault distance of the corresponding virtual fault position and the target node;

[0014] When it is determined that the target fault distance is greater than the length of the target line, the adjacent node, the node current matrix, and the node voltage matrix are taken as the target node, the target current matrix, and the target voltage matrix required for the next round of fault positioning operation;

[0015] When it is determined that the target fault distance is not greater than the length of the target line, the virtual fault position is taken as the fault position of the power distribution network.

[0016] Further, the fault simulation model is:

[0017]

[0018] wherein V F abc is a fault voltage matrix of a virtual fault position, D is a fault distance between the target node and the virtual fault position, a(D) is a first coefficient, V′ LG abc k is a target voltage matrix, b(D) is a second coefficient, R is a fault resistance of the virtual fault position, α is a first weight of the target current matrix, I′ abc k is a target current matrix, β is a second weight of the node current matrix, I abc GD i is a node current matrix of an i-th distributed power supply in the adjacent node, and N is a total number of the distributed power supplies in the adjacent node.

[0019] Further, the solving of the fault simulation model, the calculation of the fault voltage matrix, and the determination of the fault distance of the corresponding virtual fault position and the target node include:

[0020] Taking a maximum value of three-phase voltage values in a fault voltage matrix as a target value, and constructing a target function taking minimization of the target value as a target;

[0021] According to the target function, a preset meta-heuristic algorithm is used to continuously optimize a fault distance and a fault resistance in the fault simulation model until a minimum target value is generated, wherein the meta-heuristic algorithm includes a genetic algorithm, a particle swarm optimization algorithm, and a simulated annealing algorithm;

[0022] The last optimized fault resistance and the fault distance are determined as the target fault distance and the target fault resistance.

[0023] Further, after the fault simulation model of the target line is constructed according to the target current matrix, the target voltage matrix, and the node current matrix, the method further includes:

[0024] According to a preset interval, a plurality of to-be-evaluated fault points are acquired from the target line;

[0025] According to the fault simulation model, a to-be-evaluated voltage matrix of each to-be-evaluated fault point under a plurality of preset fault resistances is calculated;

[0026] A maximum three-phase voltage value in the plurality of to-be-evaluated voltage matrices is taken as a to-be-evaluated value and added to a preset to-be-evaluated set;

[0027] It is determined whether the adjacent node is the last node in the power distribution network;

[0028] If not, the adjacent node, the node current matrix, and the node voltage matrix are taken as a target node, a target current matrix, and a target voltage matrix required for a next round of fault positioning operation;

[0029] If yes, a plurality of to-be-evaluated values in the to-be-evaluated set are compared, and a to-be-evaluated voltage matrix corresponding to a minimum to-be-evaluated value is taken as a target voltage matrix;

[0030] A to-be-evaluated fault point corresponding to the target voltage matrix is taken as a fault position of the power distribution network.

[0031] Another embodiment of the application provides a power distribution network fault positioning device containing a distributed power supply, which includes:

[0032] A data acquisition module is configured to acquire a topological structure of a faulted power distribution network, a line impedance matrix of lines between nodes, a line admittance matrix of the lines between the nodes, a current matrix of a starting node, and a voltage matrix of the starting node; wherein, except for the starting node, other nodes in the power distribution network are loaded with distributed power supplies;

[0033] a fault locating module configured to repeatedly perform a fault locating operation according to the topology, the line impedance matrix, the line admittance matrix, the current matrix, and the voltage matrix until a fault position of the power distribution network is determined;

[0034] wherein the fault locating operation comprises:

[0035] obtaining a target node, a target current matrix of the target node, and a target voltage matrix; wherein initially, the target node is the starting node;

[0036] determining, according to the topology, an adjacent node adjacent to the target node, and determining a target impedance matrix and a target admittance matrix of a target line between the target node and the adjacent node;

[0037] calculating, according to the target current matrix, the target voltage matrix, the target impedance matrix, and the target admittance matrix, a node current matrix of a distributed power source in the adjacent node;

[0038] constructing, according to the target current matrix, the target voltage matrix, and the node current matrix, a fault simulation model of the target line; wherein the fault simulation model is configured to assume that a virtual fault position is located between the target node and the adjacent node, and to calculate a fault voltage matrix of the virtual fault position;

[0039] solving the fault simulation model to calculate the fault voltage matrix and determine a target fault distance of the virtual fault position from the target node;

[0040] when it is determined that the target fault distance is greater than a length of the target line, taking the adjacent node, the node current matrix, and the node voltage matrix as the target node, the target current matrix, and the target voltage matrix required for a next round of fault locating operation;

[0041] when it is determined that the target fault distance is not greater than the length of the target line, taking the virtual fault position as the fault position of the power distribution network.

[0042] Further, the fault simulation model is:

[0043]

[0044] wherein V F abc is a fault voltage matrix of the virtual fault position, D is a fault distance between the target node and the virtual fault position, a(D) is a first coefficient, V′ LG abc k is the target voltage matrix, b(D) is a second coefficient, R is a fault resistance of the virtual fault position, a is a first weight of the target current matrix, I′abc k is a target current matrix, β is a second weight of a node current matrix, I abc GD i is a node current matrix of an i-th distributed power supply in a neighboring node, and N is a total number of distributed power supplies in the neighboring node.

[0045] Further, the solving of the fault simulation model, the calculation of a fault voltage matrix, and the determination of a corresponding virtual fault position and a fault distance of the target node include:

[0046] Taking a maximum value of three-phase voltage values in the fault voltage matrix as a target value, and constructing a target function taking the minimization of the target value as a target;

[0047] According to the target function, a preset meta-heuristic algorithm is used to constantly optimize the fault distance and the fault resistance in the fault simulation model until the smallest target value is generated; wherein the meta-heuristic algorithm includes a genetic algorithm, a particle swarm optimization algorithm, and a simulated annealing algorithm.

[0048] The last optimized fault resistance and the fault distance are determined as the target fault distance and the target fault resistance.

[0049] Further, after the construction of the fault simulation model of the target line according to the target current matrix, the target voltage matrix, and the node current matrix, the method further includes:

[0050] According to a preset interval, a plurality of to-be-evaluated fault points are obtained from the target line;

[0051] According to the fault simulation model, a to-be-evaluated voltage matrix of each to-be-evaluated fault point under a plurality of preset fault resistances is calculated;

[0052] The maximum three-phase voltage value in the plurality of to-be-evaluated voltage matrices is taken as a to-be-evaluated value and added to a preset to-be-evaluated set;

[0053] It is determined whether the neighboring node is the last node in the power distribution network;

[0054] If not, the neighboring node, the node current matrix, and the node voltage matrix are taken as a target node, a target current matrix, and a target voltage matrix required for the next round of fault positioning operation;

[0055] If yes, the plurality of to-be-evaluated values in the to-be-evaluated set are compared, and the to-be-evaluated voltage matrix corresponding to the minimum to-be-evaluated value is taken as a target voltage matrix;

[0056] The to-be-evaluated fault point corresponding to the target voltage matrix is taken as the fault position of the power distribution network.

[0057] Another embodiment of the present application provides a terminal device, comprising a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor implements a power distribution network fault locating method with distributed power supply as any one of the above embodiments when executing the computer program.

[0058] Another embodiment of the present application provides a storage medium, comprising a stored computer program, wherein the device where the storage medium is located executes a power distribution network fault locating method with distributed power supply as any one of the above embodiments when the computer program runs.

[0059] The present application has the following beneficial effects by implementation:

[0060] The present application discloses a power distribution network fault locating method, device, terminal device and storage medium with distributed power supply, wherein the method traverses the line between two adjacent nodes in the power distribution network from the substation side, calculates the node current matrix and the node voltage matrix of the distributed power supply in the adjacent node according to the target current matrix, the target voltage matrix of the current target node, the line impedance matrix of each node, and the line admittance matrix, so that the influence of the distributed power supply on the line voltage and current can be fully considered when subsequent fault locating is performed, and then a fault simulation model is reconstructed, the fault voltage matrix of the virtual fault position is calculated by assuming that a fault occurs between the target node and the adjacent node, and then the fault distance of the virtual fault position corresponding to the fault voltage matrix and the length of the target line are compared to determine whether the fault position of the power distribution network is on the current target line. Therefore, the present application fully considers the influence of the distributed power supply on the line voltage and current by constructing a fault simulation model according to the node current matrix and the node voltage matrix of the distributed power supply, and realizes the rapid positioning of the power distribution network fault by solving the fault simulation model. BRIEF DESCRIPTION OF DRAWINGS

[0061] Figure 1 is a flowchart of a power distribution network fault locating method with distributed power supply provided by an embodiment of the present application.

[0062] Figure 2 is a structural diagram of a power distribution network fault locating device with distributed power supply provided by an embodiment of the present application.

[0063] Figure 3 is a topological diagram of a power distribution network fault locating method provided by an embodiment of the present application.

[0064] Figure 4 is another topological diagram of a power distribution network fault locating method provided by an embodiment of the present application. DETAILED DESCRIPTION

[0065] In order to make the objects, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be described clearly and completely below in conjunction with the accompanying drawings of the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by a person of ordinary skill in the art without creative effort belong to the scope of protection of the present application.

[0066] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this application; the terms "comprising," "comprises" and "including" as used herein are synonymous with and meant to have the same meaning as the term "including"; the term "coupled" as used herein is intended to mean a coupling of one element to another element that can be directly connected to one another or that can be connected to one another through one or more intermediate elements.

[0067] In the description of the embodiments of the present application, the technical terms "first", "second", and the like are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "a plurality of" is two or more, unless otherwise explicitly and specifically limited.

[0068] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearance of the phrase in various places in the specification are not necessarily all referring to the same embodiment, or to the same alternative embodiment, nor are they necessarily mutually exclusive or alternative embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0069] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. In addition, the character " / " in the present application generally represents an "or" relationship between the front and rear associated objects.

[0070] In the description of the embodiments of the present application, the term "a plurality of" refers to two or more (including two), and similarly, "a plurality of groups" refers to two or more groups (including two groups), and "a plurality of pieces" refers to two or more pieces (including two pieces).

[0071] In the description of the embodiments of the present application, unless otherwise explicitly specified and limited, the technical terms "mounting", "connecting", "connecting", "fixing" and the like should be understood in a broad sense, for example, can be fixedly connected, or can be detachably connected, or can be integrated; can be mechanically connected, or can be electrically connected; can be directly connected, or can be indirectly connected through an intermediate medium, or can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0072] Referring to Figure 1 It is a flowchart of a fault location method of a power distribution network containing a distributed power supply provided by an embodiment of the present application, comprising:

[0073] S1, obtaining the topological structure of the power distribution network in which a fault occurs, the line impedance matrix of the lines between nodes, the line admittance matrix of the lines between nodes, the current matrix of the starting node, and the voltage matrix of the starting node; wherein, in addition to the starting node, other nodes in the power distribution network are loaded with distributed power supply;

[0074] In a preferred embodiment of the present application, the starting node is a substation power supply node, which is the main entrance of electric energy into the power distribution network and has high voltage level and large current capacity. The topological structure refers to the connection mode of each node in the power distribution network.

[0075] S2, repeatedly performing fault location operation according to the topological structure, the line impedance matrix, the line admittance matrix, the current matrix and the voltage matrix, until the fault position of the power distribution network is determined;

[0076] Wherein, the fault location operation comprises:

[0077] S21, obtaining a target node, a target current matrix of the target node, and a target voltage matrix; wherein, initially, the target node is the starting node;

[0078] S22, determining an adjacent node adjacent to the target node according to the topological structure, and determining a target impedance matrix and a target admittance matrix of a target line between the target node and the adjacent node;

[0079] S23, calculating the node current matrix of the distributed power supply in the adjacent node according to the target current matrix, the target voltage matrix, the target impedance matrix and the target admittance matrix;

[0080] In a preferred embodiment of the present application, initially, let k = 1, the post-fault cycle window is used in combination with Discrete Fourier Transform (DFT) to calculate the voltage and current of the nodes k, k+1 and the distributed power source in the distribution network after the fault of the distribution network.

[0081] A general electrical model for the lines of the distribution network. Kirchhoff's law is applied at any node m:

[0082] I l abc = I abc m +1 / 2Y abc n-m *V LG abc ;

[0083]

[0084] where I l abc is the line current matrix of the three-phase circuit; I abc m is the current matrix of node m; V LG abc is the voltage matrix of node m; I la , I lb , I lc are the line currents of phases a, b, c, respectively; V ag , V bg , V cg are the line voltages of phases a, b, c, respectively; Y abc is the admittance matrix of the three-phase circuit. a, b, c, d are the coefficients for calculating the current and voltage of node m from the current and voltage of node n, which can be calculated as follows:

[0085] a = U +1 / 2Z abc n-m Y abc n-m

[0086] b = Z abc n-m

[0087] c = Y abc n-m +1 / 4Y abc n-m Z abc n-m Y abc n-m

[0088] d = U +1 / 2Z abc n-m Y abc n-m

[0089] where Z abc n-m is the impedance matrix of nodes m, n; Y abc n-m is the admittance matrix of nodes m, n; U is the voltage matrix.

[0090] Kirchhoff's law will be applied to a section of busbar (target line) between node k (target node) and node k+1 (adjacent node) of the distribution network. When k = 1, the line will be located between node 01 and node 02. The period of the voltage and fault current signals from the reference busbar and the busbar with installed distributed power will be considered.

[0091] In order to obtain the voltage and current phasors of the three-phase signal of the target line, the post-fault cycle window will be used in combination with the Discrete Fourier Transform (DFT). This method is also applicable to the busbar with distributed power, referring to Figure 3 , taking node 01 and node 02 as an example, this embodiment considers not only the impedance and admittance matrix shunt of the system, but also the three-phase voltage and current signals of reference 01 node and the three-phase current signals from the distributed generator installed in the system as available information. According to Figure 3

[0092] V" LG abc 02 = aV' LG abc 01 - bI' abc 01 ;

[0093] I" abc 02 = -cV' LG abc 01 + dI' abc 01 ;

[0094] a = U + 1 / 2Z abc 01-02 Y abc 01-02 ;

[0095] b = Z abc 01-02 ;

[0096] c = Y abc 01-02 + 1 / 4Y abc 01-02 Z abc 01-02 Y abc 01-02 ;

[0097] d = U + 1 / 2Z abc 01-02 Y abc 01-02 ;

[0098] In the formula, V" LG abc 02 , I" abc 02 are the voltage and current matrices of node 02 (adjacent node) respectively; V' LG abc 01 , I' abc 01 are the voltage and current matrices of node 01 (target node) respectively; Z abc 01-02 is the impedance matrix of nodes 01, 02; Y abc 01-02 is the admittance matrix of nodes 01, 02.

[0099] ​S24, constructing a fault simulation model of the target line according to the target current matrix, the target voltage matrix, and the node current matrix; wherein the fault simulation model is used to assume that a virtual fault position is located between the target node and the adjacent node, and to calculate a fault voltage matrix of the virtual fault position;

[0100] Preferably, the fault simulation model is:

[0101]

[0102] wherein V F abc is the fault voltage matrix of the virtual fault position, D is a fault distance between the target node and the virtual fault position, a(D) is a first coefficient, V′ LG abc k is the target voltage matrix, b(D) is a second coefficient, R is a fault resistance of the virtual fault position, a is a first weight of the target current matrix, I′ abc k is the target current matrix, b is a second weight of the node current matrix, I abc GD i is a node current matrix of an i-th distributed power supply in the adjacent node, and N is a total number of the distributed power supplies in the adjacent node.

[0103] In a preferred embodiment of the present application, the voltage and the current calculated in step S23 are used to construct the fault simulation model to calculate a distance D of the fault relative to k and a fault resistance;

[0104] Considering a fault point applied in a position of the node 01 at a distance D, at this time, the voltage V Fabc will be:

[0105] V F abc = a(D)V′ LG abc 01 -b(D)I′ abc 01 ;

[0106] a(D) = U + 1 / 2L 2 Z abc 01-02 Y abc 01-02 ;

[0107] b(D) = Z abc 01-02 (D) = DZ abc 01-02 ;

[0108] In the formula, V F abc represents a fault position voltage matrix.

[0109] Since the above formula is in V F abcThe calculation does not well reflect the influence of the fault resistance, nor even the influence of the distributed generation. The fault resistance R is classified for each type of fault (phase to ground (PG), phase to phase (PP), phase to ground to phase (PPG), three phase to ground (PPP) and three phase to ground to phase (PPPG). The fault type classification is not the focus of this method, so it is assumed that this classification has been made in the method of the invention.

[0110] Considering the distributed generation as a current source and the influence of the fault resistance, assuming that the fault occurs between nodes 01 and 02, according to Figure 3 The generation Figure 4 and considering the analysis of the above short-circuit cases, the following is obtained, where the influence of the fault distance and resistance on V F abc can be simulated:

[0111]

[0112] where: is the sum of all N current phasors of the generators downstream of the section being analyzed. During the fault, depending on the size of the fault resistance, a greater or lesser part of the upstream current and the downstream current will pass through the short circuit. In this way, as the pinv(*) pseudo-inverse operator, a and β are defined as:

[0113] a = (Z(1 - D) + Z D )*pinv(Z(1 - D) + R + Z D );

[0114] β = (Z(D) + Z U )*pinv(Z(D) + R + Z U );

[0115] where Z D represents the equivalent impedance upstream of the section being analyzed, and Z U is the equivalent impedance downstream of the section. The calculation of Z D is the distance between the substation and the assumed fault location multiplied by the average impedance of all the three-phase sections of the system, and the calculation of Z U is the distance between the assumed fault location and the remaining part of the most important three-phase section downstream of the fault multiplied by the average impedance of all the three-phase sections of the system.

[0116] a and β will weigh the influence of the substation and the distributed generation in the fault according to the short-circuit resistance. When the short-circuit resistance tends to zero, a and β will tend to 1 (100% of the current from the substation and the distributed generation will be taken into account). When the short-circuit resistance tends to infinity, a and β will tend to 0 (0% of the current from the substation and the distributed generation will be taken into account). The voltage at the fault point will be considered as:

[0117]

[0118] The addition of the alpha term and the beta term makes the proposed mathematical model more sensitive to fault resistance. At this time, V F abc is calculated based on D and R, which are both unknown variables initially. By observing the change of V F abc with D and R, the location of the fault can be determined.

[0119] Preferably, after constructing the fault simulation model of the target line according to the target current matrix, the target voltage matrix, and the node current matrix, the method further comprises:

[0120] S241, acquiring a plurality of to-be-evaluated fault points from the target line according to a preset interval;

[0121] S242, calculating a to-be-evaluated voltage matrix of each to-be-evaluated fault point under a plurality of preset fault resistances according to the fault simulation model;

[0122] S243, taking the maximum three-phase voltage value in the plurality of to-be-evaluated voltage matrices as a to-be-evaluated value and adding the to-be-evaluated value to a preset to-be-evaluated set;

[0123] S244, judging whether the adjacent node is the last node in the power distribution network;

[0124] S245, if not, taking the adjacent node, the node current matrix, and the node voltage matrix as the target node, the target current matrix, and the target voltage matrix required for the next round of fault positioning operation;

[0125] S246, if yes, comparing the plurality of to-be-evaluated values in the to-be-evaluated set, and taking the to-be-evaluated voltage matrix corresponding to the minimum to-be-evaluated value as the target voltage matrix;

[0126] S247, taking the to-be-evaluated fault point corresponding to the target voltage matrix as the fault location of the power distribution network.

[0127] In a preferred embodiment of the present application, the estimation starts from the target node, and the fault distance D and the fault resistance R are initially set to zero. For each value of D and R, V F abc is calculated. Then, R remains unchanged, and D is incremented according to a preset interval ΔD, obtaining:

[0128] D = D + ΔD;

[0129] This process will be repeated until:

[0130] D ≤ D sup ;

[0131] D reaches this upper limit D sup Afterwards, the following process is re-executed:

[0132] R = R + ΔR;

[0133] until:

[0134] R ≤ R sup ;

[0135] The value of max(abs(V F abc )) directly related to the faulty phase is saved. Finally, the fault will be located in the case where (R, D) presents the minimum max(abs(V F abc )) value.

[0136] S25, solving the fault simulation model, calculating a fault voltage matrix, and determining a corresponding virtual fault location and a target fault distance of the target node;

[0137] Preferably, the solving the fault simulation model, calculating a fault voltage matrix, and determining a corresponding virtual fault location and a target fault distance of the target node, comprises:

[0138] S251, taking the maximum value of three-phase voltage values in the fault voltage matrix as a target value, and constructing a target function taking the minimization of the target value as a target;

[0139] S252, according to the target function, using a preset meta-heuristic algorithm to constantly optimize the fault distance and the fault resistance in the fault simulation model until the minimum target value is generated; wherein the meta-heuristic algorithm comprises a genetic algorithm, a particle swarm optimization algorithm, and a simulated annealing algorithm;

[0140] S253, determining the last optimized fault resistance and the fault distance as the target fault distance and the target fault resistance.

[0141] S26, when it is determined that the target fault distance is greater than the length of the target line, taking the adjacent node, the node current matrix, and the node voltage matrix as a target node, a target current matrix, and a target voltage matrix required for the next round of fault location operation;

[0142] S27, when it is determined that the target fault distance is not greater than the length of the target line, taking the virtual fault location as the fault location of the power distribution network.

[0143] In a preferred embodiment of the present application, in order to optimize the search efficiency of fault distance D and fault resistance R value, a meta-heuristic algorithm is used for calculation. According to the implicit characteristics, the meta-heuristic algorithm is selected to adapt to the expected objective function, and the solving efficiency of the algorithm is improved. For the selection of the meta-heuristic algorithm to be used, genetic algorithm, particle swarm optimization (particle swarm optimization) and simulated annealing method (SA) are tested. The meta-heuristic is used to minimize the objective function defined as max(abs(V F abc )) In this embodiment, three different meta-heuristic algorithms are tested to observe the influence of different algorithms on obtaining D and R. According to the implicit characteristics of each method, the meta-heuristic algorithm is selected to adapt to the expected objective function. In the fault location process, the meta-heuristic optimization algorithm is used to calculate the fault distance (D) and the fault resistance in turn.

[0144] The embodiment provides a fault location method for a power distribution network containing distributed power sources. The method comprises the following steps: starting from a starting node of the power distribution network, and calculating a node current matrix and a node voltage matrix of a distributed power source in an adjacent node according to a target current matrix, a target voltage matrix of a current target node, a line impedance matrix of lines between nodes, and a line admittance matrix, so that the influence of the distributed power source on line voltage and current can be fully considered when subsequent fault location is performed, and then a fault simulation model is reconstructed, a fault voltage matrix of a virtual fault position is calculated by assuming that a fault occurs between the target node and the adjacent node, and then the fault distance of the virtual fault position corresponding to the fault voltage matrix is compared with the length of a target line to determine whether the fault position of the power distribution network is on the current target line. Therefore, the fault simulation model is reconstructed according to the node current matrix and the node voltage matrix of the distributed power source, the influence of the distributed power source on line voltage and current is fully considered, and the fault simulation model is solved to realize rapid fault location of the power distribution network.

[0145] Referring to Figure 2 The embodiment provides a structure schematic diagram of a fault location device for a power distribution network containing distributed power sources, which comprises the following steps:

[0146] A data acquisition module is configured to acquire a topological structure of a power distribution network in which a fault occurs, a line impedance matrix of lines between nodes, a line admittance matrix of the lines between the nodes, a current matrix of a starting node, and a voltage matrix of the starting node. In the power distribution network, distributed power sources are loaded on nodes other than the starting node.

[0147] A fault location module is configured to repeatedly perform fault location operations according to the topological structure, the line impedance matrix, the line admittance matrix, the current matrix, and the voltage matrix, until the fault position of the power distribution network is determined.

[0148] The fault locating operation comprises:

[0149] The target node, a target current matrix of the target node, and a target voltage matrix are obtained; initially, the target node is the starting node;

[0150] According to the topology structure, an adjacent node adjacent to the target node is determined, and a target impedance matrix and a target admittance matrix of a target line between the target node and the adjacent node are determined;

[0151] According to the target current matrix, the target voltage matrix, the target impedance matrix, and the target admittance matrix, a node current matrix of a distributed power supply in the adjacent node is calculated;

[0152] According to the target current matrix, the target voltage matrix, and the node current matrix, a fault simulation model of the target line is constructed; the fault simulation model is used to assume that a virtual fault position is located between the target node and the adjacent node, and a fault voltage matrix of the virtual fault position is calculated;

[0153] The fault simulation model is solved, the fault voltage matrix is calculated, and a target fault distance of the corresponding virtual fault position and the target node is determined;

[0154] When it is determined that the target fault distance is greater than a length of the target line, the adjacent node, the node current matrix, and the node voltage matrix are taken as a target node, a target current matrix, and a target voltage matrix required for a next round of fault locating operation;

[0155] When it is determined that the target fault distance is not greater than the length of the target line, the virtual fault position is taken as a fault position of the power distribution network.

[0156] Further, the fault simulation model is:

[0157]

[0158] wherein, V F abc is a fault voltage matrix of a virtual fault position, D is a fault distance between a target node and the virtual fault position, a(D) is a first coefficient, V′ LG abc k is a target voltage matrix, b(D) is a second coefficient, R is a fault resistance of the virtual fault position, α is a first weight of a target current matrix, I′ abc k is the target current matrix, β is a second weight of a node current matrix, I abc GD i is a node current matrix of an i-th distributed power supply in the adjacent node, and N is a total number of the distributed power supplies in the adjacent node.

[0159] Further, the solving the fault simulation model, calculating a fault voltage matrix, and determining a corresponding virtual fault position and fault distance of the target node, comprises:

[0160] Taking a maximum value of three-phase voltage values in the fault voltage matrix as a target value, and constructing a target function taking minimizing the target value as a target;

[0161] According to the target function, a preset meta-heuristic algorithm is used to constantly optimize the fault distance and fault resistance in the fault simulation model until the smallest target value is generated; wherein the meta-heuristic algorithm comprises a genetic algorithm, a particle swarm optimization algorithm, and a simulated annealing algorithm;

[0162] The last optimized fault resistance and the fault distance are determined as the target fault distance and target fault resistance.

[0163] Further, after constructing the fault simulation model of the target line according to the target current matrix, the target voltage matrix, and the node current matrix, the method further comprises:

[0164] According to a preset interval, a plurality of to-be-evaluated fault points are obtained from the target line;

[0165] According to the fault simulation model, a to-be-evaluated voltage matrix of each to-be-evaluated fault point under a plurality of preset fault resistances is calculated;

[0166] The maximum three-phase voltage value in the plurality of to-be-evaluated voltage matrices is taken as a to-be-evaluated value and added to a preset to-be-evaluated set;

[0167] It is determined whether the adjacent node is the last node in the power distribution network;

[0168] If not, the adjacent node, the node current matrix, and the node voltage matrix are taken as a target node, a target current matrix, and a target voltage matrix required for the next round of fault positioning operation;

[0169] If yes, the plurality of to-be-evaluated values in the to-be-evaluated set are compared, and the to-be-evaluated voltage matrix corresponding to the smallest to-be-evaluated value is taken as a target voltage matrix;

[0170] The to-be-evaluated fault point corresponding to the target voltage matrix is taken as the fault position of the power distribution network.

[0171] It should be noted that the apparatus embodiments described above are only illustrative, and the units described as separate components can or can not be physically separated, and the components displayed as units can or can not be physical units, i.e., can be located in one place or distributed on multiple network units. Part or all of the modules can be selected to achieve the purpose of the embodiment according to actual needs. In addition, the connection relationship between the modules in the apparatus embodiments provided by the present application indicates that there is a communication connection between them, which can be implemented as one or more communication buses or signal lines. Those skilled in the art can understand and implement it without creative labor.

[0172] Those skilled in the art can clearly understand that, for the convenience and brevity, the specific working process of the above-described apparatus can refer to the corresponding process in the foregoing method embodiments, which will not be described here.

[0173] Another preferred embodiment of the present application provides a terminal device comprising a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor implements a power distribution network fault location method with distributed power supply as described in any one of the above embodiments when executing the computer program.

[0174] The terminal device can be a desktop computer, a notebook computer, a palm computer, a cloud server, and the like. The terminal device can include, but is not limited to, a processor and a memory.

[0175] The processor can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor and the like. The processor is the control center of the terminal device, and connects all parts of the terminal device through various interfaces and lines.

[0176] The memory can be used to store the computer program, and the processor realizes various functions of the terminal device by running or executing the computer program stored in the memory and calling the data stored in the memory. The memory can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, at least one application required by a function, and the like; and the data storage area can store data created according to the use of the mobile phone and the like. In addition, the memory can include a high-speed random access memory, and can also include a nonvolatile memory, for example, a hard disk, a memory, a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, at least one disk storage device, a flash memory device, or other volatile solid-state memory devices.

[0177] Another preferred embodiment of the present application provides a storage medium, which is a computer readable storage medium, and a computer program is stored in the computer readable storage medium, and the computer program can realize the steps of each method embodiment when executed by a processor. The computer program includes computer program code, which can be in the form of source code, object code, an executable file, or some intermediate form, etc. The computer readable medium can include any entity or device capable of carrying the computer program code, a recording medium, a U disk, a mobile hard disk, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, a software distribution medium, and the like.

[0178] The above is the preferred embodiment of the present application, and it should be pointed out that, for those skilled in the art, without departing from the principles of the present application, a number of improvements and refinements can be made, and these improvements and refinements are also considered to be within the protection scope of the present application.

Claims

1. A method for fault location in a power distribution network containing distributed generation, characterized in that, The method comprises the following steps: obtaining the topology of a power distribution network, a line impedance matrix of lines between nodes, a line admittance matrix of lines between nodes, a current matrix of a starting node, and a voltage matrix of the starting node; wherein, in the power distribution network, distributed power sources are loaded on nodes other than the starting node; repeatedly performing a fault locating operation according to the topology, the line impedance matrix, the line admittance matrix, the current matrix, and the voltage matrix, until the fault position of the power distribution network is determined; wherein, the fault locating operation comprises: obtaining a target node, a target current matrix of the target node, and a target voltage matrix; wherein, initially, the target node is the starting node; determining an adjacent node adjacent to the target node according to the topology, and determining a target impedance matrix and a target admittance matrix of a target line between the target node and the adjacent node; calculating a node current matrix and a node voltage matrix of a distributed power source in the adjacent node according to the target current matrix, the target voltage matrix, the target impedance matrix, and the target admittance matrix; constructing a fault simulation model of the target line according to the target current matrix, the target voltage matrix, and the node current matrix; wherein, the fault simulation model is used to assume that a virtual fault position is located between the target node and the adjacent node, and to calculate a fault voltage matrix of the virtual fault position; solving the fault simulation model to calculate the fault voltage matrix, and determining a target fault distance between the virtual fault position and the target node; when it is determined that the target fault distance is greater than the length of the target line, taking the adjacent node, the node current matrix, and the node voltage matrix as the target node, the target current matrix, and the target voltage matrix required for the next round of fault locating operation; when it is determined that the target fault distance is not greater than the length of the target line, taking the virtual fault position as the fault position of the power distribution network.

2. The method of claim 1, wherein, The fault simulation model is: ； wherein, is a fault voltage matrix of the virtual fault location, is a fault distance between the target node and the virtual fault location, is a first coefficient, is a target voltage matrix, is a second coefficient, is a fault resistance of the virtual fault location, is a first weight of the target current matrix, is a target current matrix, is a second weight of the node current matrix, is a node current matrix of the i-th distributed power source in the adjacent node, is a total number of distributed power sources in the adjacent node.

3. The method of claim 2, wherein, the solving of the fault simulation model to calculate the fault voltage matrix and determine the fault distance between the virtual fault position and the target node comprises: taking the maximum value of three-phase voltage values in the fault voltage matrix as a target value, and constructing a target function aiming to minimize the target value; according to the target function, constantly optimizing the fault distance and the fault resistance in the fault simulation model by using a preset meta-heuristic algorithm until the smallest target value is generated; wherein, the meta-heuristic algorithm comprises a genetic algorithm, a particle swarm optimization algorithm, and a simulated annealing algorithm; determining the last optimized fault resistance and the fault distance as the target fault distance and the target fault resistance.

4. The method of claim 2, wherein, After constructing the fault simulation model of the target line according to the target current matrix, the target voltage matrix, and the node current matrix, the method further comprises: obtaining a plurality of to-be-evaluated fault points from the target line according to a preset interval; According to the fault simulation model, a to-be-evaluated voltage matrix of each to-be-evaluated fault point under a plurality of preset fault resistances is calculated; The maximum three-phase voltage value in the plurality of to-be-evaluated voltage matrices is taken as a to-be-evaluated value and added to a preset to-be-evaluated sum; It is judged whether the adjacent node is the last node in the power distribution network or not; If not, the adjacent node, the node current matrix and the node voltage matrix are taken as a target node, a target current matrix and a target voltage matrix required for a next round of fault positioning operation; If yes, the to-be-evaluated values in the to-be-evaluated sum are compared, and a to-be-evaluated voltage matrix corresponding to the minimum to-be-evaluated value is taken as a target voltage matrix; The to-be-evaluated fault point corresponding to the target voltage matrix is taken as the fault position of the power distribution network.

5. A fault location device for a power distribution network containing distributed generation, characterized in that, Comprise: The data acquisition module is used for acquiring the topological structure of the power distribution network, the line impedance matrix of the lines between nodes, the line admittance matrix of the lines between nodes, the current matrix of the starting node and the voltage matrix of the starting node; wherein, the nodes other than the starting node in the power distribution network are loaded with distributed power supply; The fault positioning module is used for repeatedly performing fault positioning operation according to the topological structure, the line impedance matrix, the line admittance matrix, the current matrix and the voltage matrix, until the fault position of the power distribution network is determined; Wherein, the fault positioning operation comprises: The target node, the target current matrix of the target node and the target voltage matrix are acquired; wherein, initially, the target node is the starting node; According to the topological structure, the adjacent node adjacent to the target node is determined, and the target impedance matrix and the target admittance matrix of the target line between the target node and the adjacent node are determined; According to the target current matrix, the target voltage matrix, the target impedance matrix and the target admittance matrix, the node current matrix and the node voltage matrix of the distributed power supply in the adjacent node are calculated; According to the target current matrix, the target voltage matrix and the node current matrix, the fault simulation model of the target line is constructed; wherein, the fault simulation model is used for assuming that a virtual fault position is located between the target node and the adjacent node, and calculating the fault voltage matrix of the virtual fault position; The fault simulation model is solved, the fault voltage matrix is calculated, and the target fault distance between the corresponding virtual fault position and the target node is determined; When it is determined that the target fault distance is greater than the length of the target line, the adjacent node, the node current matrix and the node voltage matrix are taken as the target node, the target current matrix and the target voltage matrix required for the next round of fault positioning operation; When it is determined that the target fault distance is not greater than the length of the target line, the virtual fault position is taken as the fault position of the power distribution network.

6. A fault location device for a power distribution network containing distributed power sources as claimed in claim 5 wherein, The fault simulation model is: ； wherein, is a fault voltage matrix of the virtual fault location, is a fault distance between the target node and the virtual fault location, is a first coefficient, is a target voltage matrix, is a second coefficient, is a fault resistance of the virtual fault location, is a first weight of the target current matrix, is a target current matrix, is a second weight of the node current matrix, is a node current matrix of the i-th distributed power source in the adjacent node, is a total number of distributed power sources in the adjacent node.

7. A fault location device for a power distribution network containing distributed power sources as claimed in claim 6, wherein, The solving of the fault simulation model, the calculation of the fault voltage matrix and the determination of the fault distance between the corresponding virtual fault position and the target node, comprise: Taking a maximum value of three-phase voltage values in a fault voltage matrix as a target value, and constructing a target function taking minimization of the target value as a target; According to the target function, a preset meta-heuristic algorithm is used to constantly optimize a fault distance and a fault resistance in a fault simulation model until a minimum target value is generated, wherein the meta-heuristic algorithm includes a genetic algorithm, a particle swarm optimization algorithm, and a simulated annealing algorithm; The last optimized fault resistance and the fault distance are determined as the target fault distance and the target fault resistance.

8. The apparatus for fault location of a power distribution network with distributed power sources as claimed in claim 7 wherein, After the fault simulation model of the target line is constructed according to the target current matrix, the target voltage matrix, and the node current matrix, the method further includes: According to a preset interval, a plurality of to-be-evaluated fault points are acquired from the target line; According to the fault simulation model, a to-be-evaluated voltage matrix of each to-be-evaluated fault point under a plurality of preset fault resistances is calculated; A maximum three-phase voltage value in a plurality of the to-be-evaluated voltage matrices is taken as a to-be-evaluated value and added to a preset to-be-evaluated set; It is determined whether the adjacent node is the last node in the power distribution network; If not, the adjacent node, the node current matrix, and the node voltage matrix are taken as a target node, a target current matrix, and a target voltage matrix required for a next round of fault location operation; If yes, a plurality of to-be-evaluated values in the to-be-evaluated set are compared, and a to-be-evaluated voltage matrix corresponding to a minimum to-be-evaluated value is taken as a target voltage matrix; A to-be-evaluated fault point corresponding to the target voltage matrix is taken as a fault position of the power distribution network.

9. A terminal device, comprising: A processor, a memory, and a computer program stored in the memory and configured to be executed by the processor are included, and the processor implements the power distribution network fault location method with a distributed power supply according to any one of claims 1 to 4 when the computer program is executed.

10. A storage medium, characterized by The storage medium includes a stored computer program, wherein the storage medium controls a device where the storage medium is located to execute the power distribution network fault location method with a distributed power supply according to any one of claims 1 to 4 when the computer program is executed.

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