A data processing method, apparatus, medium, and chip

Abstract

This application discloses a data processing method, apparatus, medium, and chip. The method includes: determining each storage location in each memory and assigning it an address code; partitioning each memory storage location based on the suffix of the address code, wherein the address codes of storage locations in the same partition within the same memory have the same suffix; determining a first type of partition and a second type of partition in each memory; traversing and determining the inverse transformation position corresponding to each storage location in the first type of partition in each memory; matching each second type of partition in different memories based on the prefix and suffix of the address codes of each storage location in the second type of partition in each memory to obtain a second type of partition matching relationship; and determining the inverse transformation position corresponding to each storage location in the second type of partition in each memory based on the second type of partition matching relationship. This method can reduce the number of repeated determinations when determining the inverse transformation position corresponding to each storage location.

Description

Technical Field

[0001] This application relates to the field of data processing in computing devices, and particularly to a data processing method, apparatus, medium, and chip. Background Technology

[0002] In data encryption, techniques such as Fully Homomorphic Encryption (FHE) and Zero Knowledge Proof (ZKP) involve number theory transformations. These transformations include butterfly computation and its inverse. The inverse transformation refers to reordering the data obtained after butterfly computation. Currently, butterfly computation is often processed in parallel, thus requiring multiple memories to store the data that needs to be reordered. Reordering involves swapping the storage locations of two data items at specific memory positions; the binary codes of the swapped data items' memory addresses are reversed.

[0003] For example, if the binary codes of memory addresses 001001 and 100100 are reversed, then during the inverse transformation, the data at these two memory locations must be swapped. Here, 001001 represents memory address 1001 of memory location 00, while 100100 represents memory address 0100 of memory location 10. Similarly, if the binary codes of memory addresses 001000 and 000100 are also reversed, 001000 represents memory address 1000 of memory location 00, while 000100 represents memory address 0100 of memory location 00. That is, in the inverse transformation step after parallel butterfly computation, the two data sets that need to be swapped may be located in different memories or in the same memory location.

[0004] Because the two data items to be exchanged in the inverse transformation step after parallel butterfly computation may be located in different memories or in the same memory, the current inverse transformation does not use parallel operation. Instead, it serially acquires each data item one by one, reverses the binary code of its storage address, and then exchanges the data item with the data at the storage address corresponding to the reversed binary code, until all data items have been traversed. Since this is a serial, sequential traversal, the processing time is relatively long. Furthermore, during serial processing, for two data items whose storage addresses are reversed, they still need to be read separately. For example, if the binary codes of storage addresses 001001 and 100100 are reversed, only one address needs to be read and exchanged with the other. However, because it is a serial, sequential reading, both data items will still be read separately during the traversal. Summary of the Invention

[0005] The main purpose of this application is to propose a data processing method, device, medium, and chip, which aims to solve the problem that the serial processing speed is slow when performing inverse transformations in number theory transformations, and that data with reversed storage addresses in the data to be processed still need to be read separately.

[0006] To achieve the above objectives, this application proposes a data processing method, which includes:

[0007] Determine the storage locations in the various memories used to store the data to be inverted;

[0008] Each storage location is assigned an address code; the address code of each storage location includes at least a prefix and a suffix, wherein the prefix is ​​the binary code of the number of the memory where the storage location is located, and the suffix is ​​the last two bits of the binary code of the address number of the storage location in its corresponding memory;

[0009] The storage location of each memory is partitioned based on the suffix, and the address codes of the storage locations in the same partition within the same memory have the same suffix.

[0010] Identify a first-class partition and a second-class partition in each memory. The address codes of each storage location in the first-class partition are reversed to themselves, or the storage locations represented by the reversed address codes are in the same memory. The second-class partition is any other partition in the same memory besides the first-class partition.

[0011] Traverse and determine the inverse transformation position corresponding to each storage location of the first type partition in each memory;

[0012] Based on the prefix and suffix of the address codes of each storage location in the second type partition of each memory, the second type partitions in different memories are matched to obtain the second type partition matching relationship; wherein, the prefix and suffix of the address code of one partition in two mutually matched partitions are the suffix and prefix of the address code of the other partition.

[0013] Based on the second type of partition matching relationship, the inverse transformation position corresponding to each storage location in the second type partition of each memory is determined. Among the two matching second type partitions, only the inverse transformation position corresponding to each storage location in either partition is determined.

[0014] In this embodiment of the application, the address encoding of each storage location also includes a base encoding. The base encoding of each storage location is located between the prefix and suffix of the address encoding corresponding to the storage location. The base encoding of each storage location is the binary encoding of the address number of the storage location in the memory excluding the suffix.

[0015] The traversal to determine the inverse transformation position corresponding to each storage location of the first type partition in each memory includes:

[0016] Using the base codes corresponding to each storage location in the first type partition of each memory as the order, traverse and determine the inverse transform position corresponding to each storage location.

[0017] In this embodiment of the application, the inverse transformation position corresponding to each storage location in the first type partition of each memory is determined by the following method:

[0018] If the reverse order of the address code of any storage location is itself, then the storage location itself is taken as its corresponding inverse transformation location.

[0019] If the reverse order of the address code of any storage location is different from its own, then the storage location corresponding to the reversed address code is taken as its corresponding inverse transformation location.

[0020] In this embodiment of the application, after determining the inverse transformation positions corresponding to each storage location contained in the first type of partition in each memory, the data processing method further includes:

[0021] Based on the storage locations and corresponding inverse transformation locations contained in the first type partition of each memory, the data to be inverse transformed is read in parallel from the first type partition of each memory.

[0022] In this embodiment of the application, based on the storage locations and corresponding inverse transformation locations contained in the first type partition of each memory, the data to be inverse transformed is read in parallel from the first type partition of each memory, including:

[0023] Data is read in parallel from the first type partition of each memory according to a cycle; wherein each cycle includes two parallel reads. In each cycle, during the first read, data at a storage location to be inverted is read in parallel from the first type partition of each memory. During the second read, data is read in parallel from the inverse transformation location corresponding to the storage location to be inverted read in each memory during the first read.

[0024] This continues until all the memory locations to be inverted in each memory's first-class partition have been traversed.

[0025] In this embodiment of the application, when reading data in parallel from the first type partition of each memory according to the period, the data is read in the order of the base code of the storage location to be reverse-transformed contained in the first type partition of each memory.

[0026] In this embodiment of the application, if the storage location to be inverted and the location to be inverted and read from the same memory for the first time are the same as the location to be inverted and read for the second time within the same cycle, no data exchange is performed.

[0027] If they are different, the data to be inversely transformed at the storage location to be inversely transformed will be replaced with the inversely transformed data read from the inversely transformed location for the second time.

[0028] In this embodiment of the application, the address encoding of each storage location also includes a base encoding. The base encoding of each storage location is located between the prefix and suffix of the address encoding corresponding to the storage location. The base encoding of each storage location is the binary encoding of the address number of the storage location in the memory excluding the suffix.

[0029] The inverse transformation position corresponding to each storage location in the second type partition of each memory is determined based on the following method:

[0030] Using the base encoding of the storage location of any of the two matching second-class partitions as the order, the inverse transformation position corresponding to the storage location of any partition is determined by traversing. The base encodings of the two storage locations with mutually inverse transformation positions are in reverse order.

[0031] In this embodiment of the application, after determining the inverse transformation position corresponding to each storage location in the second type partition of each memory, the data processing method further includes:

[0032] Based on the inverse transformation positions corresponding to each storage location of the second type partition in each memory, the data to be inversely transformed is read from two storage locations in each memory in parallel for inverse transformation processing.

[0033] Among the four storage locations read from two matching second-class partitions, two storage locations in one partition and two storage locations in the other partition are inverse transformation locations of each other.

[0034] In the embodiments of this application, when reading the data to be transformed from two storage locations in parallel from each memory, the two matching second-type partitions are read in the order of the base code of each storage location in any partition.

[0035] This application also proposes a data processing apparatus, comprising:

[0036] The determining module is used to determine each storage location in each memory that stores the data to be inverted;

[0037] The processing module is used to assign address codes to each storage location; the address code of each storage location includes at least a prefix and a suffix, the prefix being the binary code of the number of the memory where the storage location is located, and the suffix being the last two bits of the binary code of the address number of the storage location in its corresponding memory;

[0038] The storage location of each memory is partitioned based on the suffix, and the address codes of the storage locations in the same partition within the same memory have the same suffix.

[0039] Identify a first-class partition and a second-class partition in each memory. The address codes of each storage location in the first-class partition are reversed to themselves, or the storage locations represented by the reversed address codes are in the same memory. The second-class partition is any other partition in the same memory besides the first-class partition.

[0040] Traverse and determine the inverse transformation position corresponding to each storage location of the first type partition in each memory;

[0041] Based on the prefix and suffix of the address codes of each storage location in the second type partition of each memory, the second type partitions in different memories are matched to obtain the second type partition matching relationship; wherein, the prefix and suffix of the address code of one partition in two mutually matched partitions are the suffix and prefix of the address code of the other partition.

[0042] Based on the second type of partition matching relationship, the inverse transformation position corresponding to each storage location in the second type partition of each memory is determined. Among the two matching second type partitions, only the inverse transformation position corresponding to each storage location in either partition is determined.

[0043] In this embodiment, the address encoding of each storage location further includes a base encoding. The base encoding of each storage location is located between the prefix and suffix of the address encoding corresponding to that storage location. The base encoding of each storage location is the binary encoding of the address number of that storage location in the memory, excluding the suffix. The processing module is further configured to:

[0044] Using the base codes corresponding to each storage location in the first type partition of each memory as the order, traverse and determine the inverse transform position corresponding to each storage location.

[0045] In this embodiment of the application, the processing module is configured to determine the inverse transformation position corresponding to each storage location in the first type partition of each memory by the following method:

[0046] If the reverse order of the address code of any storage location is itself, then the storage location itself is taken as its corresponding inverse transformation location.

[0047] If the reverse order of the address code of any storage location is different from its own, then the storage location corresponding to the reversed address code is taken as its corresponding inverse transformation location.

[0048] In this embodiment of the application, after determining the inverse transformation positions corresponding to each storage location contained in the first type of partition in each memory, the processing module is further configured to:

[0049] Based on the storage locations and corresponding inverse transformation locations contained in the first type partition of each memory, the data to be inverse transformed is read in parallel from the first type partition of each memory.

[0050] In this embodiment of the application, the processing module is further configured to:

[0051] Data is read in parallel from the first type partition of each memory according to a cycle; wherein each cycle includes two parallel reads. In each cycle, during the first read, data at a storage location to be inverted is read in parallel from the first type partition of each memory. During the second read, data is read in parallel from the inverse transformation location corresponding to the storage location to be inverted read in each memory during the first read.

[0052] This continues until all the memory locations to be inverted in each memory's first-class partition have been traversed.

[0053] In this embodiment of the application, the processing module is further configured to: when reading data in parallel from the first type partition of each memory according to the period, read in the order of the size of the base code of the storage location to be reverse-transformed contained in the first type partition of each memory.

[0054] In this embodiment of the application, the processing module is further configured as follows:

[0055] If the storage location to be inverted and read from the same memory for the first time is the same as the location to be inverted and read for the second time within the same cycle, no data exchange will be performed.

[0056] If they are different, the data to be inversely transformed at the storage location to be inversely transformed will be replaced with the inversely transformed data read from the inversely transformed location for the second time.

[0057] In this embodiment of the application, the address encoding of each storage location also includes a base encoding. The base encoding of each storage location is located between the prefix and suffix of the address encoding corresponding to the storage location. The base encoding of each storage location is the binary encoding of the address number of the storage location in the memory excluding the suffix.

[0058] The processing module is further configured to determine the inverse transformation position corresponding to each storage location in the second type partition of each memory based on the following method:

[0059] Using the base encoding of the storage location of any of the two matching second-class partitions as the order, the inverse transformation position corresponding to the storage location of any partition is determined by traversing. The base encodings of the two storage locations with mutually inverse transformation positions are in reverse order.

[0060] In this embodiment of the application, after determining the inverse transformation position corresponding to each storage location in the second type partition of each memory, the processing module is further configured to:

[0061] Based on the inverse transformation positions corresponding to each storage location of the second type partition in each memory, the data to be inversely transformed is read from two storage locations in each memory in parallel for inverse transformation processing.

[0062] Among the four storage locations read from two matching second-class partitions, two storage locations in one partition and two storage locations in the other partition are inverse transformation locations of each other.

[0063] In this embodiment of the application, when reading the data to be transformed from two storage locations in parallel from each memory, the processing module is further configured to:

[0064] In two matching second-class partitions, the data is read in order of the size of the base code of each storage location in either partition.

[0065] This application also proposes a readable storage medium including instructions that, when executed on a computing device, cause the computing device to perform any of the methods described above.

[0066] This application also proposes a chip that includes the data processing apparatus described in any of the above embodiments.

[0067] In this embodiment, the storage locations in each memory are partitioned, and each partition in each memory is further divided into a first type of partition and a second type of partition. For the first type of partition, the inverse transformation position corresponding to the storage location contained in the first type of partition in each memory is located in the memory itself. When determining the inverse transformation position corresponding to the storage location in the first type of partition of each memory, all storage locations in the first type of partition of each memory can be traversed to determine the inverse transformation position. For the second type of partition, the inverse transformation position corresponding to each partition contained in the second type of partition of each memory is located in the partitions of other memories. Moreover, based on the prefix and suffix corresponding to each partition, the matching relationship between the second type of partitions of each memory can be determined. After determining the matching relationship between the second type of partitions of each memory, for two mutually matching partitions, it is only necessary to traverse to determine the inverse transformation position corresponding to the storage location in one of the partitions, and the other partition does not need to be traversed again. Existing technologies determine the inverse transformation position corresponding to each storage location by traversing through the entire storage location. For two storage locations that are inverse transformation positions of each other, their respective inverse transformation positions must be determined twice. In contrast, in the embodiments of this application, duplicate determination only occurs in the first type of partition, while duplicate determination does not occur in the second type of partition. Therefore, the data processing method in this application can reduce the number of duplicate determinations to a certain extent when determining the inverse transformation position corresponding to each storage location, providing a basis for reducing duplicate determinations during subsequent inverse transformations. Attached Figure Description

[0068] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0069] Figure 1 This is a flowchart illustrating the steps of a data processing method in one embodiment of this application;

[0070] Figure 2 This is a block diagram of a data processing apparatus according to an embodiment of this application;

[0071] Figure 3 This is a block diagram of a readable storage medium according to one embodiment of this application.

[0072] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0073] The principles and spirit of this application will now be described with reference to several exemplary embodiments. It should be understood that these embodiments are provided merely to enable those skilled in the art to better understand and implement this application, and are not intended to limit the scope of this application in any way. Rather, these embodiments are provided to make this disclosure more thorough and complete, and to fully convey the scope of this disclosure to those skilled in the art.

[0074] Those skilled in the art will recognize that embodiments of this application can be implemented as a system, device, method, or computer program product. Therefore, this disclosure can be specifically implemented in the following forms: entirely hardware, entirely software (including firmware, resident software, microcode, etc.), or a combination of hardware and software.

[0075] According to embodiments of this application, a data processing method, apparatus, medium, and chip are proposed.

[0076] In this article, it is important to understand that any number of elements in the accompanying figures is for illustrative purposes and not for limitation, and any naming is for distinction only and has no limiting meaning.

[0077] The principles and spirit of this application will be explained in detail below with reference to several representative embodiments.

[0078] Exemplary methods

[0079] This exemplary embodiment proposes a data processing method applied in the field of encryption, wherein, as Figure 1 As shown in the embodiments of this application, the data processing method includes the following steps S100-S700:

[0080] Step S100: Determine the storage locations in each memory used to store the data to be inverted.

[0081] Assuming the sequence length of the data to be processed during the number-theoretical transformation is 64 and the parallelism is 4, meaning there are four memories to store the results of the butterfly computations in each stage of the number-theoretical transformation. As shown in Table 1, memories 0-3 in Table 1 represent the memories used for the number-theoretical transformation of the data with a sequence length of 64. Here, "0-3" are the memory numbers. The sequence length of the data to be processed is 64, meaning there are 64 butterfly computation results in each stage of the number-theoretical transformation, evenly stored across the four memories. Each memory provides 16 storage locations. The columns 0-15 in Table 1 corresponding to each memory are the address numbers of the 16 storage locations in each memory. Therefore, based on the sequence length and parallelism of the data undergoing the number-theoretical transformation, the memories and storage locations required in the inverse transformation process can be determined.

[0082] Table 1

[0083]

[0084] Step S200: Assign an address code to each storage location; the address code of each storage location includes at least a prefix and a suffix, wherein the prefix is ​​the binary code of the number of the memory where the storage location is located, and the suffix is ​​the last two bits of the binary code of the address number of the storage location in its corresponding memory.

[0085] As shown in Table 1 above, after determining the memory required for the inverse transformation and the storage location in each memory, an address code is assigned to each storage location in each memory in step S200.

[0086] In this embodiment of the application, the address encoding includes two parts: the first part is the binary encoding of each memory number, and the second part is the binary encoding of the address number of each storage location in its respective memory.

[0087] For example, memory 0 is numbered 0, and its corresponding binary code is 00;

[0088] The memory 1 is numbered 1, and its corresponding binary code is 01;

[0089] The memory 2 is numbered 2, and its corresponding binary code is 10;

[0090] The memory cell 3 is numbered 3, and its corresponding binary code is 11.

[0091] For storage locations in the memory, each memory includes 16 storage locations from 0 to 15, with address numbers ranging from 0 to 15. When converting the address numbers of storage locations into binary codes, the number of bits in the binary code is determined by the largest address number. For example, in this embodiment, the largest address number is 15, and its corresponding binary code is 1111, so the number of bits is 4. That is, 0-15 can all be converted into 4-bit binary codes, as shown in Table 2 below. Table 2 shows the address codes of each storage location in memory 0-3:

[0092] Table 2

[0093]

[0094] As shown in Table 2 above, taking the address code 000100 corresponding to the storage location of address number 4 in memory 0 as an example, the first two 00s are the prefix of the address code corresponding to the storage location of address number 4 in memory 0, representing that the binary code of the memory number where the storage location is located is 00. The last four 0100s represent that the binary code of the address number of the storage location in its memory is 0100. Therefore, the last two 00s of 0100 are the suffix of the address code corresponding to the storage location of address number 4 in memory 0.

[0095] Step S300: Partition the storage location of each memory based on the suffix, and the address codes of the storage locations of the same partition in the same memory have the same suffix.

[0096] As shown in Table 2 above, for memories 0, 1, 2, and 3, the address codes of their respective 16 storage locations all have suffixes of 00, 01, 10, and 11. Therefore, memories 0, 1, 2, and 3 can each be partitioned into four regions according to their suffixes: the storage location with the suffix 00 is region 0, the storage location with the suffix 01 is region 1, the storage location with the suffix 10 is region 2, and the storage location with the suffix 11 is region 3. See Table 3 below:

[0097] Table 3

[0098]

[0099] As shown in Table 3 above, memory 0-3 each include four partitions. Taking memory 0 as an example, partition 0 includes four storage locations with address numbers 0, 4, 8, and 12, and the address codes corresponding to the four storage locations in partition 0 all have the suffix 00; partition 1 includes four storage locations with address numbers 1, 5, 9, and 13, and the address codes corresponding to the four storage locations in partition 1 all have the suffix 01; partition 2 includes four storage locations with address numbers 2, 6, 10, and 14, and the address codes corresponding to the four storage locations in partition 2 all have the suffix 10; partition 3 includes four storage locations with address numbers 3, 7, 11, and 15, and the address codes corresponding to the four storage locations in partition 3 all have the suffix 11.

[0100] Step S400: Determine the first type partition and the second type partition in each memory. The address codes of each storage location in the first type partition remain unchanged after reversing the order, or the storage locations represented by the reversed address codes are in the same memory. The second type partition is other partitions in the same memory besides the first type partition.

[0101] For memory 0, partition 0 contains four storage locations with address numbers 0, 4, 8, and 12, corresponding to address codes 000000, 000100, 001000, and 001100, respectively. The address codes for addresses 0 and 12, when reversed, remain the same. The address codes for addresses 4 and 8 are reversed; that is, the address code for address 4, when reversed, becomes the address code for address 8, both still located in memory 0. Similarly, the address code for address 8, when reversed, becomes the address code for address 4, also still located in memory 0. Therefore, partition 0 is the first type of partition in memory 0. The storage locations in partitions 1, 2, and 3, when their address codes are reversed, all reside in other memories; therefore, partitions 1, 2, and 3 are the second type of partitions in memory 0.

[0102] Similarly, in memory 1, the first type of partition is partition 2, and the second type of partition includes partitions 0, 1, and 3; in memory 2, the first type of partition is partition 1, and the second type of partition includes partitions 0, 2, and 3; in memory 3, the first type of partition is partition 3, and the second type of partition includes partitions 0, 1, and 2.

[0103] As shown in Table 4 below, Table 4 shows a schematic diagram of the first and second type partitions of each memory.

[0104] Table 4

[0105]

[0106] As shown in Table 4 above, if the reverse order of the address codes of each storage location in the first type partition of each memory is itself, or if the storage location of the reversed code is still the same memory, then when performing an inverse transformation on the data in the first type partition of each memory, the two pairs of data to be transformed that are paired and swapped can be read from the same memory. However, the storage locations of the reversed codes of each storage location in the second type partition of each memory are all located in other memories. Therefore, when performing an inverse transformation on the data in the second type partition of each memory, it is necessary to read one pair of data to be transformed from each of the two memories and swap their positions.

[0107] Based on this, in this embodiment of the application, the inverse transformation position corresponding to each storage location of the first type partition in each memory can be determined first, that is, step S500: traverse and determine the inverse transformation position corresponding to each storage location of the first type partition in each memory.

[0108] In the embodiments of this application, the inverse transformation position corresponding to each storage location contained in the first type partition in each memory can be determined by traversing and determining.

[0109] For example, as shown in Table 4 above, for memory 0, the first type of partition in memory 0 includes four storage locations, and the address codes of the four storage locations are 000000, 000100, 001000, and 001100, respectively. Therefore, the four address codes can be traversed to determine the reverse address codes corresponding to the four address codes.

[0110] For example, the reverse of 000000 is 000000, which means that the reverse of the reverse is itself. This means that the reverse transformation of the storage location with address code 000000 in memory 0 is itself.

[0111] The reverse of 000100 is 001000, which means that the reverse transformation of the storage location with address code 000100 in memory 0 is the storage location with address code 001000.

[0112] The reverse of 001000 is 000100, which means that the reverse transformation of the storage location with address code 001000 in memory 0 is the storage location with address code 000100.

[0113] The reverse of 001100 is 001100, meaning the reverse order is itself. This represents the reverse transformation of the storage location in memory 0 with address code 001100, which is itself.

[0114] In addition, in the embodiments of this application, the address encoding of each storage location also includes a base encoding. The base encoding of each storage location is located between the prefix and suffix of the address encoding corresponding to that storage location. The encoding between the prefix and suffix of each address encoding is the base encoding. That is, the base encoding of each storage location is the binary encoding of the address number of that storage location in the memory excluding the prefix and suffix.

[0115] For example, as shown in Table 1 above, for the address code 110011, its prefix is ​​11, its base code is 00, and its suffix is ​​11.

[0116] Based on this, for the first type partition in each memory, the prefix and suffix of the address codes of the storage locations contained in the first type partition in each memory are the same, and the base codes are from small to large. For example, for the address codes of the four storage locations in the first type partition of memory 0, the prefix is ​​00, the suffix is ​​00, and the base codes are 00, 01, 10, and 11, respectively.

[0117] Therefore, when traversing and determining the inverse transform position corresponding to each storage location of the first type partition in each memory, the inverse transform position corresponding to each storage location can be determined in order of the base encoding corresponding to each storage location contained in the first type partition of each memory.

[0118] For example, if the base codes corresponding to the storage locations in the first type partition of memory 0 are 00, 01, 10, and 11, then the inverse transformation position corresponding to each storage location can be determined by traversing the base codes 00, 01, 10, and 11 in that order.

[0119] For example, as shown in Table 5 below, Table 5 illustrates a schematic diagram of traversing the inverse transformation positions corresponding to each storage location of the first type partition in each memory according to the base encoding order.

[0120] Table 5

[0121]

[0122] As shown in Table 5 above, Addr is the base code, and Addr_inv is the base code for obtaining the reverse address code. In Table 5, the four memories can be traversed according to Addr = 00, 01, 10, 11 to determine the inverse transformation position corresponding to each storage location contained in the first type partition of each memory.

[0123] In addition, in the embodiments of this application, if the reverse order of the address code of any storage location is itself, then the storage location itself is taken as its corresponding inverse transformation location.

[0124] If the reverse order of the address code of any storage location is different from its own, then the storage location corresponding to the reversed address code is taken as its corresponding inverse transformation location.

[0125] For example, in Table 5 above, when Addr = 00, memory 0 determines the inverse transformation position of the storage location with address code 00000. The inverse address code is 00000, and the corresponding Addr_inv = 00, which means that the inverse transformation position corresponding to the storage location with address code 00000 in memory 0 is itself.

[0126] For example, in Table 5 above, when Addr = 01, memory 0 determines the inverse transformation position of the storage location with address code 00010, and the reverse address code is 01000. The corresponding Addr_inv = 10 means that the address code of the inverse transformation position corresponding to the storage location with address code 00010 in memory 0 is 01000.

[0127] Similarly, following the base encoding order, we can traverse and determine the inverse transformation positions corresponding to each storage location in the first type partitions of memory 1, 2, and 3. As shown in Table 5 above:

[0128] For memory 1

[0129] The reverse of 010010 is 010010, which means that the reverse is itself. This means that the reverse transformation of the storage location with address code 010010 in memory 1 is itself.

[0130] The reverse of 010110 is 011010, which means that the reverse transformation of the storage location with address code 010110 in memory 1 is the storage location with address code 011010.

[0131] The reverse of 011010 is 010110, which means that the reverse transformation of the storage location with address code 011010 in memory 1 is the storage location with address code 010110.

[0132] The reverse of 011110 is 011110, which means the reverse is itself. This means that the reverse transformation of the storage location with address code 011110 in memory 1 is itself.

[0133] For memory 2

[0134] The reverse of 100001 is 100001, which means that the reverse is itself. This means that the reverse transformation of the storage location with address code 100001 in memory 2 is itself.

[0135] The reverse of 100101 is 101001, which means that the reverse transformation of the storage location with address code 100101 in memory 2 is the storage location with address code 101001.

[0136] The reverse of 101001 is 100101, which means that the reverse transformation of the storage location with address code 101001 in memory 2 is the storage location with address code 100101.

[0137] The reverse of 101101 is 101101, which means that the reverse is itself. This means that the reverse transformation of the storage location with address code 101101 in memory 2 is itself.

[0138] For memory 3

[0139] The reverse of 110011 is 110011, which means that the reverse of the address is itself. This means that the reverse transformation of the storage location with address code 110011 in memory 3 is itself.

[0140] The reverse of 110111 is 111011, which means that the reverse transformation of the storage location with address code 110111 in memory 3 is the storage location with address code 111011.

[0141] The reverse of 111011 is 110111, which means that the reverse transformation of the storage location with address code 111011 in memory 3 is the storage location with address code 110111.

[0142] The reverse of 111111 is 111111, which means the reverse is itself. This means that the reverse transformation of the storage location in memory 3 with address code 1111111 is itself.

[0143] The above explains how to determine the inverse transformation position in the first type of partition of each memory. Next, we will explain how to determine the inverse transformation position corresponding to each memory location in the second type of partition.

[0144] Step S600: Based on the prefix and suffix in the address codes of each storage location in the second type partition of each memory, match each second type partition in different memories to obtain the matching relationship of the second type partitions; wherein, the prefix and suffix of the address code of one partition in two mutually matching partitions are the suffix and prefix of the address code of the other partition.

[0145] As shown in Table 4 above, for memory 0, partition 1 of its second type of partition includes four storage locations, with address codes of 000001, 000101, 001001, and 001101 respectively. It can be seen that the prefix of all four address codes in partition 1 is 00, and the suffix is ​​01. Therefore, reversing the four address codes will result in a prefix of 10 and a suffix of 00. Table 5 shows that the prefix of the address codes corresponding to each storage location in partition 0 of the second type of partition in memory 2 is 10, and the suffix is ​​00. A comparison of partition 1 of memory 0 and partition 0 of memory 2 is as follows:

[0146] The 000001 in partition 1 of memory 0, when reversed, becomes 100000 in partition 0 of memory 2;

[0147] The 000101 in partition 1 of memory 0, when reversed, becomes 101000 in partition 0 of memory 2;

[0148] The 001001 in partition 1 of memory 0, when reversed, becomes 100100 in partition 0 of memory 2;

[0149] The reverse order of 001101 in partition 1 of memory 0 becomes 101100 in partition 0 of memory 2.

[0150] That is, the inverse transformation positions corresponding to the four storage locations in partition 1 of memory 0 are the four locations in partition 0 of memory 2, and partition 1 of memory 0 matches partition 0 of memory 2.

[0151] Similarly, it can also be determined that partition 2 of memory 0 matches partition 0 of memory 1;

[0152] Partition 3 of memory 0 matches partition 0 of memory 3;

[0153] Partition 3 of memory 1 matches partition 2 of memory 3;

[0154] Partition 1 of memory 1 matches partition 2 of memory 2.

[0155] Therefore, based on the prefix and suffix of the storage location in each partition, the second type of partition matching relationship can be obtained as shown in Table 6 below:

[0156] Table 6

[0157]

[0158] As shown in Table 6 above, in the same row, two partitions with the same color are two matching partitions. For example, in the first row, partition 2 matches partition 0 and partition 3 matches partition 1. In the second row, partition 1 matches partition 0 and partition 3 matches partition 2. In the third row, partition 3 matches partition 0 and partition 1 matches partition 2.

[0159] After obtaining the second type of partition matching relationship, the inverse transformation position corresponding to each storage location in the second type of partition of each memory can be determined based on the second type of partition matching relationship, that is, the following step S700: Based on the second type of partition matching relationship, the inverse transformation position corresponding to each storage location in the second type of partition of each memory can be determined. Among the two matching second type of partitions, only the inverse transformation position corresponding to each storage location in any one of the partitions is determined.

[0160] As shown in Table 6 above, partition 2 of memory 0 matches partition 0 of memory 1. The address codes of the four storage locations in partition 2 of memory 0, when reversed, must be the four locations in partition 0 of memory 1. Therefore, by simply traversing and determining the inverse transformation positions corresponding to each storage location in partition 2 of memory 0, or by simply traversing and determining the inverse transformation positions corresponding to each storage location in partition 0 of memory 1, the inverse transformation positions corresponding to each storage location in partition 2 of memory 0 and partition 0 of memory 1 can be determined.

[0161] Therefore, in this embodiment of the application, when determining the inverse transformation position corresponding to each storage location in the second type partition of each memory based on the second type partition matching relationship, it is only necessary to traverse and determine the inverse transformation position corresponding to each storage location in any one of the two matching second type partitions, thereby reducing the data reading time by half.

[0162] In this embodiment, the storage locations in each memory are partitioned, and each partition in each memory is further divided into a first type of partition and a second type of partition. For the first type of partition, the inverse transformation position corresponding to the storage location contained in the first type of partition in each memory is located in the memory itself. When determining the inverse transformation position corresponding to the storage location in the first type of partition of each memory, all storage locations in the first type of partition of each memory can be traversed to determine the inverse transformation position. For the second type of partition, the inverse transformation position corresponding to each partition contained in the second type of partition of each memory is located in the partitions of other memories. Moreover, based on the prefix and suffix corresponding to each partition, the matching relationship between the second type of partitions of each memory can be determined. After determining the matching relationship between the second type of partitions of each memory, for two mutually matching partitions, it is only necessary to traverse to determine the inverse transformation position corresponding to the storage location in one of the partitions, and the other partition does not need to be traversed again. Existing technologies determine the inverse transformation position corresponding to each storage location by traversing through the entire storage location. For two storage locations that are inverse transformation positions of each other, their respective inverse transformation positions must be determined twice. In contrast, in the embodiments of this application, duplicate determination only occurs in the first type of partition, while duplicate determination does not occur in the second type of partition. Therefore, the data processing method in this application can reduce the number of duplicate determinations to a certain extent when determining the inverse transformation position corresponding to each storage location, providing a basis for reducing duplicate determinations during subsequent inverse transformations.

[0163] In this embodiment of the application, after determining the inverse transformation positions corresponding to each storage location in the first type of partition and the second type of partition, the inverse transformation operation can be performed.

[0164] For example, in this embodiment of the application, the first type of partition can be subjected to an inverse transformation operation first.

[0165] In this embodiment of the application, based on the storage locations and corresponding inverse transformation locations contained in the first type partition of each memory, the data to be inverse transformed is read in parallel from the first type partition of each memory.

[0166] In this embodiment of the application, when reading data from each memory in parallel, data is read from the first type partition of each memory in parallel according to a preset cycle; wherein, each cycle includes two parallel reads, in each cycle, during the first read, data at a storage location to be inverted is read from the first type partition of each memory in parallel, and during the second read, data is read from the inverse transformation location corresponding to the storage location to be inverted read in each memory in parallel.

[0167] This continues until all the memory locations to be inverted in each memory's first-class partition have been traversed.

[0168] For example, as shown in Table 4 above, each of the first-class partitions of memories 0-3 includes four storage locations. That is, each of the first-class partitions of memories 0-3 contains four storage locations to be inverted. Therefore, during each parallel data read, data can be read from one storage location to be inverted in each memory. Furthermore, since the inverse transformation locations corresponding to each storage location in the first-class partition are themselves or located in the same memory, a cycle requires two separate reads. During the first read, the data to be inverted is read from the storage locations to be inverted in each memory. During the second read, the inverse transformation data from the inverse transformation location corresponding to the storage location read in the first read is read.

[0169] For example, as shown in Table 5, the first step involves reading the data to be inverted from the memory locations 0-3, with address codes 000000, 010010, 100001, and 110011 respectively. The second step involves reading the inverse transformation positions corresponding to the memory locations 000000, 010010, 100001, and 110011 respectively. It should be noted that since the inverse transformation positions corresponding to the memory locations 000000, 010010, 100001, and 110011 are themselves, the data is read from the same location in both steps within the same memory. If the inverse transformation position is not itself, the memory locations read in the two steps will be different.

[0170] In addition, in the embodiments of this application, when reading data in parallel from the first type partition of each memory according to the period, the data is read in the order of the size of the base code of the storage location to be reverse-transformed contained in the first type partition of each memory.

[0171] For example, as shown in Table 5 above, the base codes of the storage locations to be inverted in each memory's first type partition are 00, 01, 10, and 11, respectively. Therefore, according to the order of the base codes 00, 01, 10, and 11, it can be divided into four cycles, and the corresponding data to be inverted can be read from each memory in parallel.

[0172] For example, in period 0, when Addr=00, the base code of the storage location to be inversely transformed is 00. As shown in Table 5, the address code of the storage location to be inversely transformed is 000000, and the address code of the corresponding inverse transformation location is 000000. Therefore, in period 0, the data at the storage locations with address codes 00000 and 000000 are read from the memory twice in succession.

[0173] Similarly, for memory 1, the base code of the storage location to be inversely transformed is 00, the address code of the storage location to be inversely transformed is 010010, and the address code of the corresponding inversely transformed location is 010010. Therefore, in cycle 0, data at the storage locations with address codes 010010 and 010010 are read from memory 1 twice in succession.

[0174] For memory 2, the base code of the storage location to be inversely transformed is 00, the address code of the storage location to be inversely transformed is 100001, and the address code of the corresponding inversely transformed location is 100001. Therefore, in cycle 0, the data at the storage locations with address codes 100001 and 100001 are read twice in succession.

[0175] For memory 3, the base code of the storage location to be inversely transformed is 00, the address code of the storage location to be inversely transformed is 110011, and the address code of the corresponding inversely transformed location is 110011. Therefore, in cycle 0, the data at the storage locations with address codes 110011 and 110011 are read twice in succession.

[0176] This process continues until all the data with inverse transformation in the storage location corresponding to Addr=11 has been read.

[0177] In addition, in the embodiments of this application, if the storage location to be inverted and read from the same memory for the first time and the inverted transformation location for the second time are the same within the same cycle, no data exchange is performed.

[0178] If they are different, the data to be inversely transformed at the storage location to be inversely transformed will be replaced with the inversely transformed data read from the inversely transformed location for the second time.

[0179] For example, in periods 0 and 3, i.e. Addr=00 and 11, the storage location to be reversed and its corresponding reversed location in the same memory are the same storage location. That is, the two data read from the same memory are the same. In this case, no data exchange is performed, i.e. the data at the storage location to be reversed is not changed.

[0180] For example, in period 1 and period 2, i.e. when Addr=01 and 10, the storage location to be inverted and its corresponding inverse transformation location read from the same memory are not the same storage location. That is, the two data read from the same memory are different. In this case, the data read from Addr will be replaced with the data read from Addr_inv. That is, for the same memory, the data to be inverted read from the storage location to be inverted for the first time will be replaced with the inverse transformation data read from the inverse transformation location for the second time.

[0181] After introducing how to perform inverse transformation processing on the data of the first type partition of each memory in parallel, the next step is to introduce how to perform inverse transformation processing on the data of the second type partition of each memory.

[0182] As shown in Table 6 above, Table 6 illustrates the matching relationships between the second-class partitions of each memory. In this embodiment, the inverse transformation position corresponding to each storage location in the second-class partition of each memory can be determined based on the matching relationships between the second-class partitions of each memory.

[0183] For example, in this embodiment of the application, the base encoding of the storage location of any partition in two mutually matching second-type partitions is used as the order to traverse and determine the inverse transformation position corresponding to the storage location of any partition, wherein the base encodings of the two storage locations of the mutually inverse transformation positions are in reverse order.

[0184] For example, as shown in Table 6 above, partition 2 of memory 0 matches partition 0 of memory 1. The base encoding of each storage location in partition 2 of memory 0 can be used as the order to traverse and determine the inverse transformation position of each storage location in partition 2 of memory 0 in partition 0 of memory 1, as shown in Table 7 below:

[0185] Table 7

[0186]

[0187] Partition 1 of memory 0 and partition 0 of memory 2 are matched. The base encoding of each storage location in partition 1 of memory 0 can be used as the order to traverse and determine the inverse transformation position of each storage location in partition 1 of memory 0 in partition 0 of memory 2, as shown in Table 8 below:

[0188] Table 8

[0189]

[0190] Partition 3 of memory 0 is matched with partition 0 of memory 3. The base encoding of each storage location in partition 3 of memory 0 can be used as the order to traverse and determine the inverse transformation position of each storage location in partition 3 of memory 0 in partition 0 of memory 3, as shown in Table 9 below:

[0191] Table 9

[0192]

[0193] Partition 3 of memory 1 is matched with partition 2 of memory 3. The base encoding of each storage location in partition 3 of memory 1 can be used as the order to traverse and determine the inverse transformation position of each storage location in partition 3 of memory 1 in partition 2 of memory 3, as shown in Table 10 below:

[0194] Table 10

[0195]

[0196] Partition 1 of memory 1 is matched with partition 2 of memory 2. The base encoding of each storage location in partition 1 of memory 1 is used as the order to traverse and determine the inverse transformation position of each storage location in partition 1 of memory 1 in partition 2 of memory 2, as shown in Table 11 below:

[0197] Table 11

[0198]

[0199] Partition 3 of memory 2 is matched with partition 1 of memory 3. The base encoding of each storage location in partition 3 of memory 2 can be used as the order to traverse and determine the inverse transformation position of each storage location in partition 3 of memory 2 in partition 1 of memory 3, as shown in Table 12 below:

[0200] Table 12

[0201]

[0202] Table 7-12 above shows the matching relationship of inverse transformation positions among the various storage locations contained in the second type partition of each memory.

[0203] In this embodiment of the application, after determining the inverse transformation position corresponding to each storage location in the second type partition of each memory, the data to be inversely transformed can be read in parallel from each memory based on the inverse transformation position corresponding to each storage location in the second type partition of each memory for inverse transformation processing.

[0204] In this process, each time inverse transformation data is read in parallel from each memory, every two memories form a pair, and the two storage locations read from the two memories in the same pair are inverse transformation locations of each other. Different pairs contain different memories.

[0205] For example, as shown in Table 7 and Table 12 above, each table involves two memories, that is, a pair of memories, and the storage locations contained in the two memories in each table are inverse transformation locations of each other. Therefore, the data to be inverse transformed can be read from the storage locations in each memory in parallel according to the above Tables 7-12.

[0206] For example, in the first stage, memory 0 and memory 2 are a pair, and memory 1 and memory 3 are another pair. By pairing them in this way, the storage locations in partition 1 of memory 0, partition 0 of memory 2, partition 3 of memory 1, and partition 2 of memory 3 can be read.

[0207] In the second stage, memory 1 and memory 2 are the first pair, while memory 0 and memory 3 are the other pair. By pairing them in this way, the storage locations in partition 1 of memory 1, partition 2 of memory 2, partition 3 of memory 0, and partition 0 of memory 3 can be read.

[0208] In the third stage, memory 0 and memory 1 are the first pair, and memory 2 and memory 3 are the other pair. By pairing them in this way, the storage locations in partition 2 of memory 0, partition 0 of memory 1, partition 3 of memory 2, and partition 11 of memory 3 can be read.

[0209] Through the above three stages, all the data to be inverted and transformed in the storage locations contained in the second type partition of the entire memory can be read.

[0210] Additionally, it should be noted that the order of the three stages mentioned above is not limited.

[0211] In the embodiments of this application, when reading the data to be transformed from two storage locations in parallel from each memory, the two matching second-type partitions are read in the order of the base code of each storage location in any partition.

[0212] For example, taking the three stages mentioned above as an example, in the first stage, the data is read in parallel according to the base code size, as shown in Table 13 below:

[0213] Table 13

[0214]

[0215] In the second stage, data is read in parallel according to the base code size, as shown in Table 14 below:

[0216] Table 14

[0217]

[0218] In the third stage, data is read in parallel according to the base code size, as shown in Table 15 below:

[0219] Table 15

[0220]

[0221] Taking the first stage as an example, when Addr=0, data is read from memory location 000001, data is read from memory location 100000, data is read from memory location 100000, data is read from memory location 010011, and data is read from memory location 110010. Furthermore, data read from memory location 0 is exchanged with data read from memory location 2, and data read from memory location 1 is exchanged with data read from memory location 3.

[0222] After all three stages are completed, the inverse transformation process of the second type of partition in each memory is finished.

[0223] In this embodiment, the storage locations in each memory are partitioned, and each partition in each memory is further divided into a first type of partition and a second type of partition. For the first type of partition, the inverse transformation position corresponding to the storage location contained in the first type of partition in each memory is located in the memory itself. When determining the inverse transformation position corresponding to the storage location in the first type of partition of each memory, all storage locations in the first type of partition of each memory can be traversed to determine the inverse transformation position. For the second type of partition, the inverse transformation position corresponding to each partition contained in the second type of partition of each memory is located in the partitions of other memories. Moreover, based on the prefix and suffix corresponding to each partition, the matching relationship between the second type of partitions of each memory can be determined. After determining the matching relationship between the second type of partitions of each memory, for two mutually matching partitions, it is only necessary to traverse to determine the inverse transformation position corresponding to the storage location in one of the partitions, and the other partition does not need to be traversed again. Existing technologies determine the inverse transformation position corresponding to each storage location by traversing through the entire storage location. For two storage locations that are inverse transformation positions of each other, their respective inverse transformation positions must be determined twice. In contrast, in the embodiments of this application, duplicate determination only occurs in the first type of partition, while duplicate determination does not occur in the second type of partition. Therefore, the data processing method in this application can reduce the number of duplicate determinations to a certain extent when determining the inverse transformation position corresponding to each storage location, providing a basis for reducing duplicate determinations during subsequent inverse transformations.

[0224] Exemplary device

[0225] like Figure 2 As shown, this application also proposes a data processing apparatus 100, which includes:

[0226] Determining module 110, the determining module 110 is used to determine each storage location in each memory storing the data to be inverted;

[0227] The processing module 120 is used to assign address codes to each storage location; the address code of each storage location includes at least a prefix and a suffix, the prefix being the binary code of the number of the memory where the storage location is located, and the suffix being the last two bits of the binary code of the address number of the storage location in its corresponding memory;

[0228] The storage location of each memory is partitioned based on the suffix, and the address codes of the storage locations in the same partition within the same memory have the same suffix.

[0229] Identify a first-class partition and a second-class partition in each memory. The address codes of each storage location in the first-class partition are reversed to themselves, or the storage locations represented by the reversed address codes are in the same memory. The second-class partition is any other partition in the same memory besides the first-class partition.

[0230] Traverse and determine the inverse transformation position corresponding to each storage location of the first type partition in each memory;

[0231] Based on the prefix and suffix of the address codes of each storage location in the second type partition of each memory, the second type partitions in different memories are matched to obtain the second type partition matching relationship; wherein, the prefix and suffix of the address code of one partition in two mutually matched partitions are the suffix and prefix of the address code of the other partition.

[0232] Based on the second type of partition matching relationship, the inverse transformation position corresponding to each storage location in the second type partition of each memory is determined. Among the two matching second type partitions, only the inverse transformation position corresponding to each storage location in either partition is determined.

[0233] In this embodiment, the address encoding of each storage location further includes a base encoding. The base encoding of each storage location is located between the prefix and suffix of the address encoding corresponding to that storage location. The base encoding of each storage location is the binary encoding of the address number of that storage location in the memory, excluding the suffix. The processing module 120 is further configured to:

[0234] Using the base codes corresponding to each storage location in the first type partition of each memory as the order, traverse and determine the inverse transform position corresponding to each storage location.

[0235] In this embodiment of the application, the processing module 120 is configured to determine the inverse transformation position corresponding to each storage location in the first type partition of each memory by the following method:

[0236] If the reverse order of the address code of any storage location is itself, then the storage location itself is taken as its corresponding inverse transformation location.

[0237] If the reverse order of the address code of any storage location is different from its own, then the storage location corresponding to the reversed address code is taken as its corresponding inverse transformation location.

[0238] In this embodiment of the application, after determining the inverse transformation positions corresponding to each storage location contained in the first type of partition in each memory, the processing module 120 is further configured to:

[0239] Based on the storage locations and corresponding inverse transformation locations contained in the first type partition of each memory, the data to be inverse transformed is read in parallel from the first type partition of each memory.

[0240] In this embodiment of the application, the processing module 120 is further configured to:

[0241] Data is read in parallel from the first type partition of each memory according to a cycle; wherein each cycle includes two parallel reads. In each cycle, during the first read, data at a storage location to be inverted is read in parallel from the first type partition of each memory. During the second read, data is read in parallel from the inverse transformation location corresponding to the storage location to be inverted read in each memory during the first read.

[0242] This continues until all the memory locations to be inverted in each memory's first-class partition have been traversed.

[0243] In this embodiment of the application, the processing module 120 is further configured to: when reading data in parallel from the first type partition of each memory according to the period, read in the order of the size of the base code of the storage location to be reverse-transformed contained in the first type partition of each memory.

[0244] In this embodiment of the application, the processing module 120 is further configured as follows:

[0245] If the storage location to be inverted and read from the same memory for the first time is the same as the location to be inverted and read for the second time within the same cycle, no data exchange will be performed.

[0246] If they are different, the data to be inversely transformed at the storage location to be inversely transformed will be replaced with the inversely transformed data read from the inversely transformed location for the second time.

[0247] In this embodiment of the application, the address encoding of each storage location also includes a base encoding. The base encoding of each storage location is located between the prefix and suffix of the address encoding corresponding to the storage location. The base encoding of each storage location is the binary encoding of the address number of the storage location in the memory excluding the suffix.

[0248] The processing module 120 is further configured to determine the inverse transformation position corresponding to each storage location in the second type partition of each memory based on the following method:

[0249] Using the base encoding of the storage location of any of the two matching second-class partitions as the order, the inverse transformation position corresponding to the storage location of any partition is determined by traversing. The base encodings of the two storage locations with mutually inverse transformation positions are in reverse order.

[0250] In this embodiment of the application, after determining the inverse transformation position corresponding to each storage location in the second type partition of each memory, the processing module 120 is further configured to:

[0251] Based on the inverse transformation positions corresponding to each storage location of the second type partition in each memory, the data to be inversely transformed is read from two storage locations in each memory in parallel for inverse transformation processing.

[0252] Among the four storage locations read from two matching second-class partitions, two storage locations in one partition and two storage locations in the other partition are inverse transformation locations of each other.

[0253] In this embodiment of the application, when reading the data to be transformed from two storage locations in parallel from various memories, the processing module 120 is further configured to:

[0254] In two matching second-class partitions, the data is read in order of the size of the base code of each storage location in either partition.

[0255] The specific implementation methods of each module in the data processing apparatus 100 proposed in this application embodiment are described in detail in the various embodiments of the above data processing method, and will not be repeated here.

[0256] In this embodiment, the processing module 120 partitions the storage locations in each memory, and further divides each partition in each memory into a first type of partition and a second type of partition. For the first type of partition, the inverse transformation position corresponding to the storage location contained in the first type of partition in each memory is located in the memory itself. When determining the inverse transformation position corresponding to the storage location in the first type of partition of each memory, all storage locations in the first type of partition of each memory can be traversed to determine the inverse transformation position. For the second type of partition, the inverse transformation position corresponding to each partition contained in the second type of partition of each memory is located in the partitions of other memories. Moreover, based on the prefix and suffix corresponding to each partition, the matching relationship between the second type of partitions of each memory can be determined. After determining the matching relationship between the second type of partitions of each memory, for two mutually matching partitions, it is only necessary to traverse to determine the inverse transformation position corresponding to the storage location in one of the partitions, and the other partition does not need to be traversed again. Existing technologies determine the inverse transformation position corresponding to each storage location by traversing through the entire storage location. For two storage locations that are inverse transformation positions of each other, their respective inverse transformation positions must be determined twice. In contrast, in the embodiments of this application, duplicate determination only occurs in the first type of partition, while duplicate determination does not occur in the second type of partition. Therefore, the data processing method in this application can reduce the number of duplicate determinations to a certain extent when determining the inverse transformation position corresponding to each storage location, providing a basis for reducing duplicate determinations during subsequent inverse transformations.

[0257] Exemplary media

[0258] After introducing the methods, media, and systems of exemplary embodiments of this application, the following references are made. Figure 3 The computer-readable storage medium of exemplary embodiments of this application will be described, please refer to... Figure 3The computer-readable storage medium shown is an optical disc 70, on which a computer program (i.e., a program product) is stored. When the computer program is run by a processor, it implements the steps described in the above method embodiments. For example, it determines each storage location in each memory for storing data to be inversely transformed; assigns an address code to each storage location; the address code of each storage location includes at least a prefix and a suffix, the prefix being the binary code of the memory number where the storage location is located, and the suffix being the last two bits of the binary code of the address number of the storage location in its corresponding memory; partitions the storage locations of each memory based on the suffix, with the address codes of storage locations in the same partition of the same memory having the same suffix; and determines a first type of partition and a second type of partition in each memory, wherein the address codes of each storage location in the first type of partition... The reverse order represents itself, or the memory location represented by the reversed address code is in the same memory; the second type of partition is the other partitions in the same memory besides the first type of partition; the inverse transformation position corresponding to each memory location of the first type of partition in each memory is determined by traversing; based on the prefix and suffix of the address codes of each memory location in the second type of partition in each memory, the second type of partitions in different memories are matched to obtain the second type of partition matching relationship; wherein, the prefix and suffix of the address code of one partition in two mutually matching partitions are the suffix and prefix of the address code of the other partition; based on the second type of partition matching relationship, the inverse transformation position corresponding to each memory location in the second type of partition in each memory is determined, wherein, in two mutually matching second type of partitions, only the inverse transformation position corresponding to each memory location in any one of the partitions is determined by traversing. The specific implementation method of each step will not be repeated here. It should be noted that examples of the computer-readable storage medium may also include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other optical and magnetic storage media, which will not be elaborated here.

[0259] Exemplary chip

[0260] After introducing the methods, circuits, and media of exemplary embodiments of this application, the chip of exemplary embodiments of this application will be described next.

[0261] In this application embodiment, a chip is proposed, including the data processing device described in any of the above embodiments. Since the chip includes the data processing device described in any of the above embodiments, all the beneficial effects of including the data processing device described in the above embodiments will not be elaborated here.

[0262] Finally, it should be noted that the above-described embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The protection scope of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the technical scope disclosed in this application. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be covered within the protection scope of this application. Therefore, the protection scope of this application should be determined by the protection scope of the claims.

[0263] Furthermore, although the operations of the method of this application are described in a specific order in the accompanying drawings, this does not require or imply that these operations must be performed in that specific order, or that all the operations shown must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0264] Based on the above description, the embodiments of this application provide the following technical solutions, but are not limited thereto:

[0265] 1. A data processing method, comprising:

[0266] Determine the storage locations in the various memories used to store the data to be inverted;

[0267] Each storage location is assigned an address code; the address code of each storage location includes at least a prefix and a suffix, wherein the prefix is ​​the binary code of the number of the memory where the storage location is located, and the suffix is ​​the last two bits of the binary code of the address number of the storage location in its corresponding memory;

[0268] The storage location of each memory is partitioned based on the suffix, and the address codes of the storage locations in the same partition within the same memory have the same suffix.

[0269] Identify a first-class partition and a second-class partition in each memory. The address codes of each storage location in the first-class partition are reversed to themselves, or the storage locations represented by the reversed address codes are in the same memory. The second-class partition is any other partition in the same memory besides the first-class partition.

[0270] Traverse and determine the inverse transformation position corresponding to each storage location of the first type partition in each memory;

[0271] Based on the prefix and suffix of the address codes of each storage location in the second type partition of each memory, the second type partitions in different memories are matched to obtain the second type partition matching relationship; wherein, the prefix and suffix of the address code of one partition in two mutually matched partitions are the suffix and prefix of the address code of the other partition.

[0272] Based on the second type of partition matching relationship, the inverse transformation position corresponding to each storage location in the second type partition of each memory is determined. Among the two matching second type partitions, only the inverse transformation position corresponding to each storage location in either partition is determined.

[0273] 2. The data processing method as described in technical solution 1, wherein the address code of each storage location further includes a base code, the base code of each storage location is located between the prefix and suffix of the address code corresponding to the storage location, and the base code of each storage location is the binary code of the address number of the storage location in the memory excluding the suffix;

[0274] The traversal to determine the inverse transformation position corresponding to each storage location of the first type partition in each memory includes:

[0275] Using the base codes corresponding to each storage location in the first type partition of each memory as the order, traverse and determine the inverse transform position corresponding to each storage location.

[0276] 3. The data processing method as described in technical solution 1 or 2 determines the inverse transformation position corresponding to each storage location in the first type partition of each memory using the following method:

[0277] If the reverse order of the address code of any storage location is itself, then the storage location itself is taken as its corresponding inverse transformation location.

[0278] If the reverse order of the address code of any storage location is different from its own, then the storage location corresponding to the reversed address code is taken as its corresponding inverse transformation location.

[0279] 4. The data processing method as described in any one of technical solutions 1-3, after determining the inverse transformation positions corresponding to each storage location contained in the first type of partition in each memory, the data processing method further includes:

[0280] Based on the storage locations and corresponding inverse transformation locations contained in the first type partition of each memory, the data to be inverse transformed is read in parallel from the first type partition of each memory.

[0281] 5. The data processing method as described in any one of technical solutions 1-4, based on the storage locations and corresponding inverse transformation locations contained in the first type partition of each memory, reads the data to be inverse transformed in parallel from the first type partition of each memory, including:

[0282] Data is read in parallel from the first type partition of each memory according to a cycle; wherein each cycle includes two parallel reads. In each cycle, during the first read, data at a storage location to be inverted is read in parallel from the first type partition of each memory. During the second read, data is read in parallel from the inverse transformation location corresponding to the storage location to be inverted read in each memory during the first read.

[0283] This continues until all the memory locations to be inverted in each memory's first-class partition have been traversed.

[0284] 6. In the data processing method described in any one of technical solutions 1-5, when reading data in parallel from the first type partition of each memory according to the period, the data is read in the order of the size of the base code of the storage location to be reverse-transformed contained in the first type partition of each memory.

[0285] 7. In the data processing method described in any one of technical solutions 1-6, if the storage location to be reverse-transformed read from the same memory for the first time and the reverse-transformed location read for the second time are the same within the same cycle, no data exchange is performed;

[0286] If they are different, the data to be inversely transformed at the storage location to be inversely transformed will be replaced with the inversely transformed data read from the inversely transformed location for the second time.

[0287] 8. The data processing method as described in any one of technical solutions 1-7, wherein the address code of each storage location further includes a base code, the base code of each storage location is located between the prefix and suffix of the address code corresponding to the storage location, and the base code of each storage location is the binary code of the address number of the storage location in the memory excluding the suffix;

[0288] The inverse transformation position corresponding to each storage location in the second type partition of each memory is determined based on the following method:

[0289] Using the base encoding of the storage location of any of the two matching second-class partitions as the order, the inverse transformation position corresponding to the storage location of any partition is determined by traversing. The base encodings of the two storage locations with mutually inverse transformation positions are in reverse order.

[0290] 9. The data processing method according to any one of technical solutions 1-8, after determining the inverse transformation position corresponding to each storage location in the second type partition of each memory, the data processing method further includes:

[0291] Based on the inverse transformation positions corresponding to each storage location of the second type partition in each memory, the data to be inversely transformed is read from two storage locations in each memory in parallel for inverse transformation processing.

[0292] Among the four storage locations read from two matching second-class partitions, two storage locations in one partition and two storage locations in the other partition are inverse transformation locations of each other.

[0293] 10. In the data processing method described in any one of technical solutions 1-9, when reading the data to be transformed from two storage locations in parallel from each memory, the two matching second-type partitions are read in order of the size of the base code of each storage location in any partition.

[0294] 11. A data processing apparatus, comprising:

[0295] The determining module is used to determine each storage location in each memory that stores the data to be inverted;

[0296] The processing module is used to assign address codes to each storage location; the address code of each storage location includes at least a prefix and a suffix, the prefix being the binary code of the number of the memory where the storage location is located, and the suffix being the last two bits of the binary code of the address number of the storage location in its corresponding memory;

[0297] The storage location of each memory is partitioned based on the suffix, and the address codes of the storage locations in the same partition within the same memory have the same suffix.

[0298] Identify a first-class partition and a second-class partition in each memory. The address codes of each storage location in the first-class partition are reversed to themselves, or the storage locations represented by the reversed address codes are in the same memory. The second-class partition is any other partition in the same memory besides the first-class partition.

[0299] Traverse and determine the inverse transformation position corresponding to each storage location of the first type partition in each memory;

[0300] Based on the prefix and suffix of the address codes of each storage location in the second type partition of each memory, the second type partitions in different memories are matched to obtain the second type partition matching relationship; wherein, the prefix and suffix of the address code of one partition in two mutually matched partitions are the suffix and prefix of the address code of the other partition.

[0301] Based on the second type of partition matching relationship, the inverse transformation position corresponding to each storage location in the second type partition of each memory is determined. Among the two matching second type partitions, only the inverse transformation position corresponding to each storage location in either partition is determined.

[0302] 12. The data processing apparatus as described in technical solution 11, wherein the address encoding of each storage location further includes a base encoding, the base encoding of each storage location is located between the prefix and suffix of the address encoding corresponding to that storage location, and the base encoding of each storage location is the binary encoding of the address number of that storage location in the memory excluding the suffix; the processing module is further configured to:

[0303] Using the base codes corresponding to each storage location in the first type partition of each memory as the order, traverse and determine the inverse transform position corresponding to each storage location.

[0304] 13. The data processing apparatus as described in technical solution 11 or 12, wherein the processing module is configured to determine the inverse transformation position corresponding to each storage location in the first type partition of each memory by means of the following method:

[0305] If the reverse order of the address code of any storage location is itself, then the storage location itself is taken as its corresponding inverse transformation location.

[0306] If the reverse order of the address code of any storage location is different from its own, then the storage location corresponding to the reversed address code is taken as its corresponding inverse transformation location.

[0307] 14. The data processing apparatus as described in any one of technical solutions 11-13, after determining the inverse transformation positions corresponding to each storage location contained in the first type of partition in each memory, the processing module is further configured to:

[0308] Based on the storage locations and corresponding inverse transformation locations contained in the first type partition of each memory, the data to be inverse transformed is read in parallel from the first type partition of each memory.

[0309] 15. The data processing apparatus as described in any one of technical solutions 11-14, wherein the processing module is further configured to:

[0310] Data is read in parallel from the first type partition of each memory according to a cycle; wherein each cycle includes two parallel reads. In each cycle, during the first read, data at a storage location to be inverted is read in parallel from the first type partition of each memory. During the second read, data is read in parallel from the inverse transformation location corresponding to the storage location to be inverted read in each memory during the first read.

[0311] This continues until all the memory locations to be inverted in each memory's first-class partition have been traversed.

[0312] 16. The data processing apparatus according to any one of technical solutions 11-15, wherein the processing module is further configured to: when reading data in parallel from the first type partition of each memory according to a period, read the data in the order of the size of the base code of the storage location to be reverse-transformed contained in the first type partition of each memory.

[0313] 17. The data processing apparatus as described in any one of technical solutions 11-16, wherein the processing module is further configured as follows:

[0314] If the storage location to be inverted and read from the same memory for the first time is the same as the location to be inverted and read for the second time within the same cycle, no data exchange will be performed.

[0315] If they are different, the data to be inversely transformed at the storage location to be inversely transformed will be replaced with the inversely transformed data read from the inversely transformed location for the second time.

[0316] 18. The data processing apparatus according to any one of technical solutions 11-17, wherein the address code of each storage location further includes a base code, the base code of each storage location is located between the prefix and suffix of the address code corresponding to the storage location, and the base code of each storage location is the binary code of the address number of the storage location in the memory excluding the suffix;

[0317] The processing module is further configured to determine the inverse transformation position corresponding to each storage location in the second type partition of each memory based on the following method:

[0318] Using the base encoding of the storage location of any of the two matching second-class partitions as the order, the inverse transformation position corresponding to the storage location of any partition is determined by traversing. The base encodings of the two storage locations with mutually inverse transformation positions are in reverse order.

[0319] 19. The data processing apparatus as described in any one of technical solutions 11-18, after determining the inverse transformation position corresponding to each storage location in the second type partition of each memory, the processing module is further configured to:

[0320] Based on the inverse transformation positions corresponding to each storage location of the second type partition in each memory, the data to be inversely transformed is read from two storage locations in each memory in parallel for inverse transformation processing.

[0321] Among the four storage locations read from two matching second-class partitions, two storage locations in one partition and two storage locations in the other partition are inverse transformation locations of each other.

[0322] 20. The data processing apparatus according to any one of technical solutions 11-19, when reading the data to be transformed from two storage locations in parallel from each memory, the processing module is further configured to:

[0323] In two matching second-class partitions, the data is read in order of the size of the base code of each storage location in either partition.

[0324] 21. A readable storage medium comprising instructions that, when executed on a computing device, cause the computing device to perform a data processing apparatus as described in any one of claims 11-20.

[0325] 22. A chip comprising a data processing device as described in any one of claims 11-20.

Claims

1. A data processing method, comprising: Determine the storage locations in the various memories used to store the data to be inverted; Assign address codes to each storage location; The address code of each storage location includes at least a prefix and a suffix, wherein the prefix is ​​the binary code of the memory number where the storage location is located, and the suffix is ​​the last two bits of the binary code of the address number of the storage location in its corresponding memory; The storage location of each memory is partitioned based on the suffix, and the address codes of the storage locations in the same partition within the same memory have the same suffix. Identify a first-class partition and a second-class partition in each memory. The address codes of each storage location in the first-class partition are reversed to themselves, or the storage locations represented by the reversed address codes are in the same memory. The second-class partition is any other partition in the same memory besides the first-class partition. Traverse and determine the inverse transformation position corresponding to each storage location of the first type partition in each memory; Based on the prefix and suffix of the address codes of each storage location in the second type partition of each memory, the second type partitions in different memories are matched to obtain the second type partition matching relationship; wherein, the prefix and suffix of the address code of one partition in two mutually matched partitions are the suffix and prefix of the address code of the other partition. Based on the second type of partition matching relationship, the inverse transformation position corresponding to each storage location in the second type partition of each memory is determined. Among the two matching second type partitions, only the inverse transformation position corresponding to each storage location in either partition is determined.

2. The data processing method as described in claim 1, wherein the address encoding of each storage location further includes a base encoding, the base encoding of each storage location is located between the prefix and suffix of the address encoding corresponding to the storage location, and the base encoding of each storage location is the binary encoding of the address number of the storage location in the memory excluding the suffix; The traversal to determine the inverse transformation position corresponding to each storage location of the first type partition in each memory includes: Using the base codes corresponding to each storage location in the first type partition of each memory as the order, traverse and determine the inverse transform position corresponding to each storage location.

3. The data processing method as described in claim 2, wherein the inverse transformation position corresponding to each storage location in the first type partition of each memory is determined by the following method: If the reverse order of the address code of any storage location is itself, then the storage location itself is taken as its corresponding inverse transformation location. If the reverse order of the address code of any storage location is different from its own, then the storage location corresponding to the reversed address code is taken as its corresponding inverse transformation location.

4. The data processing method as described in claim 2, after determining the inverse transformation positions corresponding to each storage location contained in the first type of partition in each memory, the data processing method further includes: Based on the storage locations and corresponding inverse transformation locations contained in the first type partition of each memory, the data to be inverse transformed is read in parallel from the first type partition of each memory.

5. The data processing method as described in claim 4, based on the storage locations and corresponding inverse transformation locations contained in the first type partition of each memory, reads the data to be inverse transformed in parallel from the first type partition of each memory, including: Data is read in parallel from the first type partition of each memory according to a cycle; wherein each cycle includes two parallel reads. In each cycle, during the first read, data at a storage location to be inverted is read in parallel from the first type partition of each memory. During the second read, data is read in parallel from the inverse transformation location corresponding to the storage location to be inverted read in each memory during the first read. This continues until all the memory locations to be inverted in each memory's first-class partition have been traversed.

6. In the data processing method as described in claim 5, when reading data in parallel from the first type partition of each memory according to a period, the data is read in the order of the size of the base code of the storage location to be reverse-transformed contained in the first type partition of each memory.

7. In the data processing method as described in claim 4, if the storage location to be inverted and the location to be inverted and read from the same memory for the first time are the same as the location to be inverted and read for the second time within the same cycle, no data exchange is performed; If they are different, the data to be inversely transformed at the storage location to be inversely transformed will be replaced with the inversely transformed data read from the inversely transformed location for the second time.

8. The data processing method as described in claim 1, wherein the address encoding of each storage location further includes a base encoding, the base encoding of each storage location is located between the prefix and suffix of the address encoding corresponding to the storage location, and the base encoding of each storage location is the binary encoding of the address number of the storage location in the memory excluding the suffix; The inverse transformation position corresponding to each storage location in the second type partition of each memory is determined based on the following method: Using the base encoding of the storage location of any one of two mutually matching second-class partitions as the order, traverse and determine the inverse transform position corresponding to the storage location of that partition, where, The base codes of two storage locations that are inversely transformed are in reverse order.

9. The data processing method as described in claim 1, after determining the inverse transformation position corresponding to each storage location in the second type partition of each memory, the data processing method further includes: Based on the inverse transformation positions corresponding to each storage location of the second type partition in each memory, the data to be inversely transformed is read from two storage locations in each memory in parallel for inverse transformation processing. Among the four storage locations read from two matching second-class partitions, two storage locations in one partition and two storage locations in the other partition are inverse transformation locations of each other.

10. The data processing method as described in claim 9, wherein when reading the data to be transformed from two storage locations in parallel from each memory, the two matching second-type partitions are read in order of the size of the base code of each storage location in any partition.

11. A data processing apparatus, comprising: The determining module is used to determine each storage location in each memory that stores the data to be inverted; The processing module is used to assign address codes to each storage location; the address code of each storage location includes at least a prefix and a suffix, the prefix being the binary code of the number of the memory where the storage location is located, and the suffix being the last two bits of the binary code of the address number of the storage location in its corresponding memory; The storage location of each memory is partitioned based on the suffix, and the address codes of the storage locations in the same partition within the same memory have the same suffix. Identify a first-class partition and a second-class partition in each memory. The address codes of each storage location in the first-class partition are reversed to themselves, or the storage locations represented by the reversed address codes are in the same memory. The second-class partition is any other partition in the same memory besides the first-class partition. Traverse and determine the inverse transformation position corresponding to each storage location of the first type partition in each memory; Based on the prefix and suffix of the address codes of each storage location in the second type partition of each memory, the second type partitions in different memories are matched to obtain the second type partition matching relationship; wherein, the prefix and suffix of the address code of one partition in two mutually matched partitions are the suffix and prefix of the address code of the other partition. Based on the second type of partition matching relationship, the inverse transformation position corresponding to each storage location in the second type partition of each memory is determined. Among the two matching second type partitions, only the inverse transformation position corresponding to each storage location in either partition is determined.

12. The data processing apparatus of claim 11, wherein the address encoding of each storage location further includes a base encoding, the base encoding of each storage location being located between the prefix and suffix of the address encoding corresponding to that storage location, and the base encoding of each storage location being the binary encoding of the address number of that storage location in the memory excluding the suffix; the processing module is further configured to: Using the base codes corresponding to each storage location in the first type partition of each memory as the order, traverse and determine the inverse transform position corresponding to each storage location.

13. The data processing apparatus of claim 12, wherein the processing module is configured to determine the inverse transformation position corresponding to each storage location in the first type of partition in each memory by means of the following method: If the reverse order of the address code of any storage location is itself, then the storage location itself is taken as its corresponding inverse transformation location. If the reverse order of the address code of any storage location is different from its own, then the storage location corresponding to the reversed address code is taken as its corresponding inverse transformation location.

14. The data processing apparatus of claim 12, after determining the inverse transformation positions corresponding to each storage location contained in the first type of partition in each memory, the processing module is further configured to: Based on the storage locations and corresponding inverse transformation locations contained in the first type partition of each memory, the data to be inverse transformed is read in parallel from the first type partition of each memory.

15. The data processing apparatus of claim 14, wherein the processing module is further configured to: Data is read in parallel from the first type of partition of each memory according to a periodic sequence; where, Each cycle consists of two parallel reads. In each cycle, during the first read, data at a storage location to be inverted is read from the first type partition of each memory in parallel. During the second read, data is read from the inverse transformation location corresponding to the storage location to be inverted read in each memory in parallel. This continues until all the memory locations to be inverted in each memory's first-class partition have been traversed.

16. The data processing apparatus of claim 15, wherein the processing module is further configured to: when reading data in parallel from the first type partition of each memory according to a period, read the data in the order of the size of the base code of the storage location to be reverse-transformed contained in the first type partition of each memory.

17. The data processing apparatus of claim 14, wherein the processing module is further configured to: If the storage location to be inverted and read from the same memory for the first time is the same as the location to be inverted and read for the second time within the same cycle, no data exchange will be performed. If they are different, the data to be inversely transformed at the storage location to be inversely transformed will be replaced with the inversely transformed data read from the inversely transformed location for the second time.

18. The data processing apparatus of claim 11, wherein the address encoding of each storage location further includes a base encoding, the base encoding of each storage location is located between the prefix and suffix of the address encoding corresponding to the storage location, and the base encoding of each storage location is the binary encoding of the address number of the storage location in the memory excluding the suffix; The processing module is further configured to determine the inverse transformation position corresponding to each storage location in the second type partition of each memory based on the following method: Using the base encoding of the storage location of any one of two mutually matching second-class partitions as the order, traverse and determine the inverse transform position corresponding to the storage location of that partition, where, The base codes of two storage locations that are inversely transformed are in reverse order.

19. The data processing apparatus of claim 11, wherein after determining the inverse transformation position corresponding to each storage location in the second type of partition in each memory, the processing module is further configured to: Based on the inverse transformation positions corresponding to each storage location of the second type partition in each memory, the data to be inversely transformed is read from two storage locations in each memory in parallel for inverse transformation processing. in, Of the four storage locations read from two matching Class II partitions, two storage locations in one partition are inverse transformations of two storage locations in the other partition.

20. The data processing apparatus of claim 19, wherein when reading the data to be transformed from two storage locations in parallel from each memory, the processing module is further configured to: In two matching second-class partitions, the data is read in order of the size of the base code of each storage location in either partition.

21. A readable storage medium comprising instructions that, when executed on a computing device, cause the computing device to perform the data processing method as described in any one of claims 1-10.

22. A chip comprising the data processing apparatus as described in any one of claims 11-20.

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