A processor and instruction execution method

Abstract

This invention provides a processor, comprising: a decoder for decoding instructions to obtain a decoding result; an arithmetic unit for performing calculations based on the decoding result obtained by the decoder; a current acquisition module for acquiring instruction information from the decoder before each calculation by the arithmetic unit, and acquiring a predicted instantaneous current value of the instruction to be executed from a stored instruction current set based on the instruction information; and an arbitration module connected to the current acquisition module for determining whether to insert a NOP instruction into the arithmetic unit based on the predicted instantaneous current value of the instruction to be executed acquired by the current acquisition module and a preset threshold. This invention can avoid sudden current changes.

Description

Technical Field

[0001] This invention relates to the field of chip design technology, and in particular to a processor and instruction execution method. Background Technology

[0002] Within a processor, the current increases or decreases as instructions are executed, and these sudden changes in current cause voltage fluctuations in the circuit. When the current suddenly increases, a voltage drop occurs; when the current suddenly decreases, a voltage rise occurs. If these voltage fluctuations exceed the processor's normal operating range, it can lead to processor malfunction or damage. Therefore, processor design should minimize the occurrence of sudden current changes. Summary of the Invention

[0003] In view of this, the present invention provides a processor and instruction execution method that can avoid sudden current surges in the processor when executing instructions.

[0004] In a first aspect, the present invention provides a processor, the processor comprising:

[0005] A decoder is used to decode instructions and obtain the decoded result.

[0006] The arithmetic unit is used to perform calculations based on the decoding result obtained by the decoder.

[0007] The current acquisition module is used to acquire instruction information from the decoder before the arithmetic unit performs the operation, and to acquire the instantaneous current prediction value of the instruction to be executed from the stored instruction current set according to the instruction information.

[0008] An arbitration module, connected to the current acquisition module, is used to determine whether to insert a NOP instruction into the arithmetic unit based on the instantaneous current prediction value of the instruction to be executed and a preset threshold obtained by the current acquisition module.

[0009] The arithmetic unit is also used to execute the inserted NOP instruction.

[0010] Optionally, the current acquisition module includes a first configuration interface, which is used to configure the command current set.

[0011] Optionally, the arbitration module is specifically used for:

[0012] The sum of the instantaneous current prediction values ​​of the instruction to be executed, obtained by the current acquisition module, is calculated to obtain the total instantaneous current value of the single operation of the arithmetic unit.

[0013] Based on the total instantaneous current value of the single operation, the window current value of each time window is calculated sequentially, and the time window is configured by the time window coefficient;

[0014] The difference between two consecutive window current values ​​is compared with a preset threshold. If the difference between the current window current value and the previous window current value is greater than the preset threshold, a NOP instruction is inserted into the arithmetic unit. If the difference between the current window current value and the previous window current value is less than the preset threshold, the insertion of the NOP instruction into the arithmetic unit is canceled.

[0015] Optionally, the window current value counted by the arbitration module for the first time is the sum of the total instantaneous current values ​​of all single operations within the time window starting from the first clock cycle. Starting from the second count of window current values, the window current value counted this time is based on the window current value counted in the previous count and the total instantaneous current value of the single operation calculated most recently.

[0016] Optionally, the window current value in this statistical analysis and the window current value in the previous statistical analysis satisfy the following relationship:

[0017] Current_window[n] = (1-Alpha)*Current_window[n-1] + Alpha*Current_inst, n≥2, where Current_window[n] is the current window value in the current calculation, Current_window[n-1] is the current window value in the previous calculation, Alpha is the time window coefficient between 0 and 1, and Current_inst is the total instantaneous current value of the single operation obtained in the most recent calculation.

[0018] Optionally, the arbitration module includes a second configuration interface and a third configuration interface, wherein the second configuration interface is used to configure a preset threshold and the third configuration interface is used to configure a time window coefficient.

[0019] Optionally, the frequency with which the arbitration module inserts NOP instructions into the arithmetic unit satisfies the following relationship:

[0020] freq_NOP = (Current_window[n] - Current_window[n-1] - X) / X, n ≥ 2, where freq_NOP is the frequency of inserting NOP instructions, Current_window[n] is the current window current value in this statistical analysis, Current_window[n-1] is the current window current value in the previous statistical analysis, and X is a preset threshold.

[0021] Optionally, the arbitration module is specifically used for:

[0022] The sum of the instantaneous current prediction values ​​of the instruction to be executed, obtained by the current acquisition module, is calculated to obtain the total instantaneous current value of the single operation of the arithmetic unit.

[0023] The total instantaneous current value of the single operation is compared with a preset threshold. If the total instantaneous current value of the single operation is greater than the preset threshold, a NOP instruction is inserted into the operation unit; if the total instantaneous current value of the single operation is less than the preset threshold, the insertion of the NOP instruction into the operation unit is canceled.

[0024] Optionally, the decoder is used to temporarily store the decoding result after obtaining the decoding result, and send the decoding result to the arithmetic unit after receiving the decoding result sending instruction;

[0025] The arbitration module is further configured to send a decoding result sending instruction to the decoder after determining whether to insert a NOP instruction into the arithmetic unit.

[0026] Secondly, the present invention provides a method for executing instructions of a processor, the method comprising:

[0027] Before the arithmetic unit performs the operation, instruction information is obtained from the decoder, and the instantaneous current prediction value of the instruction to be executed is obtained from the stored instruction current set according to the instruction information.

[0028] Based on the instantaneous current prediction value of the instruction to be executed and a preset threshold, it is determined whether to insert a NOP instruction into the arithmetic unit.

[0029] Optionally, determining whether to insert a NOP instruction into the arithmetic unit based on the predicted instantaneous current value of the instruction to be executed and a preset threshold includes:

[0030] The sum of the predicted instantaneous current values ​​of the instructions to be executed is calculated to obtain the total instantaneous current value of a single operation of the arithmetic unit;

[0031] Based on the total instantaneous current value of the single operation, the window current value of each time window is calculated sequentially, and the time window is configured by the time window coefficient;

[0032] The difference between two consecutive window current values ​​is compared with a preset threshold. If the difference between the current window current value and the previous window current value is greater than the preset threshold, a NOP instruction is inserted into the arithmetic unit. If the difference between the current window current value and the previous window current value is less than the preset threshold, the insertion of the NOP instruction into the arithmetic unit is canceled.

[0033] Optionally, the first statistical window current value is the sum of the total instantaneous current values ​​of all single operations within the time window starting from the first clock cycle. Starting from the second statistical window current value, the current statistical window current value is obtained based on the previous statistical window current value and the total instantaneous current value of the single operation calculated most recently.

[0034] Optionally, the window current value in this statistical analysis and the window current value in the previous statistical analysis satisfy the following relationship:

[0035] Current_window[n] = (1-Alpha)*Current_window[n-1] + Alpha*Current_inst, n≥2, where Current_window[n] is the current window value in the current calculation, Current_window[n-1] is the current window value in the previous calculation, Alpha is the time window coefficient between 0 and 1, and Current_inst is the total instantaneous current value of the single operation obtained in the most recent calculation.

[0036] Optionally, determining whether to insert a NOP instruction into the arithmetic unit based on the predicted instantaneous current value of the instruction to be executed and a preset threshold includes:

[0037] The sum of the predicted instantaneous current values ​​of the instructions to be executed is calculated to obtain the total instantaneous current value of a single operation of the arithmetic unit;

[0038] The total instantaneous current value of the single operation is compared with a preset threshold. If the total instantaneous current value of the single operation is greater than the preset threshold, a NOP instruction is inserted into the operation unit; if the total instantaneous current value of the single operation is less than the preset threshold, the insertion of the NOP instruction into the operation unit is canceled.

[0039] The processor and instruction execution method provided by this invention, before the arithmetic unit performs calculations, have a current acquisition module that obtains the predicted instantaneous current value of the instruction to be executed by the arithmetic unit in advance; the arbitration module determines whether to insert a NOP instruction into the arithmetic unit based on the predicted instantaneous current value of the instruction to be executed and a preset threshold. After inserting the NOP instruction, the arithmetic unit executes the NOP instruction, which lowers the average power consumption and can prevent current surges in advance. Compared with the prior art, this invention can predict current surges and insert NOP instructions before large currents occur, reducing processor power consumption and avoiding current surges. Furthermore, it can bring the following beneficial effects: at the same processor frequency, the required stable voltage will be further reduced, so the corresponding processor power consumption will be reduced; at the same rated power consumption, the corresponding computing power or throughput will be further increased. Attached Figure Description

[0040] Figure 1 This is a schematic diagram of the structure of a multi-transmitter processor according to an embodiment of the present invention;

[0041] Figure 2 This is a schematic diagram of the structure of a single-emit processor according to another embodiment of the present invention;

[0042] Figure 3This is a flowchart illustrating an instruction execution method for a processor according to an embodiment of the present invention. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0044] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0045] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0046] Instruction execution in a processor typically consists of five parts: instruction fetch, decode, execute, memory access, and write-back. Instruction fetch is performed by the instruction address generation unit and the instruction cache unit; decoding is performed by the decoder; execute is performed by the arithmetic unit (including the arithmetic logic unit and the floating-point unit); memory access is performed by the memory management unit; and write-back is performed by the register write-back unit. Sudden current fluctuations are primarily caused by the execution operation.

[0047] This invention provides a processor, such as... Figure 1 As shown, the processor includes:

[0048] N decoders 111 to 11N are used to decode the instructions and obtain the decoding results;

[0049] N operational units 121 to 12N are used to perform operations based on the decoding results obtained from the decoder;

[0050] N current acquisition modules 131 to 13N are used to acquire instruction information from decoders 111 to 11N before each arithmetic unit 121 to 12N performs operations, and acquire the instantaneous current prediction value of the instruction to be executed by each arithmetic unit 121 to 12N from the stored instruction current set according to the instruction information.

[0051] Arbitration module 14 is connected to each current acquisition module 131 to 13N and is used to determine whether to insert NOP instructions into each arithmetic unit 121 to 12N based on the instantaneous current prediction value and preset threshold value of the instruction to be executed obtained by each current acquisition module 131 to 13N.

[0052] Each arithmetic unit 121 to 12N is also used to execute inserted NOP instructions.

[0053] The NOP (No Operation) instruction, also known as the null instruction or no-operation instruction, occupies one instruction execution cycle but does not perform any logical operation. This instruction has extremely low power consumption.

[0054] Figure 1 This explanation uses one architecture of a multi-issue processor as an example. A multi-issue processor includes multiple decoders; for example, a dual-issue processor includes two decoders, a quad-issue processor includes four decoders, and so on. An N-issue processor includes N decoders, which can operate simultaneously to decode N instructions. Correspondingly, a multi-issue processor has multiple arithmetic units and multiple current acquisition modules, which are connected to an arbitration module.

[0055] As one implementation method, refer to Figure 1 Each current acquisition module 131-13N includes a first configuration interface for configuring a command current set, which contains the instantaneous current prediction values ​​for all commands. The configured command current set is stored in each current acquisition module 131-13N.

[0056] It is understandable that the instruction current sets configured for each current acquisition module 131-13N are the same. Different current acquisition modules operate in parallel, and the final instantaneous current prediction values ​​they acquire differ depending on the specific instruction. The current acquisition module obtains instruction information from the decoder, which indicates which instruction the decoder is decoding. This allows the current acquisition module to know which instruction the corresponding decoder is currently decoding, and thus which instruction the arithmetic unit will execute. It then finds the instantaneous current prediction value for the instruction to be executed by the arithmetic unit from the instruction current set.

[0057] As one implementation method, the arbitration module 14 is specifically used for:

[0058] The sum of the instantaneous current prediction values ​​of the instructions to be executed acquired by the current acquisition modules 131 to 13N is used to obtain the total instantaneous current value of a single operation by the arithmetic units 121 to 12N.

[0059] The total instantaneous current value of a single operation is compared with a preset threshold. If the total instantaneous current value of a single operation is greater than the preset threshold, a NOP instruction is inserted into the operation units 121 to 12N. If the total instantaneous current value of a single operation is less than the preset threshold, the insertion of the NOP instruction into the operation units 121 to 12N is canceled.

[0060] In the above embodiments, if the total instantaneous current value of a single operation exceeds a preset threshold, it indicates that a large current will be generated, and a NOP instruction is inserted into the arithmetic unit. This way, the current generated when the arithmetic unit executes the NOP instruction will decrease, reducing processor power consumption and promptly preventing sudden current surges.

[0061] Because the execution time of an instruction is typically on the order of nanoseconds (ns), while current surges are typically on the order of microseconds (µs), comparing only the total instantaneous current value of a single operation with a preset threshold could lead to frequent NOP (No-Operation) instructions. Therefore, a time window can be added to the arbitration module 14, which can be configured using the time window coefficient Alpha.

[0062] As one implementation method, the arbitration module 14 is specifically used for:

[0063] The sum of the instantaneous current prediction values ​​of the instructions to be executed acquired by the current acquisition modules 131 to 13N is used to obtain the total instantaneous current value of a single operation by the arithmetic units 121 to 12N.

[0064] Based on the total instantaneous current value of a single operation, the window current value of each time window is calculated sequentially, and the time window is configured by the time window coefficient.

[0065] Compare the difference between two consecutive window current values ​​with a preset threshold. If the difference between the current window current value and the previous window current value is greater than the preset threshold, then insert a NOP instruction into the operation units 121-12N. If the difference between the current window current value and the previous window current value is less than the preset threshold, then cancel inserting the NOP instruction into the operation units 121-12N.

[0066] Understandably, if the difference between the current window current value and the previous window current value exceeds a preset threshold, it indicates a large current will be generated, and a NOP instruction is inserted into the arithmetic unit. This way, subsequent execution of the NOP instruction by the arithmetic unit will reduce the current generated, thus preventing sudden current surges. If the difference between the current window current value and the previous window current value is less than the preset threshold, it indicates no large current will be generated, and a NOP instruction is not needed.

[0067] Furthermore, in this embodiment, the arbitration module 14 inserts NOP instructions into the arithmetic units 121-12N in the following ways, including but not limited to:

[0068] Method 1: Arbitration module 14 directly inserts NOP instructions into arithmetic units 121 to 12N.

[0069] Method 2: Arbitration module 14 sends an instruction to decoder 111-11N to insert NOP instruction. After receiving the instruction, decoder 111-11N inserts NOP instruction into arithmetic unit 121-12N.

[0070] The window current values ​​for each statistical time window in arbitration module 14 are defined as follows:

[0071] The first statistical window current value is the sum of the total instantaneous current values ​​of all single operations within the time window starting from the first clock cycle. Starting from the second statistical window current value, the current statistical window current value is based on the previous statistical window current value and the total instantaneous current value of the single operation calculated most recently.

[0072] As one implementation method, the window current value collected this time and the window current value collected in the previous time satisfy the following relationship:

[0073] Current_window[n] = (1-Alpha)*Current_window[n-1] + Alpha*Current_inst, n≥2, where Current_window[n] is the current window value in the current calculation, Current_window[n-1] is the current window value in the previous calculation, Alpha is the time window coefficient between 0 and 1, and Current_inst is the total instantaneous current value of the single operation obtained in the most recent calculation.

[0074] The time window coefficient Alpha means that the reciprocal of Alpha is equal to the number of clock cycles contained in the time window.

[0075] For example, Alpha = 0.01, which is equivalent to a time window containing 100 clock cycles. The time window for the first statistical calculation is from the 1st clock cycle to the 100th clock cycle. The window current value Current_window[1] for the first statistical calculation is the sum of the total instantaneous current values ​​of all single operations within the first clock cycle to the 100th clock cycle.

[0076] The time window for the second statistical analysis runs from the 2nd clock cycle to the 101st clock cycle, and the current values ​​within this window satisfy the following relationship:

[0077] Current_window[2]=(1-Alpha)*Current_window[1]+Alpha*Current_inst

[0078] Current_inst is the total instantaneous current value of a single operation obtained from the most recent calculation.

[0079] The time window for the third statistical analysis runs from the 3rd clock cycle to the 102nd clock cycle. The window current values ​​for the second statistical analysis satisfy the following relationship:

[0080] Current_window[3]=(1-Alpha)*Current_window[2]+Alpha*Current_inst

[0081] Current_inst is the total instantaneous current value of a single operation obtained from the most recent calculation.

[0082] Note that Current_inst is a variable. This process is repeated to calculate the window current value for each time window.

[0083] As one implementation method, refer to Figure 1 The arbitration module 14 includes a second configuration interface and a third configuration interface. The second configuration interface is used to configure a preset threshold, and the third configuration interface is used to configure the time window coefficient Alpha. The preset threshold and the time window coefficient are configured according to system requirements.

[0084] In one implementation, the frequency of NOP instructions inserted by the arbitration module 14 into the arithmetic units 121-12N satisfies the following relationship:

[0085] freq_NOP = (Current_window[n] - Current_window[n-1] - X) / X, n ≥ 2, where freq_NOP is the frequency of inserting NOP instructions, Current_window[n] is the current window current value in this statistical analysis, Current_window[n-1] is the current window current value in the previous statistical analysis, and X is a preset threshold.

[0086] For example, if Current_window[n] = 800A, Current_window[n-1] = 200A, and X = 500A, the calculation yields 1 / 5, meaning that one NOP instruction is inserted into five instructions.

[0087] This invention provides a processor in which, before the arithmetic unit performs calculations, a current acquisition module acquires the predicted instantaneous current value of the instruction to be executed by the arithmetic unit in advance; an arbitration module determines whether to insert a NOP instruction into the arithmetic unit based on the predicted instantaneous current value of the instruction to be executed and a preset threshold. After inserting the NOP instruction, the arithmetic unit executes the NOP instruction, which lowers the average power consumption and can prevent sudden current fluctuations in advance. Compared with the prior art, this invention can predict sudden current fluctuations and insert NOP instructions in advance, thus avoiding sudden current fluctuations. Furthermore, it can bring the following beneficial effects: at the same processor frequency, the required stable voltage will be further reduced, so the corresponding processor power consumption will be reduced; and at the same rated power consumption, the corresponding computing power or throughput will be further increased.

[0088] In this embodiment of the invention, after the decoder obtains the decoding result, it does not immediately send it to the arithmetic unit. After the arbitration module obtains the arbitration result, the decoder sends the decoding result to the arithmetic unit, regardless of whether a NOP instruction needs to be inserted.

[0089] As one implementation method, you can refer to Figure 1 Decoders 111 to 11N are used to temporarily store the decoding result after obtaining the decoding result, and send the decoding result to the arithmetic units 121 to 12N after receiving the decoding result sending instruction;

[0090] Arbitration module 14 is also used to send a decoding result sending instruction to decoders 111-11N after determining whether to insert a NOP instruction into arithmetic units 121-12N.

[0091] Furthermore, in one embodiment, for a single-issue processor, such as Figure 2 As shown, the system includes a decoder 211, an arithmetic unit 221, a current acquisition module 231, and an arbitration module 24. The functions of each module can be referenced in a multi-issue processor. Specifically, since there is only one current acquisition module 231, for the arbitration module 24, the instantaneous current prediction value of an instruction to be executed acquired by the current acquisition module 231 is the total instantaneous current value of a single operation.

[0092] In this embodiment, the decoder 211 is used to temporarily store the decoding result after obtaining the decoding result, and send the decoding result to the arithmetic unit 221 after receiving the decoding result sending instruction;

[0093] Arbitration module 24 is also used to send a decoding result sending instruction to decoder 211 after determining whether to insert a NOP instruction into arithmetic unit 221.

[0094] It should also be noted that the modules involved in the above embodiments (including the decoder, arithmetic unit, current acquisition module, and arbitration module) are all hardware-implemented functional modules. As one implementation method, the current acquisition module can be integrated inside the decoder.

[0095] The following explains how to obtain the instruction current set. After the processor is designed, an instruction power consumption verification pattern is constructed through software design. Each instruction requires a test pattern, and then, under the same test conditions (consistent clock frequency and voltage), the power consumption of each instruction is tested. This test runs all the processing units inside the processor, resulting in a power consumption table.

[0096] instruction Total power consumption instruction1 Power1 Instruction2 Power2 …… …… instruction Powern

[0097] Processor power consumption consists of dynamic power consumption and static power consumption. Static power consumption is mainly caused by leakage current, and it is measured during processor manufacturing, so this value is known. Dynamic power consumption mainly comes from energy loss during switching processes, and this is the main part that needs to be estimated and controlled. Different instructions involve different logic gate state changes, different memory access states, etc., thus generating different dynamic power consumption.

[0098] The power consumption expression is as follows: Power = Power_dynamic + Power_static, where Power represents the total power consumption, Power_dynamic represents the dynamic power consumption, and Power_static represents the static power consumption.

[0099] Furthermore, assuming the total number of arithmetic units in the current processor is K and the operating voltage is V, a predicted instantaneous current value for each arithmetic unit executing instructions can be derived:

[0100] Instruction_coeff1 = (Power1 - Power_static) / K / V, where Instruction_coeff1 represents the instantaneous current prediction value generated by each arithmetic unit executing instruction 1;

[0101] Instruction_coeff2 = (Power2 - Power_static) / K / V, where Instruction_coeff2 represents the instantaneous current prediction value generated by each arithmetic unit executing instruction 2;

[0102] And so on,

[0103] Instruction_coeffn = (Powern - Power_static) / K / V, where Instruction_coeffn represents the predicted instantaneous current generated by each arithmetic unit executing instruction n;

[0104] Instruction_coeff1, Instruction_coeff2, ..., Instruction_coeffn together constitute the instruction current set, which is configured in the current acquisition module.

[0105] On the other hand, embodiments of the present invention provide a processor instruction execution method, such as... Figure 3 As shown, the method includes the following steps:

[0106] S31. Before the arithmetic unit performs the operation, obtain instruction information from the decoder, and obtain the instantaneous current prediction value of the instruction to be executed from the stored instruction current set according to the instruction information.

[0107] S32. Based on the instantaneous current prediction value of the instruction to be executed and the preset threshold, determine whether to insert a NOP instruction into the arithmetic unit.

[0108] As one implementation method, determining whether to insert a NOP instruction into the arithmetic unit based on the predicted instantaneous current value of the instruction to be executed and a preset threshold includes:

[0109] The sum of the predicted instantaneous current values ​​for the instructions to be executed is calculated to obtain the total instantaneous current value for a single operation of the arithmetic unit;

[0110] Based on the total instantaneous current value of a single operation, the window current value of each time window is calculated sequentially, and the time window is configured by the time window coefficient.

[0111] The difference between two consecutive window current values ​​is compared with a preset threshold. If the difference between the current window current value and the previous window current value is greater than the preset threshold, a NOP instruction is inserted into the arithmetic unit. If the difference between the current window current value and the previous window current value is less than the preset threshold, the insertion of the NOP instruction into the arithmetic unit is canceled.

[0112] In one implementation, the first statistical window current value is the sum of the total instantaneous current values ​​of all single operations within the time window starting from the first clock cycle. Starting from the second statistical window current value, the current statistical window current value is obtained based on the previous statistical window current value and the total instantaneous current value of the single operation calculated most recently.

[0113] As one implementation method, the window current value collected this time and the window current value collected in the previous time satisfy the following relationship:

[0114] Current_window[n] = (1-Alpha)*Current_window[n-1] + Alpha*Current_inst, n≥2, where Current_window[n] is the current window value in the current calculation, Current_window[n-1] is the current window value in the previous calculation, Alpha is the time window coefficient between 0 and 1, and Current_inst is the total instantaneous current value of the single operation obtained in the most recent calculation.

[0115] As one implementation method, determining whether to insert a NOP instruction into the arithmetic unit based on the predicted instantaneous current value of the instruction to be executed and a preset threshold includes:

[0116] The sum of the predicted instantaneous current values ​​for the instructions to be executed is calculated to obtain the total instantaneous current value for a single operation of the arithmetic unit;

[0117] The total instantaneous current value of a single operation is compared with a preset threshold. If the total instantaneous current value of a single operation is greater than the preset threshold, a NOP instruction is inserted into the operation unit; if the total instantaneous current value of a single operation is less than the preset threshold, the insertion of the NOP instruction into the operation unit is canceled.

[0118] The instruction execution method of the processor in this embodiment of the invention can be implemented based on the processor in the foregoing embodiments, achieving the same technical effects. Compared with the prior art, this embodiment of the invention can predict current surges and insert NOP instructions before large currents occur, reducing processor power consumption and avoiding current surge behavior. Furthermore, it can bring the following beneficial effects: at the same processor frequency, the required stable voltage will be further reduced, thus reducing the corresponding processor power consumption; and at the same rated power consumption, the corresponding computing power or throughput will be further increased.

[0119] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A processor, comprising: The processor comprises: a decoder configured to decode instructions to obtain decoding results; an operation unit configured to perform operations according to the decoding results obtained by the decoder; a current acquisition module configured to acquire instruction information from the decoder before the operation unit performs operations, and acquire a transient current prediction value of an instruction to be executed from a stored instruction current set according to the instruction information; an arbitration module connected with the current acquisition module, and configured to sequentially calculate window current values of each time window according to the transient current prediction value of the instruction to be executed acquired by the current acquisition module, and determine whether to insert a NOP instruction into the operation unit according to a difference between the window current values calculated at adjacent two times and a preset threshold; if the NOP instruction needs to be inserted into the operation unit, the frequency of inserting the NOP instruction by the arbitration module satisfies a relationship: , wherein is the frequency of inserted NOP instructions, is the window current value of this statistics, is the window current value of last statistics, is a preset threshold value; the operation unit is further configured to execute the inserted NOP instruction.

2. The processor of claim 1, wherein, The current acquisition module comprises a first configuration interface configured to configure the instruction current set.

3. The processor of claim 1, wherein, The arbitration module is specifically configured to: calculate a sum of the transient current prediction values of the instructions to be executed acquired by the current acquisition module to obtain a total transient current value of a single operation of the operation unit; sequentially calculate window current values of each time window based on the total transient current value of the single operation, the time window being configured by a time window coefficient; compare a difference between the window current values calculated at adjacent two times and the preset threshold; if the difference between the window current value calculated this time and the window current value calculated last time is greater than the preset threshold, the NOP instruction is inserted into the operation unit; if the difference between the window current value calculated this time and the window current value calculated last time is less than the preset threshold, the NOP instruction is not inserted into the operation unit.

4. The processor of claim 3, wherein: the window current value calculated by the arbitration module for the first time is a sum of the total transient current values of all single operations in a time window starting from a first clock cycle; and starting from the window current value calculated for the second time, the window current value calculated this time is obtained based on the window current value calculated last time and the total transient current value of the single operation calculated most recently.

5. The processor of claim 4, wherein, the window current value calculated this time and the window current value calculated last time satisfy a relationship: , wherein is the window current value of this statistics, is the window current value of last statistics, is the time window coefficient between 0~1, is the total instantaneous current value of the last single operation calculated.

6. The processor of claim 3, wherein, the arbitration module comprises a second configuration interface and a third configuration interface, the second configuration interface is configured to configure the preset threshold, and the third configuration interface is configured to configure the time window coefficient.

7. The processor of claim 1, wherein, after the decoder obtains the decoding results, the decoder temporarily stores the decoding results, and after receiving a decoding result sending instruction, the decoder sends the decoding results to the operation unit; the arbitration module is further configured to send the decoding result sending instruction to the decoder after determining whether to insert the NOP instruction into the operation unit.

8. A method of instruction execution by a processor, the method comprising: The method comprises: acquiring instruction information from the decoder before the operation unit performs operations, and acquiring a transient current prediction value of an instruction to be executed from a stored instruction current set according to the instruction information; The window current value of each time window is sequentially counted according to the instantaneous current prediction value of the instruction to be executed, and whether to insert the NOP instruction into the operation unit is judged according to the difference between the window current values counted in adjacent two times and the preset threshold value; If the NOP instruction needs to be inserted into the operation unit, the frequency of the arbitration module inserting the NOP instruction satisfies the relationship: , wherein is the frequency of inserted NOP instructions, is the window current value of this statistics, is the window current value of last statistics, is a preset threshold value.

9. The method of claim 8, wherein, The window current value of each time window is sequentially counted according to the instantaneous current prediction value of the instruction to be executed, and whether to insert the NOP instruction into the operation unit is judged according to the difference between the window current values counted in adjacent two times and the preset threshold value; The sum of the instantaneous current prediction values of the instructions to be executed is calculated to obtain the total instantaneous current value of the single operation of the operation unit; The window current value of each time window is sequentially counted based on the total instantaneous current value of the single operation, and the time window is configured by a time window coefficient; The difference between the window current values counted in adjacent two times and the preset threshold value are compared, if the difference between the window current value counted this time and the window current value counted last time is greater than the preset threshold value, the NOP instruction is inserted into the operation unit, if the difference between the window current value counted this time and the window current value counted last time is less than the preset threshold value, the NOP instruction is not inserted into the operation unit.

10. The method of claim 9, wherein, The window current value counted for the first time is the sum of the total instantaneous current values of all single operations in the time window starting from the first clock cycle, and from the window current value counted for the second time, the window current value counted this time is obtained based on the window current value counted last time and the total instantaneous current value of the single operation calculated last time.

11. The method of claim 10, wherein, The window current value counted this time and the window current value counted last time satisfy the relationship: , wherein is the window current value of this statistics, is the window current value of last statistics, is the time window coefficient between 0 and 1, is the total instantaneous current value of the last single operation calculated.

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