Terminal Structure of Semiconductor Device and Method for Preparing the Same

Abstract

The present application discloses a terminal structure of a semiconductor device and a preparation method thereof, wherein the terminal structure comprises: a drift layer, located on one side of a substrate, and having a first doping type; a first epitaxial layer, located on the side of the drift layer away from the substrate, and having a second doping type; and a plurality of first doping regions, located at intervals in the first epitaxial layer, and having a first doping type. By arranging a first epitaxial layer with uniform concentration on the drift layer, after arranging the first doping region in the first epitaxial layer, the first epitaxial layer is divided into a plurality of parts, and the plurality of first epitaxial layers form a field limiting ring of the terminal structure, and the thickness of the epitaxial layer is easy to control, and the doping concentration is uniform. By optimizing the doping concentration of the doping region of the terminal structure of the semiconductor device, the lateral and longitudinal expansion of the surface electric field can be adjusted, and the withstand voltage level of the semiconductor terminal can be improved. The problem of poor withstand voltage capability of the semiconductor device due to poor control of the doping concentration at the terminal structure of the semiconductor device is solved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor devices, and in particular, to a terminal structure of a semiconductor device and a method for preparing the same. Background Art

[0002] At present, the terminal structure of traditional semiconductors usually uses ion implantation to form some special structures to reduce the surface electric field, so as to alleviate the influence of the bending of the PN junction at the edge of the active area, and enhance the anti-charge ability, so that the electric field distribution is close to the distribution of the ideal parallel plane junction. Field limiting ring is a terminal technology commonly used in power devices. The terminal structure using field limiting ring mainly includes a main junction and a field limiting ring with the same doping type as the main junction. However, in the terminal structure with field limiting ring, the existence of charge in the oxide will interfere with the potential obtained by the field limiting ring, so that the electric field distribution of the field limiting ring designed at the optimal spacing will change. But even if the existence of oxide charge is taken into account in the optimization design of the field limiting ring position, the charge in the thermally grown field oxide on different wafers will change during the manufacturing process of power devices. The charge in the oxide will significantly reduce the breakdown voltage of the terminal at the edge of the field limiting ring and reduce the semiconductor yield. Even if the breakdown voltage is increased by multiple field limiting rings to alleviate the above problems, the terminal structure area is larger due to the addition of field limiting rings, which increases the chip size and cost. The depth and concentration of the field limiting ring terminal structure have a great influence on the breakdown voltage, and a larger concentration and depth require higher energy and dose for implantation, which increases the defects between the terminal and the passivation layer, thereby reducing the ability to resist the breakdown voltage, resulting in a low voltage resistance level of the semiconductor device and easy destruction. Summary of the invention

[0003] The present application provides a terminal structure of a semiconductor device and a preparation method thereof, so as to solve the problem in the related art that the semiconductor device has poor voltage resistance due to poor control of the doping concentration at the terminal structure of the semiconductor device.

[0004] According to one aspect of the present application, a terminal structure of a semiconductor device is provided, comprising: a substrate; a drift layer, located on one side of the substrate, having a first doping type; a first epitaxial layer, located on a side of the drift layer away from the substrate, having the second doping type; and a plurality of first doping regions, located at intervals in the first epitaxial layer to divide the first epitaxial layer into a plurality of parts, having the first doping type.

[0005] Optionally, the drift layer has a first surface on a side facing away from the substrate, and the first surface has a portion not covered by the first epitaxial layer and the first doped region.

[0006] Optionally, the thickness of the first epitaxial layer is greater than the thickness of the first doping region.

[0007] Optionally, the drift layer has a first surface on a side facing away from the substrate, the first surface has a portion not covered by the first epitaxial layer and the first doped region, and a thickness of the first epitaxial layer is greater than a thickness of the first doped region.

[0008] Optionally, the semiconductor device further includes a first electrode, wherein the first electrode is located on a side of the substrate away from the drift layer.

[0009] Optionally, a cross-sectional shape of the first doped region along a thickness direction of the first epitaxial layer includes: a rectangle, a ring, and a semicircle.

[0010] According to another aspect of the present application, a method for preparing a terminal structure of a semiconductor device is provided, comprising: providing a substrate, and forming a drift layer on one side of the substrate, the drift layer having a first doping type; forming a first epitaxial layer on a side of the drift layer away from the substrate, the first epitaxial layer having a second doping type; forming a plurality of spaced first doping regions on a side of the first epitaxial layer away from the substrate, the first epitaxial layer being divided into a plurality of parts by the first doping regions, the first epitaxial layer having a first doping type.

[0011] Optionally, the preparation method further includes: forming the first epitaxial layer on a side of the drift layer away from the substrate by using an epitaxial growth process; and performing ion implantation in the first epitaxial layer to form the first doped region.

[0012] Optionally, the preparation method further comprises: etching an edge region of the first epitaxial layer so that the substrate has an exposed region.

[0013] Optionally, the preparation method also includes: forming the first epitaxial layer on the side of the drift layer away from the substrate using an epitaxial growth process; etching the first epitaxial layer to form a groove in a local area of ​​the first epitaxial layer, and performing ion implantation into the first epitaxial layer corresponding to the bottom of the groove to form the first doped region.

[0014] According to another aspect of the present application, a semiconductor device is provided, comprising a source region structure and a terminal structure of the semiconductor device, wherein the source region structure is located between two adjacent terminal structures.

[0015] The terminal structure of a semiconductor device provided by the present application includes a substrate; a drift layer, located on one side of the substrate, having a first doping type; a first epitaxial layer, located on the side of the drift layer away from the substrate, having the second doping type; and a plurality of first doping regions, located in the first epitaxial layer at intervals, having the first doping type. A first epitaxial layer with uniform concentration is arranged on the drift layer, so that after the first doping region is arranged in the first epitaxial layer, the first epitaxial layer is divided into a plurality of parts, and the plurality of first epitaxial layers form a field limiting ring of the terminal structure, the thickness of the epitaxial layer is easy to control, and the doping concentration is uniform, so as to optimize the doping concentration of the field limiting ring of the terminal structure of the semiconductor device, and the lateral and longitudinal expansion of the surface electric field can be adjusted, so that the withstand voltage level of the semiconductor terminal can be greatly improved without increasing the semiconductor area occupied by the terminal structure, and the influence of the surface charge on the withstand voltage level of the device can be reduced, so that the electric field concentration effect of the semiconductor device terminal is alleviated, the blocking characteristics of the device are improved, and the influence of the interface charge on the blocking characteristics of the device is effectively reduced, and the surface electric field concentration effect is effectively improved. The invention solves the problem in the prior art that the semiconductor device has poor withstand voltage capability due to poor control of the doping concentration at the terminal structure of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0017] Figure 1 is a partial cross-sectional schematic diagram of a semiconductor device provided according to an embodiment of the present application;

[0018] Figure 2 is a partial cross-sectional schematic diagram of another semiconductor device provided according to an embodiment of the present application;

[0019] Figure 3 is a partial cross-sectional schematic diagram of another semiconductor device provided according to an embodiment of the present application;

[0020] Figure 4 is a partial cross-sectional schematic diagram of another semiconductor device provided according to an embodiment of the present application;

[0021] Figure 5 It is a schematic flow chart of a method for preparing a terminal structure of a semiconductor device provided in an embodiment of the present application;

[0022] Figure 6 It is a cross-sectional schematic diagram of a base body after providing a substrate and forming a drift layer on the substrate in a method for preparing a terminal structure of a semiconductor device provided in an embodiment of the present application;

[0023] Figure 7It is a comparison chart of semiconductor structure performance tests according to the embodiments of the present application and the comparative examples.

[0024] The above drawings include the following reference numerals:

[0025] 10. Substrate; 20. Drift layer; 30. Terminal structure; 31. First epitaxial layer; 32. First doped region; 40. First electrode; 50. Source region structure; 60. Second electrode. DETAILED DESCRIPTION

[0026] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0027] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0028] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any variation of the two are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0029] As mentioned in the background technology, in the prior art, the depth and concentration of the field confinement ring terminal structure have a great influence on the breakdown voltage, and a larger concentration and depth require higher energy and dose for implantation, which increases the defects between the terminal and the passivation layer, thereby reducing the ability to resist the breakdown voltage. To this end, the present application proposes a semiconductor device and a method for preparing the same.

[0030] In order to solve the above technical problems, according to an embodiment of the present application, a terminal structure of a semiconductor device is provided. Figures 1 to 3 FIG. 1 is a schematic partial cross-sectional view of a semiconductor device according to an embodiment of the present application. Figures 1 to 3As shown, the semiconductor device includes: a substrate 10; a drift layer 20, located on one side of the substrate 10, having a first doping type; a first epitaxial layer 31, located on a side of the drift layer 20 away from the substrate, having the second doping type; and a plurality of first doping regions 32, located at intervals in the first epitaxial layer 31 to divide the first epitaxial layer 31 into a plurality of parts, having the first doping type.

[0031] By forming a plurality of first doping regions in the first epitaxial layer in the terminal structure of the semiconductor device, the first doping regions separate the first epitaxial layer, so that the terminal structure of the semiconductor device includes a plurality of field limiting rings formed by the first epitaxial layer. Since the doping concentration of the first epitaxial layer is well controlled during the growth process and the uniformity of the doping concentration is high, the doping concentration of the field limiting ring structure of the terminal structure is adjusted and optimized, and the lateral and longitudinal expansion of the surface electric field is adjusted. In the prior art, in order to improve the withstand voltage of the semiconductor terminal, the number of field limiting rings is increased, but this solution increases the area of ​​the terminal structure in the device. In the present application, by using a plurality of spaced first epitaxial layers as field limiting rings, the withstand voltage level of the semiconductor terminal can be greatly improved without increasing the lateral area of ​​the semiconductor occupied by the terminal structure, and the influence of the surface charge on the withstand voltage level of the device is reduced, so that the electric field concentration effect of the semiconductor device terminal is alleviated, and the blocking characteristics of the device are improved. And the influence of the interface charge on the blocking characteristics of the device is effectively reduced, and the surface electric field concentration effect is effectively improved.

[0032] In the above embodiment, a buffer layer may be provided between the substrate and the drift layer. The above substrate may be a silicon carbide substrate, specifically 4H-SiC, with a doping concentration of 5E18~1E21cm -3 The thickness is 50~500μm, the drift layer can be an N-type silicon carbide epitaxial layer, the doping ions can be N-type doping ions such as nitrogen ions, and the doping concentration can be 1E14~5E17cm -3 The thickness can be 5~150μm, the first epitaxial layer can be a P-type silicon carbide epitaxial layer, the doping ions can be P-type doping ions such as aluminum ions, and the doping concentration can be 1E15~5E19cm -3 The thickness can be 5~150μm, the doping type of the first doping region can be N-type, and the doping concentration is 1E17~1E21cm -3 The doping concentration of the first doping region is not limited to the above concentration.

[0033] In some optional embodiments, such as Figure 2 As shown, the drift layer 20 has a first surface on a side away from the substrate 10 , and the first surface has a portion not covered by the first epitaxial layer 31 and the first doping region 32 .

[0034] In the above optional implementation, if Figure 1 and Figure 2 As shown, the first epitaxial layer 31 covers the drift layer 20 in an interval, and the first doping region 32 is located between adjacent first epitaxial layers 31. Figure 1 The first doped region 32 and the first epitaxial layer 31 completely cover the first surface of the drift layer 20 . Figure 2 The first epitaxial layer 31 does not cover the edge region of the first surface.

[0035] In some optional embodiments, such as Figure 3 As shown, the thickness h of the first epitaxial layer 31 is 1 is greater than the thickness h of the first doping region 32 2 .

[0036] In the above optional implementation, if Figure 3 As shown, the first epitaxial layer 31 covers the drift layer 20 at intervals, the first doped region 32 is located between adjacent first epitaxial layers 31, the first doped region 32 and the first epitaxial layer 31 completely cover the first surface of the drift layer 20, and the thickness of the first doped region 32 is h 2 is smaller than the thickness h of the first epitaxial layer 31 1 .

[0037] In some optional embodiments, such as Figure 4 As shown, the drift layer 20 has a first surface on the side away from the substrate 10, the first surface has a portion not covered by the first epitaxial layer 31 and the first doping region 32, and the thickness of the first epitaxial layer 31 is h 1 is greater than the thickness h of the first doping region 32 2 .

[0038] In the above optional implementation, if Figure 4 As shown, the first epitaxial layer 31 does not cover the edge region of the first surface, and the thickness h of the first doping region 32 is 2 is smaller than the thickness h of the first epitaxial layer 31 1 .

[0039] In the above optional implementation, the doping ions in the first doping region may be N-type doping ions such as phosphorus ions, and the doping concentration may be 1E17~1E21cm -3 , the thickness can be 0.1~3μm.

[0040] In some optional embodiments, such as Figures 1 to 4As shown, the semiconductor device further includes a first electrode 40 . The first electrode 40 is located on a side of the substrate 10 away from the drift layer 20 .

[0041] In the above optional implementation, if Figures 1 to 4 As shown, the material of the first electrode 40 can be any one or more of copper, silver and aluminum.

[0042] In some optional embodiments, such as Figures 1 to 4 As shown, the semiconductor device further includes a source region structure 50, which is located on one side of the terminal structure 30 in the first direction X. The source region structure 50 includes a portion of the first epitaxial layer 31 and the first doped region 32. The first epitaxial layer 31 in the source region structure 50 has the first doped regions 32 distributed at intervals. The first direction X is parallel to the first surface, and the first surface is the surface of the drift layer 20 facing away from the substrate.

[0043] In the above optional implementation, if Figures 1 to 4 As shown, the terminal structure 30 is located on both sides of the source region structure 50. Only part of the source region structure 50 is shown in the figure. The terminal structure 30 in the present application can be matched with a variety of source region structures 50, wherein the source region structure 50 includes a first epitaxial layer 31 and a plurality of first doped regions 32 spaced apart in the first epitaxial layer 31, and the first epitaxial layer 31 forms a PN junction structure with the first doped region 32 and the drift layer 20 respectively.

[0044] In some optional embodiments, such as Figures 1 to 4 As shown, the semiconductor device further includes a second electrode 60 , and the second electrode 60 covers the first epitaxial layer 31 located in the source region structure 50 .

[0045] In the above optional implementation, if Figures 1 to 4 As shown, a second electrode 60 is arranged on the first epitaxial layer 31. The material of the second electrode 60 can be any one or more of copper, silver and aluminum. The second electrode 60 forms a main junction structure with a partial area of ​​the left end of the first epitaxial layer 31. Since the first epitaxial layer 31 is formed by epitaxial growth, the main junction has a more uniform and controllable concentration, a larger depth range, is more conducive to structural design and product production, and has more stable performance.

[0046] In some optional embodiments, such as Figures 1 to 4 As shown, the cross-sectional shapes of the first doping region 32 along the thickness direction of the first epitaxial layer 31 include: rectangle, ring and semicircle.

[0047] In the above optional implementation, if Figures 1 to 4As shown, the cross-section of the first doping region 32 in the thickness direction of the first epitaxial layer 31 can be rectangular, or arc-shaped, such as ring-shaped and semicircular (not shown in the figure). For the cross-sectional shape of the first doping region 32, technicians in this field can make a reasonable choice without specific limitation.

[0048] According to another aspect of the present application, a method for preparing a terminal structure of a semiconductor device is provided, such as Figure 5 As shown, including:

[0049] Step S101: providing a substrate, and forming a drift layer on one side of the substrate, wherein the drift layer has a first doping type;

[0050] Step S102: forming a first epitaxial layer on a side of the drift layer away from the substrate, wherein the first epitaxial layer has a second doping type;

[0051] Step S103: forming a plurality of spaced first doping regions on a side of the first epitaxial layer away from the substrate, wherein the first epitaxial layer is divided into a plurality of parts by the first doping regions, and the first epitaxial layer has a first doping type.

[0052] A plurality of first doping regions are formed in the first epitaxial layer of the terminal structure of the semiconductor device prepared by the preparation method, so that the first doping region separates the first epitaxial layer, so that the terminal structure of the semiconductor device includes a plurality of field limiting rings formed by the first epitaxial layer. Since the doping concentration of the first epitaxial layer is well controlled during the growth process and the uniformity of the doping concentration is high, the doping concentration of the field limiting ring structure of the terminal structure is adjusted and optimized, and the lateral and longitudinal expansion of the surface electric field is adjusted. In the prior art, in order to improve the withstand voltage of the semiconductor terminal, the number of field limiting rings is increased, but this solution increases the area of ​​the terminal structure in the device. In the present application, by using a plurality of spaced first epitaxial layers as field limiting rings, the withstand voltage level of the semiconductor terminal can be greatly improved without increasing the lateral area of ​​the semiconductor occupied by the terminal structure, and the influence of the surface charge on the withstand voltage level of the device is reduced, so that the electric field concentration effect of the semiconductor device terminal is alleviated, and the blocking characteristics of the device are improved. And the influence of the interface charge on the blocking characteristics of the device is effectively reduced, and the surface electric field concentration effect is effectively improved.

[0053] The exemplary embodiments of the method for preparing the terminal structure of the semiconductor device provided by the present invention will be described in more detail below in conjunction with the accompanying drawings. However, these exemplary embodiments can be implemented in a variety of different forms and should not be interpreted as being limited to the embodiments described herein. It should be understood that these embodiments are provided to make the disclosure of this application thorough and complete, and to fully convey the concepts of these exemplary embodiments to those of ordinary skill in the art.

[0054] First, if Figure 6 As shown, step S101 is performed: providing a substrate 10 and forming a drift layer 20 on one side of the substrate 10 , wherein the drift layer 20 has a first doping type.

[0055] Specifically, the substrate 10 may be silicon carbide, specifically 4H-SiC, with a doping concentration of 5E18-1E21cm -3 , with a thickness of 50-500 μm. Before forming the drift layer 20, the drift layer may be an N-type silicon carbide epitaxial layer, and the doping ions may be N-type doping ions such as nitrogen ions, and the doping concentration may be 1E14-5E17 cm -3 , the thickness can be 5~150μm.

[0056] After the step of providing a substrate, as Figures 1 to 4 As shown, step S102 is performed: a first epitaxial layer 31 is formed on the side of the drift layer 20 away from the substrate 10, and the first epitaxial layer 31 has the second doping type. And step S103: a plurality of spaced first doping regions 32 are formed on the side of the first epitaxial layer 31 away from the substrate 10, and the first epitaxial layer 31 is divided into a plurality of parts by the first doping regions 32, and the first epitaxial layer 31 has the first doping type.

[0057] In some optional embodiments, such as Figures 1 to 4 As shown, the preparation method further includes: forming the first epitaxial layer 31 on the side of the drift layer 20 away from the substrate 10 by using an epitaxial growth process; and performing ion implantation in the first epitaxial layer 31 to form the first doping region 32 .

[0058] In the above optional implementation, if Figure 1 As shown, the first epitaxial layer 31 is formed on the drift layer 20 by using an epitaxial growth process, and then ion implantation is performed in the first epitaxial layer 31 to form a first doping region 32, so that the first epitaxial layer 31 is divided into multiple parts. Figure 2 As shown, the first epitaxial layer 31 is formed on the drift layer 20 by an epitaxial growth process, and then ions are implanted into the first epitaxial layer 31 to form a first doped region 32, and then the first epitaxial layer 31 close to the edge of the semiconductor device is etched away by an etching process.

[0059] In some optional embodiments, such as Figure 2 As shown, the preparation method further includes: etching the edge region of the first epitaxial layer 31 so that the substrate 10 has an exposed region. The first epitaxial layer 31 covers the drift layer 20 at intervals, and the first doped region 32 is located between adjacent first epitaxial layers 31, wherein Figure 1The first doped region 32 and the first epitaxial layer 31 completely cover the first surface of the drift layer 20 .

[0060] In some optional embodiments, such as Figures 1 to 4 As shown, the preparation method further includes: forming the first epitaxial layer 31 on the side of the drift layer 20 away from the substrate 10 by an epitaxial growth process; etching the first epitaxial layer 31 to form a groove in a local area of ​​the first epitaxial layer 31, and performing ion implantation into the first epitaxial layer 31 corresponding to the bottom of the groove to form the first doped region 32.

[0061] In the above optional implementation, if Figure 3 As shown, an epitaxial growth process is used to form a first epitaxial layer 31 on the drift layer 20, and then an etching process is performed in the first epitaxial layer 31 to thin a portion of the first epitaxial layer 31, and ion implantation is performed in the thinned first epitaxial layer 31 to form a first doped region 32. Figure 4 As shown, the first epitaxial layer 31 is formed on the drift layer 20 by using an epitaxial growth process, and the first epitaxial layer 31 is etched to thin a portion of the first epitaxial layer 31, and the first epitaxial layer 31 in the edge region is completely etched away, and ion implantation is performed at the thinned first epitaxial layer 31 to form a first doped region 32. The first epitaxial layer 31 may be a P-type silicon carbide epitaxial layer, and the doping ions may be P-type doping ions such as aluminum ions, and the doping concentration may be 1E15~5E19cm -3 The thickness can be 5-150 μm. The doping type of the first doping region 32 can be N-type, and the doping concentration is 1E17-1E21 cm -3 .

[0062] According to another aspect of the present application, a semiconductor device is provided, including a source region structure and a terminal structure of the semiconductor device, wherein the source region structure is located between two adjacent terminal structures. The well region in the source region structure and the field limiting ring of the terminal structure can be formed by simultaneously implanting a first doped region in a first epitaxial layer, wherein the first epitaxial layer replaces the active region and the field limiting ring in the prior art, thereby improving the control of the depth and doping concentration of the well region and the field limiting ring, and making the doping concentration more uniform.

[0063] Example 1

[0064] The present application proposes a method for preparing a terminal structure of a semiconductor device, such as Figure 1 As shown, the following steps are included:

[0065] Provide a substrate 10, the substrate is silicon carbide, has a thickness of 50 μm, and a doping concentration of 1E21 cm -3 ;

[0066] A drift layer 20 is formed on the first surface of the substrate 10. The drift layer 20 is made of silicon carbide, with an N-type doping type and a doping concentration of 2E15 cm -3 , thickness is 20μm;

[0067] The first epitaxial layer 31 is formed on the drift layer 20 by an epitaxial growth process, and then ion implantation is performed in the first epitaxial layer 31 to form a first doping region 32. The first epitaxial layer 31 is divided into a plurality of parts by the first doping region 32. The doping type of the first epitaxial layer 31 is P type, and the doping concentration is 1E18 cm -3 The doping type of the first doping region 32 is N-type, and the doping concentration is 1E19cm -3 ;

[0068] A second electrode 60 is formed on the first epitaxial layer 31 in the source region structure 50 , and the material of the second electrode 60 is copper;

[0069] A first electrode 40 is formed on a side of the substrate 10 facing away from the drift layer 20 . The material of the first electrode 40 is copper.

[0070] Example 2

[0071] The present application proposes a method for preparing a terminal structure of a semiconductor device, such as Figure 2 As shown, the following steps are included:

[0072] Provide a substrate 10, the substrate 10 is silicon carbide, has a thickness of 50 μm, and a doping concentration of 1E21 cm -3 ;

[0073] A drift layer 20 is formed on the first surface of the substrate 10. The drift layer 20 is made of silicon carbide, with an N-type doping type and a doping concentration of 2E15 cm -3 , thickness is 20μm;

[0074] The first epitaxial layer 31 is formed on the drift layer 20 by using an epitaxial growth process, and then an etching process is performed in the first epitaxial layer 31 to etch away the first epitaxial layer 31 at the edge region, and ion implantation is performed in the first epitaxial layer 31 to form a first doping region 32. The first epitaxial layer 31 is divided into a plurality of parts by the first doping region 32. The doping type of the first epitaxial layer 31 is P type, and the doping concentration is 1E18cm -3 The doping type of the first doping region 32 is N-type, and the doping concentration is 1E19cm -3 ;

[0075] A second electrode 60 is formed on the first epitaxial layer 31 in the source region structure 50 , and the material of the second electrode 60 is copper;

[0076] A first electrode 40 is formed on a side of the substrate 10 facing away from the drift layer 20 . The material of the first electrode 40 is copper.

[0077] Example 3

[0078] The present application proposes a method for preparing a semiconductor device, such as Figure 3 As shown, the following steps are included:

[0079] Provide a substrate 10, the substrate 10 is silicon carbide, has a thickness of 50 μm, and a doping concentration of 1E21 cm -3 ;

[0080] A drift layer 20 is formed on the first surface of the substrate 10. The drift layer 20 is made of silicon carbide, with an N-type doping type and a doping concentration of 2E15 cm -3 , thickness is 20μm;

[0081] The first epitaxial layer 31 is formed on the drift layer 20 by an epitaxial growth process, and the first epitaxial layer 31 is partially thinned by an etching process, and then ion implantation is performed to form a first doping region 32. The first epitaxial layer 31 is divided into multiple parts by the first doping region 32. The doping type of the first epitaxial layer 31 is P type, and the doping concentration is 1E18cm -3 The doping type of the first doping region 32 is N-type, and the doping concentration is 1E19cm -3 ;

[0082] A second electrode 60 is formed on the first epitaxial layer 31 in the source region structure 50 , and the material of the second electrode 60 is copper;

[0083] A first electrode 40 is formed on a side of the substrate 10 facing away from the drift layer 20 . The material of the first electrode 40 is copper.

[0084] Example 4

[0085] The present application proposes a method for preparing a terminal structure of a semiconductor device, such as Figure 4 As shown, the following steps are included:

[0086] Provide a substrate 10, the substrate is silicon carbide, has a thickness of 50 μm, and a doping concentration of 1E21 cm -3 ;

[0087] A drift layer 20 is formed on the first surface of the substrate 10. The drift layer 20 is made of silicon carbide, with an N-type doping type and a doping concentration of 2E15 cm -3 , thickness is 20μm;

[0088] A first epitaxial layer 31 is formed on the drift layer 20 by using an epitaxial growth process, a part of the first epitaxial layer 31 is thinned by using an etching process, and an edge region of the first epitaxial layer 31 is etched, and ion implantation is performed at the thinned first epitaxial layer 31 to form a first doping region 32. The first epitaxial layer 31 is divided into a plurality of parts by the first doping region 32. The doping type of the first epitaxial layer 31 is P type, and the doping concentration is 1E18cm -3 The doping type of the first doping region is N-type, and the doping concentration is 1E19cm -3 ;

[0089] A second electrode 60 is formed on the first epitaxial layer 31 in the source region structure 50 , and the material of the second electrode 60 is copper;

[0090] A first electrode 40 is formed on a side of the substrate 10 facing away from the drift layer 20 . The material of the first electrode 40 is copper.

[0091] Comparative Example 1

[0092] A method for preparing a terminal structure of a semiconductor device comprises:

[0093] Provide a substrate, the substrate is silicon carbide, has a thickness of 50 μm, and a doping concentration of 1E21 cm -3 ;

[0094] A drift layer is formed on the first surface of the substrate. The drift layer is silicon carbide, the doping type is N-type, and the doping concentration is 2E15cm -3 , thickness is 20μm;

[0095] Ion implantation is used to form a doped region in the drift layer. The doping type of the doped region is P-type and the doping concentration is 1E18cm -3 ;

[0096] forming a second electrode on the first epitaxial layer in the source region structure, wherein the material of the second electrode is copper;

[0097] A first electrode is formed on a side of the substrate facing away from the drift layer, and the material of the first electrode is copper.

[0098] The semiconductor devices having the terminal structures of the above-mentioned embodiments 1 to 4 and comparative example 1 were subjected to a withstand voltage simulation test. The results are as follows: Figure 7 As shown, Figure 7 From left to right are schematic diagrams of the reverse bias voltage-reverse bias current situation of Comparative Example 1, Example 3, Example 4, Example 1 and Example 2.

[0099] Depend on Figure 7It can be seen that even in the terminal structure with the same junction depth, the structure provided by the present application has a higher withstand voltage. In addition, due to well-known reasons, the terminal structure provided by the present application can provide a deeper junction depth setting, and the first epitaxial layer of the terminal structure and the source region structure of the semiconductor device adopting the terminal structure of the present application can be formed by epitaxial growth at the same time, so that the doping concentration of the doped regions in the source region structure and the terminal structure can be well controlled, so that the doping range is wider and the device performance is more stable.

[0100] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0101] The terminal structure of the semiconductor device of the present application is provided with a first epitaxial layer with uniform concentration on the drift layer, and the thickness of the first epitaxial layer can be deeper. When the first doping region is provided in the first epitaxial layer in combination with etching technology, the injection depth of the first doping region can be well controlled, so as to at least optimize the doping concentration of the doping region of the terminal structure of the semiconductor device, and adjust the lateral and longitudinal expansion of the surface electric field, so that the withstand voltage level of the semiconductor terminal can be greatly improved without increasing the semiconductor area occupied by the terminal structure, and the influence of the surface charge on the withstand voltage level of the device can be reduced, so that the electric field concentration effect of the semiconductor device terminal is alleviated, the blocking characteristics of the device are improved, and the influence of the interface charge on the blocking characteristics of the device is effectively reduced, and the surface electric field concentration effect is effectively improved. The problem of poor withstand voltage capability of semiconductor devices due to poor control of the doping concentration at the terminal structure of the semiconductor device in the prior art is solved.

[0102] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0103] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A terminal structure of a semiconductor device, characterized in that: include: substrate; A drift layer, located on one side of the substrate, having a first doping type; The first epitaxial layer is located on the side of the drift layer away from the substrate, and the doping concentration of the first epitaxial layer is 1E15~5E19cm -3 , having a second doping type, the first doping type being opposite to the second doping type; A plurality of first doping regions are spaced apart in the first epitaxial layer to divide the first epitaxial layer into a plurality of parts, and have a first doping type, wherein the doping concentration of the first doping region is 1E17-1E21cm -3 , the first epitaxial layer of the multiple portions forms a field limiting ring of the terminal structure.

2. The terminal structure according to claim 1, characterized in that: The drift layer has a first surface on a side facing away from the substrate, and the first surface has a portion not covered by the first epitaxial layer and the first doping region.

3. The terminal structure according to claim 1, characterized in that: The thickness of the first epitaxial layer is greater than the thickness of the first doping region.

4. The terminal structure according to claim 1, characterized in that: The drift layer has a first surface on the side away from the substrate, the first surface has a portion not covered by the first epitaxial layer and the first doped region, the thickness of the first epitaxial layer is greater than the thickness of the first doped region, and the first surface is the surface of the drift layer away from the substrate.

5. The terminal structure according to any one of claims 1 to 4, characterized in that: The semiconductor device further includes a first electrode located at a side of the substrate facing away from the drift layer.

6. The terminal structure according to claim 1, characterized in that: The cross-sectional shapes of the first doping region along the thickness direction of the first epitaxial layer include: rectangle, ring and semicircle.

7. A method for preparing a terminal structure of a semiconductor device, characterized in that: A method for preparing a terminal structure of a semiconductor device according to any one of claims 1 to 6, comprising: Providing a substrate, and forming a drift layer on one side of the substrate, wherein the drift layer has a first doping type; forming a first epitaxial layer on a side of the drift layer facing away from the substrate, wherein the first epitaxial layer has a second doping type; A plurality of spaced first doping regions are formed on a side of the first epitaxial layer facing away from the substrate. The first epitaxial layer is divided into a plurality of parts by the first doping regions. The first epitaxial layer has a first doping type. The plurality of parts of the first epitaxial layer form a field limiting ring of a terminal structure.

8. The preparation method according to claim 7, characterized in that: The preparation method further comprises: Forming the first epitaxial layer on a side of the drift layer away from the substrate by using an epitaxial growth process; Ion implantation is performed in the first epitaxial layer to form the first doped region.

9. The preparation method according to claim 8, characterized in that: The preparation method further comprises: The edge region of the first epitaxial layer is etched so that the substrate has an exposed region.

10. The preparation method according to claim 7, characterized in that: The preparation method further comprises: Forming the first epitaxial layer on a side of the drift layer away from the substrate by using an epitaxial growth process; The first epitaxial layer is etched to form a trench in a local area of ​​the first epitaxial layer, and ions are implanted into the first epitaxial layer corresponding to the bottom of the trench to form the first doped region.

11. A semiconductor device, characterized in that: A semiconductor device comprising a source region structure and a terminal structure according to any one of claims 1 to 6, wherein the source region structure is located between two adjacent terminal structures.

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