A fault information processing method, device and equipment of a solid state disk and a medium

Abstract

The application discloses a kind of solid state drive fault information processing method, device, equipment and medium, applied to computer technology field, to solve the problem that fault information is easily lost, including in the case where the fault type for current read-write operation request is identified as preset fault type, if there is completion message returned to flash translation layer within the first preset duration, determine the target register and target storage area in double rate synchronous dynamic random access memory according to current read-write operation request, and add fault field information to completion message;Trigger the target register interrupt current operation, and import the fault information in target register into target storage area;The completion message after adding fault field information is returned to flash translation layer, and based on the write request returned by flash translation layer, the fault information in target storage area is written into nonvolatile memory through other normal channels;Can effectively prevent data loss, and be beneficial to improve fault positioning efficiency.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method, apparatus, device, and computer-readable storage medium for processing fault information of a solid-state drive. Background Technology

[0002] Solid-state drives (SSDs), also known as solid-state drives, are hard drives made using arrays of solid-state electronic storage chips. During the use of SSDs and the development of their firmware, it is necessary to save the fault scene when a failure occurs. Some critical fault information is stored in registers. If the SSD loses power due to unforeseen circumstances before the problem is located, some information in the registers that helps in analyzing the cause of the failure will be lost. In this case, the problem can only be reproduced by analyzing the usage scenario.

[0003] Taking solid-state drive (SSD) read operations as an example, when an SSD encounters a fault during a read operation, the first step is usually to identify the problematic channel and store the relevant context information in a register. This information needs to be exported to a DDR (Double Data Rate SDRAM) before being read and analyzed to pinpoint the cause of the fault. However, if a power outage occurs before or after importing the information into the DDR, and before the DDR contents can be read for fault analysis, valuable information for analyzing the cause of the fault will be lost. This makes it impossible to reproduce the fault, significantly reducing the efficiency of fault location.

[0004] Therefore, how to prevent the loss of relevant information used to analyze the causes of faults and improve the efficiency of fault location is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a method, apparatus, device, and computer-readable storage medium for processing fault information of solid-state drives, which helps to prevent information loss and improve data security and fault location efficiency.

[0006] To address the aforementioned technical problems, one embodiment of the present invention provides a method for processing fault information of a solid-state drive, comprising:

[0007] If the fault type for the current read / write operation request is identified as a preset fault type, determine whether a completion message is returned to the flash memory conversion layer within a first preset time period;

[0008] If a completion message is returned to the flash memory conversion layer within the first preset time period, the target register and the target storage area in the double-rate synchronous dynamic random access memory are determined according to the current read / write operation request, and fault field information is added to the completion message; the fault field information is used to determine the fault channel.

[0009] The target register is triggered to interrupt the current operation, and the fault information in the target register is imported into the target storage area;

[0010] The completion message with the added fault field information is returned to the flash conversion layer, and the fault information in the target storage area is written to the non-volatile memory through other normal channels based on the write request returned by the flash conversion layer; the write request is a message generated by the flash conversion layer based on the completion message for channels other than the fault channel.

[0011] In some embodiments, the preset fault type is a write fault type or a read fault type other than the type where the number of error bits is higher than a threshold.

[0012] In some embodiments, it also includes:

[0013] If no completion message is returned to the flash conversion layer within the first preset time period, then check whether the time of the first timer corresponding to the flash channel controller has been reduced to 0.

[0014] When the timer of the first timer decreases to 0, the target register and the target storage area in the double-rate synchronous dynamic random access memory are determined according to the current read / write operation request.

[0015] The target register is triggered to interrupt the current operation;

[0016] The fault information in the target register is imported into the target storage area of ​​the Double Rate Synchronous Dynamic Random Access Memory (DRAM). This allows the flash conversion layer to check whether there is new data in the storage area corresponding to each channel in the DRAM when the flash conversion layer determines that the time of the second timer corresponding to the flash conversion layer has decreased to 0. If there is new data in the storage area, the target channel corresponding to the storage area with new data is determined, and write requests are returned for other normal channels in the flash channel controller other than the target channel.

[0017] Obtain the write request returned by the flash memory translation layer;

[0018] According to the write request, the fault information in the target storage area of ​​the double rate synchronous dynamic random access memory is written into the non-volatile memory through normal channels other than the target channel.

[0019] In some embodiments, it also includes:

[0020] When a context switch is detected, the first timer is reset to the second preset duration and a countdown begins.

[0021] In some embodiments, determining the target register and the target storage region in the Double Data Rate Synchronous Dynamic Random Access Memory (DRAM) based on the current read / write operation request includes:

[0022] The faulty channel is determined based on the current read / write operation request;

[0023] Based on the fault channel and the pre-established mapping relationship between channels and registers, as well as the mapping relationship between channels and storage areas in the double-rate synchronous dynamic random access memory, the target register and target storage area are determined.

[0024] In some embodiments, it also includes:

[0025] After writing the fault information in the target storage area of ​​the double-rate synchronous dynamic random access memory into the non-volatile memory, the fault information in the target storage area of ​​the double-rate synchronous dynamic random access memory is cleared.

[0026] In some embodiments, the fault field information includes one or more of the fault channel, target register, and target storage area.

[0027] Another embodiment of the present invention provides a fault information processing device for a solid-state drive, comprising:

[0028] The first identification module is used to determine whether there is a completion message returned to the flash memory conversion layer within a first preset time period when the fault type for the current read / write operation request is identified as a preset fault type.

[0029] An addition module is used to determine the target register and the target storage area in the Double Rate Synchronous Dynamic Random Access Memory (DRAM) based on the current read / write operation request if a completion message is returned to the flash memory conversion layer within a first preset time period, and to add fault field information to the completion message; the fault field information is used to determine the fault channel.

[0030] The first import module is used to trigger the target register to interrupt the current operation and import the fault information in the target register into the target storage area;

[0031] The write module is used to return a completion message with the added fault field information to the flash conversion layer, and write the fault information in the target storage area into the non-volatile memory through other normal channels based on the write request returned by the flash conversion layer; the write request is a message generated by the flash conversion layer based on the completion message for channels other than the fault channel.

[0032] Another embodiment of the present invention provides a fault information processing device for a solid-state drive, comprising:

[0033] Memory, used to store computer programs;

[0034] A processor for executing the computer program to implement the steps of the solid-state drive fault information processing method as described above.

[0035] Another aspect of the present invention provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the fault information processing method for a solid-state drive as described above.

[0036] As can be seen from the above technical solution, the beneficial effects of the present invention are as follows:

[0037] This invention provides a method for processing fault information of a solid-state drive (SSD), comprising: when the fault type for the current read / write operation request is identified as a preset fault type, determining whether a completion message is returned to the flash memory conversion layer within a first preset time period; if a completion message is returned to the flash memory conversion layer within the first preset time period, determining the target register and target storage area in the double-rate synchronous dynamic random access memory (DRAM) according to the current read / write operation request, and adding fault field information to the completion message; the fault field information is used to determine the fault channel; triggering the target register to interrupt the current operation, and importing the fault information in the target register into the target storage area; returning the completion message with the added fault field information to the flash memory conversion layer, and writing the fault information in the target storage area into non-volatile memory through other normal channels based on the write request returned by the flash memory conversion layer, wherein the write request is a message generated by the flash memory conversion layer based on the completion message for channels other than the fault channel.

[0038] Therefore, in this embodiment of the invention, when the flash channel controller identifies a fault type as a preset fault type, if a completion message can be returned to the flash conversion layer within a first preset time period, indicating that the context is not stuck, the fault field information can be added to the completion message, and the corresponding register interrupts the current operation. The key variable values ​​(i.e., fault information) related to the context in the register are imported into the target storage area corresponding to the fault channel in the Double Rate Synchronous Dynamic Random Access Memory (DRAM). The completion message is then returned to the flash conversion layer. Based on the completion message, the flash conversion layer sends a write request to the flash channel controller for other normal channels besides the fault channel. The flash channel controller can then use the write request to write the fault data imported into the target storage area of ​​the DRAM to the non-volatile memory through other normal channels. Since the data in the non-volatile memory will not be lost due to power failure, storing the fault data in the non-volatile memory can better prevent data loss and ensure data security. When performing fault location, the fault data can be directly obtained from the non-volatile memory, which is beneficial to improving the efficiency of fault location.

[0039] Furthermore, the present invention also provides a corresponding implementation device and computer-readable storage medium for the fault information processing method of solid-state drives, which further makes the method more practical, and the device and computer-readable storage medium have corresponding advantages. Attached Figure Description

[0040] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 A flowchart illustrating a method for processing fault information of a solid-state drive (SSD) according to an embodiment of the present invention;

[0042] Figure 2 A flowchart of another solid-state drive fault information processing method provided in an embodiment of the present invention;

[0043] Figure 3 A structural diagram of a solid-state drive fault information processing device provided in an embodiment of the present invention;

[0044] Figure 4 A structural diagram of a solid-state drive fault information processing device provided in an embodiment of the present invention;

[0045] Figure 5 This is a structural diagram of a computer-readable storage medium provided in an embodiment of the present invention. Detailed Implementation

[0046] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present invention.

[0047] The terms "comprising" and "having," and any variations thereof, in the specification and accompanying drawings of this invention are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may include steps or units not listed.

[0048] To enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0049] Next, a method for processing fault information of a solid-state drive provided by an embodiment of the present invention will be described in detail. Figure 1 A flowchart of a solid-state drive (SSD) fault information processing method provided in this embodiment of the invention is shown. The method includes:

[0050] S110: If the fault type for the current read / write operation request is identified as a preset fault type, determine whether there is a completion message returned to the flash memory conversion layer within a first preset time period;

[0051] It should be noted that the method provided in this embodiment of the invention can be applied to the flash channel controller (FCC) of a solid-state drive. During read and write operations, the flash channel controller can identify the processing status of the current read and write operation request. If a fault is detected, the fault type is identified. If the fault type is a preset fault type, it is further determined whether the flash channel controller is stuck in context. That is, it can be determined whether there is a context stuck situation by judging whether there is a completion message returned to the flash translation layer within a first preset time period. If the flash channel controller returns a completion message to the flash translation layer (FTL) within the first preset time period, it means that the context of the flash channel controller is not stuck. If the flash channel controller does not return a completion message to the flash translation layer within the first preset time period, it can be determined that the flash channel controller has a context stuck situation.

[0052] In this embodiment of the invention, the preset fault type is a write fault type or a read fault type other than the type where the number of error bits exceeds the threshold. That is, for any write operation request, if a fault is identified, regardless of the type of write fault, it meets the preset fault type. For a read operation request, if a fault is identified, and the fault type is not the type where the number of error bits exceeds the threshold (i.e., the number of error bits is too high), it meets the preset fault type.

[0053] S120: If a completion message is returned to the flash memory conversion layer within the first preset time period, determine the target register and the target storage area in the double rate synchronous dynamic random access memory according to the current read / write operation request, and add fault field information to the completion message; the fault field information is used to determine the fault channel.

[0054] Understandably, if the flash channel controller returns a completion message to the flash conversion layer within the first preset time period, the faulty channel can be further located based on the current read / write operation request, i.e., determining which channel experienced the problem. After identifying the faulty channel, the corresponding target register and the target storage area in the Double Rate Synchronous Dynamic Random Access Memory (DDR) corresponding to that faulty channel can be further determined. Fault field information is then added to the completion message, i.e., fault field information is assigned to the completion message. This fault field information is used to identify the faulty channel and can include one or more of the faulty channel, target register, and target storage area, and may also include the fault type. Of course, the fault field information may also include a fault import flag, which indicates whether fault information has been imported into the DDR. This fault import flag can be set after the fault information has been imported into the target storage area of ​​the DDR.

[0055] In practical applications, a mapping relationship between channels and registers can be established in advance, as well as a mapping relationship between channels and storage areas in the DDR. After locating the faulty channel based on the current read / write operation request, the target register corresponding to the faulty channel can be determined based on the mapping relationship between channels and registers, and the target storage area corresponding to the faulty channel can be determined based on the mapping relationship between channels and DDR storage areas.

[0056] It is understandable that a mapping relationship can be established between the channel value and the starting address in the DDR, so that after identifying the faulty channel, the starting address of the corresponding storage area in the DDR can be further determined based on the value of the faulty channel.

[0057] S130: Triggers the current operation of the target register to interrupt it and imports the fault information in the target register into the target memory area;

[0058] It should be noted that after the fault type field is added, an interrupt will be triggered in the target register immediately, causing the target register to suspend its current operation. At this time, the values ​​of the context-related critical variables in the target register (i.e., the fault information) are imported into the target storage area on the ddr.

[0059] S140: Return the completion message with the added fault field information to the flash conversion layer, and write the fault information in the target storage area into the non-volatile memory through normal channels other than the fault channel based on the write request returned by the flash conversion layer; wherein, the write request is a message generated by the flash conversion layer based on the completion message for channels other than the fault channel.

[0060] It should be noted that, in this embodiment of the invention, after adding the fault field information to the completion message, the completion information is returned to the upper-level flash conversion layer. The fault channel can be determined based on the fault field information in the completion message. When the fault import flag is identified in the detected fault field information and it is determined that fault information has been imported into DDR, a write request is generated for other normal channels besides the fault channel. Then, the write request is returned to the flash channel controller. After receiving the write request, the flash channel controller writes the fault information that has been imported into the target storage area of ​​the double-rate synchronous dynamic random access memory into the non-volatile memory through other normal channels besides the fault channel, thereby preventing the fault information from being lost due to power failure.

[0061] In other words, in this embodiment of the invention, the fault information can be stored in a non-volatile memory as soon as a fault occurs, avoiding the loss of fault information due to abnormal power-off, which is beneficial to improving the efficiency of fault analysis and location.

[0062] In some embodiments, the method may further include:

[0063] If no completion message is returned to the flash conversion layer within the first preset time period, then check whether the time of the first timer corresponding to the flash channel controller has been reduced to 0.

[0064] When the first timer counts down to 0, the target register and the target storage area in the double-rate synchronous dynamic random access memory are determined based on the current read / write operation request.

[0065] Trigger the target register to interrupt the current operation;

[0066] The fault information in the target register is imported into the target storage area in the Double Rate Synchronous Dynamic Random Access Memory (DRAM). This allows the flash conversion layer to check whether there is new data in the storage area corresponding to each channel in the DRAM when the time of the second timer corresponding to the flash conversion layer is reduced to 0. If there is new data in the storage area, the target channel corresponding to the storage area with new data is determined, and write requests are returned for other normal channels in the flash channel controller other than the target channel.

[0067] Get the write request returned by the flash memory translation layer;

[0068] Based on the write request, fault information in the target storage area of ​​the double-rate synchronous dynamic random access memory is written to non-volatile memory through normal channels other than the target channel.

[0069] It should be noted that in this embodiment of the invention, a corresponding first timer can be pre-set for the flash channel controller, and the first timer is reset to a second preset duration each time a context switch occurs, and a countdown begins after the reset. If the flash channel controller does not return a completion message to the flash conversion layer within the first preset duration, it can be determined that the flash channel controller has experienced a context freeze. At this time, it can be detected whether the countdown of the first timer corresponding to the flash channel controller has become 0. If the countdown of the first timer becomes 0, the target register and the target storage area of ​​the double-rate synchronous dynamic random access memory can be determined based on the current read / write operation. In practical applications, a mapping relationship between the channel and the register, and a mapping relationship between the channel and the storage area in the DDR can be pre-established. After locating the faulty channel according to the current read / write operation request, the target register corresponding to the faulty channel can be further determined based on the faulty channel and the mapping relationship between the channel and the register, and the target storage area corresponding to the faulty channel can be determined based on the faulty channel and the mapping relationship between the channel and the DDR storage area.

[0070] Once the target register is determined, the current operation of the target register is immediately interrupted, and the fault information in the target register (i.e., the value of the context-dependent key variable) is imported into the target storage area in the double-rate synchronous dynamic random access memory.

[0071] A second timer is pre-set for the upper flash conversion layer. The second timer counts down from a third preset duration. When the timer is detected to have decreased to 0, the flash conversion layer actively checks whether there is any new content in the corresponding storage area of ​​each channel in the DDR. If new content is found in a storage area, it means that the back-end flash channel controller has imported the fault information in the corresponding register into that storage area. At this time, the storage area with the new data can be identified, and the corresponding target channel (i.e., the fault channel) can be identified according to the pre-established channel-to-storage area mapping relationship. Then, a write request is generated for other normal channels other than the target channel, and the write request is sent to the back-end flash channel controller. After receiving the write request, the flash channel register writes the fault information in the target register to the non-volatile memory through other normal channels other than the target channel.

[0072] In one embodiment, the method may further include:

[0073] After returning a write request for a normal channel in the flash channel controller other than the target channel, the second timer is reset to the third preset duration and a countdown begins.

[0074] It should be noted that, in order to further ensure that the upper flash conversion layer can promptly detect the fault information that has been imported into a certain storage area of ​​the double-rate synchronous dynamic random access memory, and promptly notify the flash channel controller to write the fault information in the storage area to the non-volatile memory through other normal channels, in this embodiment of the invention, after the flash conversion layer sends the generated write request for other normal channels besides the faulty channel to the flash channel controller, the second timer corresponding to the flash conversion layer is immediately reset to the third preset duration, and the countdown of the second timer is started.

[0075] In some embodiments, the method may further include:

[0076] After writing the fault information in the target memory area of ​​the Double Rate Synchronous Dynamic Random Access Memory (DRAM) into the non-volatile memory, the fault information in the target memory area of ​​the DRAM is cleared.

[0077] Please refer to Figure 2 The flowchart of another solid-state drive fault information processing method is shown. In practical applications, in order to further ensure data security and reduce the possibility of data loss, the non-volatile memory in the embodiments of the present invention can be SLC (Single-Level Cell) NAND (non-volatile memory).

[0078] It should be noted that, in order to save storage space in this embodiment of the invention, the fault information stored in the target storage area of ​​the double rate synchronous dynamic random access memory (ddr) can be written to the non-volatile memory through other normal channels besides the fault channel. After the writing is completed, the fault information stored in the target storage area can be cleared, reducing the storage space occupied and improving the performance of the solid-state drive.

[0079] Therefore, in this embodiment of the invention, when the flash channel controller identifies a fault type as a preset fault type, if a completion message can be returned to the flash conversion layer within a first preset time period, indicating that the context is not stuck, the fault field information can be added to the completion message, and the corresponding register interrupts the current operation. The key variable values ​​(i.e., fault information) related to the context in the register are imported into the target storage area corresponding to the fault channel in the Double Rate Synchronous Dynamic Random Access Memory (DRAM). The completion message is then returned to the flash conversion layer. Based on the completion message, the flash conversion layer sends a write request to the flash channel controller for other normal channels besides the fault channel. The flash channel controller can then use the write request to write the fault data imported into the target storage area of ​​the DRAM to the non-volatile memory through other normal channels. Since the data in the non-volatile memory will not be lost due to power failure, storing the fault data in the non-volatile memory can better prevent data loss and ensure data security. When performing fault location, the fault data can be directly obtained from the non-volatile memory, which is beneficial to improving the efficiency of fault location.

[0080] Furthermore, the embodiments of this invention can improve the fault tolerance of customer operations at the site, ensuring that even abnormal power-down will not delay the fault location progress of related errors in the back-end flash memory channel controller. After a fault occurs, upon power-up, the fault information in the non-volatile memory can be automatically read to locate the fault, which also helps to avoid prolonging the power-on time of the solid-state drive.

[0081] This invention also provides a corresponding apparatus for processing fault information of solid-state drives (SSDs), further enhancing the practicality of the method. The apparatus can be described from both a functional module perspective and a hardware perspective. The following describes the SSD fault information processing apparatus provided by this invention, which implements the SSD fault information processing method provided by this invention. In this embodiment, the SSD fault information processing apparatus may include or be divided into one or more program modules. These program modules are stored in a storage medium and executed by one or more processors to complete the SSD fault information processing method disclosed in the above embodiments. The program module referred to in this invention is a series of computer program instruction segments capable of performing specific functions, which is more suitable than the program itself for describing the execution process of the SSD fault information processing apparatus in the storage medium. The following description will specifically introduce the functions of each program module in this embodiment. The SSD fault information processing apparatus described below corresponds to the SSD-based fault information processing method described above.

[0082] From the perspective of functional modules, see Figure 3 , Figure 3 This is a schematic diagram of a fault information processing device for a solid-state drive provided by the present invention. The device includes:

[0083] The first identification module 11 is used to determine whether there is a completion message returned to the flash memory conversion layer within a first preset time period when the fault type for the current read / write operation request is identified as a preset fault type.

[0084] Add module 12, which is used to determine the target register and the target storage area in the double rate synchronous dynamic random access memory according to the current read / write operation request if a completion message is returned to the flash conversion layer within the first preset time period, and add fault field information to the completion message; the fault field information is used to determine the fault channel;

[0085] The first import module 13 is used to trigger the target register to interrupt the current operation and import the fault information in the target register into the target storage area;

[0086] The write module 14 is used to return a completion message with added fault field information to the flash conversion layer, and write the fault information in the target storage area into the non-volatile memory through other normal channels based on the write request returned by the flash conversion layer; the write request is a message generated by the flash conversion layer based on the completion message for channels other than the fault channel.

[0087] In some embodiments, the preset fault type is a write fault type or a read fault type other than the type where the number of error bits exceeds a threshold.

[0088] In some embodiments, it also includes:

[0089] The first detection module is used to detect whether the time of the first timer corresponding to the flash channel controller has decreased to 0 if no completion message is returned to the flash conversion layer within a first preset time period.

[0090] The first determining module is used to determine the target register and the target storage area in the double-rate synchronous dynamic random access memory based on the current read / write operation request when the timer of the first timer is reduced to 0.

[0091] The first triggering module is used to trigger the target register to interrupt the current operation;

[0092] The second import module is used to import the fault information in the target register into the target storage area of ​​the double rate synchronous dynamic random access memory. In order to check whether there is new data in the storage area corresponding to each channel in the double rate synchronous dynamic random access memory when the flash conversion layer determines that the time of the second timer corresponding to the flash conversion layer has decreased to 0, if there is new data in the storage area, the target channel corresponding to the storage area with new data is determined, and a write request is returned for the other normal channels in the flash channel controller other than the target channel.

[0093] The first acquisition module is used to acquire write requests returned by the flash memory conversion layer;

[0094] The write module is used to write fault information in the target storage area of ​​the double-rate synchronous dynamic random access memory into non-volatile memory through normal channels other than the target channel, according to the write request.

[0095] In some embodiments, it also includes:

[0096] The reset module is used to reset the first timer to the second preset duration and start the countdown when a context switch is detected.

[0097] In some embodiments, module 12 is added, including:

[0098] The first determining unit is used to determine the faulty channel based on the current read / write operation request;

[0099] The second determining unit is used to determine the target register and target storage area based on the fault channel and the pre-established mapping relationship between the channel and the register, and the mapping relationship between the channel and the storage area in the double-rate synchronous dynamic random access memory.

[0100] In some embodiments, it also includes:

[0101] The clearing module is used to clear the fault information in the target storage area of ​​the Double Rate Synchronous Dynamic Random Access Memory after writing the fault information in the target storage area of ​​the Double Rate Synchronous Dynamic Random Access Memory into the non-volatile memory.

[0102] In some embodiments, the fault field information includes one or more of the fault channel, the target register, and the target storage area.

[0103] It should be noted that the solid-state drive fault information processing device provided in the embodiments of the present invention has the same beneficial effects as the solid-state drive fault information processing method provided in the above embodiments. For a detailed description of the solid-state drive fault information processing method involved in the embodiments of the present invention, please refer to the above embodiments, and the present invention will not repeat it here.

[0104] The solid-state drive (SSD) fault information processing device mentioned above is described from the perspective of functional modules. Furthermore, this invention also provides a solid-state drive (SSD) fault information processing device, which is described from the perspective of hardware. Figure 4 This is a schematic diagram of the structure of a solid-state drive fault information processing device provided in an embodiment of the present invention, as shown below. Figure 4 As shown, the fault information processing device for this solid-state drive includes:

[0105] Memory 20 is used to store computer programs;

[0106] The processor 21 is used to execute a computer program to implement the steps of the fault information processing method for the solid-state drive as described in the above embodiment.

[0107] The devices provided in this embodiment may include, but are not limited to, smartphones, tablets, laptops, or desktop computers.

[0108] The processor 21 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 21 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 21 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 21 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 21 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0109] The memory 20 may include one or more computer-readable storage media, which may be non-transitory. The memory 20 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In some embodiments, the memory 20 may be an internal storage unit of the device, such as a server hard drive. In other embodiments, the memory 20 may be an external storage device of the device, such as a plug-in hard drive on a server, a Smart Media Card (SMC), a Secure Digital (SD) card, a Flash Card, etc. Furthermore, the memory 20 may include both internal and external storage units of the device. The memory 20 can be used not only to store application software and various types of data installed on the device, such as code in the process of executing the solid-state drive fault information processing method, but also to temporarily store data that has been output or will be output. In this embodiment, the memory 20 is used to store at least the following computer program 201, which, after being loaded and executed by the processor 21, is capable of implementing the relevant steps of the solid-state drive fault information processing method disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, and the storage method may be temporary storage or permanent storage. The operating system 202 may include Windows, Unix, Linux, etc. The data 203 may include, but is not limited to, data corresponding to the results of the configured solid-state drive fault information handling method.

[0110] In some embodiments, the device may further include a display screen 22, an input / output interface 23, a communication interface 24, a power supply 25, and a communication bus 26. The display screen 22 and input / output interface 23, such as a keyboard, are user interfaces; optional user interfaces may also include standard wired interfaces, wireless interfaces, etc. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, or an OLED (Organic Light-Emitting Diode) touchscreen, etc. The display may also be appropriately referred to as a screen or display unit, used to display information processed in the device and to display a visual user interface. The communication interface 24 may optionally include a wired interface and / or a wireless interface, such as a Wi-Fi interface, a Bluetooth interface, etc., typically used to establish communication connections between the device and other devices. The communication bus 26 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. This bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 4 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0111] Those skilled in the art will understand that Figure 4 The structure shown does not constitute a limitation on the device and may include more or fewer components than illustrated.

[0112] It is understood that if the solid-state drive fault information processing method in the above embodiments is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods in the various embodiments of the present invention. The aforementioned storage medium includes: USB flash drive, portable hard drive, read-only memory (ROM), random access memory (RAM), electrically erasable programmable ROM, register, hard disk, removable disk, CD-ROM, magnetic disk, or optical disk, and other media capable of storing program code.

[0113] Based on this, such as Figure 5As shown, this embodiment of the invention also provides a computer-readable storage medium 30, on which a computer program 31 is stored. When the computer program 31 is executed by a processor, it implements the steps of the fault information processing method of the solid-state drive described above.

[0114] Based on the above embodiments, this invention also provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the steps of the above-described solid-state drive fault information processing method.

[0115] The foregoing has provided a detailed description of a method, apparatus, and medium for processing fault information of a solid-state drive (SSD) according to embodiments of the present invention. The various embodiments are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0116] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0117] The present invention has provided a detailed description of a method, device, and medium for processing fault information of a solid-state drive. Specific examples have been used to illustrate the principles and implementation methods of the invention. The descriptions of these embodiments are merely for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make various improvements and modifications to the invention without departing from its principles, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A method for processing fault information of a solid-state drive, characterized in that, Applications to flash channel controllers include: If the fault type for the current read / write operation request is identified as a preset fault type, determine whether a completion message is returned to the flash memory conversion layer within a first preset time period; If a completion message is returned to the flash memory conversion layer within the first preset time period, the target register and the target storage area in the double-rate synchronous dynamic random access memory are determined according to the current read / write operation request, and fault field information is added to the completion message; the fault field information is used to determine the fault channel. The target register is triggered to interrupt the current operation, and the fault information in the target register is imported into the target storage area; The completion message, after adding the fault field information, is returned to the flash memory conversion layer. Based on the write request returned by the flash memory conversion layer, the fault information in the target storage area is written to the non-volatile memory through other normal channels. The write request is a message generated by the flash memory conversion layer based on the completion message for channels other than the fault channel. The preset fault type is a write fault type or a read fault type other than the type where the number of error bits is higher than the threshold. Also includes: If no completion message is returned to the flash conversion layer within the first preset time period, then check whether the time of the first timer corresponding to the flash channel controller has been reduced to 0. When the timer of the first timer decreases to 0, the target register and the target storage area in the double-rate synchronous dynamic random access memory are determined according to the current read / write operation request. The target register is triggered to interrupt the current operation; The fault information in the target register is imported into the target storage area of ​​the Double Rate Synchronous Dynamic Random Access Memory (DRAM). This allows the flash conversion layer to check whether there is new data in the storage area corresponding to each channel in the DRAM when the flash conversion layer determines that the time of the second timer corresponding to the flash conversion layer has decreased to 0. If there is new data in the storage area, the target channel corresponding to the storage area with new data is determined, and write requests are returned for other normal channels in the flash channel controller other than the target channel. Obtain the write request returned by the flash memory translation layer; According to the write request, the fault information in the target storage area of ​​the double rate synchronous dynamic random access memory is written into the non-volatile memory through normal channels other than the target channel.

2. The method for processing fault information of a solid-state drive according to claim 1, characterized in that, Also includes: When a context switch is detected, the first timer is reset to the second preset duration and a countdown begins.

3. The method for processing fault information of a solid-state drive according to any one of claims 1 to 2, characterized in that, Determining the target register and the target storage region in the Double Rate Synchronous Dynamic Random Access Memory based on the current read / write operation request includes: The faulty channel is determined based on the current read / write operation request; Based on the fault channel and the pre-established mapping relationship between channels and registers, as well as the mapping relationship between channels and storage areas in the double-rate synchronous dynamic random access memory, the target register and target storage area are determined.

4. The method for processing fault information of a solid-state drive according to claim 3, characterized in that, Also includes: After writing the fault information in the target storage area of ​​the double-rate synchronous dynamic random access memory into the non-volatile memory, the fault information in the target storage area of ​​the double-rate synchronous dynamic random access memory is cleared.

5. The method for processing fault information of a solid-state drive according to claim 4, characterized in that, The fault field information includes one or more of the following: fault channel, target register, and target storage area.

6. A fault information processing device for a solid-state drive, applied to a flash memory channel controller, characterized in that, include: The first identification module is used to determine whether there is a completion message returned to the flash memory conversion layer within a first preset time period when the fault type for the current read / write operation request is identified as a preset fault type. An addition module is used to determine the target register and the target storage area in the Double Rate Synchronous Dynamic Random Access Memory (DRAM) based on the current read / write operation request if a completion message is returned to the flash memory conversion layer within a first preset time period, and to add fault field information to the completion message. The fault field information is used to identify the faulty channel; The first import module is used to trigger the target register to interrupt the current operation and import the fault information in the target register into the target storage area; The write module is used to return a completion message after adding the fault field information to the flash conversion layer, and write the fault information in the target storage area into the non-volatile memory through other normal channels based on the write request returned by the flash conversion layer. The write request is a message generated by the flash conversion layer based on the completion message for channels other than the faulty channel; wherein: The preset fault type is a write fault type or a read fault type other than the type where the number of error bits is higher than the threshold. The device further includes: The first detection module is used to detect whether the time of the first timer corresponding to the flash channel controller has decreased to 0 if no completion message is returned to the flash conversion layer within a first preset time period. The first determining module is used to determine the target register and the target storage area in the double-rate synchronous dynamic random access memory based on the current read / write operation request when the time of the first timer is reduced to 0. The first triggering module is used to trigger the target register to interrupt the current operation; The second import module is used to import the fault information in the target register into the target storage area of ​​the double rate synchronous dynamic random access memory (DRAM). This allows the flash conversion layer to check whether there is new data in the storage area corresponding to each channel in the DRAM when the flash conversion layer determines that the time of the second timer corresponding to the flash conversion layer has decreased to 0. If there is new data in the storage area, the target channel corresponding to the storage area with new data is determined, and write requests are returned for other normal channels in the flash channel controller other than the target channel. The first acquisition module is used to acquire the write request returned by the flash memory conversion layer; The write module is used to write fault information in the target storage area of ​​the double rate synchronous dynamic random access memory into non-volatile memory through normal channels other than the target channel, according to the write request.

7. A fault information processing device for a solid-state drive, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the fault information processing method for a solid-state drive as described in any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the fault information processing method for the solid-state drive as described in any one of claims 1 to 5.

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