Solar cell, photovoltaic module and semiconductor substrate

Abstract

The present invention discloses a solar cell, a photovoltaic module and a semiconductor substrate, which relate to the field of photovoltaic technology, in order to improve the passivation effect of a passivation layer, improve the contact performance between a doped semiconductor layer and an electrode, and shape the electrode. The solar cell comprises a semiconductor substrate and a passivation layer. The side of the passivation layer facing away from the semiconductor substrate has a first tower-like texture structure and a second tower-like texture structure. The first tower-like texture structure comprises a plurality of first substructures, and the bottom surface of the first substructure is recessed into the passivation layer. In the first tower-like texture structure, the first substructure whose bottom surface is a complete pattern is a target substructure. The second tower-like texture structure comprises a plurality of second substructures arranged in the first substructure, and the bottom surface of the second substructure is recessed into the passivation layer relative to the surface of the first substructure. The one-dimensional size of the target substructure is larger than the one-dimensional size of the second substructure, and the number of second substructures arranged in at least one target substructure is greater than or equal to 10.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a solar cell, a photovoltaic module and a semiconductor substrate. Background Art

[0002] As a green energy source, solar cells play a positive role in energy conservation and emission reduction. With the development of the photovoltaic industry, solar cell technology has become increasingly mature. Among them, photovoltaic solar cells are devices that convert sunlight into electrical energy. Specifically, solar cells use the photovoltaic principle to generate carriers, and then use electrodes to lead out the carriers, thereby facilitating the effective use of electrical energy. As an environmentally friendly and renewable energy source, solar energy has received more and more attention in recent years. Correspondingly, the application scope of photovoltaic solar cells based on the photoelectric effect is also becoming wider and wider.

[0003] However, it is difficult for existing solar cells to achieve both good passivation effects and good electrode contact performance and shaping, which is not conducive to improving the conversion efficiency of solar cells. Summary of the invention

[0004] The object of the present invention is to provide a solar cell, a photovoltaic module and a semiconductor substrate, which are used to make the passivation layer have a good passivation effect on the semiconductor substrate, and at the same time, by arranging a large number of second substructures in the first substructure to increase the surface roughness of the passivation layer on the side away from the semiconductor substrate, which is beneficial to increase the specific surface area of ​​the doped semiconductor layer in the passivation layer or formed between the passivation layer and the semiconductor substrate, improve the contact performance between the doped semiconductor layer and the electrode, and the shaping of the electrode, thereby improving the conversion efficiency of the solar cell.

[0005] In order to achieve the above-mentioned object, in the first aspect, the present invention provides a solar cell, which comprises: a semiconductor substrate and a passivation layer. The semiconductor substrate comprises a first surface and a second surface opposite to each other. At least one of the first surface and the second surface is a target surface. The passivation layer is arranged on the target surface. The passivation layer has a first tower-shaped texture structure and a second tower-shaped texture structure on the side away from the semiconductor substrate. The first tower-shaped texture structure comprises a plurality of first substructures, and the bottom surface of the first substructure is recessed into the passivation layer. In the first tower-shaped texture structure, the first substructure whose bottom surface is a complete figure is the target substructure. The second tower-shaped texture structure comprises a plurality of second substructures arranged in the first substructure, and the bottom surface of the second substructure is recessed into the passivation layer relative to the surface of the first substructure. The one-dimensional size of the target substructure is greater than the one-dimensional size of the second substructure; the number of the second substructures arranged in at least one target substructure is greater than or equal to 10, or the area of ​​the bottom surface of the second substructure on the side of the passivation layer away from the semiconductor substrate accounts for greater than or equal to 15% and less than or equal to 60%.

[0006] In the case of adopting the above technical solution, the passivation layer is arranged on the target surface of the semiconductor substrate, and the target surface side of the semiconductor substrate can be passivated to reduce the carrier recombination rate. In addition, the side of the passivation layer away from the semiconductor substrate has a first tower-shaped texture structure and a second tower-shaped texture structure. Under the same conditions of other factors, compared with the texture structure with a large degree of undulation such as the pyramid-shaped velvet structure, the first tower-shaped texture structure without a spire and the second tower-shaped texture structure have a relatively small degree of undulation, so that the surface of the side of the passivation layer away from the semiconductor substrate is relatively flat from a macroscopic perspective. In addition, in the actual manufacturing process, the passivation layer is formed on the target surface of the semiconductor substrate by deposition and other processes, and the surface undulation morphology of the passivation layer away from the semiconductor substrate side will also be affected by the surface undulation morphology of the target surface, and the corresponding surface undulation morphology of the passivation layer away from the semiconductor substrate side can also reflect the surface undulation morphology of the target surface of the semiconductor substrate to a certain extent. Based on this, when the surface of the passivation layer facing away from the semiconductor substrate is relatively flat on a macroscopic scale, the target surface of the semiconductor substrate is also roughly a relatively flat surface, which is beneficial to improving the formation quality and film thickness of the passivation layer on the target surface, and then beneficial to improving the passivation effect of the passivation layer on the semiconductor substrate and improving the conversion efficiency of solar cells.

[0007] In addition, the second tower-shaped texture structure includes a plurality of second substructures disposed in the first substructure, and the bottom surface of the second substructure is concave toward the passivation layer relative to the surface of the first substructure. At this time, the surface of the first tower-shaped texture structure, which originally has an undulating morphology, is superimposed with the undulating degree of the second tower-shaped texture structure, which is conducive to increasing the specific surface area of ​​the passivation layer away from the semiconductor substrate. Furthermore, in the first tower-shaped texture structure, the number of second substructures arranged in at least one target substructure whose bottom surface is a complete pattern is greater than or equal to 10, or the area of ​​the bottom surface of the second substructure on the side of the passivation layer away from the semiconductor substrate accounts for greater than or equal to 15% and less than or equal to 60%. At this time, the distribution density of the second substructure in the target substructure is relatively large, and the frequency of the high and low changes of the undulating morphology caused by the arrangement of the second substructure increases, so that the side of the passivation layer away from the semiconductor substrate has a relatively large surface roughness at the microscopic level, so that the doped semiconductor layer included in the passivation layer, or the doped semiconductor layer formed between the passivation layer and the semiconductor substrate has a larger specific surface area, thereby increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, which is beneficial to improving the conversion efficiency of solar cells.

[0008] As a possible implementation scheme, the number of second substructures provided in at least one target substructure is less than or equal to 30. In this case, it is possible to prevent the surface roughness of the passivation layer on the side away from the semiconductor substrate from being too large due to the number of second substructures provided in the target substructure being too large, thereby ensuring that the passivation layer has a high formation quality, which is conducive to further increasing the film thickness of the passivation layer, thereby improving the conversion efficiency of the solar cell. At the same time, it is also conducive to reducing the process difficulty of manufacturing solar cells and improving the yield of solar cells.

[0009] As a possible implementation scheme, the one-dimensional size of the second substructure is greater than or equal to 0.03 times the one-dimensional size of the target substructure, and less than or equal to 0.1 times the one-dimensional size of the target substructure.

[0010] In the case of adopting the above technical solution, it can be understood that when the one-dimensional size of the target substructure is constant, when the one-dimensional size of the second substructure increases, the formation range of a single second substructure in the first substructure is larger, and the number of second substructures that can be accommodated in the same first substructure is reduced. Based on this, when the one-dimensional size of the second substructure is within the above range, it is helpful to prevent the surface roughness of the passivation layer away from the semiconductor substrate from being too large due to the one-dimensional size of the second substructure being too small, thereby ensuring that the passivation layer has a high formation quality, and is conducive to further increasing the film thickness of the passivation layer, thereby improving the conversion efficiency of the solar cell. At the same time, it is also conducive to reducing the process difficulty of manufacturing solar cells and improving the yield of solar cells. In addition, it can also prevent the surface roughness of the passivation layer on the side away from the semiconductor substrate from being too small due to the one-dimensional size of the second substructure being too large, thereby ensuring that the above-mentioned doped semiconductor layer has a larger specific surface area, further increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, which is beneficial to improving the conversion efficiency of the solar cell.

[0011] As a possible implementation scheme, in the same target substructure, the ratio between the one-dimensional dimensions of different second substructures is greater than or equal to 0.95 and less than or equal to 1.05. In this case, it is beneficial to make the surface roughness of different regions of the same target substructure where the second substructure is provided to be roughly the same, so that the passivation layer has a higher passivation effect and formation quality along the portions parallel to the target surface in different regions. At the same time, it is beneficial to make the portions of the above-mentioned doped semiconductor layer along the portions parallel to the target surface in different regions have higher contact performance with the electrode, and the electrode has strong adhesion and good shaping on different regions of the doped semiconductor layer, which is beneficial to improve the conversion efficiency of the solar cell.

[0012] As a possible implementation scheme, the ratio between the one-dimensional dimensions of different second substructures in different target substructures is greater than or equal to 0.95 and less than or equal to 1.05. In this case, the one-dimensional dimensions of different second substructures are roughly the same, which is conducive to making different areas of the passivation layer away from the semiconductor substrate have roughly the same surface roughness, and correspondingly, the target surface on which the passivation layer is formed also has roughly the same surface roughness in different areas, so that the passivation layer along the parts parallel to the target surface in different areas have a higher passivation effect and formation quality. At the same time, it is conducive to making the above-mentioned doped semiconductor layer along the parts parallel to the target surface in different areas have higher contact performance with the electrode, and the electrode has strong adhesion and good shaping on different areas of the doped semiconductor layer, which is conducive to improving the conversion efficiency of solar cells.

[0013] As a possible implementation solution, within the target substructure, the second substructure is only distributed on the bottom surface of the target substructure.

[0014] In the case of adopting the above technical solution, the side of the target substructure is not provided with the second substructure. At this time, compared with the bottom surface superimposed with the second substructure, the side of the target substructure is relatively flat, which is conducive to preventing the microscopic surface roughness of the side of the passivation layer away from the semiconductor substrate from being too large, and accordingly, the surface roughness of the target surface on which the passivation layer is formed can be further reduced, and the formation quality and passivation effect of the passivation layer can be further improved. At the same time, it is also conducive to reducing the process difficulty of manufacturing solar cells and improving the yield of solar cells.

[0015] As a possible implementation solution, in at least one identical target substructure, different second substructures are distributed in various regions of the bottom surface of the target substructure.

[0016] When the above technical solution is adopted, the surface of the target substructure is concave into the passivation layer. At this time, there is a certain height difference between the bottom and the top of the side of the target substructure. Therefore, compared with the bottom surface of the target substructure, the side surface has certain ups and downs, and the bottom surface is relatively flat. Based on this, when the second substructure is distributed in various areas at the bottom of the target substructure, the originally flat bottom surface can be superimposed with the ups and downs of the second substructure, increasing the roughness of the bottom surface, further increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, which is conducive to improving the conversion efficiency of the solar cell.

[0017] As a possible implementation scheme, in at least one same target substructure, different second substructures are distributed in local areas of the bottom surface of the target substructure. In this case, another possible example is provided for the distribution of the second substructure in the target substructure, which is beneficial to improving the applicability of the solar cell provided by the present invention in different application scenarios and at the same time helping to reduce the difficulty of the manufacturing process.

[0018] As a possible implementation scheme, the depth of the bottom surface of the target substructure recessed into the passivation layer is greater than the depth of the bottom surface of the second substructure recessed into the passivation layer relative to the bottom surface of the target substructure.

[0019] When the above technical solution is adopted, the depth of the bottom surface of the second substructure recessed into the passivation layer is smaller than that of the bottom surface of the target substructure, so that after the second substructure is superimposed on the target substructure and the remaining first substructures, the additional degree of undulation on the undulating topography originally provided with the target substructure and the remaining first substructures is smaller, which is beneficial to control the surface roughness of the passivation layer away from the semiconductor substrate side to be not too large, and correspondingly the surface roughness of the target surface on which the passivation layer is formed is not too large, thereby ensuring that the passivation layer has a higher formation quality and passivation effect.

[0020] As a possible implementation scheme, the depth of the bottom surface of the second substructure relative to the bottom surface of the target substructure in the passivation layer is less than 0.2 μm. The application principle of the beneficial effect in this case can refer to the aforementioned depth of the bottom surface of the target substructure in the passivation layer, and the application principle of the beneficial effect of the bottom surface of the second substructure relative to the bottom surface of the target substructure in the passivation layer is greater than the depth of the bottom surface of the second substructure relative to the bottom surface of the target substructure in the passivation layer, which will not be repeated here.

[0021] As a possible implementation scheme, the passivation layer further has at least two groups of protrusion structures on the side facing away from the semiconductor substrate, and the at least two groups of protrusion structures are arranged on the side of the first substructure and are distributed in a stepped manner along the extension direction of the side edge line of the first substructure. Each group of protrusion structures includes a plurality of protrusions extending along the length direction of the side edge line of the first substructure and distributed in a direction parallel to the bottom surface of the first substructure.

[0022] When adopting the above technical solution, the presence of at least two groups of protruding structures can increase the surface undulation of the side of the first substructure, further increase the surface roughness of the passivation layer on the side away from the semiconductor substrate, thereby further increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, which is beneficial to improving the conversion efficiency of solar cells.

[0023] As a possible implementation scheme, only one of the first surface and the second surface is the target surface. Along the direction parallel to the target surface, the passivation layer includes an N-type doped semiconductor layer and a P-type doped semiconductor layer of opposite conductivity types, and at least a portion of the N-type doped semiconductor layer is separated from at least a portion of the P-type doped semiconductor layer. Among them, the side surface of the passivation layer corresponding to the N-type doped semiconductor layer that is away from the semiconductor substrate is the first sub-surface, and the side surface of the passivation layer corresponding to the P-type doped semiconductor layer that is away from the semiconductor substrate is the second sub-surface. The first tower-shaped texture structure is distributed on the first sub-surface and the second sub-surface, and the second tower-shaped texture structure is only distributed on the first sub-surface.

[0024] In the case of adopting the above technical solution, due to the limitations of doping solid concentration and doping difficulty, the dopant concentration of the dopant in the N-type doped semiconductor layer is greater than the doping concentration of the dopant in the P-type doped semiconductor layer, and the passivation characteristics of the P-type doped semiconductor layer are relatively poor. Secondly, it can be understood that compared with the second sub-surface provided with only the first tower base-shaped texture structure, the surface roughness of the first sub-surface provided with both the first tower base-shaped texture structure and the second tower base-shaped texture structure is greater. Based on this, when the second sub-surface with a smaller surface roughness is the side surface of the passivation layer corresponding to the P-type doped semiconductor layer that is away from the semiconductor substrate, the surface of the area of ​​the target surface corresponding to the P-type doped semiconductor layer also has a relatively small surface roughness, which is beneficial to improve the formation quality and passivation effect of the P-type doped semiconductor layer. At the same time, when the first sub-surface with a larger surface roughness is the surface of the side of the passivation layer corresponding to the N-type doped semiconductor layer that is away from the semiconductor substrate, it can also increase the contact area between the N-type doped semiconductor layer and the negative electrode, improve the contact performance between the N-type doped semiconductor layer and the negative electrode, and improve the adhesion and shaping of the negative electrode on the N-type doped semiconductor layer, which is beneficial to improving the conversion efficiency of the solar cell.

[0025] As a possible implementation scheme, only one of the first surface and the second surface is the target surface. The solar cell also includes a doped semiconductor region arranged in the target surface, and a doped semiconductor layer arranged on the target surface. The conductivity types of the doped semiconductor layer and the doped semiconductor region are opposite, and at least a portion of the doped semiconductor layer and at least a portion of the doped semiconductor region are spaced apart in a direction parallel to the target surface. Among them, the side surface of the passivation layer corresponding to the doped semiconductor region that is away from the semiconductor substrate is the first sub-surface, and the side surface of the passivation layer corresponding to the doped semiconductor layer that is away from the semiconductor substrate is the second sub-surface. The first tower base-shaped texture structure is distributed on the first sub-surface and the second sub-surface, and the second tower base-shaped texture structure is only distributed on the first sub-surface.

[0026] In the case of adopting the above technical solution, when the second sub-surface with a smaller surface roughness is the surface of the side of the passivation layer corresponding to the doped semiconductor layer away from the semiconductor substrate, the surface of the area of ​​the target surface corresponding to the doped semiconductor layer also has a relatively small surface roughness, which is conducive to improving the formation quality and passivation effect of the doped semiconductor layer on the corresponding area of ​​the target surface. At the same time, when the first sub-surface with a larger surface roughness is the surface of the side of the passivation layer corresponding to the doped semiconductor region away from the semiconductor substrate, the contact area between the doped semiconductor region and the electrode can be increased, the contact performance between the doped semiconductor region and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor region can be improved, which is conducive to improving the conversion efficiency of the solar cell; in addition, when at least part of the dopant in the doped semiconductor region is doped into the doped semiconductor region by sintering the electrode material, the first sub-surface has a larger surface roughness, and increasing the contact area between the doped semiconductor region and the electrode is also conducive to increasing the doping concentration and / or doping range of the doped semiconductor region, which is conducive to improving the carrier collection capacity of the doped semiconductor region.

[0027] In a second aspect, the present invention provides a photovoltaic module, which includes the solar cell provided by the first aspect and various implementations thereof.

[0028] The beneficial effects of the second aspect of the present invention and its various implementations can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0029] In a third aspect, the present invention provides a semiconductor substrate, which includes a first surface and a second surface relative to each other. At least one of the first surface and the second surface is a target surface. The target surface has a first tower-shaped texture structure and a second tower-shaped texture structure. The first tower-shaped texture structure includes a plurality of first substructures, and the bottom surface of the first substructure is recessed into the semiconductor substrate relative to the target surface. In the first tower-shaped texture structure, the first substructure whose bottom surface is a complete figure is the target substructure. The second tower-shaped texture structure includes a plurality of second substructures arranged in the first substructure, and the bottom surface of the second substructure is recessed into the semiconductor substrate relative to the surface of the first substructure. The one-dimensional size of the target substructure is larger than the one-dimensional size of the second substructure; the number of second substructures arranged in at least one target substructure is greater than or equal to 10, or the area of ​​the bottom surface of the second substructure in the target surface accounts for greater than or equal to 15% and less than or equal to 60%.

[0030] The beneficial effects of the third aspect of the present invention and its various implementations can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0032] Figure 1 It is a SEM image of a local surface of a passivation layer facing away from a semiconductor substrate in the related art;

[0033] Figure 2 A schematic longitudinal cross-sectional view of a first structure of a solar cell provided by an embodiment of the present invention;

[0034] Figure 3 A schematic longitudinal cross-sectional view of a second structure of a solar cell provided by an embodiment of the present invention;

[0035] Figure 4 A schematic longitudinal cross-sectional view of a third structure of a solar cell provided by an embodiment of the present invention;

[0036] Figure 5 This is a SEM image of a local surface of the passivation layer facing away from the semiconductor substrate in an embodiment of the present invention. Figure 1 ;

[0037] Figure 6 This is a SEM image of a local surface of the passivation layer facing away from the semiconductor substrate in an embodiment of the present invention. Figure 2 ;

[0038] Figure 7 A schematic longitudinal cross-sectional view of a fourth structure of a solar cell provided by an embodiment of the present invention;

[0039] Figure 8 A schematic longitudinal cross-sectional view of a fifth structure of a solar cell provided by an embodiment of the present invention;

[0040] Fig. 9 A schematic longitudinal cross-sectional view of a sixth structure of a solar cell provided by an embodiment of the present invention;

[0041] Fig.10 This is a SEM image of a local surface of the passivation layer facing away from the semiconductor substrate in an embodiment of the present invention. Figure 3 ;

[0042] Fig.11 This is a SEM image of a local surface of the passivation layer facing away from the semiconductor substrate in an embodiment of the present invention. Figure 4 ;

[0043] Fig.12 This is a SEM image of a local surface of the passivation layer facing away from the semiconductor substrate in an embodiment of the present invention. Figure 5 ;

[0044] Fig.13 A schematic longitudinal cross-sectional view of a seventh structure of a solar cell provided by an embodiment of the present invention.

[0045] Figure numerals: 11 is a semiconductor substrate, 12 is a first surface, 13 is a second surface, 14 is a passivation layer, 15 is a first tower base-like texture structure, 16 is a second tower base-like texture structure, 17 is a target substructure, 18 is a second substructure, 19 is a protruding structure, 20 is a protruding portion, 21 is an N-type doped semiconductor layer, 22 is a P-type doped semiconductor layer, 23 is a doped semiconductor region, 24 is a doped semiconductor layer, 25 is an interface passivation layer, 26 is a surface passivation layer, 27 is an anti-reflection layer, and 28 is a transparent conductive layer. DETAILED DESCRIPTION

[0046] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present invention. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concept of the present invention.

[0047] Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for a clearer expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0048] In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. In addition, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "under" the other layer / element. In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0049] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. The meaning of "several" is one or more, unless otherwise clearly and specifically defined.

[0050] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0051] As a green energy source, solar cells play a positive role in energy conservation and emission reduction. With the development of the photovoltaic industry, solar cell technology has become increasingly mature. Among them, photovoltaic solar cells are devices that convert sunlight into electrical energy. Specifically, solar cells use the photovoltaic principle to generate carriers, and then use electrodes to lead out the carriers, thereby facilitating the effective use of electrical energy. As an environmentally friendly and renewable energy source, solar energy has received more and more attention in recent years. Correspondingly, the application scope of photovoltaic solar cells based on the photoelectric effect is also becoming wider and wider.

[0052] Specifically, an existing solar cell generally includes a semiconductor substrate and a passivation layer formed on the semiconductor substrate. The passivation layer may include a doped semiconductor layer with a field passivation effect, or may include at least one of a surface passivation layer with a chemical passivation effect, an anti-reflection layer, and a transparent conductive layer. Figure 1As shown, the surface of one side of the semiconductor substrate formed with the passivation layer can be a simple polished surface. At this time, the surface has a relatively flat morphology, which is conducive to improving the formation quality of the passivation layer and improving the passivation effect of the passivation layer on the semiconductor substrate. However, the passivation layer formed on the semiconductor substrate with a flat surface also tends to be flat, which makes the electrode material poorly shaped and adhered on the flat surface when forming an electrode for extracting carriers on the passivation layer, thereby reducing the selection and matching of the electrode material; at the same time, it will also cause the contact area between the formed electrode and the doped semiconductor layer formed on the plane surface to become smaller, and the contact loss will increase. Although the pyramid-shaped velvet surface with an undulating morphology has a large surface roughness, which is conducive to improving the electrical contact performance between the electrode and the doped semiconductor layer, as well as the shaping and adhesion of the electrode, the surface morphology of the pyramid-shaped velvet surface is too undulating and the surface is too sharp, resulting in poor formation quality of the doped semiconductor layer on the velvet surface, and its passivation effect is deteriorated. It can be seen that it is difficult for existing solar cells to take into account both good passivation effect and good electrode contact performance and shaping, which is not conducive to improving the conversion efficiency of solar cells.

[0053] In order to solve the above technical problems, in a first aspect, an embodiment of the present invention provides a solar cell. Figures 2 to 6 As shown, the solar cell includes: a semiconductor substrate 11 and a passivation layer 14. The semiconductor substrate 11 includes a first surface 12 and a second surface 13 opposite to each other. At least one of the first surface 12 and the second surface 13 is a target surface. The passivation layer 14 is arranged on the target surface. The passivation layer 14 has a first tower-shaped texture structure 15 and a second tower-shaped texture structure 16 on the side away from the semiconductor substrate 11. Among them, the first tower-shaped texture structure 15 includes a plurality of first substructures, and the bottom surface of the first substructure is recessed into the passivation layer 14. In the first tower-shaped texture structure 15, the first substructure whose bottom surface is a complete pattern is a target substructure 17. The second tower-shaped texture structure 16 includes a plurality of second substructures 18 arranged in the first substructure, and the bottom surface of the second substructure 18 is recessed into the passivation layer 14 relative to the surface of the first substructure. The one-dimensional size of the target substructure 17 is larger than the one-dimensional size of the second substructure 18, and the number of second substructures 18 arranged in at least one target substructure 17 is greater than or equal to 10, or the area of ​​the bottom surface of the second substructure on the side of the passivation layer away from the semiconductor substrate accounts for greater than or equal to 15% and less than or equal to 60%.

[0054] When the above technical solution is adopted, Figures 2 to 6As shown, the passivation layer 14 is arranged on the target surface of the semiconductor substrate 11, and can passivate one side of the target surface of the semiconductor substrate 11 to reduce the carrier recombination rate. In addition, the side of the passivation layer 14 away from the semiconductor substrate 11 has a first tower-shaped texture structure 15 and a second tower-shaped texture structure 16. Under the same conditions, compared with the texture structure with a large degree of undulation such as the pyramid-shaped velvet structure, the first tower-shaped texture structure 15 and the second tower-shaped texture structure 16 without a spire have a relatively small degree of undulation, so that the surface of the side of the passivation layer 14 away from the semiconductor substrate 11 is relatively flat from a macroscopic perspective. In addition, in the actual manufacturing process, the passivation layer 14 is formed on the target surface of the semiconductor substrate 11 by deposition and other processes, and the surface undulation morphology of the passivation layer 14 away from the semiconductor substrate 11 will also be affected by the surface undulation morphology of the target surface, and the corresponding surface undulation morphology of the passivation layer 14 away from the semiconductor substrate 11 can also reflect the surface undulation morphology of the target surface of the semiconductor substrate 11 to a certain extent. Based on this, when the surface of the side of the passivation layer 14 facing away from the semiconductor substrate 11 is relatively flat on a macroscopic scale, the target surface of the semiconductor substrate 11 is also roughly a relatively flat surface, which is conducive to improving the formation quality and film thickness of the passivation layer 14 on the target surface, and then it is conducive to improving the passivation effect of the passivation layer 14 on the semiconductor substrate 11, and improving the conversion efficiency of the solar cell. In addition, the second tower base-shaped texture structure 16 includes a plurality of second substructures 18 arranged in the first substructure, and the bottom surface of the second substructure 18 is concave into the passivation layer 14 relative to the surface of the first substructure. At this time, the surface of the first tower base-shaped texture structure 15, which originally has an undulating morphology, is superimposed with the undulation degree of the second tower base-shaped texture structure 16, which is conducive to increasing the specific surface area of ​​the side of the passivation layer 14 facing away from the semiconductor substrate 11. Furthermore, in the first tower-shaped texture structure 15, the number of second substructures 18 arranged in at least one target substructure 17 whose bottom surface is a complete pattern is greater than or equal to 10, and the area of ​​the bottom surface of the second substructure 18 on the side of the passivation layer 14 away from the semiconductor substrate 11 accounts for greater than or equal to 15% and less than or equal to 60%. At this time, the distribution density of the second substructure 18 in the target substructure 17 is relatively large. The frequency of the high and low changes of the undulating morphology caused by the arrangement of the second substructure 18 increases, so that the side of the passivation layer 14 away from the semiconductor substrate 11 has a relatively large surface roughness at the microscopic level, so that the doped semiconductor layer included in the passivation layer 14, or the doped semiconductor layer formed between the passivation layer 14 and the semiconductor substrate 11 has a larger specific surface area, thereby increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, which is beneficial to improving the conversion efficiency of the solar cell.

[0055] In actual application, the solar cell provided by the embodiment of the present invention can be a double-sided contact cell, that is, one of the positive electrode and the negative electrode of the solar cell is arranged on the front side of the cell, and the other is arranged on the back side of the cell. Alternatively, the solar cell provided by the embodiment of the present invention can also be a back contact cell, that is, the positive electrode and the negative electrode of the solar cell are both arranged on the back side of the cell.

[0056] Secondly, the solar cell provided in the embodiment of the present invention may be a cell having a tunneling passivation contact structure or a heterogeneous contact structure; or, it may be a conventional solar cell without the interface passivation layer included in the above structure.

[0057] Specifically, the embodiment of the present invention does not specifically limit the material of the semiconductor substrate. For example, the semiconductor substrate can be a substrate made of any semiconductor material such as a silicon substrate, a silicon germanium substrate, a germanium substrate or a gallium arsenide substrate.

[0058] As for the first surface and the second surface of the semiconductor substrate, the first surface of the semiconductor substrate may correspond to the front surface of the solar cell, and the second surface of the semiconductor substrate may correspond to the back surface of the solar cell; or, the first surface of the semiconductor substrate may correspond to the back surface of the solar cell, and the second surface of the semiconductor substrate may correspond to the front surface of the solar cell. Secondly, whether the first surface and the second surface are target surfaces can be determined according to the type of solar cell and the corresponding relationship between the first surface and the second surface and the front surface and the back surface of the cell, respectively, and no specific limitation is made here.

[0059] For example, in the case where the solar cell is a double-sided contact cell, of the first and second surfaces of the semiconductor substrate, only the first surface may be the target surface, only the second surface may be the target surface, or both the first and second surfaces may be the target surface.

[0060] Exemplarily, in the case where the solar cell is a back-contact cell, one of the first surface and the second surface of the semiconductor substrate corresponding to the back side of the cell is the target surface.

[0061] As for the surface morphology of the target surface of the semiconductor substrate, as mentioned above, the surface undulation morphology of the side of the passivation layer away from the semiconductor substrate can reflect the surface undulation morphology of the target surface of the semiconductor substrate to a certain extent, so the surface morphology of the target surface can refer to the surface morphology of the side of the passivation layer away from the semiconductor substrate. Specifically, because the surface morphology of the side of the passivation layer away from the semiconductor substrate is a macroscopically flat surface with multiple first tower-shaped texture structures and second tower-shaped texture structures, the surface morphology of the target surface is also relatively flat in the macroscopic sense.

[0062] For example, Figure 5 and Figure 6As shown, the target surface may have a first tower-shaped texture structure 15 and a second tower-shaped texture structure 16. The first tower-shaped texture structure 15 on the target surface includes a plurality of first substructures, and the bottom surface of the first substructure is concave toward the semiconductor substrate 11 relative to the target surface. In the first tower-shaped texture structure 15 on the target surface, the first substructure with a complete bottom surface is the target substructure 17. Secondly, the second tower-shaped texture structure 16 on the target surface includes a plurality of second substructures 18 arranged in the first substructure, and the bottom surface of the second substructure 18 is concave toward the semiconductor substrate 11 relative to the surface of the first substructure. The one-dimensional size of the target substructure 17 is larger than the one-dimensional size of the second substructure 18, and the number of the second substructures 18 arranged in at least one target substructure 17 is greater than or equal to 10. In this case, compared with a texture structure with a large undulating morphology such as a pyramid-shaped velvet structure, when the target surface has a plurality of first tower-shaped texture structures 15 recessed into the semiconductor substrate 11, the target surface of the semiconductor substrate 11 is relatively flat, which is conducive to improving the formation quality and film thickness of the passivation layer 14 formed on the target surface, and improving the passivation effect of the passivation layer 14. Secondly, when a second substructure 18 recessed into the semiconductor substrate 11 is provided in the first substructure on the target surface, the surface roughness of the target surface can be increased, which is conducive to making the doped semiconductor layer formed on the target surface by deposition and other processes also have a relatively large specific surface area, thereby facilitating increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer. As for the specific morphology of the first tower-like texture structure 15 and the second tower-like texture structure 16 on the target surface, the number and distribution of the second substructures 18 arranged in the first substructure, and the one-dimensional size of the second substructure 18, etc., you can refer to the specific morphology of the first tower-like texture structure 15 and the second tower-like texture structure 16 on the side of the passivation layer 14 away from the semiconductor substrate 11, the number and distribution of the second substructures 18 arranged in the first substructure, and the one-dimensional size of the second substructure 18 and other information described below, which will not be repeated here.

[0063] For the passivation layer, the passivation layer is arranged on the target surface, and the surface of the passivation layer facing away from the semiconductor substrate is the front and / or back of the solar cell. In terms of structure and material, the specific structure of the passivation layer can be determined according to the type of solar cell and the actual application scenario, and is not specifically limited here. Exemplarily, the passivation layer may include at least one of a doped semiconductor layer, a surface passivation layer, an anti-reflection layer, and a transparent conductive layer.

[0064] Among them, Figures 2 to 6As shown, in the case where the passivation layer 14 is only a doped semiconductor layer, the first tower base-shaped texture structure 15 and the second tower base-shaped texture structure 16 are both formed on the side of the doped semiconductor layer away from the semiconductor substrate 11. The material of the passivation layer 14 may include any semiconductor material such as silicon, silicon germanium or germanium. The crystal phase of the passivation layer 14 may be single crystal, polycrystalline, microcrystalline, nanocrystalline or amorphous.

[0065] like Figures 5 to 7 As shown, when the passivation layer 14 only includes at least one of the surface passivation layer 26, the anti-reflection layer 27 and the transparent conductive layer, the first tower base-shaped texture structure 15 and the second tower base-shaped texture structure 16 are both formed on the outermost one of the film layers included in the passivation layer 14 (i.e., the one with the largest distance from the semiconductor substrate 11 along the battery thickness direction), and the surface of one side away from the semiconductor substrate 11. For example: when the passivation layer 14 only includes the surface passivation layer 26 and the anti-reflection layer 27, and the anti-reflection layer 27 is arranged on the side of the surface passivation layer 26 away from the semiconductor substrate 11, the first tower base-shaped texture structure 15 and the second tower base-shaped texture structure 16 are both formed on the side of the anti-reflection layer 27 away from the semiconductor substrate 11. In addition, the materials of the surface passivation layer 26, the anti-reflection layer 27 and the transparent conductive layer can be set according to actual needs. Exemplarily, the material of the surface passivation layer 26 can include any material with a passivation effect such as silicon oxide, aluminum oxide, silicon nitride or silicon oxynitride. The material of the anti-reflection layer 27 may include silicon nitride or silicon oxynitride, etc. The material of the above-mentioned transparent conductive layer may include at least one of fluorine-doped tin oxide, aluminum-doped zinc oxide, tin-doped indium oxide, tungsten-doped indium oxide, molybdenum-doped indium oxide, cerium-doped indium oxide and indium hydroxide. In the above case, the solar cell provided by the embodiment of the present invention also includes a doped semiconductor layer 24 arranged in or on the target surface (when the doped semiconductor layer 24 is arranged on the target surface, the material of the doped semiconductor layer 24 can refer to the above text and will not be repeated here), and the passivation layer 14 is located on the side of the doped semiconductor layer 24 away from the semiconductor substrate 11.

[0066] like Figure 5 , Figure 6 and Figure 8As shown, in the case where the passivation layer 14 includes at least one of a surface passivation layer, an anti-reflection layer and a transparent conductive layer 28 in addition to the doped semiconductor layer 24, the first tower-shaped texture structure 15 and the second tower-shaped texture structure 16 are both formed on the outermost one of the film layers included in the passivation layer 14 (i.e., the one with the largest distance from the semiconductor substrate 11 along the thickness direction of the battery), and the surface of the side away from the semiconductor substrate 11. For example: when the passivation layer 14 only includes the doped semiconductor layer 24 and the transparent conductive layer 28, and the transparent conductive layer 28 is arranged on the side of the doped semiconductor layer 24 away from the semiconductor substrate 11, the first tower-shaped texture structure 15 and the second tower-shaped texture structure 16 are both formed on the side of the transparent conductive layer 28 away from the semiconductor substrate 11. In addition, the formation position of the doped semiconductor layer 24 in the above-mentioned solar cell, as well as the materials of the surface passivation layer, the anti-reflection layer, the transparent conductive layer 28 and the doped semiconductor layer 24 can be referred to the above text, and will not be repeated here.

[0067] It should be noted that, when the solar cell provided in the embodiment of the present invention is a double-sided contact cell and the passivation layer includes a doped semiconductor layer, the doped semiconductor layer in the same passivation layer is an N-type doped semiconductor layer or a P-type doped semiconductor layer. When the solar cell is a back contact cell and the passivation layer includes a doped semiconductor layer, Fig. 9 As shown, along the direction parallel to the target surface, the doped semiconductor layer in the passivation layer includes an N-type doped semiconductor layer 21 and a P-type doped semiconductor layer 22 that are alternately distributed, and at least a portion of the N-type doped semiconductor layer 21 is spaced apart from at least a portion of the P-type doped semiconductor layer 22. Specifically, at least a portion of the N-type doped semiconductor layer 21 and at least a portion of the P-type doped semiconductor layer 22 may be spaced apart along the direction parallel to the target surface, or may be spaced apart along the thickness direction of the semiconductor substrate 11 by a dielectric layer of an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0068] In addition, when the doped semiconductor layer is disposed on the target surface, such as Figure 8 As shown, the doped semiconductor layer 24 may be in direct contact with the semiconductor substrate 11; or Fig. 9 As shown, the solar cell may further include an interface passivation layer 25 located between the semiconductor substrate 11 and the doped semiconductor layer. The material and thickness of the interface passivation layer 25 may be determined according to the material of the doped semiconductor layer, and are not specifically limited here. For example, when the doped semiconductor layer includes a doped polysilicon layer, the interface passivation layer is a tunneling oxide layer. For another example, when the doped semiconductor layer includes a doped amorphous silicon layer, the interface passivation layer is an intrinsic amorphous silicon layer.

[0069] In terms of surface morphology, the surface of the passivation layer facing away from the semiconductor substrate has a first tower-like texture structure and a second tower-like texture structure. Among them, the bottom surface of the first substructure included in the first tower-like texture structure and the second substructure included in the second tower-like texture structure can be a regular or irregular polygonal bottom surface (such as a quadrilateral bottom surface, a pentagonal bottom surface, a hexagonal bottom surface or an octagonal bottom surface, etc.; the polygon can be a regular polygon with the same side length, or a polygon with different side lengths), and the corners of the polygonal bottom surface can be sharp corners, or can be chamfers with smooth transitions; or, the bottom surfaces of the first substructure and the second substructure can also be irregular bottom surfaces with arc-shaped contours. In the above case, in the actual manufacturing process, the different first substructures in the first tower-like texture structure on the side of the passivation layer facing away from the semiconductor substrate are manufactured and formed simultaneously using the same process, so the morphology and one-dimensional size of the different first substructures on the same passivation layer facing away from the semiconductor substrate are roughly the same (although they may be slightly different, the degree of difference is small), and as Figure 5 and Figure 6 As shown, different first substructures on the same passivation layer facing away from the semiconductor substrate may overlap, resulting in different morphologies of the area exposed on the bottom surface of each first substructure. Similarly, different second substructures 18 in the second tower-shaped texture structure 16 on the side of the passivation layer facing away from the semiconductor substrate are manufactured and formed at the same time using the same process, so the morphologies and one-dimensional sizes of different second substructures 18 on the same passivation layer facing away from the semiconductor substrate are roughly the same (although they may be slightly different, the difference is small), and as shown Figure 5 and Figure 6 As shown, in the same passivation layer on the side away from the semiconductor substrate, different second substructures 18 arranged in the same first substructure may overlap, resulting in different regional morphologies of the bottom surface of each second substructure 18. Based on this, because the overlap ratios between different first substructures may be different, the surface of the area exposed on the bottom surface of the corresponding first substructure is also different; and the bottom surface of the target substructure 17 in the first tower base texture structure 15 is a complete figure, which does not overlap with other first substructures, or although there is overlap, it can show a complete bottom surface contour. By limiting the number of second substructures 18 arranged in the target substructure 17, the surface roughness of the side of the passivation layer away from the semiconductor substrate can be accurately regulated to improve the conversion efficiency of the solar cell. As for whether the bottom surface of a single first substructure in the first tower base texture structure 15 is a complete figure, and the formation range of a single second substructure 18 in the second tower base texture structure 16, it can be determined according to the bottom surface morphology and one-dimensional size of all first substructures and all second substructures 18 on the side of the passivation layer away from the semiconductor substrate.

[0070] For example: Figure 5 and Figure 6As shown, when the bottom surface shape of most of the first substructures in all the first substructures on the side of the passivation layer 14 facing away from the semiconductor substrate is a quadrilateral, if the bottom surface of a first substructure on the side of the passivation layer 14 facing away from the semiconductor substrate is a complete quadrilateral and the bottom surface is concave into the passivation layer 14, then the first substructure is the target substructure 17.

[0071] Specifically, the one-dimensional size of the first tower base-shaped texture structure and the second tower base-shaped texture structure, as well as the number and distribution of the second substructure included in the second tower base-shaped texture structure within the first substructure included in the first tower base-shaped texture structure, can be determined according to the requirements for the surface roughness of the passivation layer on the side away from the semiconductor substrate in the actual application scenario, as long as it can be applied to the solar cell provided in the embodiment of the present invention. Among them, the one-dimensional size of the first tower base-shaped texture structure and the second tower base-shaped texture structure can be the bottom side length (bottom arc segment length), bottom diagonal length or recessed depth of the two (it should be noted that the recessed depth of the first substructure is the recessed depth relative to the main surface of the passivation layer on the side away from the semiconductor substrate).

[0072] Exemplarily, the one-dimensional size of the second substructure may be greater than or equal to 0.03 times the one-dimensional size of the target substructure, and less than or equal to 0.1 times the one-dimensional size of the target substructure. For example, the one-dimensional size of the second substructure may be 0.03 times, 0.04 times, 0.05 times, 0.06 times, 0.07 times, 0.08 times, 0.09 times or 0.1 times the one-dimensional size of the target substructure. Specifically, when the bottom surfaces of the first substructure and the second substructure are polygonal bottom surfaces, the side length of the bottom surface of the second substructure may be greater than or equal to 0.03 times the side length of the bottom surface of the target substructure, and less than or equal to 0.1 times the side length of the bottom surface of the target substructure; or the bottom surface diagonal length of the second substructure may be greater than or equal to 0.03 times the bottom surface diagonal length of the target substructure, and less than or equal to 0.1 times the bottom surface diagonal length of the target substructure; or the concave depth of the second substructure relative to the surface of the first substructure may be greater than or equal to 0.03 times the concave depth of the target substructure, and less than or equal to 0.1 times the concave depth of the target substructure.

[0073] In the case of adopting the above technical solution, it can be understood that when the one-dimensional size of the target substructure is constant, when the one-dimensional size of the second substructure increases, the formation range of a single second substructure in the first substructure is larger, and the number of second substructures that can be accommodated in the same first substructure is reduced. Based on this, when the one-dimensional size of the second substructure is within the above range, it is helpful to prevent the surface roughness of the passivation layer away from the semiconductor substrate from being too large due to the one-dimensional size of the second substructure being too small, thereby ensuring that the passivation layer has a high formation quality, and is conducive to further increasing the film thickness of the passivation layer, thereby improving the conversion efficiency of the solar cell. At the same time, it is also conducive to reducing the process difficulty of manufacturing solar cells and improving the yield of solar cells. In addition, it can also prevent the surface roughness of the passivation layer on the side away from the semiconductor substrate from being too small due to the one-dimensional size of the second substructure being too large, thereby ensuring that the above-mentioned doped semiconductor layer has a larger specific surface area, further increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, which is beneficial to improving the conversion efficiency of the solar cell.

[0074] In addition, in the actual application process, in the same target substructure, the one-dimensional dimensions of different second substructures can be roughly the same. Exemplarily, in the same target substructure, the ratio between the one-dimensional dimensions of different second substructures can be greater than or equal to 0.95 and less than or equal to 1.05. In this case, it is beneficial to make the surface roughness of different regions of the same target substructure where the second substructure is provided roughly the same, so that the passivation layer has a higher passivation effect and formation quality along the parts parallel to the different regions of the target surface. At the same time, it is beneficial to make the above-mentioned doped semiconductor layer along the parts parallel to the different regions of the target surface have a higher contact performance with the electrode, and the electrode has a strong adhesion and good shaping on the different regions of the doped semiconductor layer, which is beneficial to improve the conversion efficiency of the solar cell. Alternatively, in the same target substructure, the one-dimensional dimensions of different second substructures can also be different to reduce the difficulty of the manufacturing process.

[0075] Secondly, the one-dimensional dimensions of different second substructures in different target substructures can be roughly the same. Exemplarily, the ratio between the one-dimensional dimensions of different second substructures in different target substructures is greater than or equal to 0.95 and less than or equal to 1.05. In this case, the one-dimensional dimensions of different second substructures are roughly the same, which is conducive to making the different areas of the passivation layer away from the side of the semiconductor substrate have roughly the same surface roughness, and the target surface on which the passivation layer is formed has roughly the same surface roughness in different areas, so that the passivation layer has a higher passivation effect and formation quality along the parts parallel to the different areas of the target surface. At the same time, it is conducive to making the above-mentioned doped semiconductor layer along the parts parallel to the different areas of the target surface have higher contact performance with the electrode, and the electrode has strong adhesion and good shaping on different areas of the doped semiconductor layer, which is conducive to improving the conversion efficiency of the solar cell. Alternatively, the one-dimensional dimensions of different second substructures in different target substructures can also be different to reduce the difficulty of the manufacturing process.

[0076] Exemplarily, the depth of the bottom surface of the target substructure recessed into the passivation layer may be greater than the depth of the bottom surface of the second substructure recessed into the passivation layer relative to the bottom surface of the target substructure. In this case, the depth of the bottom surface of the second substructure recessed into the passivation layer relative to the bottom surface of the target substructure is smaller, so that after the second substructure is superimposed on the target substructure and the remaining first substructures, the additional degree of undulation added to the undulating morphology originally provided with the target substructure and the remaining first substructures is smaller, which is conducive to controlling the surface roughness of the side of the passivation layer away from the semiconductor substrate to be not too large, and correspondingly the surface roughness of the target surface on which the passivation layer is formed is not too large, thereby ensuring that the passivation layer has a high formation quality and passivation effect.

[0077] As for the difference between the recess depth corresponding to the target substructure and the recess depth corresponding to the second substructure, and the specific recess depth corresponding to the second substructure, it can be determined according to the roughness requirements for the side of the passivation layer facing away from the semiconductor substrate in the actual application scenario, and no specific limitation is made here.

[0078] Exemplarily, the depth of the bottom surface of the second substructure relative to the bottom surface of the target substructure in the passivation layer may be less than 0.2 μm. For example, the depth of the bottom surface of the second substructure relative to the bottom surface of the target substructure in the passivation layer may be 10 nm, 50 nm, 80 nm, 100 nm, 120 nm, 150 nm, 180 nm or 0.2 μm, etc. The application principle of the beneficial effect in this case can refer to the aforementioned depth of the bottom surface of the target substructure in the passivation layer, and the application principle of the beneficial effect of the bottom surface of the second substructure being greater than the depth of the bottom surface of the second substructure relative to the bottom surface of the target substructure in the passivation layer will not be repeated here.

[0079] In terms of quantity, the number of second substructures provided in the target substructure can be determined based on the size relationship between the one-dimensional dimensions of the target substructure and the second target substructure, and the surface roughness requirements of the passivation layer on the side away from the semiconductor substrate in the actual application scenario. As long as the number of second substructures provided in at least one target substructure is greater than or equal to 10, or the area of ​​the bottom surface of the second substructure on the side of the passivation layer away from the semiconductor substrate accounts for greater than or equal to 15% and less than or equal to 60%, it will be acceptable.

[0080] Exemplarily, the number of the second substructures provided in at least one target substructure may be less than or equal to 30. For example, the number of the second substructures provided in at least one target substructure may be 10, 11, 12, 14, 16, 18, 20, 22, 25, 28 or 30. In this case, it is possible to prevent the surface roughness of the passivation layer on the side away from the semiconductor substrate from being too large due to the number of the second substructures provided in the target substructure being too large, thereby ensuring that the passivation layer has a high formation quality, which is conducive to further increasing the film thickness of the passivation layer, thereby improving the conversion efficiency of the solar cell. At the same time, it is also conducive to reducing the process difficulty of manufacturing solar cells and improving the yield of solar cells.

[0081] Secondly, the area ratio of the bottom surface of the second substructure on the side of the passivation layer away from the semiconductor substrate can be any value greater than or equal to 15% and less than or equal to 60%. For example, the area ratio of the bottom surface of the second substructure on the side of the passivation layer away from the semiconductor substrate can be 15%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55% or 60%, etc.

[0082] In terms of distribution, the second substructure can be distributed on the surface of each region within the first substructure. Take the target substructure whose bottom surface is a complete figure as an example: within the target substructure, the second substructure can be distributed on the bottom surface and at least part of the side surface of the target substructure (the second substructure on the side surface can be a complete second substructure or only a part of the second substructure); or Figure 5 and Figure 6 As shown, in the target substructure 17, the second substructure 18 can be distributed only on the bottom surface of the target substructure 17. In this case, the side surface of the target substructure 17 is not provided with the second substructure 18. At this time, compared with the bottom surface superimposed with the second substructure 18, the side surface of the target substructure 17 is relatively flat, which is conducive to preventing the microscopic surface roughness of the side of the passivation layer away from the semiconductor substrate from being too large, and accordingly, the surface roughness of the target surface on which the passivation layer is formed can be further reduced, and the formation quality and passivation effect of the passivation layer can be further improved. At the same time, it is also conducive to reducing the process difficulty of manufacturing solar cells and improving the yield of solar cells.

[0083] Specifically, in at least one identical target substructure, different second substructures may be distributed in various areas of the bottom surface of the target substructure. In this case, the surface of the target substructure is recessed into the passivation layer, and at this time, there is a certain height difference between the bottom and the top of the side surface of the target substructure. Therefore, compared with the bottom surface of the target substructure, the side surface has certain ups and downs, and the bottom surface is relatively flat. Based on this, when the second substructure is distributed in various areas of the bottom of the target substructure, the originally flat bottom surface can be superimposed with the ups and downs of the second substructure, increasing the roughness of the bottom surface, further increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, which is beneficial to improving the conversion efficiency of solar cells.

[0084] Alternatively, it may be that: in at least one same target substructure, different second substructures are distributed in local areas of the bottom surface of the target substructure. In this case, another possible example is provided for the distribution of the second substructure in the target substructure, which is beneficial to improving the applicability of the solar cell provided by the embodiment of the present invention in different application scenarios, and at the same time, it is beneficial to reduce the difficulty of the manufacturing process.

[0085] It should be noted that, because the bottom surface of the target substructure is a complete figure, compared with the overlapping first substructure, the surface of the target substructure is exposed to a larger proportion, and can more accurately display the distribution of the second substructure in the first substructure. Therefore, the distribution of the second substructure in the first substructure is characterized by the distribution of the second substructure in the target substructure, which does not mean that the second substructure is distributed in the above manner only in the target substructure.

[0086] In addition, when the second substructure is only distributed on the bottom surface of the first substructure, the side surface of the first substructure can be a relatively flat surface. Figure 5 ,as well as Figures 10 to 12 As shown, the passivation layer may also have a raised structure 19 on the side facing away from the semiconductor substrate. Each raised structure 19 includes a plurality of raised portions 20 extending along the length direction of the side ridgeline of the first substructure and distributed in a direction parallel to the bottom surface of the first substructure. In this case, the surface undulation degree of the side surface of the first substructure can be increased, and the surface roughness of the side surface of the passivation layer facing away from the semiconductor substrate can be further increased, thereby further increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, which is beneficial to improving the conversion efficiency of the solar cell. In addition, the raised portion 20 rises on the side surface of the first substructure, and the direction of its climbing is roughly parallel to the extension direction of the side ridgeline. At this time, the inclination angle of the raised portion 20 relative to the bottom surface of the first substructure can range from 30° to 60°.

[0087] Specifically, the protruding structure may be formed on the side surface corresponding to only one corner of the bottom surface of the first substructure. Figure 5 As shown, at least two side surfaces corresponding to the corners of the bottom surface of the first substructure may have protruding structures 19; in this case, the distribution relationship between different corners of the bottom surface of the same first substructure having protruding structures 19 thereon may be determined according to the actual manufacturing process.

[0088] For example, Figure 5 As shown, in at least one first substructure, at least one pair of corners of the bottom surface have a convex structure 19. At least one pair of corners can be two corners diagonally distributed in the bottom surface of the first substructure. In this case, in at least one first substructure, compared with having a convex structure 19 only on one corner of the bottom surface, when at least one pair of corners of the bottom surface of the first substructure have a convex structure 19, more convex parts are provided in at least one same first substructure, which is conducive to further increasing the degree of undulation of the passivation layer away from the semiconductor substrate. At the same time, it is conducive to making different convex parts distributed on different corners of the bottom surface of the first substructure along the diagonal direction, rather than concentrated on a single corner, and thus it is conducive to making different regions along the diagonal direction in the same first substructure have a higher surface roughness, and it is conducive to making the above-mentioned different regions of the doped semiconductor layer have good contact performance with the electrode, and the electrode has strong adhesion and good shaping on different regions of the doped semiconductor layer.

[0089] In addition, as mentioned above, the presence of the protrusion is beneficial to increasing the surface roughness of the side of the passivation layer facing away from the semiconductor substrate at the microscopic level, and then helps to increase the contact area between the doped semiconductor layer and the electrode, improve the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer. However, if the size of the protrusion is too large, it will affect the formation quality of the passivation layer on the target surface. Therefore, the size of the protrusion can be determined based on the requirements for the passivation effect of the passivation layer, the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer in the actual application scenario, and no specific limitation is made here.

[0090] like Fig.10 and Fig.11 As shown, when a single protrusion 20 only rises from a corner of the bottom surface of the first substructure to the height of the side surface, there may be only one set of protrusion structures 19 on the corner along the extension direction of the side edge line, and at this time, a part of the side surface of the first substructure is exposed. Fig.12As shown, in at least one first substructure, at least one corner of the bottom surface may also have at least two groups of protruding structures 19 distributed in a stepped manner along the extending direction of the side edge line, and each group of protruding structures 19 includes a plurality of protruding portions 20 extending and distributed along the bottom surface direction. In this case, the at least two groups of protruding structures 19 distributed in a stepped manner can further increase the undulation degree of the side surface of the first substructure along the extending direction of the edge line, further increase the surface roughness of the side of the passivation layer away from the semiconductor substrate 11, and help increase the contact area between the above-mentioned doped semiconductor layer and the electrode, further improve the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, thereby improving the conversion efficiency of the solar cell.

[0091] As for the morphology of the raised portion and the undulating morphology of the multiple raised portions included in the same raised structure extending along the bottom surface of the first substructure, they can be determined according to the recessed depth of the first substructure and the actual application scenario, and are not specifically limited here.

[0092] For example, Figures 10 to 12 As shown, the multiple protrusions 20 included in the same protrusion structure 19 may have a zigzag undulating morphology or a wavy undulating morphology extending along the bottom surface direction of the first substructure. In this case, compared with a single convex or concave undulating morphology such as an arc, the zigzag undulating morphology and the wavy undulating morphology both have a continuous undulating morphology of convex, concave, convex, concave, etc., which can further increase the surface roughness of the first substructure, which is beneficial to increase the contact area between the above-mentioned doped semiconductor layer and the electrode, improve the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer.

[0093] For example, Figures 10 to 12 As shown, at least one protrusion 20 may be in a triangular prism-like, conical-like or cylindrical-like shape. In this case, the morphology of the protrusion 20 has a variety of examples, which is conducive to improving the applicability of the solar cell provided by the embodiment of the present invention in different application scenarios. In addition, the process difficulty of manufacturing the first substructure can also be reduced.

[0094] It should be noted that the above-mentioned quasi-triangular prism shape may be a regular triangular prism shape, the ridgeline of the regular triangular prism shape structure is substantially parallel to the lateral ridgeline of the first substructure; or the quasi-triangular prism shape may be a quasi-triangular prism shape with irregular morphology such as ridgeline or lateral surface having arc shape. Fig.11 and Fig.12As shown, at least one protrusion structure 19 includes a protrusion 20 in a triangular prism-like shape, and the ridgeline of the protrusion 20 can be in an arc shape that is concave toward the direction close to the semiconductor substrate 11. In this case, when the protrusion 20 on at least one corner is in a triangular prism-like shape, compared with the ridgeline of the protrusion 20 being a straight line, when the ridgeline of the protrusion 20 is in an arc shape that is concave toward the direction close to the semiconductor substrate 11, the part of the protrusion 20 corresponding to the concave arc-shaped ridgeline also has a concave undulating morphology, which can further increase the surface roughness of the first substructure in the area where the protrusion 20 is provided, which is conducive to further increasing the specific surface area of ​​the above-mentioned doped semiconductor layer, thereby increasing the contact area between the doped semiconductor layer and the electrode, improving the contact performance between the doped semiconductor layer and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor layer, and improving the conversion efficiency of the solar cell. It should be noted that the arc-shaped ridgeline in the protrusion 20 that is concave toward the direction close to the semiconductor substrate 11 refers to the top ridgeline of the triangular prism-like structure.

[0095] The above-mentioned quasi-cone shape and quasi-cylindrical shape can be respectively a regular cone shape or a regular cylinder shape (a portion of the side surface of the regular cone shape or the regular cylinder shape can be integrated with the side surface of the first substructure); or the quasi-cone shape and the quasi-cylindrical shape can also be respectively a quasi-cone shape or a quasi-cylindrical shape with an irregular morphology having a concave or convex microstructure on the side surface.

[0096] In terms of distribution, in actual application, the first tower-shaped texture structure and the second tower-shaped texture structure may be evenly distributed on different regions of the passivation layer on the side away from the semiconductor substrate. Alternatively, the first tower-shaped texture structure and the second tower-shaped texture structure are simultaneously distributed on only a portion of the regions on the side away from the semiconductor substrate, while the first tower-shaped texture structure is only distributed on the remaining regions. Alternatively, the first tower-shaped texture structure and the second tower-shaped texture structure are simultaneously distributed on only a portion of the regions on the side away from the semiconductor substrate, while the remaining regions are neither provided with the second tower-shaped texture structure nor with the first tower-shaped texture structure.

[0097] The distribution of the first tower base-shaped texture structure and the second tower base-shaped texture structure in different areas of the passivation layer on the side away from the semiconductor substrate can be determined according to the type of solar cell and actual needs, and is not specifically limited here.

[0098] Exemplarily, in the case where the solar cell is a double-sided contact cell, the first tower-like texture structure and the second tower-like texture structure can be simultaneously distributed on different regions of the same passivation layer on the side facing away from the semiconductor substrate, and the distribution density of the first tower-like texture structure and the second tower-like texture structure in different regions can be roughly the same.

[0099] For example, Fig. 9 As shown, in the case where only one of the first surface and the second surface is the target surface, along the direction parallel to the target surface, the passivation layer includes an N-type doped semiconductor layer 21 and a P-type doped semiconductor layer 22 of opposite conductivity types, and at least a portion of the N-type doped semiconductor layer 21 and at least a portion of the P-type doped semiconductor layer 22 are spaced apart. Wherein, the side surface of the passivation layer corresponding to the N-type doped semiconductor layer 21 that is away from the semiconductor substrate 11 is defined as the first sub-surface, and the side surface of the passivation layer corresponding to the P-type doped semiconductor layer 22 that is away from the semiconductor substrate 11 is defined as the second sub-surface. In the above case, the first tower base-shaped texture structure 15 is distributed on the first sub-surface and the second tower base-shaped texture structure 16 is only distributed on the first sub-surface. In this case, due to the limitations of doping solid concentration and doping difficulty, the dopant concentration of the dopant in the N-type doped semiconductor layer 21 is greater than the doping concentration of the dopant in the P-type doped semiconductor layer 22, and the passivation characteristics of the P-type doped semiconductor layer 22 are relatively poor. Secondly, it can be understood that the surface roughness of the first sub-surface provided with both the first tower base-shaped texture structure 15 and the second tower base-shaped texture structure 16 is greater than that of the second sub-surface provided with only the first tower base-shaped texture structure 15. Based on this, when the second sub-surface with a smaller surface roughness is the surface of the side of the passivation layer corresponding to the P-type doped semiconductor layer 22 that is away from the semiconductor substrate 11, the surface of the region of the target surface corresponding to the P-type doped semiconductor layer 22 also has a relatively small surface roughness, which is conducive to improving the formation quality and passivation effect of the P-type doped semiconductor layer 22. At the same time, when the first sub-surface with a larger surface roughness is the surface of the side of the passivation layer corresponding to the N-type doped semiconductor layer 21 that is away from the semiconductor substrate 11, the contact area between the N-type doped semiconductor layer 21 and the negative electrode can also be increased, the contact performance between the N-type doped semiconductor layer 21 and the negative electrode, and the attachment and shaping of the negative electrode on the N-type doped semiconductor layer 21 are improved, which is conducive to improving the conversion efficiency of the solar cell. The difference in doping concentration between the N-type doped semiconductor layer 21 and the P-type doped semiconductor layer 22 may be determined according to the actual manufacturing process and actual application scenario, and is not specifically limited here.

[0100] For example, Fig.13As shown, in the case where only one of the first surface and the second surface is the target surface, the above-mentioned back contact battery can also include a doped semiconductor region 23 arranged in the target surface, and a doped semiconductor layer 24 arranged on the target surface. In addition, the conductivity types of the doped semiconductor layer 24 and the doped semiconductor region 23 are opposite, and at least a portion of the doped semiconductor layer 24 and at least a portion of the doped semiconductor region 23 are spaced apart in a direction parallel to the target surface. Among them, the side surface of the passivation layer corresponding to the doped semiconductor region 23 that is away from the semiconductor substrate 11 is defined as the first sub-surface, and the side surface of the passivation layer corresponding to the doped semiconductor layer 24 that is away from the semiconductor substrate 11 is defined as the second sub-surface. Based on this, the first tower base-shaped texture structure 15 is distributed on the first sub-surface and the second sub-surface, and the second tower base-shaped texture structure 16 is only distributed on the first sub-surface. In this case, when the second sub-surface with a smaller surface roughness is the surface of the side of the passivation layer corresponding to the doped semiconductor layer 24 away from the semiconductor substrate 11, the surface of the area of ​​the target surface corresponding to the doped semiconductor layer 24 also has a relatively small surface roughness, which is conducive to improving the formation quality and passivation effect of the doped semiconductor layer 24 on the corresponding area of ​​the target surface. At the same time, when the first sub-surface with a larger surface roughness is the surface of the side of the passivation layer corresponding to the doped semiconductor region 23 away from the semiconductor substrate 11, the contact area between the doped semiconductor region 23 and the electrode can be increased, the contact performance between the doped semiconductor region 23 and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor region 23 can be improved, which is conducive to improving the conversion efficiency of the solar cell; in addition, when at least part of the dopant in the doped semiconductor region 23 is doped into the doped semiconductor region 23 by sintering the electrode material, the first sub-surface has a larger surface roughness, and increasing the contact area between the doped semiconductor region 23 and the electrode is also conducive to increasing the doping concentration and / or doping range of the doped semiconductor region 23, which is conducive to improving the carrier collection ability of the doped semiconductor region 23.

[0101] Among them, when the solar cell also includes the above-mentioned doped semiconductor region and doped semiconductor layer, the material of the doped semiconductor layer can refer to the above text and will not be repeated here. As for the conductivity type of the doped semiconductor region and the doped semiconductor layer, it can be determined according to the material of the electrode in ohmic contact with the doped semiconductor region and the actual needs, and is not specifically limited here. Specifically, the doped semiconductor region can be a P-type doped semiconductor region, in which case the doped semiconductor layer is an N-type doped semiconductor layer; or, the doped semiconductor region can also be an N-type doped semiconductor region, in which case the doped semiconductor layer is a P-type doped semiconductor layer.

[0102] Optionally, in the case where the back contact cell provided in the embodiment of the present invention is a HPBC (composite passivated back contact) cell, the semiconductor substrate is a P-type semiconductor substrate, the doped semiconductor layer is an N-type doped polysilicon layer, and a tunnel passivation layer is formed between the P-type semiconductor substrate and the N-type doped polysilicon layer, and the doped semiconductor region is a P-type doped semiconductor region. The material of the positive electrode in ohmic contact with the P-type doped semiconductor region includes aluminum. In this case, when the second sub-surface with a smaller surface roughness is the surface of the side of the passivation layer corresponding to the N-type doped polysilicon layer that is away from the semiconductor substrate 11, the surface of the area of ​​the target surface corresponding to the N-type doped polysilicon layer also has a relatively small surface roughness, which is conducive to improving the deposition quality and passivation effect of the N-type doped polysilicon layer on the corresponding area of ​​the target surface. At the same time, when the first sub-surface with a larger surface roughness is the surface of the side of the passivation layer corresponding to the P-type doped semiconductor region that is away from the semiconductor substrate 11, it can also increase the contact area between the P-type doped semiconductor region and the positive electrode, improve the contact performance between the doped semiconductor region 23 and the electrode, and the adhesion and shaping of the electrode on the doped semiconductor region 23, which is beneficial to improving the conversion efficiency of the solar cell; in addition, at least part of the dopant in the P-type doped semiconductor region is doped into the P-type doped semiconductor region by sintering the positive electrode material, so the first sub-surface has a larger surface roughness, which can increase the contact area between the P-type doped semiconductor region and the positive electrode, and is also beneficial to increase the doping concentration and / or doping range of the P-type doped semiconductor region, which is beneficial to improving the carrier collection capacity of the P-type doped semiconductor region.

[0103] In a second aspect, an embodiment of the present invention provides a photovoltaic module, which includes the solar cell provided by the first aspect and various implementations thereof.

[0104] The beneficial effects of the second aspect and its various implementations in the embodiments of the present invention can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0105] In a third aspect, an embodiment of the present invention provides a semiconductor substrate. The semiconductor substrate includes a first surface and a second surface opposite to each other. At least one of the first surface and the second surface is a target surface. Figure 5 and Figure 6As shown, there are a first tower base-shaped texture structure 15 and a second tower base-shaped texture structure 16 on the target surface. The first tower base-shaped texture structure 15 includes a plurality of first substructures, and the bottom surface of the first substructure is recessed into the semiconductor substrate relative to the target surface. In the first tower base-shaped texture structure 15, the first substructure whose bottom surface is a complete figure is the target substructure 17. The second tower base-shaped texture structure 16 includes a plurality of second substructures arranged in the first substructure, and the bottom surface of the second substructure is recessed into the semiconductor substrate relative to the surface of the first substructure. The one-dimensional size of the target substructure 17 is larger than the one-dimensional size of the second substructure; the number of second substructures arranged in at least one target substructure 17 is greater than or equal to 10, or the area of ​​the bottom surface of the second substructure in the target surface accounts for greater than or equal to 15% and less than or equal to 60%.

[0106] Exemplarily, in the target surface, the number of second substructures arranged in at least one target substructure is less than or equal to 30.

[0107] Exemplarily, in the target surface, the one-dimensional size of the second substructure is greater than or equal to 0.03 times the one-dimensional size of the target substructure and less than or equal to 0.1 times the one-dimensional size of the target substructure.

[0108] Exemplarily, in the target surface, within the same target substructure, the ratio between the one-dimensional dimensions of different second substructures is greater than or equal to 0.95 and less than or equal to 1.05.

[0109] Exemplarily, in the target plane, the ratio between the one-dimensional dimensions of different second substructures located in different target substructures is greater than or equal to 0.95 and less than or equal to 1.05.

[0110] Exemplarily, in the target surface, within the target substructure, the second substructure is distributed only on the bottom surface of the target substructure.

[0111] Exemplarily, in the target surface, in at least one same target substructure, different second substructures are distributed in various regions of the bottom surface of the target substructure.

[0112] Exemplarily, in the target surface, in at least one same target substructure, different second substructures are distributed in a local area of ​​the bottom surface of the target substructure.

[0113] Exemplarily, in the target surface, a recessed depth of a bottom surface of the target substructure in the semiconductor substrate is greater than a recessed depth of a bottom surface of the second substructure in the semiconductor substrate relative to a bottom surface of the target substructure.

[0114] Exemplarily, in the target plane, a bottom surface of the second substructure is recessed less than 0.2 μm into the semiconductor substrate relative to a bottom surface of the target substructure.

[0115] Exemplarily, the target surface also has at least two groups of protrusion structures, which are arranged on the side of the first substructure and are distributed in a stepped manner along the extension direction of the side ridges of the first substructure; each group of protrusion structures includes a plurality of protrusions extending along the length direction of the side ridges of the first substructure and distributed in a direction parallel to the bottom surface of the first substructure.

[0116] Exemplarily, when only one of the first surface and the second surface is the target surface, the target surface has a first sub-surface and a second sub-surface that do not overlap each other; the first tower base-like texture structure is distributed on the first sub-surface and the second sub-surface, and the second tower base-like texture structure is only distributed on the first sub-surface.

[0117] It should be noted that the semiconductor substrate provided in the third aspect of the embodiment of the present invention is used to manufacture the solar cell provided in the first aspect. The morphology and one-dimensional size of the first tower-shaped texture structure and the second tower-shaped texture structure on the target surface of the semiconductor substrate, as well as the number and distribution of the second substructure in the first substructure and other information can refer to the morphology and one-dimensional size of the first tower-shaped texture structure and the second tower-shaped texture structure on the side of the passivation layer away from the semiconductor substrate, as well as the number and distribution of the second substructure in the first substructure and other information in the first aspect.

[0118] The beneficial effects of the third aspect and its various implementations in the embodiments of the present invention can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0119] In a fourth aspect, an embodiment of the present invention provides a method for manufacturing a solar cell. The method for manufacturing a solar cell comprises the following steps:

[0120] First, a semiconductor substrate is provided; the semiconductor substrate includes a first surface and a second surface opposite to each other. At least one of the first surface and the second surface is a target surface. The material of the semiconductor substrate and whether the first surface and the second surface of the semiconductor substrate are target surfaces can be referred to in the previous text and will not be repeated here.

[0121] Next, a first polishing process is performed on the target surface of the semiconductor substrate to form a first tower-shaped texture structure on the target surface. The morphology, one-dimensional size, and distribution of the first tower-shaped texture structure and the second tower-shaped texture structure on the target surface can refer to the morphology, one-dimensional size, and distribution of the first tower-shaped texture structure and the second tower-shaped texture structure on the side of the passivation layer away from the semiconductor substrate in the solar cell provided by the first aspect described above, and will not be repeated here.

[0122] Among them, a first alkaline solution can be used to perform a first polishing treatment on the target surface of the semiconductor substrate, and the first alkaline solution can be a solution such as sodium hydroxide or potassium hydroxide. The concentration and temperature of the first alkaline solution, as well as the processing time of the first polishing treatment can be determined according to the requirements of the one-dimensional size of the first tower base-shaped texture structure and the second tower base-shaped texture structure in the actual application scenario, and are not specifically limited here. Secondly, the first alkaline solution may contain a first additive, and the first additive is used to assist in isotropic etching of one side of the first surface of the semiconductor substrate to improve the uniformity of the polishing morphology. The ratio of the first additive in the first alkaline solution and the specific composition of the first additive can be set according to actual needs, and are not specifically limited here.

[0123] Next, a passivation layer is formed on the target surface, wherein the passivation layer has a first tower-shaped texture structure on a side facing away from the semiconductor substrate.

[0124] The specific formation process of the passivation layer can be determined according to the structure of the passivation layer and the distribution of the first tower-shaped texture structure and the second tower-shaped texture structure on the side of the passivation layer away from the semiconductor substrate.

[0125] Exemplarily, a process such as chemical vapor deposition can be used to form a passivation layer that is set as a whole layer on the target surface. If the passivation layer is only set in a local area of ​​the target surface, the passivation layer also needs to be patterned. If the passivation layer includes the above-mentioned N-type doped semiconductor layer and P-type doped semiconductor layer with opposite conductivity types, after forming one of the N-type doped semiconductor layer and the P-type doped semiconductor layer, it is necessary to pattern the one formed earlier among the N-type doped semiconductor layer and the P-type doped semiconductor layer; then, a process such as chemical vapor deposition is used to form the other one of the N-type doped semiconductor layer and the P-type doped semiconductor layer that is set as a whole layer, and then the one formed later among the N-type doped semiconductor layer and the P-type doped semiconductor layer is patterned.

[0126] The process of manufacturing the passivation layer is described below by taking the example that the passivation layer includes the N-type doped semiconductor layer and the P-type doped semiconductor layer of opposite conductivity types, and the first one of the N-type doped semiconductor layer and the P-type doped semiconductor layer is the P-type doped semiconductor layer:

[0127] A first interface passivation layer and an intrinsic semiconductor layer are sequentially formed on the target surface by using processes such as chemical vapor deposition. Then, the intrinsic semiconductor layer is doped by using doping processes such as diffusion to form a P-type doped semiconductor layer. When the material of the P-type doped semiconductor layer includes silicon, after the P-type doped semiconductor layer is formed, a borosilicate glass layer is also formed on the side of the P-type doped semiconductor layer away from the semiconductor substrate as a mask layer.

[0128] Then, a laser irradiation process is used to perform a local heat treatment on the borosilicate glass layer for modification, so that the untreated portion of the borosilicate glass layer retains the mask layer. Then, a second alkaline solution is used to selectively remove the P-type doped semiconductor layer and the portion of the modified borosilicate glass layer exposed outside the mask layer, exposing the first interface passivation layer corresponding to the laser irradiated portion. The second alkaline solution may contain a second additive, which is used to protect the mask layer corresponding to the portion not irradiated by the laser during the second alkaline solution treatment process. Next, a third alkaline solution is used to remove the portion of the first interface passivation layer exposed outside the mask layer, and the portion of the semiconductor substrate exposed outside the mask layer is etched, so that the surface of the portion of the semiconductor substrate exposed outside the mask layer is concave inward relative to the surface of the portion of the semiconductor substrate covered with the mask layer, and a first tower base-shaped texture structure and a second tower base-shaped texture structure are formed. The third alkaline solution may contain a third additive, which is used to assist in etching the portion of the first interface passivation layer exposed outside the mask layer, and slow down the corrosion of the mask layer to avoid damage to the P-type doped semiconductor layer. Compared with the unheat-treated portion of the borosilicate glass layer, the doping concentration of the P-type impurities in the first interface passivation layer is lower, and the density is higher, making it more difficult to corrode; however, the first interface passivation layer is thinner and the corrosion time is shorter. Therefore, the alkali concentration of the third alkaline solution is higher, and the corresponding etching time is shorter. Specifically, the type, concentration, temperature and treatment time of the second alkaline solution and the third alkaline solution, as well as the composition and ratio of the second additive and the third additive, can be set according to actual needs and are not specifically limited here.

[0129] Next, a second interface passivation layer and an N-type doped semiconductor layer may be formed in sequence on the P-type doped semiconductor layer and the target surface by using processes such as chemical vapor deposition. Then, a chemical slurry or laser etching combined with wet etching may be used to remove at least the portion of the second interface passivation layer and the N-type doped semiconductor layer covering the local area of ​​the P-type doped semiconductor layer.

[0130] It should be noted that when the passivation layer includes the above-mentioned N-type doped semiconductor layer and P-type doped semiconductor layer of opposite conductivity types, not only the P-type doped semiconductor layer can be formed first, but also the N-type doped semiconductor layer can be formed first. When the N-type doped semiconductor layer is formed first, the manufacturing process of the passivation layer can refer to the manufacturing process of the passivation layer when the P-type doped semiconductor layer is formed first in the above text, and will not be repeated here.

[0131] In addition, when the passivation layer includes the above-mentioned N-type doped semiconductor layer and P-type doped semiconductor layer of opposite conductivity types, the solar cell may not include the above-mentioned first interface passivation layer and / or second interface passivation layer. When the solar cell does not include the above-mentioned first interface passivation layer and / or second interface passivation layer, it is not necessary to perform the operations of forming and etching the first interface passivation layer and / or second interface passivation layer as described above.

[0132] In the above description, the technical details of the patterning and etching of each layer are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although the various embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.

[0133] The embodiments of the present invention are described above. However, these embodiments are only for a clearer description and are not intended to limit the scope of the present invention. The scope of the present invention is defined by the appended claims and their equivalents. Without departing from the scope of the present invention, a person skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present invention.

Claims

1. A solar cell, characterized in that: include: A semiconductor substrate, the semiconductor substrate comprising a first surface and a second surface opposite to each other; at least one of the first surface and the second surface is a target surface; A passivation layer, disposed on the target surface; The passivation layer has a first tower-shaped texture structure and a second tower-shaped texture structure on a side facing away from the semiconductor substrate; The first tower base-shaped texture structure includes a plurality of first substructures, and the bottom surface of the first substructure is recessed into the passivation layer; in the first tower base-shaped texture structure, the first substructure with a complete bottom surface is a target substructure; The second tower base-shaped texture structure includes a plurality of second substructures arranged in the first substructure, and the bottom surface of the second substructure is concave into the passivation layer relative to the surface of the first substructure; the one-dimensional size of the target substructure is larger than the one-dimensional size of the second substructure; The number of the second substructures arranged in at least one of the target substructures is greater than or equal to 10, or the area of ​​the bottom surface of the second substructure on the side of the passivation layer away from the semiconductor substrate accounts for greater than or equal to 15% and less than or equal to 60%.

2. The solar cell according to claim 1, characterized in that: The number of the second substructures set in at least one of the target substructures is less than or equal to 30.

3. The solar cell according to claim 1, characterized in that The one-dimensional size of the second substructure is greater than or equal to 0.03 times the one-dimensional size of the target substructure, and less than or equal to 0.1 times the one-dimensional size of the target substructure.

4. The solar cell according to claim 1, characterized in that In the same target substructure, the ratio between the one-dimensional dimensions of different second substructures is greater than or equal to 0.95 and less than or equal to 1.05; And / or, a ratio between one-dimensional dimensions of different second substructures located in different target substructures is greater than or equal to 0.95 and less than or equal to 1.

05.

5. The solar cell according to claim 1, characterized in that: In the target substructure, the second substructure is distributed only on the bottom surface of the target substructure.

6. The solar cell according to claim 1, characterized in that In at least one of the same target substructures, different second substructures are distributed in various areas of the bottom surface of the target substructure; And / or, in at least one of the same target substructures, different second substructures are distributed in a local area of ​​the bottom surface of the target substructure.

7. The solar cell according to claim 1, 5 or 6, characterized in that: The depth of the bottom surface of the target substructure recessed into the passivation layer is greater than the depth of the bottom surface of the second substructure recessed into the passivation layer relative to the bottom surface of the target substructure.

8. The solar cell according to claim 1, 5 or 6, characterized in that: The depth of the bottom surface of the second substructure recessed into the passivation layer relative to the bottom surface of the target substructure is less than 0.2 μm.

9. The solar cell according to claim 1, characterized in that: The passivation layer also has at least two groups of protrusion structures on the side facing away from the semiconductor substrate, and the at least two groups of protrusion structures are arranged on the side of the first substructure and are distributed in a stepped manner along the extension direction of the side ridges of the first substructure; each group of the protrusion structures includes a plurality of protrusions extending along the length direction of the side ridges of the first substructure and distributed in a direction parallel to the bottom surface of the first substructure.

10. The solar cell according to claim 1, characterized in that Only one of the first surface and the second surface is the target surface; along a direction parallel to the target surface, the passivation layer includes an N-type doped semiconductor layer and a P-type doped semiconductor layer of opposite conductivity types, and at least a portion of the N-type doped semiconductor layer is spaced apart from at least a portion of the P-type doped semiconductor layer; Among them, the surface of the passivation layer corresponding to the N-type doped semiconductor layer on the side away from the semiconductor substrate is the first sub-surface, and the surface of the passivation layer corresponding to the P-type doped semiconductor layer on the side away from the semiconductor substrate is the second sub-surface; the first tower-like texture structure is distributed on the first sub-surface and the second sub-surface, and the second tower-like texture structure is only distributed on the first sub-surface.

11. The solar cell according to claim 1, characterized in that: Only one of the first surface and the second surface is the target surface; the solar cell further comprises a doped semiconductor region disposed in the target surface, and a doped semiconductor layer disposed on the target surface; the doped semiconductor layer and the doped semiconductor region have opposite conductivity types, and at least a portion of the doped semiconductor layer and at least a portion of the doped semiconductor region are spaced apart in a direction parallel to the target surface; Among them, the side surface of the passivation layer corresponding to the doped semiconductor region facing away from the semiconductor substrate is the first sub-surface, and the side surface of the passivation layer corresponding to the doped semiconductor layer facing away from the semiconductor substrate is the second sub-surface; the first tower-like texture structure is distributed on the first sub-surface and the second sub-surface, and the second tower-like texture structure is only distributed on the first sub-surface.

12. A photovoltaic module, characterized in that: The invention comprises a solar cell as claimed in any one of claims 1 to 11.

13. A semiconductor substrate, characterized in that: The semiconductor substrate comprises a first surface and a second surface opposite to each other; at least one of the first surface and the second surface is a target surface; and the target surface has a first tower base-shaped texture structure and a second tower base-shaped texture structure; The first tower-shaped texture structure includes a plurality of first substructures, and the bottom surfaces of the first substructures are recessed in the semiconductor substrate relative to the target surface; in the first tower-shaped texture structure, the first substructure with a complete bottom surface is a target substructure; The second tower base-shaped texture structure includes a plurality of second substructures arranged in the first substructure, and the bottom surface of the second substructure is recessed into the semiconductor substrate relative to the surface of the first substructure; the one-dimensional size of the target substructure is larger than the one-dimensional size of the second substructure; the number of the second substructures arranged in at least one of the target substructures is greater than or equal to 10, or the area of ​​the bottom surface of the second substructure in the target surface accounts for greater than or equal to 15% and less than or equal to 60%.

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