Virtual channel configuration session for camera sensor

Abstract

In an aspect, a camera sensor component receives a first configuration of a first virtual channel (VC) and a second configuration of a second VC during a multi-VC configuration session, the first configuration associated with a first binning mode (e.g., full, 4x4, 8x8, etc.), the second configuration associated with a second binning mode (e.g., full, 4x4, 8x8, etc.). The camera sensor component detects a trigger to initiate streaming of active frames associated with the first VC and the second VC. In response to the trigger, the camera sensor component streams first active frames associated with the first VC according to the first binning mode and streams second active frames associated with the second VC according to the second binning mode.

Description

Background Technology 1. Technical Field

[0002] All aspects of this disclosure relate to wireless communication in general, and more specifically to camera sensors.

[0003] 2. Relevant Technical Descriptions

[0004] Extended reality (XR) camera sensors can be integrated into smart glasses to facilitate interaction with virtual reality systems such as the metaverse. In some designs, XR camera sensors can be used for various tracking use cases, such as head tracking (HET), hand tracking (HAT), plane finding (PF), and controller tracking (CT). In some designs, the same single-camera sensor can operate intermittently or periodically on one of the tracking modes (e.g., HET / HAT / PF / CT), while operating most of the time according to a trigger mode (e.g., FSIN mode). For example, a trigger mode is one in which the camera wakes from sleep mode in response to an event, captures and streams a specific number of active frames, and then returns to sleep mode. Trigger modes are often used in conjunction with the tracking use cases mentioned above to improve power and performance.

[0005] In some designs, virtual channels (VCs) are used to stream data for each mode of a given camera sensor. For example, a global shutter FSIN camera sensor can be configured to stream a single VC for a single FSIN trigger. For example, to stream a single VC, a global shutter FSIN camera sensor can be configured with a VC configuration that includes (i) sensor resolution and frames per second (FPS), streaming information (e.g., VC information), and FSIN triggers (e.g., sensor settings, global destination input / output (GPIO) toggling, etc.). Summary of the Invention

[0006] The following is a simplified summary of the invention relating to one or more aspects disclosed herein. Therefore, this summary should not be considered an exhaustive overview relating to all contemplated aspects, nor should it be considered to identify key or decisive elements relating to all contemplated aspects or to depict the scope associated with any particular aspect. Thus, the sole purpose of this summary is to present, in a concise form, certain concepts relating to one or more aspects involving the mechanisms disclosed herein, prior to the detailed embodiments presented below.

[0007] In one aspect, a method of operating a camera sensor assembly includes: receiving a first configuration of a first VC during a multi-virtual-channel (VC) configuration session, the first configuration being associated with a first merging mode; receiving a second configuration of a second VC during the multi-VC configuration session, the second configuration being associated with a second merging mode; detecting one or more triggers to initiate streaming of active frames associated with the first VC and the second VC; and, in response to the one or more triggers, streaming the first active frame associated with the first VC according to the first merging mode, and streaming the second active frame associated with the second VC according to the second merging mode.

[0008] In one aspect, a camera sensor assembly includes: a memory; at least one transceiver; and at least one processor communicatively coupled to the memory and the at least one transceiver, the at least one processor being configured to: receive, during a multi-VC configuration session, a first configuration of a first VC associated with a first merging mode via the at least one transceiver; receive, during a multi-VC configuration session, a second configuration of a second VC associated with a second merging mode via the at least one transceiver; detect one or more triggers to initiate streaming of active frames associated with the first VC and the second VC; and, in response to the one or more triggers, stream the first active frame associated with the first VC according to the first merging mode, and stream the second active frame associated with the second VC according to the second merging mode.

[0009] In one aspect, a camera sensor assembly includes: a first configuration component for receiving a first VC during a multi-virtual-channel (VC) configuration session, the first configuration being associated with a first merging mode; a second configuration component for receiving a second VC during the multi-VC configuration session, the second configuration being associated with a second merging mode; a component for detecting one or more triggers to initiate streaming of active frames associated with the first VC and the second VC; and a component for streaming the first active frame associated with the first VC according to the first merging mode and streaming the second active frame associated with the second VC according to the second merging mode in response to one or more triggers.

[0010] In one aspect, a non-transitory computer-readable medium storing computer-executable instructions, which, when executed by a camera sensor component, cause the camera sensor component to: receive a first configuration of a first VC during a multi-virtual-channel (VC) configuration session, the first configuration being associated with a first merging mode; receive a second configuration of a second VC during a multi-VC configuration session, the second configuration being associated with a second merging mode; detect one or more triggers to initiate streaming of active frames associated with the first VC and the second VC; and, in response to one or more triggers, stream the first active frame associated with the first VC according to the first merging mode, and stream the second active frame associated with the second VC according to the second merging mode.

[0011] Other objects and advantages associated with the aspects disclosed herein will be apparent to those skilled in the art based on the accompanying drawings and detailed embodiments. Attached Figure Description

[0012] The accompanying drawings are provided to help describe various aspects of this disclosure, and are provided for illustrative purposes only and not to limit the scope of the aspects.

[0013] Figure 1 It is a simplified block diagram of several sample aspects of a component that can be used in user equipment (UE) and configured to support communications as taught herein.

[0014] Figure 2 This is a simplified block diagram of an extended reality (XR) camera device according to various aspects of this disclosure.

[0015] Figure 3 Examples of multi-virtual-channel (VC) configurations for camera sensor components according to various aspects of this disclosure are illustrated.

[0016] Figure 4 An exemplary process of communication according to one aspect of this disclosure is illustrated.

[0017] Figure 5 Examples are provided according to one aspect of this disclosure. Figure 4 The specific implementation of the process is illustrated in the example. Detailed Implementation

[0018] Various aspects of this disclosure are provided below in the description and accompanying drawings of various examples provided for illustrative purposes. Alternative aspects may be devised without departing from the scope of this disclosure. Additionally, well-known elements of this disclosure will not be described in detail or will be omitted so as not to obscure the relevant details of this disclosure.

[0019] The terms “exemplary” and / or “example” are used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” and / or “example” is not necessarily to be construed as superior to or better than other aspects. Similarly, the term “aspects of this disclosure” does not require that all aspects of this disclosure include the features, advantages, or modes of operation discussed.

[0020] Those skilled in the art will understand that any of a variety of different techniques and methods can be used to represent the information and signals described below. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be mentioned throughout the following description can be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, light fields or optical particles, or any combination thereof, depending in part on the specific application, in part on the desired design, in part on the corresponding technology, and so on.

[0021] Furthermore, many aspects are described according to a sequence of actions to be performed by elements of, for example, a computing device. It will be appreciated that the various actions described herein can be performed by specific circuitry (e.g., an application-specific integrated circuit (ASIC)), by program instructions executed by one or more processors, or by a combination of both. Additionally, the sequence of actions described herein can be considered to be entirely embodied in any form of non-transitory computer-readable storage medium storing a corresponding set of computer instructions that, when executed, will cause or command the associated processor of the device to perform the functionality described herein. Therefore, various aspects of this disclosure can be embodied in a variety of different forms, all of which are contemplated within the scope of the claimed subject matter. Furthermore, for each aspect described herein, any corresponding form of any such aspect may be described herein as, for example, "logic configured to perform the described actions."

[0022] As used herein, unless otherwise stated, the terms “User Equipment” (UE) and “Base Station” are not intended to be specific or otherwise limited to any particular Radio Access Technology (RAT). In general, a UE can be any wireless communication device used by a user to communicate over a wireless communication network (e.g., mobile phone, router, tablet computer, laptop computer, consumer asset positioning device, wearable device (e.g., smartwatch, glasses, augmented reality (AR) / virtual reality (VR) headset, etc.), vehicle (e.g., car, motorcycle, bicycle, etc.), Internet of Things (IoT) device, etc.). A UE can be mobile or can (e.g., at certain times) be stationary and can communicate with a Radio Access Network (RAN). As used herein, the term “UE” can be interchangeably referred to as “Access Terminal” or “AT,” “Client Equipment,” “Wireless Equipment,” “Subscriber Equipment,” “Subscriber Terminal,” “Subscriber Station,” “User Terminal” or “UT,” “Mobile Equipment,” “Mobile Terminal,” “Mobile Station,” or variations thereof. In general, a UE can communicate with a core network via the RAN, and through the core network, a UE can connect to external networks such as the Internet and to other UEs. Of course, other mechanisms for connecting to the core network and / or the Internet are also possible for the UE, such as through wired access networks, wireless local area network (WLAN) networks (e.g., based on the Institute of Electrical and Electronics Engineers (IEEE) 802.11 standard, etc.).

[0023] Figure 1 Several example components (represented by corresponding boxes) that can be incorporated into UE 102 are illustrated. It should be understood that these components can be implemented in different specific implementations in different types of devices (e.g., in an ASIC, in a system-on-a-chip (SoC), etc.). The illustrated components can also be incorporated into other devices in a communication system. For example, other devices in the system may include components similar to those described as providing similar functionality. Furthermore, a given device may contain one or more of these components. For example, a device may include multiple transceiver components that enable the device to operate on multiple carriers and / or communicate via different technologies. In one aspect, UE 102 may correspond to things such as extended reality (XR) glasses, and... Figure 1 The various boxes depicted may be optional depending on the specific implementation (e.g., transceivers, SPS components, etc. may be optional).

[0024] In some designs, UE 102 may optionally include one or more Wireless Wide Area Network (WWAN) transceivers 110, which provide components (e.g., components for transmitting, components for receiving, components for measurement, components for tuning, components for suppressing transmission, etc.) for communicating via one or more wireless communication networks (not shown) (such as NR networks, LTE networks, GSM networks, etc.). The WWAN transceiver 110 may be connected to one or more antennas 116 to communicate with other network nodes (such as other UEs, access points, base stations (e.g., eNB, gNB), etc.) via at least one designated RAT (e.g., NR, LTE, GSM, etc.) through a wireless communication medium of interest (e.g., a certain set of time / frequency resources in a particular spectrum). The WWAN transceiver 110 may be configured in various ways to transmit and encode signals 118 (e.g., messages, indications, information, etc.) according to the designated RAT, and conversely, to receive and decode signals 118 (e.g., messages, indications, information, pilots, etc.). Specifically, the WWAN transceiver 110 includes one or more transmitters 114 for transmitting and encoding the signal 118, and one or more receivers 112 for receiving and decoding the signal 118.

[0025] In at least some cases, UE 102 may optionally include one or more short-range radio transceivers 120. The short-range radio transceiver 120 may be connected to one or more antennas 126 and provide for communication over a medium of interest via at least one designated RAT (e.g., WiFi, LTE-D, Bluetooth). ® Zigbee ® Z-Wave ® The short-range transceiver 120 is a component (e.g., a component for transmitting, a component for receiving, a component for measuring, a component for tuning, a component for blocking transmission, etc.) that communicates with other network nodes (such as other UEs, access points, base stations, etc.) using technologies such as PC5, Dedicated Short-Range Communication (DSRC), Wireless Access for Vehicle Environments (WAVE), Near Field Communication (NFC), Ultra-Wideband (UWB), etc.). The short-range transceiver 120 can be configured to transmit and encode signals 128 (e.g., messages, indications, information, etc.) according to a specified RAT, and conversely, to receive and decode signals 128 (e.g., messages, indications, information, pilots, etc.). Specifically, the short-range transceiver 120 includes one or more transmitters 124 for transmitting and encoding signals 128, and one or more receivers 122 for receiving and decoding signals 128. As a specific example, the short-range transceiver 120 may be a WiFi transceiver, Bluetooth transceiver, etc. ® Transceiver, Zigbee ®and / or Z-Wave ® Transceivers, NFC transceivers, UWB transceivers, or vehicle-to-vehicle (V2V) and / or vehicle-to-everything (V2X) transceivers.

[0026] In at least some cases, UE 102 may optionally include satellite signal receivers 130 and 170. Satellite signal receiver 130 may be connected to one or more antennas 136 and may provide components for receiving and / or measuring satellite positioning / communication signals 138. Where satellite signal receiver 130 is a satellite positioning system receiver, satellite positioning / communication signals 138 may be Global Positioning System (GPS) signals, Global Navigation Satellite System (GLONASS) signals, Galileo signals, BeiDou signals, Indian Regional Navigation Satellite System (NAVIC), Quasi-Zenith Satellite System (QZSS), etc. Where satellite signal receiver 130 is a non-terrestrial network (NTN) receiver, satellite positioning / communication signals 138 may be communication signals originating from a 5G network (e.g., carrying control and / or user data). Satellite signal receiver 130 may include any suitable hardware and / or software for receiving and processing satellite positioning / communication signals 138. The satellite signal receiver 130 can request appropriate information and operations from other systems, and in at least some cases, use measurements obtained by any suitable satellite positioning system algorithm to perform calculations to determine the location of the UE 102.

[0027] The transceiver can be configured to communicate via a wired or wireless link. The transceiver (whether wired or wireless) includes transmitter circuitry (e.g., transmitters 114, 124) and receiver circuitry (e.g., receivers 112, 122). In some embodiments, the transceiver may be an integrated device (e.g., implementing transmitter and receiver circuitry in a single device), in some embodiments it may include separate transmitter and receiver circuitry, or in other embodiments it may be implemented in a different manner. The transmitter and receiver circuitry of a wired transceiver may be coupled to one or more wired network interface ports. The wireless transmitter circuitry (e.g., transmitters 114, 124) may include or be coupled to multiple antennas (e.g., antennas 116, 126), such as an antenna array, which allows a corresponding device (e.g., UE 102) to perform transmit “beamforming” as described herein. Similarly, the wireless receiver circuitry (e.g., receivers 112, 122) may include or be coupled to multiple antennas (e.g., antennas 116, 126), such as an antenna array, which allows the respective device (e.g., UE 102) to perform receive beamforming, as described herein. In one aspect, the transmitter and receiver circuitry may share the same multiple antennas (e.g., antennas 116, 126), such that the respective device may perform only reception or only transmission at a given time, rather than both simultaneously. The wireless transceivers (e.g., WWAN transceiver 110, short-range wireless transceiver 120) may also include network eavesdropping modules (NLMs) for performing various measurements, etc.

[0028] As used herein, various wireless transceivers (e.g., transceivers 110, 120, etc.) and wired transceivers can generally be characterized as "transceiver," "at least one transceiver," or "one or more transceivers." Therefore, whether a particular transceiver is a wired or wireless transceiver can be inferred from the type of communication being performed. For example, backhaul communication between network devices or servers typically involves signaling via a wired transceiver, while wireless communication between a UE (e.g., UE 102) and another wireless device will typically involve signaling via a wireless transceiver.

[0029] UE 102 may also include other components that can be used in conjunction with the operations disclosed herein. UE 102 may include one or more processors 132 for providing, for example, functionality related to wireless communication, and for providing other processing functionality. Thus, processor 132 may provide components for processing, such as components for determining, components for calculating, components for receiving, components for transmitting, components for indicating, etc. In one aspect, processor 132 may include, for example, one or more general-purpose processors, multi-core processors, central processing units (CPUs), ASICs, digital signal processors (DSPs), field-programmable gate arrays (FPGAs), other programmable logic devices or processing circuitry, or various combinations thereof.

[0030] UE 102 may accordingly include memory circuitry implementing memory 140 (e.g., each including a memory device) for maintaining information (e.g., information indicating reserved resources, thresholds, parameters, etc.). Memory 140 may thus provide components for storage, retrieval, maintenance, etc. In some cases, UE 102 may include a camera sensor assembly 142. The camera sensor assembly 142 may be hardware circuitry as part of or coupled to processor 132, which, when executed, enables UE 102 to perform the functionality described herein. In other aspects, the camera sensor assembly 142 may be external to processor 132 (e.g., part of a modem processing system, integrated with another processing system, etc.). Alternatively, the camera sensor assembly 142 may be a memory module stored in memory 140, which, when executed by processor 132 (or modem processing system, another processing system, etc.), enables UE 102 to perform the functionality described herein. Figure 1 Possible locations of the camera sensor assembly 142 are illustrated. This sensing assembly may be part of, for example, one or more WWAN transceivers 110, memory 140, one or more processors 132, or any combination thereof, or it may be a standalone component.

[0031] UE 102 may include one or more sensors 144 coupled to one or more processors 132 to provide: components for sensing or detecting motion and / or orientation information independent of motion data derived from signals received by one or more WWAN transceivers 110, one or more short-range wireless transceivers 120, and / or satellite signal receivers 130; components for capturing visual data and / or image data; and so on. As an example, sensor 144 may include a camera sensor, an accelerometer (e.g., a microelectromechanical system (MEMS) device), a gyroscope, a geomagnetic sensor (e.g., a compass), an altimeter (e.g., a barometric altimeter), and / or any other type of motion detection sensor. Furthermore, sensor 144 may include multiple different types of devices and combine their outputs to provide motion information. For example, sensor 144 may use a combination of a multi-axis accelerometer and an orientation sensor to provide the ability to calculate positioning in a two-dimensional (2D) and / or three-dimensional (3D) coordinate system.

[0032] In addition, UE 102 includes a user interface 146 that provides components for providing instructions to a user (e.g., audible and / or visual instructions) and / or for receiving user input (e.g., when the user actuates a sensing device (such as a keypad, touchscreen, microphone, etc.)).

[0033] For convenience, UE 102 in Figure 1 The text is shown as including various components that can be configured according to the various examples described herein. However, it should be understood that the illustrated components may have different functionalities in different designs. Specifically, Figure 1 The various components within are optional in the replacement configuration, and aspects include configurations that can vary due to design choices, cost, equipment usage, or other considerations. For example, in Figure 1 In certain cases, specific implementations of UE 102 may omit WWAN transceiver 110 (e.g., wearable devices, tablets, PCs, or laptops may have Wi-Fi and / or Bluetooth capabilities but no cellular capabilities), or short-range wireless transceiver 120 (e.g., cellular only), or satellite signal receiver 130, or sensor 144, etc. For the sake of brevity, examples of various alternative configurations are not provided herein, but will be readily understood by those skilled in the art.

[0034] The various components of UE 102 can be communicatively coupled to each other via data bus 134. In one respect, data bus 134 can form a communication interface for UE 102 or be part of it. For example, when different logical entities are embodied in the same device, data bus 134 can provide communication between them.

[0035] Figure 1 The components can be implemented in various ways. In some specific implementations, Figure 1 The components can be implemented in one or more circuits, such as, for example, one or more processors and / or one or more ASICs (which may include one or more processors). Here, each circuit may use and / or combine at least one memory component for storing information or executable code used by the circuit to provide that functionality. For example, some or all of the functionality represented by boxes 110 through 146 can be implemented by the processor and memory components of UE 102 (e.g., by executing appropriate code and / or by appropriate configuration of the processor components). For simplicity, various operations, actions, and / or functions are described herein as being performed "by the UE," etc. However, it should be understood that such operations, actions, and / or functions can actually be performed by specific components or combinations of components of UE 102 (such as processor 132, transceiver 110, memory 140, camera sensor component 142, etc.).

[0036] Figure 2 This is a simplified block diagram of an extended reality (XR) camera device 200 according to various aspects of this disclosure. In one aspect, the XR camera device 200 (e.g., XR glasses) corresponds to... Figure 1 Example implementation of UE 102.

[0037] refer to Figure 2 The XR camera device 200 includes a timing generator and system control logic 202, a sensor 142 (e.g., in this case, at least an image sensor array 204), and a processor 132 (e.g., in this case, at least an image sensor processor 206 and a Mobile Industry Processor Interface (MIPI) encoder 208). In one aspect, the timing generator and system control logic 202 includes an FSIN general purpose input / output (GPIO) configured to receive an FSIN trigger 210. When the FSIN trigger 210 is triggered (e.g., activated), the XR camera device 200 exits sleep mode, and the image sensor array 204 captures a specific number of frames, which are processed by the image sensor processor 206 and the MIPI encoder 208, which outputs a series of processed frames 212 via a virtual channel (VC). After streaming the specific number of frames via the VC, the XR camera device 200 can return to sleep mode.

[0038] As seen above, various types of user interfaces (UEs) can be deployed. For example, extended reality (XR) camera sensors can be equipped on smart glasses to facilitate interaction with virtual reality systems such as the metaverse. In some designs, XR camera sensors can be used for various tracking use cases, such as head tracking (HET), hand tracking (HAT), plane finding (PF), and controller tracking (CT). In some designs, the same single-camera sensor can operate intermittently or periodically on one of the tracking modes (e.g., HET / HAT / PF / CT), while operating most of the time according to a trigger mode (e.g., FSIN mode). For example, a trigger mode is one in which the camera wakes from sleep mode in response to an event, captures and streams a specific number of active frames, and then returns to sleep mode. Trigger modes are often used in conjunction with the tracking use cases mentioned above to improve power and performance.

[0039] In some designs, virtual channels (VCs) are used to stream data for each mode of a given camera sensor. For example, a global shutter FSIN camera sensor can be configured to stream a single VC for a single FSIN trigger. For example, to stream a single VC, a global shutter FSIN camera sensor can be configured with a VC configuration that includes (i) sensor resolution and frames per second (FPS), streaming information (e.g., VC information), and FSIN triggers (e.g., sensor settings, global destination input / output (GPIO) toggling, etc.).

[0040] In some designs, VCs can be configured concurrently for multiple tracing use cases, such as Figure 3 As depicted in the text. Figure 3 A multi-VC configuration 300 for a camera sensor assembly (e.g., camera sensor assembly 142) according to various aspects of this disclosure is illustrated. Figure 3 In the multi-VC configuration 300, there are repeating sequences 310 and 320. Each corresponding repeating sequence includes four VCs, denoted as VC1, VC2, VC3, and VC4. VC1, VC2, VC3, and VC4 are associated with the tracking use cases HET, PF, CT, and HAT, respectively. VC1, VC2, VC3, and VC4 can have different VC configurations (e.g., different numbers of active frames per VC ON cycle, different durations, different parameters (such as merging modes), etc.). Furthermore, although in Figure 3 The same periodicity is shown in the diagram, but VC can also be configured with different periods.

[0041] Each VC used for each tracking use case (e.g., HET, HAT, PF, CT, etc.) is typically configured individually, where the camera sensor cyclically repeats patterns (i.e., repeating sequences) and frames are processed by algorithms (e.g., HET, HAT, PF, CT, etc.) to find the corresponding movement or pose. Figure 3 In some cases, configuring VCs in this way can lead to significant latency (e.g., for establishing four separate VC configuration sessions for VC1, VC2, VC3, and VC4).

[0042] This disclosure thus relates to multi-VC configuration sessions, in which two (or more) VCs can be established in a single configuration session with their own respective parameters. Such aspects can provide various technical advantages, such as reduced latency associated with configuring multiple VCs for camera sensor components.

[0043] Figure 4 An exemplary process 400 of communication according to one aspect of this disclosure is illustrated. Figure 4 The process 400 is performed by a camera sensor assembly that can be communicatively coupled to or equipped on a corresponding UE (e.g., smart glasses, smartwatch, phone, etc.). For example, the camera sensor assembly may correspond to or may include one of the sensors 144 from a processor assembly of processor 132.

[0044] refer to Figure 4 At 410, a camera sensor assembly (e.g., sensor 144, processor 132, camera sensor assembly 142, etc.) receives a first configuration for a first VC during a multi-VC configuration session. This first configuration is associated with a first merging mode (e.g., full mode or 1×1 merging, 4×4 merging, 8×8 merging, etc.). For example, the first configuration may include corresponding parameters such as periodicity, FSIN trigger, number of active frames, or duration. In a further example, a multi-VC configuration session can be conducted for a management component (e.g., an application processor) via data bus 134.

[0045] refer to Figure 4 At 420, the camera sensor assembly (e.g., sensor 144, processor 132, camera sensor assembly 142, etc.) receives a second configuration of the second VC during a multi-VC configuration session. This second configuration is associated with a second merging mode (e.g., full mode or 1x1 merging, 4x4 merging, 8x8 merging, etc.). The first merging mode and the second merging mode can be the same or different. Similarly, the first VC configuration and the second VC configuration can be the same or different. For example, the second configuration may include corresponding parameters such as periodicity, FSIN trigger, number of active frames, or duration, which may be the same as or different from the corresponding parameters in the first VC configuration.

[0046] refer to Figure 4 At 430, a camera sensor assembly (e.g., sensor 144, processor 132, camera sensor assembly 142, etc.) detects one or more triggers (e.g., FSIN triggers) to initiate streaming of active frames associated with the first VC and the second VC. For example, the triggers at 430 may include those related to... Figure 3 A time trigger associated with a repeating sequence in the sequence.

[0047] refer to Figure 4 At 440, a camera sensor assembly (e.g., sensor 144, processor 132, camera sensor assembly 142, etc.) responds to one or more triggers to stream a first active frame associated with a first VC according to a first merging mode, and to stream a second active frame associated with a second VC according to a second merging mode. In some designs, the first and second active frames are streamed from the camera sensor assembly to a Mobile Industry Processor Interface (MIPI) encoder (e.g., which may be executed by one or more of processors 132) via a data bus 134. The following section discusses... Figure 5 The merge pattern is described in more detail.

[0048] refer to Figure 4 In some designs, merging patterns can be designed for various camera sensor targets, such as improving low-light performance, sensitivity, signal-to-noise ratio, frame rate, etc., by combining pixels and averaging them. For example, merging combines adjacent pixels within the same color scheme to improve low-light performance. In the example, the first merging pattern is associated with one of 1×1 merging, 4×4 merging, and 8×8 merging, or the second merging pattern is associated with a different one of 1×1 merging, 4×4 merging, and 8×8 merging. In the case of 1×1 merging, the full size of the captured video frame (i.e., all pixels) becomes part of the corresponding active frame (e.g., without averaging across pixels).

[0049] Figure 5 An example of one aspect of this disclosure is illustrated. Figure 4 Example implementation of process 400 500. MIPI encoder 510 receives streams of active frames associated with each of VC1, VC2, and VC3, respectively, 520, 530, and 540. Figure 5As shown, VC1 is associated with a 1x1 merge as depicted at 550, VC2 with a 4x4 merge as depicted at 560, and VC3 with an 8x8 merge as depicted at 570. In a specific example, it is assumed that the camera sensor assembly supports 8 megapixels (MP) in normal preview mode, with a resolution of 3200×2400 pixels. In this specific example, the VC for HET / HAT can be associated with a VC configuration of 800×600 resolution (e.g., 4x4 merge), while the VC for PF / CT can be associated with a VC configuration of 320×240 or 400×300 resolution (e.g., 8x8 merge). In this case, in Figure 5 In this configuration, VC1 is streamed at full size (3200×2400 or 8 MP), VC2 is streamed at 4×4 merge (800×600), and VC3 is streamed at 8×8 merge (400×300). In some designs, a single register can be used to stream VC1, VC2, and VC3.

[0050] refer to Figure 4 In some designs, one or more triggers include a single trigger that triggers streaming of a first active frame and a second active frame. In other designs, one or more triggers include a first trigger that triggers streaming of the first active frame and a second trigger that triggers streaming of the second active frame.

[0051] refer to Figure 4 In some designs, the first VC is associated with a first periodicity, and the second VC is associated with a second periodicity. In other designs, the first and second VCs are associated with the same periodicity.

[0052] refer to Figure 4 In some designs, the camera sensor components can transition to a low-power mode. During low-power mode, one or more triggers do not trigger streaming of the first active frame, the second active frame, or both. For example, a lower-priority VC can be paused during low-power mode. In a specific example, during low-power mode, one or more triggers do not trigger streaming of active frames associated with Plane Lookup (PF) or Controller Tracking (CT). In other words, VCs associated with PF or CT can be paused during low-power mode.

[0053] refer to Figure 4In some designs, the first and second active frames are streamed via a single register. In some designs, each bit of the single register is assigned to a different corresponding VC. In a specific example, the single register may correspond to an 8-bit register. For example, consider a specific implementation that assigns 0x1 to VC1, 0x2 to VC2, 0x4 to stream VC3, and 0x8 to stream VC4. If all four (4) bits of these bits are enabled 0xF (e.g., activated or set to logic level "1"), then all VCs (i.e., each of VC1, VC2, VC3, and VC4) will stream the active frames in a specific repeating sequence. In some designs, the application associated with a particular VC may request that the camera sensor components stream (or not stream) the corresponding VC based on their respective use case (e.g., HET, HAT, PF, CT, etc.).

[0054] refer to Figure 4 In some designs, one or more of the first and second VCs are associated with head tracking (HET), hand tracking (HAT), plane lookup (PF), controller tracking (CT), or a combination thereof.

[0055] refer to Figure 4 In some designs, one or more triggers include one or more FSIN triggers.

[0056] refer to Figure 4 In some designs, the first and second active frames are captured within the same instance of the repeating sequence.

[0057] In the above specific embodiments, it can be seen that different features are grouped together in the examples. This manner of disclosure should not be construed as an intention to have more features than those expressly mentioned in each clause. Rather, aspects of this disclosure may include fewer features than those in the individual example clauses disclosed. Therefore, the following clauses should be regarded accordingly as incorporated into the description, where each clause may serve as a separate example. Although each dependent clause may refer in the clause to a specific combination with one of the other clauses, the aspect of the dependent clause is not limited to that specific combination. It should be understood that other example clauses may also include combinations of aspects of the dependent clause with the subject matter of any other dependent or independent clause, or combinations of any feature with other dependent and independent clauses. The aspects disclosed herein expressly include these combinations unless expressly stated or readily inferred that a particular combination is not intended for use (e.g., contradictory aspects, such as defining an element as both an electrical insulator and an electrical conductor). Furthermore, it is contemplated that aspects of a clause may be included in any other independent clause, even if that clause does not directly depend on the independent clause.

[0058] Specific implementation examples are described in the following numbered clauses:

[0059] Clause 1. A method of operating a camera sensor assembly, the method comprising: receiving a first configuration of a first VC during a multi-virtual-channel (VC) configuration session, the first configuration being associated with a first merging mode; receiving a second configuration of a second VC during the multi-VC configuration session, the second configuration being associated with a second merging mode; detecting one or more triggers to initiate streaming of active frames associated with the first VC and the second VC; and, in response to the one or more triggers, streaming the first active frame associated with the first VC according to the first merging mode, and streaming the second active frame associated with the second VC according to the second merging mode.

[0060] Clause 2. The method described in Clause 1, wherein the first merge pattern is associated with one of a 1×1 merge, a 4×4 merge, and an 8×8 merge, or wherein the second merge pattern is associated with a different one of a 1×1 merge, a 4×4 merge, and an 8×8 merge.

[0061] Clause 3. The method according to any one of Clauses 1 to 2, wherein the one or more triggers include a single trigger that triggers the streaming of the first active frame and the second active frame.

[0062] Clause 4. The method according to any one of Clauses 1 to 3, wherein the one or more triggers include a first trigger that triggers the streaming of the first active frame and a second trigger that triggers the streaming of the second active frame.

[0063] Clause 5. The method according to any one of Clauses 1 to 4, wherein the first VC is associated with a first periodicity and the second VC is associated with a second periodicity.

[0064] Clause 6. The method according to any one of Clauses 1 to 5, wherein the first VC and the second VC are associated with the same periodicity.

[0065] Clause 7. The method according to any one of Clauses 1 to 6, the method further comprising: switching to a low-power mode, wherein during the low-power mode, the one or more triggers do not trigger streaming of the first active frame, the second active frame, or both.

[0066] Clause 8. The method according to Clause 7, wherein during the low power mode, the one or more triggers do not trigger the streaming of active frames associated with plane lookup (PF) or controller tracking (CT).

[0067] Clause 9. The method according to any one of Clauses 1 to 8, wherein the first active frame and the second active frame are streamed via a single register.

[0068] Clause 10. The method according to Clause 9, wherein each bit of the single register is assigned to a different corresponding VC.

[0069] Clause 11. The method according to any one of Clauses 1 to 10, wherein one or more of the first VC and the second VC are associated with head tracking (HET), hand tracking (HAT), plane lookup (PF), controller tracking (CT), or a combination thereof.

[0070] Clause 12. The method according to any one of Clauses 1 to 11, wherein the one or more triggers include one or more FSIN triggers.

[0071] Clause 13. The method according to any one of Clauses 1 to 12, wherein the first active frame and the second active frame are captured within the same instance of the repeating sequence.

[0072] Clause 14. A camera sensor assembly comprising: a memory; at least one transceiver; and at least one processor communicatively coupled to the memory and the at least one transceiver, the at least one processor being configured to: during a multi-virtual channel (VC) configuration session, receive via the at least one transceiver a first configuration of a first VC, the first configuration being associated with a first merging mode; during the multi-VC configuration session, receive via the at least one transceiver a second configuration of a second VC, the second configuration being associated with a second merging mode; detect one or more triggers to initiate streaming of active frames associated with the first VC and the second VC; and in response to the one or more triggers, stream the first active frame associated with the first VC according to the first merging mode, and stream the second active frame associated with the second VC according to the second merging mode.

[0073] Clause 15. The camera sensor assembly according to Clause 14, wherein the first merging mode is associated with one of 1×1 merging, 4×4 merging, and 8×8 merging, or wherein the second merging mode is associated with a different one of 1×1 merging, 4×4 merging, and 8×8 merging.

[0074] Clause 16. The camera sensor assembly according to any one of Clauses 14 to 15, wherein the one or more triggers include a single trigger that triggers the streaming of the first active frame and the second active frame.

[0075] Clause 17. A camera sensor assembly according to any one of Clauses 14 to 16, wherein the one or more triggers include a first trigger that triggers the streaming of the first active frame and a second trigger that triggers the streaming of the second active frame.

[0076] Clause 18. A camera sensor assembly according to any one of Clauses 14 to 17, wherein the first VC is associated with a first periodicity and the second VC is associated with a second periodicity.

[0077] Clause 19. A camera sensor assembly according to any one of Clauses 14 to 18, wherein the first VC and the second VC are associated with the same periodicity.

[0078] Clause 20. A camera sensor assembly according to any one of Clauses 14 to 19, wherein the at least one processor is further configured to: switch to a low-power mode, wherein during the low-power mode, the one or more triggers do not trigger streaming of the first active frame, the second active frame, or both.

[0079] Clause 21. The camera sensor assembly as described in Clause 20, wherein during the low power mode, the one or more triggers do not trigger the streaming of active frames associated with plane lookup (PF) or controller tracking (CT).

[0080] Clause 22. A camera sensor assembly according to any one of Clauses 14 to 21, wherein the first active frame and the second active frame are streamed via a single register.

[0081] Clause 23. The camera sensor assembly as described in Clause 22, wherein each bit of the single register is assigned to a different corresponding VC.

[0082] Clause 24. A camera sensor assembly according to any one of Clauses 14 to 23, wherein one or more of the first VC and the second VC are associated with head tracking (HET), hand tracking (HAT), plane finding (PF), controller tracking (CT), or a combination thereof.

[0083] Clause 25. A camera sensor assembly according to any one of Clauses 14 to 24, wherein the one or more triggers include one or more FSIN triggers.

[0084] Clause 26. The camera sensor assembly according to any one of Clauses 14 to 25, wherein the first active frame and the second active frame are captured within the same instance of a repeating sequence.

[0085] Clause 27. A camera sensor assembly comprising: means for receiving a first configuration of a first VC during a multi-virtual-channel (VC) configuration session, the first configuration being associated with a first merging mode; means for receiving a second configuration of a second VC during the multi-VC configuration session, the second configuration being associated with a second merging mode; means for detecting one or more triggers to initiate streaming of active frames associated with the first VC and the second VC; and means for streaming a first active frame associated with the first VC according to the first merging mode and streaming a second active frame associated with the second VC according to the second merging mode in response to the one or more triggers.

[0086] Clause 28. The camera sensor assembly according to Clause 27, wherein the first merging mode is associated with one of 1×1 merging, 4×4 merging, and 8×8 merging, or wherein the second merging mode is associated with a different one of 1×1 merging, 4×4 merging, and 8×8 merging.

[0087] Clause 29. The camera sensor assembly according to any one of Clauses 27 to 28, wherein the one or more triggers include a single trigger that triggers the streaming of the first active frame and the second active frame.

[0088] Clause 30. A camera sensor assembly according to any one of Clauses 27 to 29, wherein the one or more triggers include a first trigger that triggers the streaming of the first active frame and a second trigger that triggers the streaming of the second active frame.

[0089] Clause 31. A camera sensor assembly according to any one of Clauses 27 to 30, wherein the first VC is associated with a first periodicity and the second VC is associated with a second periodicity.

[0090] Clause 32. A camera sensor assembly according to any one of Clauses 27 to 31, wherein the first VC and the second VC are associated with the same periodicity.

[0091] Clause 33. The camera sensor assembly according to any one of Clauses 27 to 32, the camera sensor assembly further comprising: a component for switching to a low-power mode, wherein during the low-power mode, the one or more triggers do not trigger streaming of the first active frame, the second active frame, or both.

[0092] Clause 34. The camera sensor assembly as described in Clause 33, wherein during the low power mode, the one or more triggers do not trigger the streaming of active frames associated with plane lookup (PF) or controller tracking (CT).

[0093] Clause 35. A camera sensor assembly according to any one of Clauses 27 to 34, wherein the first active frame and the second active frame are streamed via a single register.

[0094] Clause 36. The camera sensor assembly as described in Clause 35, wherein each bit of the single register is assigned to a different corresponding VC.

[0095] Clause 37. A camera sensor assembly according to any one of Clauses 27 to 36, wherein one or more of the first VC and the second VC are associated with head tracking (HET), hand tracking (HAT), plane finding (PF), controller tracking (CT), or a combination thereof.

[0096] Clause 38. A camera sensor assembly pursuant to any one of Clauses 27 to 37, wherein the one or more triggers include one or more FSIN triggers.

[0097] Clause 39. A camera sensor assembly according to any one of Clauses 27 to 38, wherein the first active frame and the second active frame are captured within the same instance of a repeating sequence.

[0098] Clause 40. A non-transitory computer-readable medium storing computer-executable instructions, which, when executed by a camera sensor assembly, cause the camera sensor assembly to: receive a first configuration of a first VC during a multi-virtual-channel (VC) configuration session, the first configuration being associated with a first merging mode; receive a second configuration of a second VC during the multi-VC configuration session, the second configuration being associated with a second merging mode; detect one or more triggers to initiate streaming of active frames associated with the first VC and the second VC; and, in response to the one or more triggers, stream the first active frame associated with the first VC according to the first merging mode, and stream the second active frame associated with the second VC according to the second merging mode.

[0099] Clause 41. The non-transitory computer-readable medium according to Clause 40, wherein the first merge mode is associated with one of a 1×1 merge, a 4×4 merge, and an 8×8 merge, or wherein the second merge mode is associated with a different one of a 1×1 merge, a 4×4 merge, and an 8×8 merge.

[0100] Clause 42. A non-transitory computer-readable medium according to any one of Clauses 40 to 41, wherein the one or more triggers include a single trigger that triggers the streaming of the first active frame and the second active frame.

[0101] Clause 43. A non-transitory computer-readable medium according to any one of Clauses 40 to 42, wherein the one or more triggers include a first trigger that triggers the streaming of the first active frame and a second trigger that triggers the streaming of the second active frame.

[0102] Clause 44. A non-transitory computer-readable medium according to any one of Clauses 40 to 43, wherein the first VC is associated with a first periodicity and the second VC is associated with a second periodicity.

[0103] Clause 45. A non-transitory computer-readable medium according to any one of Clauses 40 to 44, wherein the first VC and the second VC are associated with the same periodicity.

[0104] Clause 46. The non-transitory computer-readable medium according to any one of Clauses 40 to 45, the non-transitory computer-readable medium further comprising computer-executable instructions that, when executed by the camera sensor assembly, cause the camera sensor assembly to: switch to a low-power mode, wherein during the low-power mode, the one or more triggers do not trigger streaming of the first active frame, the second active frame, or both.

[0105] Clause 47. The non-transitory computer-readable medium as described in Clause 46, wherein during the low-power mode, the one or more triggers do not trigger the streaming of active frames associated with plane lookup (PF) or controller tracking (CT).

[0106] Clause 48. A non-transitory computer-readable medium according to any one of Clauses 40 to 47, wherein the first active frame and the second active frame are streamed via a single register.

[0107] Clause 49. A non-transitory computer-readable medium as described in Clause 48, wherein each bit of the single register is assigned to a different corresponding VC.

[0108] Clause 50. A nontransitory computer-readable medium according to any one of Clauses 40 to 49, wherein one or more of the first VC and the second VC are associated with head tracking (HET), hand tracking (HAT), plane lookup (PF), controller tracking (CT), or a combination thereof.

[0109] Clause 51. A non-transitory computer-readable medium according to any one of Clauses 40 to 50, wherein the one or more triggers comprise one or more FSIN triggers.

[0110] Clause 52. A non-transitory computer-readable medium according to any one of Clauses 40 to 51, wherein the first active frame and the second active frame are captured within the same instance of a repeating sequence.

[0111] Those skilled in the art will understand that information and signals can be represented using any of a variety of different techniques and methods. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be mentioned throughout the above description can be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, light fields or optical particles, or any combination thereof.

[0112] Furthermore, those skilled in the art will understand that the various exemplary logic blocks, modules, circuits, and algorithm steps described in connection with the aspects disclosed herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, various exemplary components, blocks, modules, circuits, and steps have been described above in general terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in different ways for each specific application, but such implementation decisions should not be construed as departing from the scope of this disclosure.

[0113] The various exemplary logic blocks, modules, and circuits described in conjunction with the aspects disclosed herein may be implemented or performed using a general-purpose processor, a digital signal processor (DSP), an ASIC, a field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but in alternative embodiments, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration.

[0114] The methods, sequences, and / or algorithms described in conjunction with the aspects disclosed herein can be embodied directly in hardware, in a software module executed by a processor, or a combination of both. The software module may reside in random access memory (RAM), flash memory, read-only memory (ROM), erasable programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), registers, hard disks, removable disks, CD-ROMs, or any other form of storage medium known in the art. Example storage media are coupled to a processor such that the processor can read information from and write information to the storage medium. Alternatively, the storage medium may be integral with the processor. The processor and storage medium may reside in an ASIC. The ASIC may reside in a user terminal (e.g., a UE). Alternatively, the processor and storage medium may reside as discrete components in the user terminal.

[0115] In one or more examples, functionality may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, functionality may be stored as one or more instructions or code on or transmitted via a computer-readable medium. Computer-readable media includes both computer storage media and communication media, including any medium that facilitates the transfer of a computer program from one place to another. Storage media may be any available medium accessible to a computer. By way of example, and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM or other optical disc storage devices, disk storage devices or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and is accessible to a computer. Furthermore, any connection is appropriately referred to as a computer-readable medium. For example, if software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included within the definition of medium. As used herein, disks and optical discs include: compact optical discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks, and Blu-ray discs. Disks typically reproduce data magnetically, while optical discs reproduce data optically using lasers. Combinations of these should also be included within the scope of computer-readable media.

[0116] While the foregoing disclosure illustrates exemplary aspects of this disclosure, it should be noted that various changes and modifications may be made herein without departing from the scope of this disclosure as defined by the appended claims. Furthermore, the functions, steps, and / or actions of the method claims according to the aspects of this disclosure described herein need not be performed in any particular order. Moreover, although elements of this disclosure may be described or claimed in the singular, the plural form may also be considered unless explicitly stated as limited to the singular.

Claims

1. A method of operating a camera sensor assembly, the method comprising: receiving a first configuration of a first virtual channel (VC) during a multi-VC configuration session, the first configuration associated with a first binning mode; receiving a second configuration of a second VC during the multi-VC configuration session, the second configuration associated with a second binning mode; after the multi-VC configuration session, detecting one or more triggers to initiate streaming of active frames associated with the first VC and the second VC; and in response to the one or more triggers, streaming first active frames associated with the first VC according to the first binning mode, and streaming second active frames associated with the second VC according to the second binning mode.

2. The method of claim 1, wherein the first binning mode is associated with a different one of 1x1 binning, 4x4 binning, and 8x8 binning, or wherein the second binning mode is associated with a different one of 1x1 binning, 4x4 binning, and 8x8 binning.

3. The method of claim 1, wherein the one or more triggers comprise a single trigger that triggers the streaming of the first active frames and the second active frames.

4. The method of claim 1, wherein the one or more triggers comprise a first trigger that triggers the streaming of the first active frames and a second trigger that triggers the streaming of the second active frames.

5. The method of claim 1, wherein the first VC is associated with a first periodicity and the second VC is associated with a second periodicity.

6. The method of claim 1, wherein the first VC and the second VC are associated with a same periodicity.

7. The method of claim 1, the method further comprising: transitioning to a low power mode, wherein during the low power mode, the one or more triggers do not trigger streaming of the first active frames, the second active frames, or both.

8. The method of claim 7, wherein during the low power mode, the one or more triggers do not trigger streaming of active frames associated with plane finding (PF) or controller tracking (CT).

9. The method of claim 1, wherein the first active frames and the second active frames are streamed via a single register.

10. The method of claim 9, wherein each bit of the single register is allocated to a different respective VC.

11. The method of claim 1, wherein one or more of the first VC and the second VC are associated with head tracking (HET), hand tracking (HAT), plane finding (PF), controller tracking (CT), or a combination thereof.

12. The method of claim 1, wherein the one or more triggers comprise one or more FSIN triggers.

13. The method of claim 1, wherein the first active frames and the second active frames are captured within a same instance of a repeating sequence.

14. A camera sensor assembly comprising: a memory; at least one transceiver; and at least one processor communicatively coupled to the memory and the at least one transceiver, the at least one processor configured to: receive, via the at least one transceiver, a first configuration of a first virtual channel (VC) during a multi-VC configuration session, the first configuration associated with a first binning mode; receive, via the at least one transceiver, a second configuration of a second VC during the multi-VC configuration session, the second configuration associated with a second binning mode; detect, after the multi-VC configuration session, one or more triggers to initiate streaming of active frames associated with the first VC and the second VC; and in response to the one or more triggers, stream first active frames associated with the first VC according to the first binning mode, and stream second active frames associated with the second VC according to the second binning mode.

15. The camera sensor assembly of claim 14, wherein the first binning mode is associated with a different one of 1x1 binning, 4x4 binning, and 8x8 binning, or wherein the second binning mode is associated with a different one of 1x1 binning, 4x4 binning, and 8x8 binning.

16. The camera sensor assembly of claim 14, wherein the one or more triggers comprise a single trigger that triggers the streaming of the first active frames and the second active frames.

17. The camera sensor assembly of claim 14, wherein the one or more triggers comprise a first trigger that triggers the streaming of the first active frames and a second trigger that triggers the streaming of the second active frames.

18. The camera sensor assembly of claim 14, wherein the first VC is associated with a first periodicity and the second VC is associated with a second periodicity.

19. The camera sensor assembly of claim 14, wherein the first VC and the second VC are associated with a same periodicity.

20. The camera sensor assembly of claim 14, wherein the at least one processor is further configured to: transition to a low power mode, wherein during the low power mode, the one or more triggers do not trigger streaming of the first active frames, the second active frames, or both.

21. The camera sensor assembly of claim 20, wherein during the low power mode, the one or more triggers do not trigger streaming of active frames associated with plane finding (PF) or controller tracking (CT).

22. The camera sensor assembly of claim 14, wherein the first active frames and the second active frames are streamed via a single register.

23. The camera sensor assembly of claim 22, wherein each bit of the single register is allocated to a different respective VC.

24. The camera sensor assembly of claim 14, wherein one or more of the first VC and the second VC are associated with head tracking (HET), hand tracking (HAT), plane finding (PF), controller tracking (CT), or a combination thereof.

25. The camera sensor assembly of claim 14, wherein the one or more triggers comprise one or more FSIN triggers.

26. The camera sensor assembly of claim 14, wherein the first active frame and the second active frame are captured within a same instance of a repeating sequence.

27. A camera sensor assembly, the camera sensor assembly comprising: means for receiving a first configuration of a first virtual channel (VC) during a multi-VC configuration session, the first configuration associated with a first merge mode; means for receiving a second configuration of a second VC during the multi-VC configuration session, the second configuration associated with a second merge mode; means for detecting one or more triggers after the multi-VC configuration session to initiate streaming of active frames associated with the first VC and the second VC; and means for streaming, responsive to the one or more triggers, a first active frame associated with the first VC according to the first merge mode and a second active frame associated with the second VC according to the second merge mode.

28. The camera sensor assembly of claim 27, wherein the first merge mode is associated with a different one of 1x1 merge, 4x4 merge, and 8x8 merge, or wherein the second merge mode is associated with a different one of 1x1 merge, 4x4 merge, and 8x8 merge.

29. A non-transitory computer-readable medium storing computer-executable instructions that, when executed by a camera sensor assembly, cause the camera sensor assembly to: receive a first configuration of a first virtual channel (VC) during a multi-VC configuration session, the first configuration associated with a first merge mode; receive a second configuration of a second VC during the multi-VC configuration session, the second configuration associated with a second merge mode; after the multi-VC configuration session, detect one or more triggers to initiate streaming of active frames associated with the first VC and the second VC; and responsive to the one or more triggers, stream a first active frame associated with the first VC according to the first merge mode, and stream a second active frame associated with the second VC according to the second merge mode.

30. The non-transitory computer-readable medium of claim 29, wherein the first merge mode is associated with a different one of 1x1 merge, 4x4 merge, and 8x8 merge, or wherein the second merge mode is associated with a different one of 1x1 merge, 4x4 merge, and 8x8 merge.

Images