System and method for firmware adaptation of NAND flash

By introducing a flash API layer and an FTL layer into the firmware control unit to manage the driver modules of different NAND flashes, the compatibility and maintenance convenience issues caused by differences in programming methods and command sequences of different NAND flashes are resolved, achieving more efficient adaptation and maintenance.

CN119597211BActive Publication Date: 2025-11-04SHENZHEN CITY TECHWIN SEMICONDUCTOR COMPANY LIMITED
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Patent Information

Application Number
CN202411574797.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-06
Publication Date
2025-11-04
Estimated Expiration
2044-11-06

AI Technical Summary

Technical Problem

The differences in programming methods and command sequences of different NAND flash memory require hardware updates when designing and using memory controllers based on different models, resulting in poor compatibility and maintenance convenience.

Method used

A firmware adaptation system is adopted, including a firmware control unit, an FTL layer, and a flash API layer. The flash API layer manages the driver modules of different NAND flashes, achieving compatibility and maintenance convenience for different NAND flashes. The FTL layer completes the mapping from host logical addresses to physical addresses and generates target command sequences to execute data processing requests.

Benefits of technology

It improves the compatibility and maintenance convenience of different NAND flash memory, reduces the frequency of controller updates, lowers maintenance costs, and enhances system adaptability and portability.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The application provides a NAND flash firmware adapting system and method, a flash API layer is used for responding to an adding operation, a first flash drive module corresponding to a first NAND flash is added in the flash API layer; the flash API layer is also used for responding to a deleting operation, a second flash drive module corresponding to a second NAND flash is deleted; and the flash API layer is also used for responding to a modifying operation, a third flash drive module corresponding to a third NAND flash is modified; the system can manage and adapt different NAND flashes based on a set of firmware control units; when it is necessary to add, delete or modify the NAND flash, the corresponding flash drive module in the flash API layer only needs to be added, deleted or modified, and the host control does not need to be updated and iterated every time the NAND flash is updated, so that the compatibility and the maintenance convenience are improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of memory, in particular to a firmware adaptation system and method of NAND flash. BACKGROUND

[0002] In the SSD (Solid State Disk) and other products using NAND flash as storage medium, with the rapid development of NAND flash, different NAND flash has different programming modes, and the NAND flash command sequence used by different NAND flash is slightly different. Therefore, when designing a storage host using NAND flash of different models, different programming modes and command sequences need to be adapted according to the changes of NAND flash, which leads to the replacement of the host when different NAND flash is used in a product, and the related hardware needs to be updated. This way has poor compatibility and poor maintenance convenience. SUMMARY

[0003] The purpose of the present application is to provide a firmware adaptation system and method of NAND flash to improve compatibility and maintenance convenience.

[0004] The firmware adaptation system of NAND flash provided by the present application comprises a firmware control unit and at least one NAND flash connected with the firmware control unit, and the firmware control unit is provided with a flash API layer; the flash API layer comprises a flash drive module corresponding to each NAND flash; the flash API layer is used to add a first flash drive module corresponding to a first NAND flash in the flash API layer in response to an adding operation of the first NAND flash; the flash API layer is used to delete a second flash drive module corresponding to a second NAND flash in the flash API layer in response to a deleting operation of the second NAND flash; and the flash API layer is used to modify a third flash drive module corresponding to a third NAND flash in the flash API layer in response to a modifying operation of the third NAND flash.

[0005] Further, the firmware control unit further comprises an FTL layer, and the FTL layer is connected with each flash drive module in the flash API layer.

[0006] Further, the flash API layer has a public input interface; the FTL layer is connected with each flash drive module in the flash API layer through the public input interface.

[0007] Further, the system further comprises: a host, a master interface module, a cache control module, an NFC, and a flash interface module which are sequentially connected in communication; the cache control module is connected with the FTL layer through the front-end module; the flash interface module is connected with each NAND flash; each flash drive module is further connected with the cache control module; the host is configured to send a data processing request to the FTL layer through the master interface module, the cache control module, and the front-end module; the FTL layer is configured to map a physical address of the FTL layer according to a logical address of the host, map a physical address of a specified NAND flash according to a preconfigured mapping relationship between the physical address of the FTL layer and the physical address of the NAND flash, determine a specified flash drive module corresponding to the specified NAND flash according to the physical address of the specified NAND flash, and establish a communication connection with the specified flash drive module; generate first information based on the data processing request, and send the first information to the specified flash drive module; the specified flash drive module is configured to generate a target command sequence based on the first information, usage instructions of the NFC, and usage instructions of the specified NAND flash, and send the target command sequence to the cache control module; and the cache control module is configured to cause the specified NAND flash to perform an operation corresponding to the data processing request based on the target command sequence through the NFC and the flash interface module.

[0008] Further, the specified flash drive module is further configured to obtain an execution result corresponding to the execution of the data processing request by the specified NAND flash, and return the execution result to the FTL layer.

[0009] Further, the specified flash drive module comprises: an information acquisition submodule and a write operation submodule; the FTL layer is configured to, if the received data processing request is a data write request, generate an operation sequence number according to the data write request, and send the operation sequence number to the information acquisition submodule; wherein the data write request carries to-be-written data; the information acquisition submodule is configured to output second information according to the operation sequence number, and return the second information to the FTL layer; wherein the second information comprises: page address information, Fine Program information and a data amount that can be written to each word line; the FTL layer is configured to generate third information according to the second information, and send the third information to the write operation submodule; wherein the third information comprises: a physical address of the FTL layer, a first data storage address, a data amount of the to-be-written data, Fine Program information and XLC operation information; the write operation submodule is configured to generate a first command sequence based on the third information, a use instruction of the NFC and a use instruction of the specified NAND flash, and send the first command sequence to the cache control module; and the cache control module is configured to write the to-be-written data in the specified NAND flash through the NFC and the flash interface module based on the first command sequence.

[0010] Further, the second information records position information corresponding to the operation sequence number.

[0011] Further, the specified flash drive module comprises: an erase operation submodule; the FTL layer is configured to, if the received data write request is a data erase instruction, generate fourth information according to the data erase instruction, and send the fourth information to the erase operation submodule; wherein the fourth information comprises: a physical address of the FTL layer, a number of to-be-erased storage blocks and XLC operation information; the erase operation submodule is configured to generate a second command sequence based on the fourth information, a use instruction of the NFC and a use instruction of the specified NAND flash, and send the second command sequence to the cache control module; and the cache control module is configured to erase data requested to be erased by the data erase instruction in the specified NAND flash based on the second command sequence.

[0012] Further, the specified flash drive module comprises: a read operation submodule; the FTL layer is configured to, if the received data processing request is a data read request, generate fifth information according to the data read request, and send the fifth information to the read operation submodule; wherein the fifth information comprises: a physical address of the FTL layer, a second data storage address, a data amount of to-be-read data and XLC operation information;

[0013] The reading operation submodule is configured to generate a third command sequence based on the fifth information, the usage specification of the NFC, the usage specification of the specified NAND flash, and send the third command sequence to the cache control module.

[0014] The cache control module is configured to read data requested by the data reading request from the specified NAND flash through the NFC and the flash interface module based on the third command sequence.

[0015] The application provides a firmware adaptation method of a NAND flash, a flash API layer is arranged in a firmware control unit; the flash API layer comprises a flash drive module corresponding to each NAND flash; the method comprises: the flash API layer adding a first flash drive module corresponding to a first NAND flash in the flash API layer in response to an adding operation of the first NAND flash; the flash API layer deleting a second flash drive module corresponding to a second NAND flash in the flash API layer in response to a deleting operation of the second NAND flash; and the flash API layer modifying a third flash drive module corresponding to a third NAND flash in the flash API layer in response to a modifying operation of the third NAND flash.

[0016] The application provides a firmware adaptation system and method of NAND flash, the system comprises a firmware control unit and at least one NAND flash connected with the firmware control unit, and the firmware control unit is provided with a flash API layer; the flash API layer comprises a flash drive module corresponding to each NAND flash; the flash API layer is used for adding a first flash drive module corresponding to a first NAND flash in the flash API layer in response to an adding operation of the first NAND flash; the flash API layer is used for deleting a second flash drive module corresponding to a second NAND flash in the flash API layer in response to a deleting operation of the second NAND flash; and the flash API layer is used for modifying a third flash drive module corresponding to a third NAND flash in the flash API layer in response to a modifying operation of the third NAND flash, so that the system can manage and adapt different NAND flashes based on a set of firmware control units, and when it is necessary to add, delete or modify the NAND flash, the corresponding flash drive module needs to be added, deleted or modified in the flash API layer, and the iteration host needs not to be updated every time the NAND flash is updated, so that the compatibility and the convenience of maintenance are improved. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the specific embodiments of the present application or the prior art, the drawings needed in the specific embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort on the basis of these drawings.

[0018] Figure 1 A schematic diagram of a firmware adaptation system of a NAND flash provided by an embodiment of the present application;

[0019] Figure 2 A schematic diagram of a firmware adaptation system of a NAND flash provided by an embodiment of the present application;

[0020] Figure 3 A structural schematic diagram of a flash drive module provided by an embodiment of the present application;

[0021] Figure 4 A schematic diagram of data interaction provided by an embodiment of the present application;

[0022] Figure 5Another schematic diagram of data interaction provided for the embodiment of the present application;

[0023] Figure 6 An interaction schematic diagram of the FTL layer and the flash API layer provided for the embodiment of the present application;

[0024] Figure 7 Another schematic diagram of data interaction provided for the embodiment of the present application;

[0025] Figure 8 Another schematic diagram of data interaction provided for the embodiment of the present application;

[0026] Figure 9 Another schematic diagram of data interaction provided for the embodiment of the present application;

[0027] Figure 10 Another schematic diagram of data interaction provided for the embodiment of the present application;

[0028] Figure 11 A flowchart of a firmware adaptation method of a NAND flash provided for the embodiment of the present application. DETAILED DESCRIPTION

[0029] The technical solutions of the present application will be described clearly and completely below in conjunction with the embodiments. Obviously, the described embodiments are a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0030] In the SSD and other products using NAND flash as storage medium, with the rapid development of NAND flash, different NAND flash has different programming methods, the current XLC compiler usually adopts one pass programming or two pass programming in the compiling process; the blocks of different NAND flash exist in the case of SLC (Single-Level Cell, single-layer storage), MLC (Multi-Level Cell, multi-layer storage), QLC (Quad-Level Cell, four-layer cell storage) mixed; and the NAND flash command sequences used by different NAND flash are slightly different. Therefore, when designing a storage host using NAND flash based on different models, different programming methods and command sequences need to be adapted according to the changes of NAND flash, which leads to the change of the host when different NAND flash is used in a product, and the related hardware needs to be updated, so the compatibility is poor and the maintenance convenience is poor. Based on this, the embodiments of the present application provide a NAND flash firmware adaptation system and method, which can be applied to application scenarios that need to adapt to multiple NAND flash.

[0031] In order to facilitate the understanding of the present embodiment, first, a NAND flash firmware adaptation system disclosed by the present embodiment is introduced, as shown in Figure 1As shown, the system includes a firmware control unit, and at least one NAND flash connected with the firmware control unit, the firmware control unit is provided with a flash API (Application Programming Interface) layer; the flash API layer includes a flash drive module corresponding to each NAND flash respectively; the NAND flash is a kind of flash memory, with the advantages of large capacity, rewriting speed, etc., suitable for mass data storage;The flash API layer can be understood as a flash operation interface layer;The flash drive module can be represented as flash DRV, for example, when reading and writing NAND flash is needed, the corresponding flash drive module is needed to connect the upper layer and the bottom layer.In actual implementation, according to the design requirements of the host, one NAND flash can be set, or multiple different NAND flashes can be set;Each NAND flash has its corresponding flash drive module, and each flash drive module is included in the flash API layer.It should be noted that the above description of the firmware control unit connected with at least one NAND flash corresponds to the physical connection, and in actual application, only one NAND flash will be selected to run when the firmware control unit runs, and other NAND flashes will not run.

[0032] The flash API layer is used to respond to the increase operation of the first NAND flash, and a first flash drive module corresponding to the first NAND flash is added in the flash API layer;In the process of maintenance management, if a new first NAND flash is to be added, the code corresponding to the first NAND flash can be added in the flash API layer, and the flash API layer responds to the increase operation, that is, the first flash drive module corresponding to the first NAND flash is added in the flash API layer.

[0033] The flash API layer is used to respond to the delete operation of the second NAND flash, and a second flash drive module corresponding to the second NAND flash is deleted in the flash API layer;In the process of maintenance management, if an existing second NAND flash is to be deleted, the code corresponding to the second NAND flash in the flash API layer can be deleted, and the flash API layer responds to the delete operation, that is, the second flash drive module corresponding to the second NAND flash is deleted in the flash API layer.

[0034] The flash API layer is used to modify the third flash drive module corresponding to the third NAND flash in the flash API layer in response to the modification operation of modifying the third NAND flash. In the maintenance management process, if the third NAND flash that has already existed needs to be modified, the code corresponding to the third NAND flash in the flash API layer can be modified, and the flash API layer can modify the third flash drive module corresponding to the third NAND flash in response to the modification operation.

[0035] The firmware adaptation system of the NAND flash described above can manage and adapt different NAND flashes based on a set of firmware control units. When it is necessary to add, delete or modify the NAND flash, it is only necessary to add, delete or modify the corresponding flash drive module in the flash API layer, and it is not necessary to update the iteration master every time the NAND flash is updated, thereby improving the compatibility and the convenience of maintenance.

[0036] Further, the firmware control unit further comprises an FTL (Flash Translation Layer) layer, and the FTL layer is connected with each flash drive module in the flash API layer. The FTL layer described above can be used to complete the mapping of the host HOST logical address space to the flash physical address space; the FTL layer is connected with each flash drive module in the flash API layer, and the connection described herein represents a physical connection. In actual application, since only one NAND flash is selected to run when the firmware control unit runs, the FTL layer will only establish communication with one flash drive module and will not establish communication with other flash drive modules.

[0037] Further, the flash API layer has a common input interface; and the FTL layer is connected with each flash drive module in the flash API layer through the common input interface.

[0038] The common input interface described above can be understood as a common external operation interface of the flash API layer; in the embodiment, the FTL layer can call the flash API layer through the common input interface, and different flash drive modules can be called according to different NAND flashes. In this way, the upper layer only needs to call the common input interface to uniformly manage different NAND flashes, thereby improving the efficiency and convenience of maintenance and management.

[0039] Further, the system further comprises: a host, a master interface module, a cache control module, an NFC (NAND Flash Controller), a flash interface module connected in sequence; the cache control module is connected with the FTL layer through the front-end module; the flash interface module is connected with each NAND flash; each flash drive module is further connected with the cache control module; and a schematic diagram of a firmware adaptation system of a NAND flash is shown in Figure 2 The host HOST can be any computer connected with the internet, etc.; the master interface module can also be referred to as a high-speed storage master interface module, which is mainly responsible for communication and data transmission with the host; the cache control module can also be referred to as an adjustable cache and control module, which is mainly responsible for managing and optimizing the data storage and reading process, improving the overall storage performance by adaptively configuring and optimizing the cache and processing architecture; the NFC is mainly used for managing and controlling the data read-write operation of the NAND flash storage device. The flash interface module is mainly responsible for communication and data exchange with the NAND flash, which usually directly interacts with the NAND flash to realize data reading and writing, etc. The front-end module can be represented as FE (Front End), which is mainly responsible for communication with the host HOST to realize various protocols, etc. It should be noted that the flash interface module is connected with each NAND flash, and the connection here represents a physical connection. In actual application, only one NAND flash is selected to run when the firmware control unit runs, and other NAND flashes do not run, that is, the flash interface module only establishes communication with one NAND flash, and does not establish communication with other NAND flashes. Another public connection interface can be set for the flash API layer, and each flash drive module is connected with the cache control module through the public connection interface.

[0040] The host is used to send a data processing request, and sends the data processing request to the FTL layer through the master interface module, the cache control module and the front-end module; the data processing request can be a data writing request, etc.; in actual implementation, the user can send the data processing request through the host, and send the data processing request to the FTL layer through the master interface module, the cache control module and the front-end module in sequence.

[0041] The FTL layer is configured to map a logical address of the host to a physical address of the FTL layer according to a mapping relationship between the logical address of the host and the physical address of the FTL layer, map a specified physical address of the NAND flash according to a mapping relationship between the physical address of the FTL layer and the physical address of the NAND flash, determine a specified flash drive module corresponding to the specified NAND flash according to the specified physical address of the NAND flash, and establish a communication connection with the specified flash drive module; the FTL layer is configured to generate first information based on the data processing request, and send the first information to the specified flash drive module;

[0042] In actual implementation, the mapping relationship between the logical address of the host and the physical address of the FTL layer is recorded in the FTL layer. When the FTL layer receives the data processing request, the FTL layer can map the physical address of the FTL layer according to the logical address of the host and the mapping relationship between the logical address of the host and the physical address of the FTL layer. The physical address of the FTL layer obtained by the FTL layer is a good block (good block), but the NAND flash has a bad block. Therefore, there is a mapping relationship between the physical address of the FTL layer and the physical address of the NAND flash. Therefore, the physical address of the specified NAND flash can be mapped according to the mapping relationship between the physical address of the FTL layer and the physical address of the NAND flash and the physical address of the FTL layer. Since the NAND flash and the flash drive module are one-to-one corresponding, the specified flash drive module corresponding to the specified NAND flash can be determined in the flash API layer. The FTL layer can establish a communication connection with the specified flash drive module. After establishing the communication connection with the specified flash drive module, the FTL layer can generate first information according to the data processing request and send the first information to the specified flash drive module. Generally, the first information corresponding to different data processing requests will be different.

[0043] The specified flash drive module is configured to generate a target command sequence based on the first information, the usage specification of the NFC, and the usage specification of the specified NAND flash, and send the target command sequence to the cache control module. The usage specification of the NFC can be represented as “usage spec of the NFC”, which is used to describe the usage mode of the NFC. The usage specification of the specified NAND flash can be represented as “usage spec of the specified NAND flash”, which is used to describe the usage mode of the specified NAND flash. In actual application, the assembled command sequence is a command sequence for identifying the NAND flash. There will be differences according to different operations and different NAND flashes.

[0044] For example, the read operation of Intel N38B QLC:

[0045] ①single plane operation the command sequence that the spec needs to send to the granule is Cmd(00h) + 2 byte Column address + 4 byte Row address + Cmd(30h) + Cmd(70h) - Read Status + Cmd(06h) + 2 byte Column address + Cmd(E0h) + DMA;

[0046] ②how to build the command to make the NFC is the command / address operation is needed according to the current NFC usage spec to decide.

[0047] Cmd---means command, the command sequence refers to the command and timing of the operation in accordance with the usage spec of the specified NAND flash. The embodiment adopts the method of firmware layer, and the flash API layer is a module in the firmware control unit. The flash API layer needs to operate the hardware NFC to interact with the specified NAND flash. Therefore, the flash API layer will collect the usage spec of the NFC and the usage spec of the specified NAND flash, which is equivalent to the role of a bridge. Specifically, the specified flash drive module in the flash API layer can generate the target command sequence based on the first information, the usage instruction of the NFC and the usage instruction of the specified NAND flash.

[0048] The cache control module is used to make the specified NAND flash execute the operation corresponding to the data processing request based on the target command sequence through the NFC and the flash interface module. The specified flash drive module can send the generated target command sequence to the cache control module. Since the usage instruction of the NFC and the usage instruction of the specified NAND flash are collected in the target command sequence, the NFC can recognize the target command sequence, and then make the specified NAND flash execute the operation corresponding to the data processing request through the flash interface module, such as write operation, read operation, etc.

[0049] The generation and assembly of the command sequence corresponding to each NAND flash are performed by the corresponding flash drive module. The commands of the array operation and the non-array operation of different NAND flashes are constructed by the interface operation of the corresponding flash drive module in the flash API layer to form the command sequence corresponding to the NAND flash.

[0050] Furthermore, the designated flash driver module is also used to obtain the execution result corresponding to the data processing request of the designated NAND flash and return the execution result to the FTL layer. In actual implementation, the designated flash driver module can also monitor the process of the data processing request of the designated NAND flash. When the execution result is detected, it can obtain the execution result and return it to the FTL layer. For example, the execution result can be successful or unsuccessful. The FTL layer can then return the execution result to the host so that the user can understand the execution status in a timely manner.

[0051] Furthermore, such as Figure 3 The diagram shows the structure of a flash driver module, which mainly includes array operations for erasing, writing, and reading, as well as other operations such as Identify Operations and Feat Operations. Figure 3 As shown, the specified flash driver module includes: an information acquisition submodule and a write operation submodule; the FTL layer is used to generate an operation sequence number based on the data write request if the received data processing request is a data write request, and send the operation sequence number to the information acquisition submodule; wherein, the data write request carries the data to be written; the information acquisition submodule is used to output second information based on the operation sequence number, and return the second information to the FTL layer; wherein, the second information includes: page address information, fine program information, and the amount of data that can be written per word line; the above page address information can be represented by "PageAddr", which can be understood as the page address information returned by the specified flash driver module for programming; the fine program information can be represented by "Fine Program Tag", which is used to indicate whether it is a fine program. Usually, in the two-pass programming method, the first pass is called the coarse program, and the second pass is called fine. The program; the amount of data that can be written for each word line can be understood as the amount of data that can be written for each WL (WordLine) in the current operation; in actual implementation, if the user sends a data write request carrying data to be written through the host, the FTL layer can generate an operation sequence number (order) based on the data write request. This operation sequence number (order) can be used to indicate the number of data write requests executed by the FTL layer; different data write requests correspond to different operation sequence numbers (order); such as Figure 4 The diagram illustrates a data interaction scenario where the FTL layer can send the operation sequence number (order) to the information acquisition submodule. The information acquisition submodule can then return secondary information to the FTL layer based on this operation sequence number, including page address information, Fine Program information, and the amount of data that can be written per word line.

[0052] The FTL layer is configured to generate third information according to the second information, and send the third information to the write operation submodule; the third information includes a physical address of the FTL layer, a first data storage address, a data amount of the data to be written, Fine Program information, and XLC operation information; the first data storage address can be understood as a buf (buffer) address of the data, i.e., a buf address of the prepared data storage; the XLC operation information is usually determined by the FTL layer, and there can be SLC operation and XLC operation in the NAND flash; the XLC operation information is used to indicate whether it is XLC operation, and is used to distinguish whether the SLC operation or the XLC operation is needed for the grain; XLC is a substitute name of MLC, TLC (Triple-Level Cell, triple-level cell storage), and QLC; as shown in another schematic diagram of data interaction, Figure 5 The FTL layer can generate third information including a physical address of the FTL layer, a first data storage address, a data amount of the data to be written, Fine Program information, and XLC operation information according to the received page address information, Fine Program information, and data amount of each word line that can be written, and send the generated third information to the write operation submodule. The physical address of the FTL layer usually includes page address information; and the data amount of the data to be written usually includes the data amount of each word line that can be written.

[0053] The write operation submodule is configured to generate a first command sequence based on the third information, the usage specification of the NFC, and the usage specification of the specified NAND flash, and send the first command sequence to the cache control module; and the cache control module is configured to write the data to be written in the specified NAND flash through the NFC and the flash interface module based on the first command sequence. In actual implementation, the first command sequence includes the usage specification of the NFC and the usage specification of the specified NAND flash, so that the NFC can recognize the first command sequence, and then write the data to be written in the specified NAND flash through the flash interface module; it should be noted that the single command execution needs to ensure the continuity of the data.

[0054] Further, the second information records position information corresponding to the operation sequence number. By recording the position information corresponding to the operation sequence number at the end position, it can be explicitly indicated that the output of the second information is completed.

[0055] For the convenience of understanding, taking the program (write) operation as an example, as shown in Figure 6An interaction diagram of one FTL layer and flash API layer is shown. When the FTL layer needs to send a write operation, the first step is to call an "information acquisition submodule" to obtain: ① page address information (corresponding to the above page address information); ② Fine Program information; and ③ the amount of data that can be written for each WL of the current operation (corresponding to the above amount of data that can be written for each word line). The "information acquisition submodule" is intended to establish a programming mode relationship table corresponding to the NAND flash spec inside the flash drive module of each different NAND flash. The programming mode relationship table contains the above three kinds of information, and the FTL layer does not perceive the change of the current programming sequence. The end position of programming can be recorded by the operation sequence number order. The second step is to call a "program operation" and input: ① the buf address of the data, that is, the buf address where the prepared data is stored (corresponding to the above first data storage address); ② the physical address of the FTL layer, which will be converted again to the physical address of the NAND flash by the flash API layer; ③ the amount of data to be written; ④ Fine Program information, that is, whether it is a fine program; and ⑤ XLC operation information. After obtaining the execution result, the FTL layer can complete the program operation. When the FTL layer records the last programming position, it does not need to perceive which page address is written to, but can be recorded according to the operation sequence number order.

[0056] Further, the flash drive module includes: an erase operation submodule; the FTL layer is used to generate a data erase instruction if a received data write request is received, generate fourth information according to the data erase instruction, and send the fourth information to the erase operation submodule; wherein the fourth information includes: the physical address of the FTL layer, the number of storage blocks to be erased, and XLC operation information;

[0057] As Figure 7 shown in another data interaction diagram, the number of storage blocks to be erased can be represented by "BlockCnt to be erased"; in actual implementation, if the user sends a data write request through the host, the FTL layer will usually judge whether there is data that needs to be erased, and if so, a data erase instruction can be generated, and the FTL layer's physical address, the number of storage blocks to be erased, and XLC operation information can be generated according to the data erase instruction to generate fourth information and sent to the erase operation submodule.

[0058] The erase operation submodule is used to generate a second command sequence based on the fourth information, the NFC usage instructions, and the usage instructions of the specified NAND flash, and send the second command sequence to the cache control module; the cache control module is used to erase the data requested to be erased by the data erase command in the specified NAND flash based on the second command sequence through the NFC and flash memory interface modules.

[0059] In actual implementation, since the second command sequence contains the instructions for using NFC and the instructions for using the specified NAND flash, NFC can recognize the second command sequence and then erase the data requested to be erased from the specified NAND flash through the flash memory interface module. It should be noted that the continuity of data must be ensured in a single command execution.

[0060] Furthermore, the specified flash driver module includes: a read operation submodule; the FTL layer is used to generate fifth information according to the data read request if the received data processing request is a data read request, and send the fifth information to the read operation submodule; wherein, the fifth information includes: the physical address of the FTL layer, the second data storage address, the amount of data to be read, and XLC operation information.

[0061] like Figure 8 The diagram shows another data interaction. The second data storage address mentioned above can be understood as the buf address where the data is stored, that is, the buf address where the data read from the array is stored. In actual implementation, if the user sends a data read request through the host, the FTL layer can generate the fifth information such as the physical address of the FTL layer, the second data storage address, the amount of data to be read, and XLC operation information according to the data read request, and send it to the read operation submodule.

[0062] The read operation submodule generates a third command sequence based on the fifth information, the NFC user manual, and the user manual of the specified NAND flash, and sends the third command sequence to the cache control module. The cache control module, based on the third command sequence, reads the data requested by the data read request from the specified NAND flash via the NFC and flash memory interface modules. In actual implementation, since the third command sequence incorporates the NFC user manual and the user manual of the specified NAND flash, the NFC can recognize the third command sequence and then read the data requested by the data read request from the specified NAND flash via the flash memory interface module. It should be noted that data continuity must be ensured during a single command execution.

[0063] The data processing request can also include other operations, such as Identify Operations, FeatOpertions, and the like, and examples are given below for Read Id and Set feat. Figure 9 As shown in another schematic diagram of data interaction, in the Read Id operation, the input provided by the FTL layer is: ① LgLunIdx, which is logical LunIdx, and refers to logical numbering of all Luns on a disk; and ② data storage buf address, data storage buf address of the read id. As shown in Figure 10 As shown in another schematic diagram of data interaction, in the Set feat operation, the input provided by the FTL layer is: ① LgLunIdx, which is logical LunIdx, and refers to logical numbering of all Luns on a disk; and ② feat option, which is an option of the feat to be used.

[0064] The firmware adaptation system of the NAND flash described above adds a flash API layer in the firmware control unit, and uses the flash API layer to adapt the differences between different NAND flashes, so that the upper layer has a reduced awareness of the NAND flash, and the adaptability and compatibility of the code are maximally guaranteed. Using code to manage and distinguish different NAND flashes has a lower cost than hardware management, and compared with existing hardware module management, the scheme has stronger variability and portability. In addition, after the flash API layer is added, the upper layer of the firmware has a reduced awareness of the NAND flash when optimizing performance, and the limitations of performance optimization are reduced. With the system, the host can maximally and quickly adapt different NAND flashes under the support of the NAND flash interface protocol, and the adaptability and compatibility of the host are improved.

[0065] The firmware adaptation system of the NAND flash described above can manage and adapt different NAND flashes with a set of firmware and host, and the firmware does not perceive the changes of the NAND flash, and the host does not need to be updated and iterated every time a NAND flash is added. Under the support of the NAND flash interface protocol of the host, all special changes of the NAND flash (such as programming mode and WL change of the block) can be maximally compatible. When a NAND flash needs to be added, deleted, or modified, only the corresponding flash driver module needs to be added, deleted, or modified, so that the maintenance cost is lower, the portability is stronger, and the management and maintenance can be more quickly and conveniently. The system uses code to compatible the differences between different NAND flashes, and the added flash API layer can maximally guarantee the adaptation of all particles under the support of the NAND flash interface protocol of the host without affecting the use of the upper layer.

[0066] The embodiment of the present application further provides a firmware adaptation method of NAND flash, a flash API layer is arranged in a firmware control unit; the flash API layer comprises a flash drive module corresponding to each NAND flash respectively; as shown in the figure, the method comprises the following steps: Figure 11

[0067] In step S1101, the flash API layer adds a first flash drive module corresponding to a first NAND flash in the flash API layer in response to an adding operation of the first NAND flash;

[0068] In step S1102, the flash API layer deletes a second flash drive module corresponding to a second NAND flash in the flash API layer in response to a deleting operation of the second NAND flash;

[0069] In step S1103, the flash API layer modifies a third flash drive module corresponding to a third NAND flash in the flash API layer in response to a modifying operation of the third NAND flash.

[0070] The firmware adaptation method of NAND flash can manage and adapt different NAND flashes based on a set of firmware control units, when it is necessary to add, delete or modify NAND flash, it is only necessary to add, delete or modify the corresponding flash drive module in the flash API layer, and it is not necessary to update the iteration master every time after updating the NAND flash, thereby improving the compatibility and the convenience of maintenance

[0071] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.​

Claims

1. A firmware adaptation system for NAND flash, characterized in that, The system includes a firmware control unit and at least one NAND flash connected to the firmware control unit. The firmware control unit is provided with a flash API layer. The flash API layer includes a flash driver module corresponding to each NAND flash. The flash API layer is used to respond to the addition operation of the first NAND flash, and to add a first flash driver module corresponding to the first NAND flash in the flash API layer; The flash API layer is used to delete the second flash driver module corresponding to the second NAND flash in response to the deletion operation of the second NAND flash; The flash API layer is used to respond to modification operations that modify the third NAND flash, and to modify the third flash driver module corresponding to the third NAND flash in the flash API layer.

2. The system according to claim 1, characterized in that, The firmware control unit also includes an FTL layer, which is connected to each flash driver module in the flash API layer.

3. The system according to claim 2, characterized in that, The flash API layer has a common input interface; The FTL layer is connected to each flash driver module in the flash API layer through the common input interface.

4. The system according to claim 2, characterized in that, The system further includes: a host, a main control interface module, a cache control module, an NFC, and a flash memory interface module that are connected in sequence. The cache control module is connected to the FTL layer through a front-end module. The flash memory interface module is connected to each NAND flash. Each flash memory driver module is also connected to the cache control module. The host is used to send data processing requests, and sends the data processing requests to the FTL layer through the main control interface module, the cache control module and the front-end module; The FTL layer is used to map the physical address of the FTL layer according to the logical address of the host, map the physical address of a specified NAND flash according to the pre-configured mapping relationship between the physical address of the FTL layer and the physical address of the NAND flash, determine the specified flash driver module corresponding to the specified NAND flash according to the physical address of the specified NAND flash, and establish a communication connection with the specified flash driver module; generate first information based on the data processing request, and send the first information to the specified flash driver module; The designated flash driver module is used to generate a target command sequence based on the first information, the NFC user manual, and the designated NAND flash user manual, and send the target command sequence to the cache control module; The cache control module is used to, based on the target command sequence, via the NFC and the flash memory interface module, cause the specified NAND flash to execute the operation corresponding to the data processing request.

5. The system according to claim 4, characterized in that, The specified flash driver module is also used to obtain the execution result corresponding to the data processing request executed by the specified NAND flash, and return the execution result to the FTL layer.

6. The system according to claim 4, characterized in that, The specified flash driver module includes: an information acquisition submodule and a write operation submodule; The FTL layer is used to generate an operation sequence number based on the data write request if the received data processing request is a data write request, and send the operation sequence number to the information acquisition submodule; wherein, the data write request carries data to be written; The information acquisition submodule is used to output second information according to the operation sequence number and return the second information to the FTL layer; wherein, the second information includes: page address information, Fine Program information and the amount of data that can be written per word line; The FTL layer is used to generate third information based on the second information and send the third information to the write operation submodule; wherein, the third information includes: the physical address of the FTL layer, the first data storage address, the amount of data to be written, Fine Program information and XLC operation information; The write operation submodule is used to generate a first command sequence based on the third information, the NFC user manual, and the user manual of the specified NAND flash, and send the first command sequence to the cache control module; The cache control module is used to write the data to be written into the specified NAND flash memory based on the first command sequence, through the NFC and the flash memory interface module.

7. The system according to claim 6, characterized in that, The second information contains the location information corresponding to the operation sequence number.

8. The system according to claim 6, characterized in that, The specified flash driver module includes: an erase operation submodule; The FTL layer is used to generate a data erase instruction upon receiving the data write request, generate fourth information based on the data erase instruction, and send the fourth information to the erase operation submodule; wherein, the fourth information includes: the physical address of the FTL layer, the number of storage blocks to be erased, and XLC operation information; The erasure operation submodule is used to generate a second command sequence based on the fourth information, the NFC usage instructions, and the usage instructions of the specified NAND flash, and send the second command sequence to the cache control module; The cache control module is used to erase the data requested to be erased by the data erasure instruction in the specified NAND flash memory based on the second command sequence, through the NFC and the flash memory interface module.

9. The system according to claim 4, characterized in that, The specified flash driver module includes: a read operation submodule; The FTL layer is used to generate fifth information based on the data read request if the received data processing request is a data read request, and send the fifth information to the read operation submodule; wherein, the fifth information includes: the physical address of the FTL layer, the second data storage address, the amount of data to be read, and XLC operation information; The read operation submodule is used to generate a third command sequence based on the fifth information, the NFC user manual, and the user manual of the specified NAND flash, and send the third command sequence to the cache control module; The cache control module is used to read the data requested by the data read request from the specified NAND flash memory based on the third command sequence, through the NFC and the flash memory interface module.

10. A firmware adaptation method for NAND flash, characterized in that, The firmware control unit includes a flash API layer; The flash API layer includes a flash driver module corresponding to each NAND flash; the method includes: In response to the addition operation of the first NAND flash, the flash API layer adds a first flash driver module corresponding to the first NAND flash in the flash API layer; In response to a deletion operation that deletes the second NAND flash, the flash API layer deletes the second flash driver module corresponding to the second NAND flash in the flash API layer. In response to a modification operation that modifies the third NAND flash, the flash API layer modifies the third flash driver module corresponding to the third NAND flash.

Citation Information

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