Display device and display control method

Abstract

The application discloses a display device and a display control method. The display device comprises a power supply system, a detector and a source driving chip. The power supply system is used for providing a common voltage and a data driving voltage for the source driving chip; the detector is used for detecting whether there is multi-frame continuous black data in the display data output by the source driving chip, and sending a display control signal to the source driving chip when there is multi-frame continuous black data; and the source driving chip is used for shorting to the common voltage according to the display control signal when the display device displays the first frame of black data, and connecting to the data driving voltage according to the display control signal when the display device displays the last frame of black data. The application reduces the dynamic power consumption of the source driving chip by adding the control of the black data power saving mode, thereby reducing the energy consumption of the display device.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display device and a display control method. BACKGROUND

[0002] With the development of display technology, users have higher and higher requirements on the energy consumption of display devices. Reducing the energy consumption of display devices helps to improve product competitiveness, promote environmental protection, prolong service life, and improve power efficiency, and therefore low-power display devices have become an important development direction of display technology. How to reduce the energy consumption of display devices is a subject that the industry has been committed to researching. SUMMARY

[0003] Embodiments of the present application provide a display device and a display control method. By adding control of a black data power saving mode, the dynamic power consumption of a source driving chip is reduced, thereby reducing the energy consumption of the display device.

[0004] Embodiments of the present application provide a display device, which comprises a power supply system, a detector, and a source driving chip; wherein,

[0005] The power supply system is configured to provide a common voltage and a data driving voltage for the source driving chip;

[0006] The detector is configured to detect whether there is multi-frame continuous black data in display data output by the source driving chip, and send a display control signal to the source driving chip when there is multi-frame continuous black data;

[0007] The source driving chip is configured to short to the common voltage according to the display control signal when the display device displays the first frame of black data, and access the data driving voltage according to the display control signal when the display device displays the last frame of black data.

[0008] Correspondingly, embodiments of the present application provide a display control method, which is applied to a display device comprising a power supply system, a detector, and a source driving chip; the display control method comprises:

[0009] The detector detects whether there is multi-frame continuous black data in display data output by the source driving chip, and sends a display control signal to the source driving chip when there is multi-frame continuous black data;

[0010] The source driving chip shorts to the common voltage provided by the power supply system according to the display control signal when the display device displays the first frame of the black data, and accesses the data driving voltage provided by the power supply system according to the display control signal when the display device displays the last frame of the black data.

[0011] In conclusion, the embodiment of the present application adds the control of the black data power saving mode. If it is detected that there is continuous black data in the display data output by the source driving chip, a display control signal is sent to the source driving chip to indicate the black data power saving mode to be turned on in the first frame of black data and to be turned off in the last frame of black data. The source driving chip shorts to the common voltage provided by the power supply system according to the display control signal when the display device displays the first frame of black data, so as to save the power consumption of the source driving chip. In addition, the source driving chip removes the short circuit between the common voltage and the data driving voltage provided by the power supply system according to the display control signal when the display device displays the last frame of black data, and accesses the data driving voltage provided by the power supply system, so as to restore the normal display of the display picture. The embodiment of the present application reduces the dynamic power consumption of the source driving chip by adding the control of the black data power saving mode, thereby reducing the energy consumption of the display device. Moreover, the embodiment of the present application can be implemented based on the existing display device, without adding new devices in the display device, and has high compatibility with the existing display device. BRIEF DESCRIPTION OF DRAWINGS

[0012] Figure 1 is a schematic diagram of a display device provided by an embodiment of the present application;

[0013] Figure 2 is a schematic diagram of at least part of the content of an image frame provided by an embodiment of the present application;

[0014] Figure 3 is a schematic diagram of row configuration information provided by an embodiment of the present application;

[0015] Figure 4 is a schematic diagram of the meaning of an instruction provided by an embodiment of the present application;

[0016] Figure 5 is a schematic diagram of a source driving chip provided by an embodiment of the present application;

[0017] Figure 6 is a schematic diagram of another source driving chip provided by an embodiment of the present application;

[0018] Figure 7 is a flowchart of a display control method provided by an embodiment of the present application;

[0019] Figure 8is a flowchart of another display control method provided by an embodiment of the present application. DETAILED DESCRIPTION

[0020] The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. The described technical solutions are only used to explain and describe the ideas of the present application, and should not be regarded as a limitation on the protection scope of the present application.

[0021] In addition, “multiple” in the embodiments of the present application refers to two or more than two. “First” and “second” and the like in the embodiments of the present application are used to distinguish different technical features, and do not represent any order, quantity or importance.

[0022] The various embodiments provided by the present application are similar, and the features in different embodiments can be combined with each other.

[0023] The description order of the following embodiments is not regarded as a limitation on the preferred order of the embodiments.

[0024] Please refer to Figure 1 , Figure 1 is a schematic diagram of a display device provided by an embodiment of the present application. As Figure 1 shown, the display device 100 includes a power supply system 110, a detector 120 and a source driving chip 130.

[0025] The power supply system 110 is used to provide a common voltage and a data driving voltage for the source driving chip 130.

[0026] The detector 120 is used to detect whether there is multi-frame continuous black data in the display data output by the source driving chip 130, and send a display control signal to the source driving chip 130 when there is multi-frame continuous black data.

[0027] The source driving chip 130 is used to short to the common voltage provided by the power supply system 110 according to the display control signal when the display device 100 displays the first frame of black data, and access to the data driving voltage provided by the power supply system 110 according to the display control signal when the display device 100 displays the last frame of black data.

[0028] The source driving chip 130, also known as Source IC (Source Integrated Circuit) or Driver IC. The source driving chip 130 includes data channels for transmitting data signals, and usually one source driving chip 130 has multiple data channels, each of which can provide data for a certain number of sub-pixels. Due to the limited number of data channels of one source driving chip 130, usually one display device 100 is driven by multiple source driving chips 130, and the number of source driving chips 130 is various, for example, 4 to 24. Alternatively, the number of source driving chips 130 is related to the horizontal resolution of the display device 100 and the number of data channels of a single source driving chip 130, for example, the number of source driving chips 130 is equal to the quotient between 3 times the horizontal resolution of the display device 100 and the number of data channels of the source driving chip 130. Exemplarily, the resolution of the display device 100 is 3840x2160, and the horizontal resolution is 3840, so a total of 11520 (3840x3) data channels are used; if a single source driving chip 130 can drive 960 data channels, then the display device 100 needs to use 12 source driving chips 130 to drive. Among them, the data channel index value of the first source driving chip 130 is 1-960, the data channel index value of the second source driving chip 130 is 961-1920, and the data channel index value corresponding to the remaining source driving chips 130 is the same. The sub-pixels driven by a single source driving chip 130 can be located in multiple lines of the display screen.

[0029] The detector 120 can be a timing controller (TCON) or a system on chip (SOC). The detector 120 can detect data transmitted in a data channel of any one or more source driving chips 130 to detect whether there is multi-frame continuous black data, such as at least two frames of continuous black data, in display data output by the source driving chip 130. In an embodiment of the present application, if the detector 120 detects that there is multi-frame continuous black data in the display content of the source driving chip 130, the detector 120 sends a display control signal to the source driving chip 130 to enable or disable a black data power down (BDPD) mode of the source driving chip 130 according to the display control signal. When the source driving chip 130 displays the first frame of black data in multi-frame black data of the display device 100, the source driving chip 130 enables the black data power down mode according to the display control signal, shorts the output of the source driving chip 130 to a common voltage provided by the power supply system 110, and saves the power consumption of the source driving chip 130. When the source driving chip 130 displays the last frame of black data in multi-frame black data of the display device 100, the source driving chip 130 removes the short circuit between the output of the source driving chip 130 and the common voltage, and controls the source driving chip 130 to access a data driving voltage provided by the power supply system 110, so as to restore the normal display of the display picture in time. The common voltage is usually less than the data driving voltage.

[0030] The enabling or disabling of the black data power down mode can be indicated in line configuration information (Line Config). In some embodiments, the detector 120 described above is further configured to, when detecting that there is multi-frame continuous black data in the display data output by the source driving chip 130, write a first bit value combination into a preset bit position combination of line configuration information corresponding to the first frame of black data, and write a second bit value combination into a preset bit position combination of line configuration information corresponding to the last frame of black data, so as to send the display control signal to the source driving chip 130. The first bit value combination is different from the second bit value combination. Based on this, the source driving chip 130 described above is further configured to, when identifying the first bit value combination in the preset bit position combination of the line configuration information, short to the common voltage provided by the power supply system 110; and when identifying the second bit value combination in the preset bit position combination of the line configuration information, access the data driving voltage provided by the power supply system 110.

[0031] The detector 120 detects that there are multiple frames of continuous black data in the display content of the source driving chip 130, and turns on the black data power saving mode in the line configuration information corresponding to the first frame of black data, and turns off the black data power saving mode in the line configuration information corresponding to the last frame of black data. In the preset bit combination of the line configuration information, the black data power saving mode is configured, and when the black data power saving mode is turned on, a first preset bit value combination can be written into the preset bit combination of the line configuration information, and when the black data power saving mode is turned off, a second preset bit value combination can be written into the preset bit combination of the line configuration information. That is, the first bit value combination is written into the preset bit combination of the line configuration information corresponding to the first frame of black data, and the second bit value combination is written into the preset bit combination of the line configuration information corresponding to the last frame of black data. The first bit value combination and the second bit value combination are different, indicating that the black data power saving mode is turned on or turned off.

[0032] Exemplarily, Figure 2 is a schematic diagram of at least part of the content of an image frame provided by an embodiment of the present application, Figure 3 is a schematic diagram of line configuration information (Line Config) corresponding to each row of data in an image frame provided by an embodiment of the present application, and the meanings of various instructions in the image frame and the line configuration information are as shown in Figure 4 . As shown in Figure 3 , the line configuration information corresponding to each row of data in the image frame includes a 1T CMD bit combination, a 1T Header bit combination, a 1T PWRC bit combination, a 1T BDPD bit combination, and a 3T Reserve bit combination. The 1T BDPD bit combination is located at the 4T of the line configuration information, and this BDPD bit combination is the preset bit combination described above, that is, the preset bit combination is located at the 4T of the line configuration information. It should be understood that 1T in the embodiments of the present application refers to one data packet.

[0033] The number of bit positions corresponding to the first bit value combination, the number of bit positions corresponding to the second bit value combination, and the number of bit positions of the preset bit combination are the same. The number of bit positions of the preset bit combination, the specific values of the first bit value combination, and the specific values of the second bit value combination are not limited in the embodiments of the present application, and can be flexibly set in actual applications according to requirements. For example, as shown in Figure 4As shown, the preset bit combination includes 9 bits. In some embodiments, the first bit value combination can be 111111111, and the second bit value combination can be 000000000; or, the first bit value combination can be 111100000, and the second bit value combination can be 000000000; or, the first bit value combination can be 100000000, and the second bit value combination can be 011111111. In actual applications, the first bit value combination and the second bit value combination can be set arbitrarily, but need to satisfy that the first bit value combination is different from the second bit value combination.

[0034] In some embodiments, the detector 120 is further configured to write the first bit value combination into the preset bit combination of the first row configuration information. The first row configuration information is the row configuration information corresponding to the first row data in the first frame of black data. That is, in the embodiments of the present application, the black data power saving mode is enabled in the row configuration information corresponding to the first row data in the first frame of black data for a plurality of frames of continuous black data.

[0035] In some embodiments, the detector 120 is further configured to write the second bit value combination into the preset bit combination of the second row configuration information. The second row configuration information is the row configuration information corresponding to the last row data in the last frame of black data. That is, in the embodiments of the present application, the black data power saving mode is disabled in the row configuration information corresponding to the last row data in the last frame of black data for a plurality of frames of continuous black data.

[0036] In some embodiments, the detector 120 is further configured to write a third bit value combination into the preset bit position combination of the third row configuration information. In this case, the third data corresponding to the third row configuration information is located between the second data corresponding to the second row configuration information and the first data corresponding to the first row configuration information, i.e., the black data corresponding to the third row configuration information is located between the black data corresponding to the second row configuration information and the black data corresponding to the first row configuration information. In the present embodiment, for the multiple frames of continuous black data, except for the row configuration information corresponding to the first row data in the first frame of black data and the row configuration information corresponding to the last row data in the last frame of black data, the preset bit position combination of the other row configuration information can be written with the third bit value combination to indicate that the black data power saving mode is maintained to be turned on. Since the third bit value combination indicates that the black data power saving mode is still in the on state, the third bit value combination should be different from the second bit value combination. Alternatively, the third bit value combination is the same as the first bit value combination; or the third bit value combination is different from the first bit value combination. For example, the first bit value combination can be 111111111, the second bit value combination can be 000000000, and the third bit value combination can be 11110000; or the first bit value combination and the third bit value combination can both be 111111111, and the second bit value combination can be 000000000.

[0037] For example, the detector 120 detects that there are N frames of continuous black data in all data channels of a certain source driving chip 130, where N is a positive integer; the detector 120 writes a first bit value combination into the preset bit position combination of the row configuration information corresponding to the first row data in the first frame of black data of the N frames of black data to indicate that the black data power saving mode is turned on; the detector 120 writes a second bit value combination into the preset bit position combination of the row configuration information corresponding to the last row data in the last frame of black data of the N frames of black data to indicate that the black data power saving mode is turned off; and the detector 120 writes a third bit value combination into the preset bit position combination of the other row configuration information of the N frames of black data to indicate that the black data power saving mode is maintained to be turned on. In this case, the third bit value combination is different from the second bit value combination, and the third bit value combination is the same as or different from the first bit value combination.

[0038] The source driver chip 130 continuously identifies preset bit combinations of row configuration information. If a first bit value combination is identified in the preset bit combinations of row configuration information, the black data power saving mode is confirmed to be enabled, and the output of the source driver chip 130 is shorted to the common voltage provided by the power supply system 110. If a second bit value combination is identified in the preset bit combinations of row configuration information, the black data power saving mode is confirmed to be disabled, the short circuit between the output of the source driver chip 130 and the common voltage is released, and the source driver chip 130 is controlled to connect to the data driving voltage provided by the power supply system 110. If a third bit value combination is identified in the preset bit combinations of row configuration information, the black data power saving mode is confirmed to remain enabled, and the short circuit between the output of the source driver chip 130 and the common voltage is maintained.

[0039] In some embodiments, such as Figure 1 As shown, the display device 100 also includes a display panel 140, such as Figure 5 As shown, the source driver chip 130 includes a logic control module 510, a switching module 520, a voltage amplification module 530, and a multiplexing module 540. The switching module 520 is connected to the logic control module 510, the power system 110, and the voltage amplification module 530. The voltage amplification module 530 is also connected to the multiplexing module 540, which in turn is connected to the power system 110. For example, as... Figure 5 As shown, the switch module 520 includes a control terminal connected to the logic control module 510, a first terminal connected to the data drive voltage VAA provided by the power supply system 110, and a second terminal connected to the first terminal of the voltage amplification module 530; the voltage amplification module 530 includes a first terminal connected to the second terminal of the switch module 520, a second terminal connected to the input voltage VIN, and a third terminal connected to the multiplexing module 540; the multiplexing module 540 includes a first input terminal connected to the third terminal of the voltage amplification module 530, a second input terminal connected to the common voltage VCOM provided by the power supply system 110, and an output terminal connected to the display panel 140.

[0040] Based on this, the logic control module 510 controls the switch module 520 to turn off and the multiplexing module 540 to short-circuit to the common voltage VCOM provided by the power system 110 when a first bit value combination is identified in the preset bit combination of the row configuration information; when a second bit value combination is identified in the preset bit combination of the row configuration information, the switch module 520 is controlled to turn on, so that the voltage amplification module 530 is connected to the data drive voltage VAA provided by the power system 110; when a third bit value combination is identified in the preset bit combination of the row configuration information, the switch module 520 is kept off and the short-circuit between the multiplexing module 540 and the common voltage VCOM is maintained. Figure 6As shown, the switch module 520 can include at least one transistor, such as a P-type thin film transistor or an N-type thin film transistor. When the switch module 520 is turned on, the data driving voltage VAA can flow into the voltage amplification module 530, and the multiplexing module 540 is disconnected from the common voltage VCOM; when the switch module 520 is turned off, the data driving voltage VAA cannot flow into the voltage amplification module 530, and the multiplexing module 540 is shorted to the common voltage VCOM. In addition, as shown Figure 6 As shown, the voltage amplification module 530 can include a plurality of amplifiers, each of which is connected to the multiplexing module 540.

[0041] In some embodiments, as shown Figure 5 As shown, the source driving chip 130 further includes a gamma voltage module 550 and a digital-to-analog conversion (DAC) module 560. The gamma voltage module 550 is connected to the logic control module 510 and the digital-to-analog conversion module 560, and the digital-to-analog conversion module 560 is further connected to the multiplexing module 540. For example, as shown Figure 5 As shown, the gamma voltage module 550 includes a first end connected to the logic control module 510, and a second end connected to a first end of the digital-to-analog conversion module 560; the digital-to-analog conversion module 560 includes a first end connected to the second end of the gamma voltage module 550, and a second end connected to the multiplexing module 540.

[0042] Based on this, the logic control module 510 is further configured to turn off the gamma voltage module 550 when the first bit value combination is identified in the preset bit position combination of the row configuration information, turn on the gamma voltage module 550 when the second bit value combination is identified in the preset bit position combination of the row configuration information, and maintain the gamma voltage module 550 off when the third bit value combination is identified in the preset bit position combination of the row configuration information. The digital-to-analog conversion module 560 converts digital signals to analog signals, and the gamma voltage module 550 provides reference voltage for the digital-to-analog conversion module 560.

[0043] In summary, the embodiment of the present application adds the control of the black data power saving mode. If it is detected that there is continuous black data in the display data output by the source driving chip, a display control signal is sent to the source driving chip to indicate the black data power saving mode to be turned on by the first frame of black data and to be turned off by the last frame of black data. The source driving chip shorts to the common voltage provided by the power supply system based on the display control signal to save the power consumption of the source driving chip when displaying the first frame of black data. In addition, the source driving chip removes the short circuit with the common voltage and connects the data driving voltage provided by the power supply system based on the display control signal when displaying the last frame of black data to restore the normal display of the display picture. The embodiment of the present application reduces the dynamic power consumption of the source driving chip by adding the control of the black data power saving mode, thereby reducing the energy consumption of the display device. Moreover, the embodiment of the present application can be implemented based on the existing display device without adding new devices in the display device, and has high compatibility with the existing display device.

[0044] In the embodiment of the present application, the black data power saving mode is configured in the preset bit combination of the line configuration information. If it is detected that there is continuous black data in all channels of the source driving chip, a first bit value combination is written into the preset bit combination of the line configuration information corresponding to the first frame of black data, such as writing the first bit value combination into the preset bit combination of the line configuration information corresponding to the first line of data in the first frame of black data to indicate the source driving chip to turn on the black data power saving mode, and a second bit value combination is written into the preset bit combination of the line configuration information corresponding to the last frame of black data, such as writing the second bit value combination into the preset bit combination of the line configuration information corresponding to the last line of data in the last frame of black data to indicate the source driving chip to turn off the black data power saving mode. The source driving chip shorts to the common voltage provided by the power supply system based on the identification of the first bit value combination to save the power consumption of the source driving chip. The source driving chip removes the short circuit with the common voltage and connects the data driving voltage provided by the power supply system based on the identification of the second bit value combination to restore the normal display of the display picture.

[0045] Please refer to Figure 7 , Figure 7 is a flow chart of a display control method provided by the embodiment of the present application. The display control method can be applied to the display device described above, which includes a power supply system, a detector and a source driving chip. As shown in Figure 7 , the display control method can include the following steps:

[0046] Step 710: The detector detects whether there is multi-frame continuous black data in the display data output by the source driving chip, and sends a display control signal to the source driving chip when there is multi-frame continuous black data;

[0047] Step 720: The source driving chip shorts to the common voltage provided by the power system according to the display control signal when the display device displays the first frame of black data, and accesses the data driving voltage provided by the power system according to the display control signal when the display device displays the last frame of black data.

[0048] In some embodiments, the step 710 includes that the detector writes a first bit value combination into a preset bit position combination of row configuration information corresponding to the first frame of black data and writes a second bit value combination into a preset bit position combination of row configuration information corresponding to the last frame of black data when detecting that there is multi-frame continuous black data in the display data output by the source driving chip; and the first bit value combination is different from the second bit value combination.

[0049] In some embodiments, the step 720 includes that the source driving chip shorts to the common voltage provided by the power system when the first bit value combination is identified in the preset bit position combination of the row configuration information; and the source driving chip accesses the data driving voltage provided by the power system when the second bit value combination is identified in the preset bit position combination of the row configuration information.

[0050] In some embodiments, the step 710 includes that the detector writes a first bit value combination into a preset bit position combination of first row configuration information; and the first row configuration information is row configuration information corresponding to first row data in the first frame of black data.

[0051] In some embodiments, the step 710 includes that the detector writes a second bit value combination into a preset bit position combination of second row configuration information; and the second row configuration information is row configuration information corresponding to last row data in the last frame of black data.

[0052] In some embodiments, the display control method further includes that the detector writes a third bit value combination into a preset bit position combination of third row configuration information; and third data corresponding to the third row configuration information in the multi-frame continuous black data is located between second data corresponding to the second row configuration information and first data corresponding to the first row configuration information; the third bit value combination is different from the second bit value combination; and the third bit value combination is the same as or different from the first bit value combination.

[0053] In some embodiments, the display control method further includes: when the source driving chip identifies the third bit value combination in the preset bit position combination of the row configuration information, the source driving chip maintains the short circuit between the common voltage.

[0054] In some embodiments, the source driving chip includes a logic control module, a switch module, a voltage amplification module, and a multiplexing module; the switch module is connected with the logic control module, a power supply system, and the voltage amplification module; the voltage amplification module is further connected with the multiplexing module; and the multiplexing module is further connected with the power supply system. The step 720 includes: when the logic control module identifies the first bit value combination in the preset bit position combination of the row configuration information, the logic control module controls the switch module to be turned off and controls the multiplexing module to be short-circuited to the common voltage; and when the logic control module identifies the second bit value combination in the preset bit position combination of the row configuration information, the logic control module controls the switch module to be turned on so that the voltage amplification module is connected to the data driving voltage.

[0055] In some embodiments, the source driving chip further includes a gamma voltage module; the gamma voltage module is connected with the logic control module. The step 720 further includes: when the logic control module identifies the first bit value combination in the preset bit position combination of the row configuration information, the logic control module turns off the gamma voltage module; and when the logic control module identifies the second bit value combination in the preset bit position combination of the row configuration information, the logic control module turns on the gamma voltage module.

[0056] In summary, the embodiments of the present application add the control of the black data power saving mode. If it is detected that there is continuous black data in the display data output by the source driving chip, a display control signal is sent to the source driving chip to indicate the black data power saving mode to be turned on in the first frame of black data and to be turned off in the last frame of black data. The source driving chip short-circuits to the common voltage provided by the power supply system when displaying the first frame of black data based on the display control signal, so as to save the power consumption of the source driving chip; in addition, the source driving chip releases the short circuit between the common voltage and the data driving voltage provided by the power supply system when displaying the last frame of black data based on the display control signal, so as to restore the normal display of the display picture. The embodiments of the present application reduce the dynamic power consumption of the source driving chip by adding the control of the black data power saving mode, thereby reducing the energy consumption of the display device; and the embodiments of the present application can be implemented based on the existing display device without adding new devices in the display device, and have high compatibility with the existing display device.

[0057] The embodiment of the present application configures the black data power saving mode in the preset bit combination of the row configuration information. If it is detected that there is continuous black data in all channels of the source driving chip, a first bit value combination is written into the preset bit combination of the row configuration information corresponding to the first row data in the first frame of black data, so as to indicate the source driving chip to open the black data power saving mode; and a second bit value combination is written into the preset bit combination of the row configuration information corresponding to the last row data in the last frame of black data, so as to indicate the source driving chip to close the black data power saving mode. The source driving chip shorts to the common voltage provided by the power supply system based on the identification of the first bit value combination, so as to save the power consumption of the source driving chip; and the source driving chip removes the short circuit with the common voltage and accesses the data driving voltage provided by the power supply system based on the identification of the second bit value combination, so as to restore the normal display of the display picture.

[0058] In the following, the display control method provided by the embodiment of the present application is introduced and described with an example.

[0059] Please refer to Figure 8 , Figure 8 is a flow chart of another display control method provided by the embodiment of the present application. As shown in Figure 8 , the display control method can include the following steps 801 to 808.

[0060] Step 801: The TCON / SOC detects whether there is N frames of continuous black data in the display content output by the source driving chip. Wherein, N is a positive integer. If it is detected that there are N frames of continuous black data, step 802 is executed, otherwise, step 801 is continuously executed.

[0061] Step 802: The TCON / SOC writes a first bit value combination into the preset bit combination of the row configuration information corresponding to the first row data in the first frame of black data, and writes a second bit value combination into the preset bit combination of the row configuration information corresponding to the last row data in the last frame of black data.

[0062] Step 803: The logic control module in the source driving chip identifies whether the preset bit combination of the row configuration information is the first bit value combination. If yes, step 804 is executed, otherwise, step 803 is continuously executed.

[0063] Step 804: The logic control module in the source driving chip controls the switch module to be turned off and the gamma voltage module to be closed.

[0064] Step 805: The multiplexing module in the source driving chip is shorted to the common voltage.

[0065] Step 806: The logic control module in the source driving chip identifies whether the second bit value combination is in the preset bit combination of the row configuration information. If yes, step 807 is executed; otherwise, step 806 is continuously executed.

[0066] Step 807: The logic control module in the source driving chip controls the switch module to be turned on, and the gamma voltage module is turned on.

[0067] Step 808: The voltage amplification module in the source driving chip is connected to the data driving voltage, and the multiplexing module is disconnected from the common voltage.

[0068] It should be understood that the display control method described above is a method embodiment corresponding to the display device described above. For the detailed description of each step of the display control method and its beneficial effects, please refer to the embodiments of the display device described above, which will not be described here.

[0069] In the above embodiments, the description of each embodiment has its own emphasis. The parts not described in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0070] The display device and the display control method provided by the embodiments of the present application are described in detail above. The principles and implementation manners of the present application are described by applying specific examples in this paper. The above description of the embodiments is only used to help understand the method of the present application and its core idea; at the same time, for those skilled in the art, according to the idea of the present application, the specific implementation manner and application range will be changed; in summary, the content of the specification should not be understood as a limitation of the present application.

Claims

1. A display device, characterized by comprising: The display device comprises a power supply system, a detector and a source driving chip; wherein, the power supply system is used for providing common voltage and data driving voltage for the source driving chip; the detector is used for detecting whether there is multi-frame continuous black data in the display data output by the source driving chip, and sending a display control signal to the source driving chip when there is multi-frame continuous black data; the source driving chip is used for shorting to the common voltage according to the display control signal when the display device displays the first frame of black data, and connecting to the data driving voltage according to the display control signal when the display device displays the last frame of black data; wherein, the detector is further used for: when detecting that there is multi-frame continuous black data in the display data output by the source driving chip, writing a first bit value combination into a preset bit position combination of row configuration information corresponding to the first frame of black data, and writing a second bit value combination into a preset bit position combination of row configuration information corresponding to the last frame of black data; wherein, the first bit value combination is different from the second bit value combination; wherein, the source driving chip is further used for: when identifying the first bit value combination in the preset bit position combination of the row configuration information, shorting to the common voltage; when identifying the second bit value combination in the preset bit position combination of the row configuration information, connecting to the data driving voltage.

2. The display device according to claim 1, wherein The detector is further used for: writing the first bit value combination into a preset bit position combination of first row configuration information; wherein, the first row configuration information is the row configuration information corresponding to the first row data in the first frame of black data.

3. The display device according to claim 2, wherein The detector is further used for: writing the second bit value combination into a preset bit position combination of second row configuration information; wherein, the second row configuration information is the row configuration information corresponding to the last row data in the last frame of black data.

4. The display device according to claim 3, wherein The detector is further used for: writing a third bit value combination into a preset bit position combination of third row configuration information; wherein, third data corresponding to the third row configuration information in the multi-frame continuous black data is located between second data corresponding to the second row configuration information and first data corresponding to the first row configuration information; the third bit value combination is different from the second bit value combination; the third bit value combination is the same as or different from the first bit value combination.

5. The display device according to claim 4, wherein The source driving chip is further used for: when identifying the third bit value combination in the preset bit position combination of the row configuration information, maintaining the shorting between the common voltage.

6. The display device according to claim 1, wherein The source driving chip comprises a logic control module, a switch module, a voltage amplification module and a multiplexing module; wherein, the switch module is connected with the logic control module, the power supply system and the voltage amplification module, the voltage amplification module is further connected with the multiplexing module, and the multiplexing module is further connected with the power supply system; The logic control module is configured to: when the first bit value combination is identified in the preset bit position combination of the row configuration information, control the switch module to be turned off and control the multiplexing module to be short-circuited to the common voltage; and when the second bit value combination is identified in the preset bit position combination of the row configuration information, control the switch module to be turned on so that the voltage amplification module is connected to the data driving voltage.

7. The display device according to claim 6, wherein The source driving chip further comprises a gamma voltage module, wherein the gamma voltage module is connected to the logic control module. The logic control module is further configured to: when the first bit value combination is identified in the preset bit position combination of the row configuration information, turn off the gamma voltage module; and when the second bit value combination is identified in the preset bit position combination of the row configuration information, turn on the gamma voltage module.

8. A display control method characterized by comprising: The display device comprises a power supply system, a detector and a source driving chip. The display control method comprises: The detector detects whether there is multi-frame continuous black data in the display data output by the source driving chip, and sends a display control signal to the source driving chip when there is multi-frame continuous black data. The source driving chip is short-circuited to the common voltage provided by the power supply system according to the display control signal when the display device displays the first frame of black data, and is connected to the data driving voltage provided by the power supply system according to the display control signal when the display device displays the last frame of black data. The detector detects whether there is multi-frame continuous black data in the display data output by the source driving chip, and sends a display control signal to the source driving chip when there is multi-frame continuous black data, which comprises: when the detector detects that there is multi-frame continuous black data in the display data output by the source driving chip, a first bit value combination is written into a preset bit position combination of row configuration information corresponding to the first frame of black data, and a second bit value combination is written into a preset bit position combination of row configuration information corresponding to the last frame of black data; wherein the first bit value combination is different from the second bit value combination. The source driving chip is short-circuited to the common voltage provided by the power supply system according to the display control signal when the display device displays the first frame of black data, and is connected to the data driving voltage provided by the power supply system according to the display control signal when the display device displays the last frame of black data, which comprises: when the first bit value combination is identified in the preset bit position combination of the row configuration information, the source driving chip is short-circuited to the common voltage provided by the power supply system; and when the second bit value combination is identified in the preset bit position combination of the row configuration information, the source driving chip is connected to the data driving voltage provided by the power supply system.

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