Display circuit and repairing method thereof, display panel and display equipment

Abstract

The invention discloses a display circuit and a repairing method thereof, a display panel and display equipment, and relates to the technical field of display panels, in the circuit, a data line of a data driving module is electrically connected with a compensation wire of an in-plane compensation module, and an in-plane isolation module is arranged between the data line and the in-plane compensation module; the in-plane isolation module is used for determining a data display signal sent by the data driving module according to a breakpoint fault of a data line, and outputting the data display signal with invariable signal gain to the compensation line; the in-plane compensation module is used for performing high-frequency gain compensation according to a data display signal after the data display signal flowing through the compensation wire is accessed, and inputting the compensated data display signal to the repair wire; the display brightness of each pixel unit electrically connected with the enabling repair line is the same as the display brightness of each pixel unit electrically connected with the normal data line. The display quality of the display panel after broken line repair is remarkably improved.

Description

Technical Field

[0001] The present application relates to the technical field of display panels, and in particular to a display circuit and a repair method thereof, a display panel, and a display device. Background Art

[0002] In the production process of display screens, vertical data line breakage is a common quality problem. Specifically, if a vertical data line is broken, although the side of the data line breakpoint connected to the COF (Chip on Film) can still display, the other side of the data line breakpoint will display poorly.

[0003] The existing display repair method usually pre-sets a repair line on the display panel. When a breakpoint is detected in the data line, the section disconnected from the data driving module at the breakpoint is connected to the repair line, and the repair line is used to replace the breakpoint section to transmit the data signal, thereby repairing the broken data line. However, since the transmission path of the data signal becomes longer after the repair, the RC (resistance-capacitance) load increases. The increase in RC load makes the high-frequency part of the data signal attenuate much more than the low-frequency part, which is reflected in the time domain as a waveform rise delay, resulting in insufficient charging of the sub-pixel unit on the repair line during the charging time, causing the repaired section to appear as an overall dark line when displayed, seriously affecting the display effect of the display panel after the repair.

[0004] In summary, how to improve the display quality after the display panel is repaired after disconnection is a technical problem that needs to be solved urgently. Summary of the invention

[0005] The main purpose of the present application is to provide a display circuit and a repair method thereof, a display panel and a display device, aiming to eliminate the weak line problem of display repair to improve the display quality.

[0006] To achieve the above-mentioned object, the present application provides a display circuit, which includes a data driving module, and an in-plane isolation module and an in-plane compensation module arranged in a non-display area of ​​a display panel;

[0007] The data line of the data driving module is electrically connected to the compensation line of the in-plane compensation module, and the in-plane isolation module is arranged between the data line and the in-plane compensation module;

[0008] The in-plane isolation module is used to determine the data display signal sent by the data driving module according to the breakpoint fault occurring in the data line, and output the data display signal with unchanged signal gain to the compensation wiring;

[0009] The in-plane compensation module is used to perform high-frequency gain compensation according to the data display signal after receiving the data display signal flowing through the compensation line, and input the compensated data display signal to the repair line, so that the display brightness of each pixel unit electrically connected to the repair line is the same as the display brightness of each pixel unit electrically connected to the normal data line; wherein,

[0010] The repair line is a data line whose data line breakpoint corresponding to the breakpoint fault is not connected to the data driving module, and the normal data line is a data line whose data line breakpoint is electrically connected to the data driving module.

[0011] In one embodiment, the in-plane isolation module includes a first thin film transistor, a first resistor, and a bias voltage terminal;

[0012] The gate terminal of the first thin film transistor is electrically connected to the data line, the first channel terminal of the first thin film transistor is electrically connected to the bias voltage terminal, the second channel terminal of the first thin film transistor is electrically connected to the first terminal of the first resistor, and the second terminal of the first resistor is grounded;

[0013] The compensation wiring is electrically connected between the second path end of the first thin film transistor and the first end of the first resistor.

[0014] In one embodiment, the in-plane compensation module includes a first capacitance unit, a second capacitance unit and a second thin film transistor;

[0015] The gate of the second thin film transistor constitutes the input end of the in-plane compensation module and is electrically connected to the compensation wiring, the first end of the first capacitance unit constitutes the connecting end of the in-plane compensation module and is electrically connected to the first path end of the second thin film transistor, and the second end of the first capacitance unit is electrically connected to the power supply end;

[0016] The output end of the first capacitance unit constitutes the output end of the in-plane compensation module and is electrically connected to a side of the breakpoint of the data line that is not connected to the data driving module;

[0017] The second channel end of the second thin film transistor is electrically connected to the input end of the second capacitance unit, and the output end of the second capacitance unit is grounded.

[0018] In one embodiment, the first capacitance unit includes a second resistor and a first capacitor;

[0019] The first end of the second resistor constitutes the first end of the first capacitive resistance unit, and is electrically connected to the first channel end of the second thin film transistor and the first end of the first capacitor respectively;

[0020] The first end of the second resistor is electrically connected to the connection node of the first end of the first capacitor to form the output end of the first capacitance unit, and is electrically connected to the side of the breakpoint of the data line that is not connected to the data driving module;

[0021] The second end of the second resistor constitutes the second end of the first capacitive resistance unit and is electrically connected to the power supply end and the second end of the first capacitor respectively.

[0022] In one embodiment, the second capacitance unit includes a third resistor and a second capacitor connected in parallel;

[0023] The first end of the third resistor connected in parallel with the second capacitor constitutes the input end of the second capacitance unit and is electrically connected to the second path end of the second thin film transistor;

[0024] The second end of the third resistor connected in parallel with the second capacitor forms an output end of the second capacitive resistance unit and is grounded.

[0025] In one embodiment, the display circuit includes a cascade component when the display panel is in high-frequency refresh, and the cascade component is provided with a plurality of the in-plane compensation modules;

[0026] The output end of the in-plane compensation module is electrically connected to the input end of an adjacent in-plane compensation module, and a third capacitor is provided between the output end of the in-plane compensation module and the adjacent in-plane compensation module;

[0027] The first end of the third capacitor is electrically connected between the output end of the in-plane compensation module and an adjacent in-plane compensation module, and the second end of the third capacitor is electrically connected to the connecting end of the adjacent in-plane compensation module.

[0028] In addition, to achieve the above-mentioned purpose, the present application also provides a method for repairing a display circuit. The method for repairing a display circuit is applied to any of the above-mentioned display circuits. The method for repairing a display circuit includes:

[0029] Determine, by means of the in-plane isolation module, a data display signal sent by the data driving module according to a breakpoint fault occurring in a data line of the data driving module, and output a data display signal with a constant signal gain to a compensation line of the in-plane compensation module;

[0030] After determining that the in-plane compensation module is connected to the data display signal flowing through the compensation line, high-frequency gain compensation is performed according to the data display signal, and the compensated data display signal is input to the repair line, so that the display brightness of each pixel unit electrically connected to the repair line is the same as the display brightness of each pixel unit electrically connected to the normal data line; wherein,

[0031] The repair line is a data line whose data line breakpoint corresponding to the breakpoint fault is not connected to the data driving module, and the normal data line is a data line whose data line breakpoint is electrically connected to the data driving module.

[0032] In one embodiment, the display circuit repair method includes:

[0033] When the display panel is in a high-frequency refresh mode, a cascade component is constructed according to each of the in-plane compensation modules and a third capacitor disposed between each of the in-plane compensation modules and an adjacent in-plane compensation module;

[0034] Based on the response made by the high-frequency refresh mode, the ideal bandwidth corresponding to the high-frequency refresh mode is determined, and the bandwidth of the data display signal flowing through the compensation line is compensated by the cascade component until the actual bandwidth of the data display signal is the same as the ideal bandwidth, and then the data display signal is output to the repair line.

[0035] In addition, to achieve the above-mentioned purpose, the present application also provides a display panel, which includes a color filter substrate, a liquid crystal layer and an array substrate, the liquid crystal layer is arranged between the array substrate and the color filter substrate, and the array substrate includes the display circuit described in any one of the above items.

[0036] In addition, to achieve the above-mentioned purpose, the present application also provides a display device, which at least includes:

[0037] The display panel mentioned above; or,

[0038] A processor, a memory, and a display circuit repair program stored in the memory and executable by the processor, wherein when the display circuit repair program is executed by the processor, the steps of any of the above-mentioned display circuit repair methods are implemented.

[0039] The present application provides a display circuit and a repair method thereof, a display panel, and a display device, which realizes display repair of a data line of a broken line in a data driving module by integrating an in-plane isolation module and an in-plane compensation module in the display circuit, thereby significantly improving the display quality of the display panel applied to the display circuit after the broken line is repaired. Specifically, the data line of the data driving module and the compensation line of the in-plane compensation module are arranged, and an in-plane isolation module is arranged between the data line and the in-plane compensation module. When it is determined that a breakpoint fault occurs in the data line of the data driving module, the in-plane isolation module provided in the present application ensures that the data display signal sent by the data driving module will not be disturbed, and then the data display signal with unchanged signal gain can be output to the compensation line, that is, the in-plane isolation module provided in the present application ensures the integrity of the data display signal during the process of being transmitted from the data driving module to the compensation line; next, since the signal transmission path of the data display signal transmitted to the repair line via the compensation line becomes longer, resulting in an increase in the RC load, the present application effectively performs high-frequency gain compensation on the data display signal transmitted via the in-plane isolation module by providing an in-plane compensation module, effectively suppresses the attenuation of the high-frequency component in the data display signal, and ensures that the compensated data display signal can fully meet the charging requirements of each pixel unit on the repair line; finally, the compensated data display signal is input into the repair line, so that the pixel units connected to the repaired data line (i.e., the repair line) are consistent in display brightness with the pixel units connected to the normal data line, ensuring the uniformity of the image display of the entire display panel, thereby significantly improving the display quality of the display panel after the break is repaired. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0041] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0042] Figure 1 It is a schematic diagram of the broken line repair structure involved in the prior art;

[0043] Figure 2 It is a comparison diagram of an ideal data input signal and a data input signal after repairing the routing;

[0044] Figure 3 is a structural block diagram of the first embodiment of the display circuit of the present application;

[0045] Figure 4It is a schematic diagram of the bilateral compensation structure involved in the embodiment of the present application;

[0046] Figure 5 It is a schematic diagram of the structure of the in-plane isolation module involved in the embodiment of the present application;

[0047] Figure 6 is an equivalent signal model diagram of the in-plane isolation module involved in the embodiment of the present application;

[0048] Figure 7 It is a schematic diagram of the structure of the in-plane compensation module involved in the embodiment of the present application;

[0049] Figure 8 is an equivalent signal model diagram of the in-plane compensation module involved in the embodiment of the present application;

[0050] Fig. 9 is a schematic diagram of the amplitude-frequency response of the data display signal after compensation involved in the embodiment of the present application;

[0051] Fig.10 It is a waveform diagram of the signal state before and after entering the compensation link involved in the embodiment of the present application;

[0052] Fig.11 It is a schematic diagram of the two-stage compensation plane structure involved in the embodiment of the present application;

[0053] Fig.12 It is an equivalent signal model diagram corresponding to the two-stage compensation in-plane structure involved in the embodiment of the present application;

[0054] Fig.13 This is a schematic diagram of the structure of the terminal device involved in the embodiment of the present application.

[0055] Description of Figure Numbers:

[0056] 10. Data driving module; 20. In-plane isolation module; 30. In-plane compensation module; 100. Display panel; L1. Compensation wiring; T1. First thin film transistor; R1. First resistor; VAA. Bias voltage terminal; RC1. First capacitance unit; RC2. Second capacitance unit; T2. Second thin film transistor; R2. Second resistor; C1. First capacitor; R3. Third resistor; C2. Second capacitor; C3. Third capacitor.

[0057] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0058] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0059] It should be noted that if the embodiments of the present application involve directional indications (such as up, down, left, right, front, back...), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0060] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present application, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or suggesting their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0061] Here, exemplary embodiments are described in detail, and examples thereof are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application.

[0062] The LCD (Liquid Crystal Display) panel is composed of data lines, scan lines, TFT (Thin Film Transistor), liquid crystal light valve, RGB (Red-Green-Blue) filter and upper and lower polarizers. The working principle is that the scan line first turns on the first row of TFTs, and then the data line sends the data voltage of each pixel in the first row to control the liquid crystal deflection angle, that is, to control the amount of light passing through the liquid crystal light valve to achieve different grayscale displays, and then pass through the RGB filter to achieve color display.

[0063] The AMOLED (Active-matrix organic light-emitting diode) panel is composed of data lines, scan lines, OLED (Organic Light-Emitting Diode) organic light-emitting diodes and power supply VDD. The working principle is that the scan line first turns on the first row of TFTs, and then the data line sends the data voltage of each pixel in the first row. The data voltage controls the current flowing through another TFT to achieve OLED brightness control. OLEDs of different colors RGB form an OLED panel array to achieve image display.

[0064] In the production process of LCD and AMOLED display panels, due to various reasons, some defective products may have breakpoints in some data lines. When the panel is lit, the data line appears as a vertical dark line and needs to be scrapped, which in turn increases cost waste and reduces production efficiency. To avoid the above situation, refer to Figure 1 , Figure 1 The invention is a schematic diagram of a broken line repairing structure involved in the prior art. Figure 1 The data lines from A to C shown are the normal output lines of COF (Chip On Flex) before the breakpoint. Figure 1 The section from B to B' shown is the repair line. Figure 1 The B→B'→C segment shown is the repair output line after the breakpoint. Specifically, the prior art sets the following on the LCD and OLED display panels: Figure 1 The repair line shown as representing repair connects a section of the broken data line at breakpoint C that is disconnected from the data driving module to the repair line, and uses the repair line to connect the section of the broken data line that is disconnected from the data driving module to the data driving module, so as to provide a data signal to the section of the broken data line that is disconnected from the data driving module, so that the section of the broken data line that is disconnected from the data driving module can be lit.

[0065] Theoretically, the data signal transmitted from the repair line to the breakpoint should be consistent with the data signal output by the data driver module. However, in actual applications, the transmission path of the repaired data signal becomes longer, resulting in a larger RC load. Its low-pass characteristic makes the high-frequency part of the signal attenuate much more than the low-frequency part, which is reflected in the rise of the waveform in the time domain. The sub-pixel unit on the repair line is not fully charged within the charging time, and the repaired section will appear as a dark line. Figure 2 , Figure 2 This is a comparison diagram of the ideal data input signal and the data input signal after the repair. Figure 2 The LA shown is an ideal data input signal. Figure 2The LB shown is the data input signal of the repaired routing. That is to say, repairing the broken data line by setting a repair line will result in poor display effect of the repaired display panel. Therefore, a voltage amplification or overshoot repair circuit based on an operational amplifier will be set on the PCBA board (Printed Circuit Board Assembly, electronic component assembly circuit board) outside the surface of the display panel. However, the use of operational amplifiers and related components will undoubtedly increase costs. In addition, due to the use of operational amplifiers and related components, there will be routing on the PCBA board. The routing on the PCBA board actually has parasitic capacitance. When the pixel frequency is high and the charging time is short, its load effect has a serious impact on the original COF output.

[0066] In order to solve the above-mentioned defects, the present application provides a display circuit and a repair method thereof, a display panel and a display device. By arranging a data line of a data driving module in the display circuit and electrically connecting the data line of the in-plane isolation module with the compensation line of the in-plane compensation module, the data line with breakpoints is effectively compensated in the plane, thereby significantly improving the display quality of the display panel applied to the display circuit after the break is repaired.

[0067] The present application embodiment provides a display circuit, referring to Figure 3 As shown, Figure 3 1 is a structural block diagram of the first embodiment of the display circuit of the present application. The display circuit includes a data driving module 10, and an in-plane isolation module 20 and an in-plane compensation module 30 arranged in a non-display area of ​​a display panel 100; the data line of the data driving module 10 is electrically connected to the compensation line L1 of the in-plane compensation module 30, and the in-plane isolation module 20 is arranged between the data line and the in-plane compensation module 30.

[0068] In this embodiment, the present application sets the data line of the data driving module 10 to be electrically connected to the compensation line L1 of the in-plane compensation module 30, and an in-plane isolation module 20 is electrically connected between the data line and the in-plane compensation module 30, so that the in-plane isolation module 20 can not only avoid the withdrawal effect of the subsequent compensation line L1 circuit on the original COF output stage (i.e., the output end of the data driving module 10), but also ensure Figure 1 The AC segment data line (i.e., the normal data line) shown in the figure ensures the normal display of each pixel unit connected to it; the in-plane isolation module 20 also ensures that the data display signal sent by the data driving module 10 will not be interfered with, and thus the data display signal with unchanged signal gain can be output to the compensation line L1; next, since the display circuit for repairing the broken data line set in the present application has more than the original data line Figure 1The AB segment dotted line (i.e., compensation line L1) shown in the figure will produce a serious low-pass effect, causing the high-frequency component in the data display signal to attenuate. The present application sets the in-plane compensation module 30 at the receiving end of the BC segment data line (i.e., the repair line) before the data display signal enters the repaired data display signal, and compensates for the high-frequency gain of the data display signal to offset the high-frequency gain of the data display signal. Figure 1 The low-pass effect brought by the dotted line in the middle AB segment effectively suppresses the attenuation of the high-frequency components in the data display signal, ensuring that the compensated data display signal can fully meet the charging requirements of each pixel unit on the repair line.

[0069] It should be noted that the unloading effect can be understood as the unloading of the original COF output stage by the subsequent compensation wiring L1 circuit, which causes the AC segment data line to access the data display signal to generate voltage fluctuations, resulting in dark lines on the AC segment data line.

[0070] The in-plane isolation module 20 is used to determine the data display signal sent by the data driving module 10 according to the breakpoint fault occurring in the data line, and output the data display signal with unchanged signal gain to the compensation line L1.

[0071] In the present embodiment, when it is determined that a breakpoint fault occurs in the data line of the data driving module 10, the in-plane isolation module 20 provided in the present application not only avoids the extraction effect of the subsequent compensation wiring L1 circuit on the original COF output stage, thereby ensuring the normal display of each pixel unit connected to the normal data line; it also ensures that the data display signal sent by the data driving module 10 will not be disturbed by the breakpoint fault during the transmission process, and can stably output a data display signal with a constant signal gain to the compensation wiring L1, thereby ensuring the integrity of the data display signal during the transmission process from the data driving module 10 to the compensation wiring L1.

[0072] The in-plane compensation module 30 is used to perform high-frequency gain compensation according to the data display signal after receiving the data display signal flowing through the compensation wiring L1, and input the compensated data display signal to the repair line, so that the display brightness of each pixel unit electrically connected to the repair line is the same as the display brightness of each pixel unit electrically connected to the normal data line; wherein the repair line is a data line whose breakpoint corresponding to the breakpoint fault is not connected to the data line of the data driving module 10, and the normal data line is a data line whose breakpoint is electrically connected to the data driving module 10.

[0073] In this embodiment, since the signal transmission path of the data display signal transmitted to the repair line via the compensation line L1 becomes longer and the RC load increases, the present application sets an in-plane compensation module 30 to effectively perform high-frequency gain compensation on the data display signal transmitted via the in-plane isolation module 20, thereby effectively suppressing the attenuation of the high-frequency components in the data display signal, and ensuring that the compensated data display signal can fully meet the charging requirements of each pixel unit on the repair line; finally, the compensated data display signal is input into the repair line, so that the pixel units connected to the repaired data line (i.e., the repair line) are consistent in display brightness with the pixel units connected to the normal data line, thereby ensuring the uniformity of the screen display of the entire display panel 100, and thereby significantly improving the display quality of the display panel 100 after the broken line is repaired.

[0074] In a specific embodiment, refer to Figure 4 , Figure 4 Schematic diagram of the bilateral compensation structure involved in the embodiment of the present application. The present application can also divide the display panel 100 into two parts according to the central axis of the display panel 100 to obtain a right panel and a left panel. For example, the data driving module 10-1 is arranged in the right panel area on the PCBA board, and the data driving module 10-2 is arranged in the left panel area on the PCBA board. The data line of the data driving module 10-1 is electrically connected to the compensation line L1-1 of the in-plane compensation module 30-1 through the in-plane isolation module 20-1, and the data line of the data driving module 10-2 is electrically connected to the compensation line L1-1 of the in-plane compensation module 30-2 through the in-plane isolation module 20-2, so that a bilateral compensation structure can be constructed. Exemplarily, when a breakpoint fault occurs in the data line of the display panel 100, the target panel area to which the data line of the breakpoint belongs is determined; when the target panel area to which the data line of the breakpoint belongs is the left panel area, a data display signal with a constant gain is output to the compensation line L1-1 through the in-plane isolation module 20-1, and the data display signal flowing through the compensation line L1 is connected through the in-plane compensation module 30-1 for high-frequency gain compensation to ensure that the compensated data display signal can fully meet the charging requirements of each pixel unit on the repair line. When the target panel area to which the data line of the breakpoint belongs is the right panel area, a data display signal with a constant gain is output to the compensation line L1-2 through the in-plane isolation module 20-2, and the data display signal flowing through the compensation line L1 is connected through the in-plane compensation module 30-2 for high-frequency gain compensation to ensure that the compensated data display signal can fully meet the charging requirements of each pixel unit on the repair line. In other words, the present application can improve the repair efficiency of the broken line of the display panel 100 by constructing the obtained bilateral compensation structure.

[0075] For example, refer to Figure 4 , Figure 4The compensation line L1-1 shown is the compensation line on the left. Figure 4 The compensation line L1-2 shown is the compensation line on the right side; when a breakpoint C appears in the surface of the display panel 100, the AC segment data line is displayed normally, and the BC segment data line is a dark line due to the lack of data input. The present application can make a laser link at the overlap of the left compensation line and the data line, and the data display signal can be sent to the BC segment data line after passing through the isolated compensation link circuit of A→B→C, so that the display brightness of each pixel unit connected to the repair line is consistent with that of each pixel unit connected to the normal data line, thereby ensuring the uniformity of the screen display of the entire display panel 100, thereby significantly improving the display quality of the display panel 100 after the break is repaired.

[0076] Further, in some feasible embodiments, referring to Figure 5 , Figure 5 : is a schematic diagram of the structure of the in-plane isolation module 20 involved in the embodiment of the present application. The in-plane isolation module 20 includes a first thin film transistor T1, a first resistor R1 and a bias voltage terminal VAA; the gate terminal of the first thin film transistor T1 is electrically connected to the data line, the first path terminal of the first thin film transistor T1 is electrically connected to the bias voltage terminal VAA, the second path terminal of the first thin film transistor T1 is electrically connected to the first end of the first resistor R1, and the second end of the first resistor R1 is grounded; the compensation line L1 is electrically connected between the second path terminal of the first thin film transistor T1 and the first end of the first resistor R1.

[0077] In this embodiment, the in-plane isolation module 20 provided in the present application introduces the VAA signal as the bias voltage of the first thin film transistor T1. Figure 5 The signal Vd1 shown is a data display signal output by the data driving module 10, also known as an input voltage transmitted by the data driving module 10 to the in-plane isolation module 20; Figure 5 The signal Vd2 shown is a data display signal with unchanged signal gain sent by the in-plane isolation module 20 to the compensation trace L1, also known as the output voltage flowing through the compensation trace L1 via the in-plane isolation module 20 and entering the in-plane compensation module 30. Exemplarily, when the voltage value of the signal Vd1 increases (decreases), the drain current of the first thin-film transistor T1 will increase (decrease), and the voltage value of the signal Vd2 will naturally increase (decrease), thereby achieving a voltage following effect and ensuring the consistency of the previous and next signals.

[0078] It should be noted that the first thin film transistor T1 provided in the present application can be replaced by a MOS tube. The above is only a feasible implementation of the present application, and the present application does not impose any limitation thereto.

[0079] In a specific embodiment, refer to Figure 6 , Figure 6 It is an equivalent signal model diagram of the in-plane isolation module 20 involved in the embodiment of the present application. Figure 6 The gm shown is the transconductance of the first thin film transistor T1, Figure 6 V1 shown is the voltage Vgs (i.e. bias voltage) of the first thin film transistor T1. Figure 6 The gmV1 shown is a controlled current source, and the current magnitude of the controlled current source is gmV1. Since the first thin film transistor T1 is provided in the in-plane isolation module 20, the input part is open-circuited, and the input impedance Ri can be determined to be ∞ (infinite), that is, Figure 3 as well as Figure 4 The data line AC segment access signal Vd1 is not affected by the load of the subsequent compensation wiring L1 circuit, ensuring that each pixel unit connected to the data line AC segment displays normally. Figure 6 It can be seen that the data shows that the signal gain of the signal is as shown in the following formula (1).

[0080]

[0081] Wherein, Gain is the signal gain of the data display signal, Rs is the resistance value of the first resistor R1, gm is the transconductance of the first thin film transistor T1, Vd1 represents the signal Vd1, i.e., the input voltage transmitted from the data driving module 10 to the in-plane isolation module 20, and Vd2 represents the signal Vd2, i.e., the output voltage flowing through the compensation line L1 via the in-plane isolation module 20 and entering the in-plane compensation module 30. In other words, in order to ensure that the data display signal with unchanged signal gain sent by the in-plane isolation module 20 to the compensation line L1, the in-plane isolation module 20 provided in the present application can gradually increase the resistance value of the first resistor R1 and the transconductance of the first thin film transistor T1, until the ratio of the product data of the resistance value Rs and the transconductance gm to the product data superimposed 1 is in the threshold range corresponding to the preset ratio threshold, then the signal Vd2 consistent with the signal Vd1 is output to the compensation line L1, thereby ensuring that the output signal Vd2 will not be distorted and has a voltage following effect.

[0082] It should be noted that the preset proportional threshold is 1, that is, when the signal gain Gain of the signal Vd2 is ≈ 1, the in-plane isolation module 20 provided in the present application has a voltage following effect, that is, the output voltage Vd2 can accurately change with the input voltage Vd1, thereby ensuring the consistency of the signal Vd1 and the signal Vd2.

[0083] Further, in some other feasible embodiments, referring to Figure 7 , Figure 7It is a schematic diagram of the structure of the in-plane compensation module 30 involved in the embodiment of the present application. The in-plane compensation module 30 includes a first capacitance unit RC1, a second capacitance unit RC2 and a second thin film transistor T2; the gate of the second thin film transistor T2 constitutes the input end of the in-plane compensation module 30 and is electrically connected to the compensation wiring L1, the first end of the first capacitance unit RC1 constitutes the connecting end of the in-plane compensation module 30 and is electrically connected to the first path end of the second thin film transistor T2, and the second end of the first capacitance unit RC1 is electrically connected to the power supply end; the output end of the first capacitance unit RC1 constitutes the output end of the in-plane compensation module 30, and is electrically connected to the side of the data line breakpoint that is not connected to the data driving module 10; the second path end of the second thin film transistor T2 is electrically connected to the input end of the second capacitance unit RC2, and the output end of the second capacitance unit RC2 is grounded.

[0084] In this embodiment, the gate of the second thin film transistor T2 is electrically connected to the compensation wiring L1 as the input end of the in-plane compensation module 30. After the second thin film transistor T2 is connected to the data display signal (i.e., signal Vd2) flowing through the compensation wiring L1 and is turned on, the DC gain (i.e., low-frequency gain) and high-frequency gain of the signal Vd2 are obtained when the signal VAA flows from the first capacitance unit RC1 through the second capacitance unit RC2 and is grounded. Based on the ratio of the high-frequency gain to the low-frequency gain, the gain compensation multiple can be accurately obtained. Next, the high-frequency component in the signal Vd2 is amplified by the gain compensation multiple to obtain the compensated data display signal (i.e., Figure 7 The signal Vr shown in the figure is used, and the compensated data display signal is input to the repair line through the output end of the first capacitor unit RC1, so that the pixel units connected to the repaired data line (i.e., the repair line) are consistent in display brightness with the pixel units connected to the normal data line, ensuring the uniformity of the picture display of the entire display panel 100, thereby significantly improving the display quality of the display panel 100 after the broken line is repaired.

[0085] Further, in some feasible embodiments, referring to Figure 7 The first capacitance unit RC1 includes a second resistor R2 and a first capacitor C1; the first end of the second resistor R2 constitutes the first end of the first capacitance unit RC1, and is electrically connected to the first path end of the second thin film transistor T2 and the first end of the first capacitor C1 respectively; the connection node at which the first end of the second resistor R2 is electrically connected to the first end of the first capacitor C1 constitutes the output end of the first capacitance unit RC1, and is electrically connected to the side of the breakpoint of the data line that is not connected to the data driving module 10; the second end of the second resistor R2 constitutes the second end of the first capacitance unit RC1, and is electrically connected to the power supply end and the second end of the first capacitor C1 respectively.

[0086] Further, in some other feasible embodiments, referring to Figure 7 The second capacitance unit RC2 includes a third resistor R3 and a second capacitor C2 in parallel; the first end of the third resistor R3 connected in parallel with the second capacitor C2 constitutes the input end of the second capacitance unit RC2, and is electrically connected to the second path end of the second thin film transistor T2; the second end of the third resistor R3 connected in parallel with the second capacitor C2 constitutes the output end of the second capacitance unit RC2 and is grounded.

[0087] In this embodiment, Figure 7 The third resistor R3 and the second capacitor C2 are respectively a source resistor and a source capacitor. Figure 7 The second resistor R2 and the first capacitor C1 shown are the output terminal parasitic resistance and the output terminal parasitic capacitance respectively. Figure 7 gm1 is the transconductance of the second thin film transistor T2. Figure 7 Vgs1 is the bias voltage of the second thin film transistor T2. Figure 7 The gm1Vgs1 shown also represents a controlled current source. Figure 8 , Figure 8 It is an equivalent signal model diagram of the in-plane compensation module 30 involved in the embodiment of the present application.

[0088] The transfer function of the in-plane compensation module 30 provided in the present application is shown in formula (2).

[0089]

[0090] Wherein, H(s) is the transfer function of the in-plane compensation module 30; RL is the resistance of the second resistor R2, i.e., the parasitic resistance; CL is the capacitance of the first capacitor C1, i.e., the parasitic capacitance; Rs1 is the resistance of the third resistor R3, i.e., the source resistance; Cs1 is the capacitance of the second capacitor C2, i.e., the source capacitance; gm1 is the transconductance of the second thin film transistor T2; s0=jw, where w is the signal frequency of the signal Vd2, s0 2 =-1.

[0091] Exemplarily, after the second thin-film transistor T2 is connected to the data display signal (i.e., signal Vd2) flowing through the compensation wiring L1 and is turned on, the signal VAA flows from the first capacitance unit RC1 through the second capacitance unit RC2 to ground. At this time, the zero point of the signal frequency can be accurately obtained according to the inverse of the product of the source resistance and the source capacitance, and the product of the transconductance gm1 and the source resistance is superimposed with a constant 1 to obtain product superposition data. According to the ratio data between the product superposition data and the product of the source resistance and the source capacitance, the main pole of the signal frequency can be accurately obtained; and then the DC gain corresponding to the zero point and the high-frequency gain corresponding to the main pole can be obtained, and the gain compensation multiple can be accurately obtained according to the ratio of the high-frequency gain to the low-frequency gain. Next, the high-frequency component in the signal Vd2 is expanded by the gain compensation multiple to obtain the compensated data display signal (i.e. Figures 7 to 8 The signal Vr shown in the figure is used, and the compensated data display signal is input to the repair line through the output end of the first capacitor unit RC1, so that the pixel units connected to the repaired data line (i.e., the repair line) are consistent in display brightness with the pixel units connected to the normal data line, ensuring the uniformity of the picture display of the entire display panel 100, thereby significantly improving the display quality of the display panel 100 after the broken line is repaired.

[0092] It should be noted that the expression corresponding to the zero point is shown in formula (3), ω z represents the zero point, Rs1 is the resistance of the third resistor R3, that is, the source resistance; Cs1 is the capacitance of the second capacitor C2.

[0093]

[0094] The expression corresponding to the main pole is shown in formula (4), ω p1 represents the main pole, Rs1 is the resistance of the third resistor R3, that is, the source resistance; Cs1 is the capacitance of the second capacitor C2.

[0095]

[0096] The expression corresponding to the gain compensation multiple is shown in formula (5), Gain DC Indicates the DC gain corresponding to the zero point, Gain HF It represents the high-frequency gain corresponding to the main pole, and Peaking represents the gain compensation multiple.

[0097]

[0098] In addition, it should be noted that the main pole can be reasonably set by adjusting the size of the third resistor R3 and the second capacitor C2. The node (i.e., the zero point) for starting to compensate the gain peak frequency needs to be selected according to the refresh rate of the panel. The frequency of the circuit's gain peak position cannot be lower than the frequency of the data signal to avoid under-compensation. The specific gain compensation multiple is also controlled by the resistance value of the third resistor R3.

[0099] The compensation bandwidth is limited by the parasitic pole, mainly by the capacitance CL of the parasitic capacitor at the output. The expression corresponding to the parasitic pole is shown in formula (6), ω p2 represents a parasitic pole, RL is the resistance of the second resistor R2, that is, the parasitic resistance; CL is the capacitance of the first capacitor C1, that is, the parasitic capacitance.

[0100]

[0101] For example, refer to Fig. 9 , Fig. 9 1 is a schematic diagram of the amplitude-frequency response of the compensated data display signal involved in the embodiment of the present application. After the second thin-film transistor T2 is connected to the data display signal (i.e., signal Vd2) flowing through the compensation line L1 and is turned on, the signal VAA flows from the first capacitance unit RC1 through the second capacitance unit RC2 and is grounded. At this time, at the zero point ω of the data display signal z According to the gain compensation multiple, the high-frequency component of the data display signal is compensated for the high-frequency gain until the high-frequency component is expanded by the gain compensation multiple, and then the main pole ω is p1 The data display signal is transmitted to the repair line as the compensated data display signal, thereby ensuring that the compensated data display signal can fully meet the charging requirements of each pixel unit on the repair line.

[0102] In summary, refer to Fig.10 , Fig.10 It is a waveform diagram of the signal state before and after entering the compensation link involved in the embodiment of the present application. Fig.10 Y0 in the figure is the ideal transmission waveform of the data display signal. The compensation line L1 set in this application has an additional line compared to the ordinary data output line. Figure 3 to Figure 4 The long AB segment shown by the dotted line leads to serious low-pass efficiency, that is, the compensation line L1 of the long AB segment is equivalent to a low-pass filter. The data sent to the repair line through the long AB segment shows the signal waveform as follows Fig.10 As shown in Yt, Fig.10There is a delay in the rising edge of the waveform of Yt. When the charging time is relatively short, the data display signal sent to the repair line via the AB long segment cannot charge each pixel unit on the repair line to the target voltage, resulting in a linear image difference. The present application sets the in-plane compensation module 30 at the receiving end of the BC segment data line (i.e., the repair line) before the data display signal enters the repaired data, and offsets the low-pass effect brought by the AB long segment compensation wiring L1 by compensating the high-frequency gain of the data display signal, thereby ensuring that the compensated data display signal can fully meet the charging requirements of each pixel unit on the repair line, and the signal transmission waveform corresponding to the compensated data display signal is as follows: Fig.10 That is to say, by providing a low-cost in-plane compensation module 30 at the receiving end of the repair line to access the data display signal output via the compensation line L1, the present application can not only achieve the compensation effect achieved by providing an external compensation circuit including an operational amplifier outside the display panel 100, but also effectively save the cost of repairing the broken line of the display panel 100, thereby improving the economic efficiency of repairing the broken line of the display panel 100.

[0103] Furthermore, in some other feasible embodiments, the display circuit includes a cascade component when the display panel 100 is in high-frequency refresh, and the cascade component is provided with a plurality of the in-plane compensation modules 30; the output end of the in-plane compensation module 30 is electrically connected to the input end of the adjacent in-plane compensation module 30, and a third capacitor C3 is provided between the output end of the in-plane compensation module 30 and the adjacent in-plane compensation module 30; the first end of the third capacitor C3 is electrically connected between the output end of the in-plane compensation module 30 and the adjacent in-plane compensation module 30, and the second end of the third capacitor C3 is electrically connected to the connecting end of the adjacent in-plane compensation module 30.

[0104] In this embodiment, the high-frequency signal Vr will lose more under the low-pass characteristics of the channel, and a higher gain is required to compensate. The third resistor R3 and the second capacitor C2 need to be made very large in terms of technology, which has certain implementation difficulties. In this application, two or three-stage in-plane compensation modules 30 can be cascaded to form a cascade component to obtain a higher gain and the implementation difficulty is not large. However, the module cascade will also reduce the compensation bandwidth, because the bandwidth of the gain compensation will be affected. Fig. 9 The parasitic pole ω shown p1Influence, at a high refresh rate, if the signal frequency of the data display signal is higher than the parasitic pole, the compensation effect cannot be achieved. Therefore, in the case of module cascade, a third capacitor C3 needs to be introduced to increase the bandwidth of the post-stage compensation link to meet the needs of line break repair of the high refresh rate panel. Exemplarily, the output end of the in-plane compensation module 30 is electrically connected to the input end of the adjacent in-plane compensation module 30, and a third capacitor C3 is provided between the output end of the in-plane compensation module 30 and the adjacent in-plane compensation module 30; the first end of the third capacitor C3 is electrically connected between the output end of the in-plane compensation module 30 and the adjacent in-plane compensation module 30, and the second end of the third capacitor C3 is electrically connected to the connecting end of the adjacent in-plane compensation module 30, thereby realizing the construction of a cascade component.

[0105] It should be noted that the third capacitor C3 can be understood as a neutralization capacitor, also called Miller capacitor (CN).

[0106] In a specific embodiment, refer to Fig.11 , Fig.11 Schematic diagram of the two-stage compensation plane structure involved in the embodiment of the present application. Fig.11 The in-plane compensation module 3030-11 shown represents a first-level in-plane compensation module; Fig.11 The in-plane compensation module 3030-12 shown represents the second-stage in-plane compensation module, and the second-stage in-plane compensation module can ignore other parts and make the second capacitance unit RC2 grounding part electrically connected to the second channel end of the second thin film transistor T2 equivalent to a simple amplifier, and Av is the amplification factor. Fig.12 , Fig.12 : is an equivalent signal model diagram corresponding to the two-stage compensation plane structure involved in the embodiment of the present application. Fig.12 The circuit shown in (a) can be used to observe the effect of the introduced third capacitor C3 on the parasitic capacitance at the output end (i.e., the first capacitor C1). The current i flowing through the third capacitor C3 is c As shown in formula (7).

[0107]

[0108] Among them, i c is the current flowing through the third capacitor C3, C N Represents the capacitance of the third capacitor C3.

[0109] According to the Miller effect of the third capacitor C3, the third capacitor C3 can be equivalent to a capacitor Ci connected in parallel to the ground at the amplifier input (ie, Vr1), and a capacitor Co connected in parallel to the ground at the amplifier output (ie, Vr2). The expression of the Miller effect is shown in formula (8).

[0110]

[0111] Exemplarily, according to the Miller effect, the neutralizing capacitor (ie, the third capacitor C3) can be equivalent to the input and output ends of the amplifier, such as Fig.12 As shown in (b), the third capacitor C3 is equivalent to the capacitance Ci at the node X, which is specifically (1-AV)CN, and the third capacitor C3 is equivalent to the capacitance Co at the node Y, which is specifically (1-1 / AV)CN. The third capacitor C3 is equivalent to the parallel connection of the capacitor Ci to the ground at the input end of the amplifier, and the parallel connection of the capacitor Co to the ground at the output end of the amplifier. If the amplifier gain AV value is greater than 1, the Ci value is negative at this time, and if the amplifier gain AV value is less than 1, the Ci value is positive at this time; if the amplifier gain AV value is between 0 and 1, the Co value is negative at this time, and if the amplifier gain AV value is less than 0 or greater than 1, the Co value is positive at this time. Then the total parallel capacitance value at the node X is C1+(1-AV)CN. That is, when CN=C1 / (AV-1), the total capacitance value at the node X is zero. Of course, as long as Av>1, the parasitic capacitance at the output end can be reduced. That is to say, the introduction of the third capacitor C3 reduces the parasitic capacitance at the output end of the previous in-plane compensation module 30 (which is also the input capacitance of the second in-plane compensation module 30), thereby increasing the parasitic pole frequency of the first-stage compensation link to compensate for the reduction in bandwidth caused by the module cascade to adapt to the repair requirements of the high refresh panel.

[0112] In summary, the present application sets an in-plane isolation module 20 with high input impedance within the plane, thereby avoiding the problem of dark lines caused by the PCBA parasitic parameters on the original COF output stage that cannot be solved by traditional external compensation, and improving the repair effect; the in-plane compensation module 30 is also set at the receiving end of the repair line to connect the data display signal transmitted via the compensation wiring L1 to the receiving end of the repair line, so that the high-frequency gain compensation of the data display signal transmitted via the compensation wiring L1 is realized in the plane of the display panel 100 by using a combination of TFT and capacitor; in addition, for the repair of broken lines of high-refresh panels, the in-plane compensation module 30 in the display circuit can also be improved, and multiple in-plane compensation modules 30 are cascaded to form a cascade component, and a third capacitor C3 (i.e., a neutralization capacitor) is set between the output end of the in-plane compensation module 30 and the adjacent in-plane compensation module 30 to expand the bandwidth to ensure that high-frequency signals can be compensated, thereby adapting to the bandwidth compensation of high-frequency input data display signals.

[0113] Furthermore, based on the first embodiment of the display circuit of the present application, a second embodiment of the display screen control method of the display circuit of the present application is proposed.

[0114] The display circuit repair method of the present application is applied to any of the above-mentioned display circuits. The display circuit repair method of the present application is executed by a terminal device that performs display repair on a broken data line of a display panel. The display circuit repair method of the present application includes the following implementation steps S10 to S20.

[0115] Step S10: determining the data display signal sent by the data driving module according to the breakpoint fault of the data line of the data driving module through the in-plane isolation module, and outputting the data display signal with unchanged signal gain to the compensation wiring of the in-plane compensation module.

[0116] In this embodiment, when it is determined that a breakpoint fault occurs in the data line of the data driving module, the in-plane isolation module provided by the present application not only avoids the loading effect of the subsequent compensation wiring circuit on the original COF output stage, thereby ensuring the normal display of each pixel unit connected to the normal data line; it also ensures that the data display signal sent by the data driving module will not be disturbed by the breakpoint fault during the transmission process, and can stably output a data display signal with a constant signal gain to the compensation wiring, thereby ensuring the integrity of the data display signal during the transmission process from the data driving module to the compensation wiring.

[0117] Step S20: After determining that the in-plane compensation module is connected to the data display signal flowing through the compensation wiring, high-frequency gain compensation is performed according to the data display signal, and the compensated data display signal is input to the repair line, so that the display brightness of each pixel unit electrically connected to the repair line is the same as the display brightness of each pixel unit electrically connected to the normal data line; wherein the repair line is a data line whose breakpoint corresponding to the breakpoint fault is not connected to the data line of the data driving module, and the normal data line is a data line whose breakpoint is electrically connected to the data driving module.

[0118] In this embodiment, since the signal transmission path of the data display signal transmitted to the repair line via the compensation routing becomes longer and the RC load increases, the present application effectively performs high-frequency gain compensation on the data display signal transmitted via the in-plane isolation module by setting an in-plane compensation module, thereby effectively suppressing the attenuation of high-frequency components in the data display signal, and ensuring that the compensated data display signal can fully meet the charging requirements of each pixel unit on the repair line; finally, the compensated data display signal is input into the repair line, so that the pixel units connected to the repaired data line (i.e., the repair line) are consistent in display brightness with the pixel units connected to the normal data line, thereby ensuring the uniformity of the display of the entire display panel, thereby significantly improving the display quality of the display panel after the break is repaired.

[0119] Furthermore, in some other feasible embodiments, the method for repairing a display circuit includes the following implementation steps B10 to B20.

[0120] Step B10: when the display panel is in a high-frequency refresh mode, a cascade component is constructed according to each of the in-plane compensation modules and a third capacitor disposed between each of the in-plane compensation modules and an adjacent in-plane compensation module.

[0121] In this embodiment, when the display panel is in high-frequency refresh mode, a cascade component is constructed by using each in-plane compensation module and the third capacitor set between each in-plane compensation module and the adjacent module. That is to say, the third capacitor set in the cascade component reduces the parasitic capacitance of the output end of the previous in-plane compensation module (also the input capacitance of the second-level in-plane compensation module), thereby increasing the parasitic pole frequency of the first-level compensation link to compensate for the reduction of bandwidth by the module cascade to meet the repair needs of the high-refresh panel.

[0122] Step B20: Based on the response made by the high-frequency refresh mode, determine the ideal bandwidth corresponding to the high-frequency refresh mode, and use the cascade component to perform bandwidth compensation on the data display signal flowing through the compensation line until the actual bandwidth of the data display signal is the same as the ideal bandwidth, and then output the data display signal to the repair line.

[0123] In this embodiment, by responding to the high-frequency refresh mode through the cascade components, the ideal bandwidth corresponding to the high-frequency refresh mode can be accurately obtained, and the bandwidth of the data display signal flowing through the compensation line is compensated by the cascade components until the actual bandwidth of the data display signal is the same as the ideal bandwidth, and then the data display signal is output to the repair line, thereby significantly improving the response speed and display effect of the display panel in the high-frequency refresh mode.

[0124] In summary, the present application provides a display circuit and a repair method thereof, a display panel, and a display device, which realizes display repair of a data line of a broken line in a data driving module by integrating an in-plane isolation module and an in-plane compensation module in the display circuit, thereby significantly improving the display quality of the display panel applied to the display circuit after the broken line is repaired. Specifically, the data line of the data driving module and the compensation line of the in-plane compensation module are arranged, and an in-plane isolation module is provided between the data line and the in-plane compensation module. When it is determined that a breakpoint fault occurs in the data line of the data driving module, the in-plane isolation module provided in the present application ensures that the data display signal sent by the data driving module will not be disturbed, and then the data display signal with unchanged signal gain can be output to the compensation line, that is, the in-plane isolation module provided in the present application ensures the integrity of the data display signal during the process of being transmitted from the data driving module to the compensation line; next, since the signal transmission path of the data display signal transmitted to the repair line via the compensation line becomes longer, resulting in an increase in the RC load, the present application effectively performs high-frequency gain compensation on the data display signal transmitted via the in-plane isolation module by providing an in-plane compensation module, effectively suppresses the attenuation of the high-frequency component in the data display signal, and ensures that the compensated data display signal can fully meet the charging requirements of each pixel unit on the repair line; finally, the compensated data display signal is input into the repair line, so that the pixel units connected to the repaired data line (i.e., the repair line) are consistent in display brightness with the pixel units connected to the normal data line, ensuring the uniformity of the image display of the entire display panel, thereby significantly improving the display quality of the display panel after the break is repaired.

[0125] In addition, the present application also provides a display panel, which includes a color filter substrate, a liquid crystal layer and an array substrate, wherein the liquid crystal layer is arranged between the array substrate and the color filter substrate, and the array substrate includes any of the display circuits described above.

[0126] In addition, the present application also provides a display device. Fig.13 , Fig.13 The structure diagram of the display device involved in the embodiment of the present application is shown in FIG. The display device in the embodiment of the present application may be a device for locally running the display circuit repair method.

[0127] like Fig.13As shown, the display device of the embodiment of the present application may include: the above-mentioned display panel; or, a processor 1001, such as a CPU, a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. Among them, the communication bus 1002 is used to realize the connection and communication between these components. The user interface 1003 may include a display screen (Display), an input unit such as a keyboard (Keyboard), and the optional user interface 1003 may also include a standard wired interface and a wireless interface. The network interface 1004 may optionally include a standard wired interface and a wireless interface (such as a Wi-Fi interface).

[0128] The memory 1005 is arranged on the display device body, and a program is stored in the memory 1005, and the program is executed by the processor 1001 to implement the corresponding operation. The memory 1005 is also used to store parameters for use by the display device. The memory 1005 can be a high-speed RAM memory, or a stable memory (non-volatile memory), such as a disk memory. The memory 1005 can also be a storage device independent of the aforementioned processor 1001.

[0129] Those skilled in the art will understand that Fig.13 The display device structure shown in the figure does not constitute a limitation on the display device, and may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently.

[0130] like Fig.13 As shown, the memory 1005 as a storage medium may include an operating system, a network communication module, a user interface module, and a repair program for a display circuit of a display device.

[0131] exist Fig.13 In the display device shown, the processor 1001 can be used to call a repair program for a display circuit of the display device stored in the memory 1005 and execute the steps of the display screen control method as described above.

[0132] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or system including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or system. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or system including the element.

[0133] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.

[0134] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium such as ROM / RAM, a magnetic disk, or an optical disk as described above, and includes a number of instructions for enabling a terminal device (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0135] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A display circuit, characterized in that: The display circuit includes a data driving module, and an in-plane isolation module and an in-plane compensation module arranged in a non-display area of ​​the display panel; The data line of the data driving module is electrically connected to the compensation line of the in-plane compensation module, and the in-plane isolation module is arranged between the data line and the in-plane compensation module; The in-plane isolation module is used to determine the data display signal sent by the data driving module according to the breakpoint fault occurring in the data line, and output the data display signal with unchanged signal gain to the compensation wiring; The in-plane compensation module is used to perform high-frequency gain compensation according to the data display signal after receiving the data display signal flowing through the compensation line, and input the compensated data display signal to the repair line, so that the display brightness of each pixel unit electrically connected to the repair line is the same as the display brightness of each pixel unit electrically connected to the normal data line; wherein, The repair line is a data line whose data line breakpoint corresponding to the breakpoint fault is not connected to the data driving module, and the normal data line is a data line whose data line breakpoint is electrically connected to the data driving module.

2. The display circuit according to claim 1, characterized in that: The in-plane isolation module includes a first thin film transistor, a first resistor and a bias voltage terminal; The gate terminal of the first thin film transistor is electrically connected to the data line, the first channel terminal of the first thin film transistor is electrically connected to the bias voltage terminal, the second channel terminal of the first thin film transistor is electrically connected to the first terminal of the first resistor, and the second terminal of the first resistor is grounded; The compensation wiring is electrically connected between the second path end of the first thin film transistor and the first end of the first resistor.

3. The display circuit according to claim 1, characterized in that: The in-plane compensation module includes a first capacitance unit, a second capacitance unit and a second thin film transistor; The gate of the second thin film transistor constitutes the input end of the in-plane compensation module and is electrically connected to the compensation wiring, the first end of the first capacitance unit constitutes the connecting end of the in-plane compensation module and is electrically connected to the first path end of the second thin film transistor, and the second end of the first capacitance unit is electrically connected to the power supply end; The output end of the first capacitance unit constitutes the output end of the in-plane compensation module and is electrically connected to a side of the breakpoint of the data line that is not connected to the data driving module; The second channel end of the second thin film transistor is electrically connected to the input end of the second capacitance unit, and the output end of the second capacitance unit is grounded.

4. The display circuit according to claim 3, characterized in that: The first capacitance unit includes a second resistor and a first capacitor; The first end of the second resistor constitutes the first end of the first capacitive resistance unit, and is electrically connected to the first channel end of the second thin film transistor and the first end of the first capacitor respectively; The first end of the second resistor is electrically connected to the connection node of the first end of the first capacitor to form the output end of the first capacitance unit, and is electrically connected to the side of the breakpoint of the data line that is not connected to the data driving module; The second end of the second resistor constitutes the second end of the first capacitive resistance unit and is electrically connected to the power supply end and the second end of the first capacitor respectively.

5. The display circuit according to claim 3, characterized in that: The second capacitance unit comprises a third resistor and a second capacitor connected in parallel; The first end of the third resistor connected in parallel with the second capacitor constitutes the input end of the second capacitance unit and is electrically connected to the second path end of the second thin film transistor; The second end of the third resistor connected in parallel with the second capacitor forms an output end of the second capacitive resistance unit and is grounded.

6. The display circuit according to claim 1, characterized in that: The display circuit includes a cascade component when the display panel is in high-frequency refresh, and the cascade component is provided with a plurality of the in-plane compensation modules; The output end of the in-plane compensation module is electrically connected to the input end of an adjacent in-plane compensation module, and a third capacitor is provided between the output end of the in-plane compensation module and the adjacent in-plane compensation module; The first end of the third capacitor is electrically connected between the output end of the in-plane compensation module and an adjacent in-plane compensation module, and the second end of the third capacitor is electrically connected to the connecting end of the adjacent in-plane compensation module.

7. A method for repairing a display circuit, characterized in that: The display circuit repair method is applied to the display circuit according to any one of claims 1 to 6, and the display circuit repair method comprises: Determine, by means of the in-plane isolation module, a data display signal sent by the data driving module according to a breakpoint fault occurring in a data line of the data driving module, and output a data display signal with a constant signal gain to a compensation line of the in-plane compensation module; After determining that the in-plane compensation module is connected to the data display signal flowing through the compensation line, high-frequency gain compensation is performed according to the data display signal, and the compensated data display signal is input to the repair line, so that the display brightness of each pixel unit electrically connected to the repair line is the same as the display brightness of each pixel unit electrically connected to the normal data line; wherein, The repair line is a data line whose data line breakpoint corresponding to the breakpoint fault is not connected to the data driving module, and the normal data line is a data line whose data line breakpoint is electrically connected to the data driving module.

8. The method for repairing a display circuit as claimed in claim 7, characterized in that: The display circuit repair method comprises: When the display panel is in a high-frequency refresh mode, a cascade component is constructed according to each of the in-plane compensation modules and a third capacitor disposed between each of the in-plane compensation modules and an adjacent in-plane compensation module; Based on the response made by the high-frequency refresh mode, the ideal bandwidth corresponding to the high-frequency refresh mode is determined, and the bandwidth of the data display signal flowing through the compensation line is compensated by the cascade component until the actual bandwidth of the data display signal is the same as the ideal bandwidth, and then the data display signal is output to the repair line.

9. A display panel, characterized in that: The display panel comprises a color filter substrate, a liquid crystal layer and an array substrate, wherein the liquid crystal layer is arranged between the array substrate and the color filter substrate, and the array substrate comprises the display circuit according to any one of claims 1 to 6.

10. A display device, characterized in that: The display device at least comprises: The display panel according to claim 9; or A processor, a memory, and a display circuit repair program stored in the memory and executable by the processor, wherein when the display circuit repair program is executed by the processor, the steps of the display circuit repair method as described in any one of claims 7 to 8 are implemented.

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