Photon counting pixel and operation method thereof

Abstract

A photosensitive pixel, a pixel array (110), and methods of operation of the photosensitive pixel and the pixel array (110). In one embodiment, a photosensitive pixel includes: a photodiode (PD); a first charge transfer gate (Tx1); a charge storage and transfer electrode (ST); a second charge transfer gate (Tx2); a sensing node (sensing node, SN); a reset gate (RS) coupled to the charge storage and transfer electrode (ST); a drain (VD1) coupled to the reset gate; and an amplifier (AMP) coupled to the sensing node. The first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the photodiode (photodiode, PD) to the charge storage and transfer electrode (ST) to allow charge transfer. The second charge transfer gate (Tx2) is controlled by a second control signal from the controller to couple the charge storage and transfer electrode (ST) to the sensing node (SN) to allow charge transfer. The second transfer gate (Tx2), the charge storage and transfer electrode (ST), and the reset gate (RS) are controlled by a third control signal from the controller to reset the potential of the sensing node, SN. The charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST), and the second charge transfer gate (Tx2), and the charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST), and the second charge transfer gate (Tx2). The transfer of charge from the photodiode (PD) to the sensing node (SN) is a complete transfer by using a charge storage and transfer electrode (ST), as opposed to a diffusion region without electrodes.

Description

Technical Field

[0001] Embodiments of the present application relate to image sensors, and more particularly, to CMOS image sensors and operating methods thereof. Background Art

[0002] Image sensors are commonly used in electronic devices in applications that involve capturing images, such as digital cameras, camcorders, webcams, cell phones, and computers.

[0003] Typically, an image sensor has an array of cells (pixels) arranged in rows and columns. Each cell contains a light-sensitive element, such as a photodiode (also called a sensor element), which generates an electrical charge in response to incident light.

[0004] In a typical conventional image sensor, the generated charge is accumulated in a charge accumulation node associated with the cell (a capacitor-like structure commonly referred to as a floating diffusion node FD). The accumulated charge in the floating diffusion node generates an output electrical signal corresponding to the light incident on the cell.

[0005] Most image sensors are charge-coupled device (CCD) image sensors or complementary metal-oxide-semiconductor (CMOS) image sensors. CCD image sensors and CMOS image sensors differ in signal readout methods and manufacturing processes.

[0006] In a CCD image sensor, the charge generated at the pixel in response to light is stored in a capacitor. The capacitors in one line are controlled to pass their charge to the adjacent capacitors in a "bucket chain" manner at one time, and the capacitors at the end of the line output their charge to the amplifier. In contrast, in a CMOS image sensor, each pixel in the array has a photodiode and a switch (e.g., a transistor). Therefore, controlling the switches in the array facilitates direct access to the signal from each pixel. Compared with CCD image sensors, CMOS image sensors are less expensive to manufacture because CMOS image sensors with control circuits can be manufactured in ordinary semiconductor manufacturing processes.

[0007] A CMOS image sensor may include a pixel array and a readout circuit for taking out image signals from the pixels. The readout circuit includes a row control circuit, a column control circuit, and a control circuit. As described above, in a CMOS image sensor, the signal from each pixel can be directly accessed by controlling the switches in the array.

[0008] The image signal corresponding to one pixel (unit) is read out by row and column by readout circuit. Typically, in a readout operation, a particular row of pixels in the array may be selected by a row control circuit, and the image signal generated by the pixels in that row may be read out column by column along the column lines by a column control circuit. An analog-to-digital conversion (ADC) circuit may be provided to convert the signal from the pixel into a digital value.

[0009] The output of the photosensitive element only responds to the intensity of light and does not provide color information. Therefore, when it is necessary to capture a color image, a color filter array (CFA) can be provided. The color filter array includes color filter elements on the pixels of the pixel array. The color filter elements can include red, green and blue color filter elements arranged in a Bayer pattern, but other colors and / or other arrangement patterns can also be used.

[0010] Recently, a photon counting sensor has been developed that can detect faint light and even count each photon. For accurate photon counting, the readout noise needs to be reduced. Summary of the invention

[0011] According to the first aspect of the present application, a photosensitive pixel is provided. According to the first implementation of the first aspect of the present application, the photosensitive pixel includes: a photodiode (PD) for generating photoelectrons; a first charge transfer gate (Tx1); a charge storage and transfer electrode (ST); a second charge transfer gate (Tx2); a sensing node (SN); a reset gate (RS) coupled to the charge storage and transfer electrode (ST); a drain (VD1) coupled to the reset gate; and an amplifier (AMP) coupled to the sensing node, wherein the first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the photodiode (PD) to the charge storage and transfer electrode (ST) to allow charge transfer; wherein the second charge transfer gate (Tx2) is controlled by a second control signal from the controller to couple the charge storage and transfer electrode (ST) to the sensing node (SN). node (SN) to allow charge transfer; wherein the second transfer gate (Tx2), the charge storage and transfer electrode (ST) and the reset gate (RS) are controlled by a third control signal from the controller to reset the potential of the sensing node (SN); wherein the charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2).

[0012] In order to transfer the charge from the photodiode (PD) to the sensing node (SN), an embodiment of the present application provides a charge storage and transfer electrode (ST) (as opposed to a diffusion region without an electrode). Therefore, the transfer of charge from the photodiode (PD) to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST), and the second charge transfer gate (Tx2) is a complete transfer. This eliminates or reduces problems caused by incomplete charge transfer, such as noise or image delay caused by the persistence (remaining) of charge in a previously captured frame. In addition, the charge transfer of this embodiment is shorter than the time required to transfer charge from a diffusion region to a sensing node via a charge transfer gate, and a shorter conversion cycle can be achieved.

[0013] Furthermore, since the only gate adjacent to the sensing node (SN) is the second charge transfer gate (Tx2), the electrostatic capacitance of the sensing node (SN) can be made smaller, which results in higher charge-to-voltage conversion efficiency.

[0014] Furthermore, except for providing the charge storing and transferring electrode (ST), no special pixel structure is required, and manufacturing is facilitated.

[0015] In addition, combining the electrostatic capacitance of the second charge transfer gate (Tx2) with the electrostatic capacitance of the sensing node (SN) can effectively increase the capacitance of the sensing node (SN). When the second charge transfer gate (Tx2) is turned off, the small capacitance of the sensing node (SN) can achieve a high conversion gain, which is suitable for detection under low light conditions. When the second charge transfer gate (Tx2) is turned on, the capacitance of the second charge transfer gate (Tx2) and the capacitance of the sensing node (see the following description) are combined. Figure 7 It produces a large effective capacitance and a low conversion gain, which is suitable for detection under bright conditions. By using high conversion gain and low conversion gain appropriately, a high dynamic range (HDR) can be achieved.

[0016] According to the second implementation of the first aspect of the present application, based on the first implementation of the first aspect of the present application, the first charge transfer gate (Tx1), the second charge transfer gate (Tx2), the reset gate (RS) and / or the charge storage and transfer electrode (ST) are formed as a MOSFET transistor.

[0017] According to a third implementation of the first aspect of the present application, based on any of the above-mentioned suitable implementations of the first aspect of the present application, the charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2) by the following steps: (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during the accumulation period; (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN); (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS); (f) turning off the reset gate (RS) to couple to the sensing node (sensing node) through an analog-to-digital converter (ADC) pair. (i) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), turning off the first charge transfer gate (Tx1), and turning off the charge storage and transfer electrode (ST); (j) turning on the second charge transfer gate (Tx2) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), and turning off the second charge transfer gate (Tx2) so that the signal charge on the charge storage and transfer electrode (ST) is coupled to the sensing node (SN) through the ADC. (k) turning on the second charge transfer gate (Tx2) to perform a second signal level AD conversion (ADs_L) ​​on the output of the amplifier coupled to the sensing node through the ADC.

[0018] In this embodiment, techniques such as correlated double sampling (CDS) for suppressing kTC noise and dual conversion gain (DCG) for expanding the dynamic range are advantageously implemented.

[0019] According to a fourth implementation of the first aspect of the present application, based on any of the above-mentioned suitable implementations of the first aspect of the present application, the charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2) by the following steps: (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during the accumulation period; (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN); node, SN); (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS); (f) turning off the reset gate (RS) to perform a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN) through an analog-to-digital converter (ADC); (h') turning on the charge storage and transfer electrode (ST); (i) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), turning off the first charge transfer gate (Tx1), and turning off the charge storage and transfer electrode (ST); (j) turning on the second charge transfer gate (Tx2) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the sensing node (sensing The invention relates to a method for performing a first signal level AD conversion (ADs_H) on an output of the amplifier coupled to the sensing node (sensing node, SN) by the ADC, and turning off the second charge transfer gate (Tx2) to perform a first signal level AD conversion (ADs_H) on an output of the amplifier coupled to the sensing node (sensing node, SN) by the ADC.

[0020] According to a fifth implementation of the first aspect of the present application, based on any of the above-mentioned suitable implementations of the first aspect of the present application, the charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2) by the following steps: (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during the accumulation period; (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN); node, SN); (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS); (f') turning off the reset gate (RS); (h') turning on the charge storage and transfer electrode (ST); (i) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), turning off the first charge transfer gate (Tx1), and turning off the charge storage and transfer electrode (ST); (j) turning on the second charge transfer gate (Tx2) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the sensing node (sensing node, SN), and turning off the second charge transfer gate (Tx2) to perform a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (sensing node, SN) through the ADC.

[0021] According to the sixth implementation of the first aspect of the present application, based on any one of the third to fifth implementations of the first aspect of the present application, during the accumulation period, the second charge transfer gate (Tx2), the charge storage and transfer electrode (ST) and the reset gate (RS) are turned off.

[0022] According to the implementation, a longer duration when the second charge transfer gate (Tx2), the charge storage and transfer electrode (ST), and the reset gate (RS) are turned off can reduce the voltage stress on the second charge transfer gate (Tx2), the charge storage and transfer electrode (ST), and the reset gate (RS) (especially on the oxides of these electrodes).

[0023] According to a seventh implementation of the first aspect of the present application, based on the first or second implementation of the first aspect of the present application, the charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2) by the following steps: (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during the accumulation period; (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN); (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS); (f) turning off the reset gate (RS) to couple to the sensing node (sensing node) through an analog-to-digital converter (ADC) pair. (g) turning on the second charge transfer gate (Tx2) to perform a second reset level AD conversion (AD0_L) on the output of the amplifier coupled to the sensing node through the ADC pair; (h) turning off the second charge transfer gate (Tx2) and turning on the charge storage and transfer electrode (ST); (i') turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), and turning off the first charge transfer gate (Tx1); (j') turning on the second charge transfer gate (Tx2) and then turning off the charge storage and transfer electrode (ST) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the second charge transfer electrode (Tx2) and the sensing node (SN) to be coupled to the sensing node (SN) through the ADC pair. (k') turning off the second charge transfer gate (Tx2) to perform a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node through the ADC.

[0024] According to this embodiment, in step (i'), after the first charge transfer gate (Tx1) is turned off, the charge storage and transfer electrode (ST) remains turned on (low). Since this causes the level of the charge storage and transfer electrode (ST) to be deeper, more charge (compared to the charge storage and transfer electrode) is stored in step (i'). Figure 7 ), and when the second charge transfer gate (Tx2) is turned on, more charges are transferred to the sensing node (SN) in step (j′).

[0025] According to an eighth implementation of the first aspect of the present application, based on any suitable implementation of the first aspect of the present application, the photosensitive pixel further includes an overflow channel (OFC) for allowing overflow charges to flow out to the drain.

[0026] According to a second aspect of the present application, a pixel array is provided. As described in the first aspect of the present application, the pixel array may include a plurality of photosensitive pixels. For example, the pixel array may include a plurality of photosensitive pixels arranged in an array of a plurality of rows and a plurality of columns, wherein each photosensitive pixel includes: a photodiode (PD) for generating photoelectrons; a first charge transfer gate (Tx1); a charge storage and transfer electrode (ST); a second charge transfer gate (Tx2); a sensing node (SN); a reset gate (RS) coupled to the charge storage and transfer electrode (ST); a drain (VD1) coupled to the reset gate; an amplifier (AMP) coupled to the sensing node, wherein the first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the photodiode (PD) to the charge storage and transfer electrode (ST) to allow charge transfer; wherein the second charge transfer gate (Tx2) is controlled by a second control signal from the controller to couple the charge storage and transfer electrode (ST) to the sensing node (sensing node). ingnode (SN) to allow charge transfer; wherein the second transfer gate (Tx2), the charge storage and transfer electrode (ST) and the reset gate (RS) are controlled by a third control signal from the controller to reset the potential of the sensing node (SN); wherein the charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2).

[0027] According to a second implementation of the second aspect of the present application, based on the first implementation of the second aspect of the present application, more than one photosensitive pixel shares the charge storage and transfer electrode (ST), the second charge transfer gate (Tx2), the sending node (SN), the reset gate (RS), the drain (VD1) and the amplifier (AMP).

[0028] According to a third implementation of the second aspect of the present application, a pixel array includes a plurality of photosensitive pixel groups, each of which includes: a plurality of photodiodes (PD) for generating photoelectrons; a plurality of first charge transfer gates (Tx1) respectively associated with the plurality of photodiodes (PD); a shared charge storage and transfer electrode (ST); a shared second charge transfer gate (Tx2); a shared sensing node (SN); a shared reset gate (RS) coupled to the charge storage and transfer electrode (ST); a shared drain (VD1) coupled to the reset gate; and a shared amplifier (AMP) coupled to the sensing node, wherein the first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the associated photodiode (PD) to the charge storage and transfer electrode (ST) to allow charge transfer; wherein the second charge transfer gate (Tx2) is controlled by a second control signal from the controller to couple the charge storage and transfer electrode (ST) to the sensing node (SN). The invention relates to a photodiode (PD) comprising a first charge transfer gate (Tx1), a charge storage and transfer electrode (ST) and a reset gate (RS) for allowing charge transfer; wherein the second transfer gate (Tx2), the charge storage and transfer electrode (ST) and the reset gate (RS) are controlled by a third control signal from the controller to reset the potential of the sensing node (SN); wherein the charge generated on each photodiode (PD) is transferred to the sensing node (SN) through the associated first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2).

[0029] According to the present embodiment, compared with the embodiment, the number of components such as transistors can be reduced without sharing components between pixels. In addition, the average pitch between pixels in the pixel array can be reduced.

[0030] According to a fourth implementation of the second aspect of the present application, based on the third implementation of the second aspect of the present application, each photosensitive pixel group includes four photodiodes and four associated first charge transfer gates.

[0031] According to the fifth implementation of the second aspect of the present application, based on the fourth implementation of the second aspect of the present application, the four photodiodes of each photosensitive pixel group are arranged in a 2×2 array, wherein the first charge transfer gate (Tx) is arranged at the corner of each photodiode facing the center of the four photodiodes, and the charge storage and transfer electrode is arranged in the center of the four photodiodes.

[0032] According to the third aspect of the present application, an image sensor is provided. The image sensor may include a pixel array and a readout circuit. According to a first implementation of the third aspect of the present application, for example, the image sensor may include a pixel array of any implementation of the second aspect of the present application; a readout circuit for reading out signals from the photosensitive pixels in the pixel array. The readout circuit includes: a vertical scanner for sequentially selecting array rows; a horizontal scanner; an analog-to-digital conversion unit. In a specific readout implementation, (i) the analog-to-digital conversion unit converts analog signals from photosensitive pixels of corresponding columns on a selected row in parallel, and the horizontal scanner sequentially selects digital values ​​of corresponding columns for output. Alternatively, in another specific readout implementation, (ii) the horizontal scanner sequentially selects analog signals from photosensitive pixels of corresponding columns, and the analog-to-digital conversion unit performs analog-to-digital conversion on the sequentially selected analog signals.

[0033] According to a second implementation of the third aspect of the present application, based on the first implementation of the third aspect of the present application, correlated double sampling (CDS) is performed, so that the difference between the value obtained by the first signal level AD conversion (ADs_H) and the value obtained by the first reset level AD conversion (AD0_H) is used as a high conversion gain signal, and the difference between the value obtained by the second signal level AD conversion (ADs_L) ​​and the value obtained by the second reset level AD conversion (AD0_L) is used as a low conversion gain signal.

[0034] According to a third implementation of the third aspect of the present application, based on the first or second implementation of the third aspect of the present application, (A) all the photodiodes are reset and an accumulation period begins; (B) the charges of the charge storage and transfer electrodes (ST) on all the pixels are cleared; (C) the sensing nodes (SN) of all the pixels are reset; (D) a reset level AD conversion (AD0_H) is performed on the first pixel row, and the second charge transfer gate (Tx2) is turned on for the first pixel row, so that the signal charge in the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), and then the second charge transfer gate (Tx2) is turned off, and then the signal level AD conversion (ADs_H) is performed on the first pixel row; (E) a reset level AD conversion (AD0_H) is performed on the second pixel row, and the second charge transfer gate (Tx2) is turned on for the second pixel row, so that the signal charge in the charge storage and transfer electrode (ST) is transferred to the sensing node (SN) node, SN), then the second charge transfer gate (Tx2) is turned off, and then the signal level AD conversion (ADs_H) is performed on the second pixel row.

[0035] According to the present embodiment, exposure is performed in steps (A), (B) and (C), and then readout of each pixel row is performed. Since at least some of the readout circuitry is shared between pixels along each vertical column, the readout of the first pixel row and the readout of the second pixel row do not occur simultaneously, but sequentially. In a global shutter scheme where all of the pixel rows are exposed simultaneously (as opposed to a rolling shutter scheme where non-pixel rows are exposed sequentially), simultaneous exposure of the entire image frame provides an advantage in that there is no time difference between pixel rows.

[0036] According to a fourth implementation of the third aspect of the present application, based on the third implementation of the third aspect of the present application, correlated double sampling (CDS) is performed, and for each pixel row, a difference between a value obtained by a corresponding signal level AD conversion (ADs_H) and a value obtained by a corresponding reset level AD conversion is determined.

[0037] According to a fifth implementation of the third aspect of the present application, based on any of the above-mentioned suitable implementations of the third aspect of the present application, the image sensor further includes: an overflow channel for releasing overflow charges from the photodiode to the drain.

[0038] In an embodiment in which exposure is performed on a plurality of pixel rows simultaneously and readout is performed sequentially on the corresponding pixel rows thereafter, time may elapse from exposure to readout. If the charge accumulated on the photodiode flows through the first charge transfer gate (Tx1) to the charge storage and transfer electrode (ST) in an off state, correct measurement cannot be performed. The overflow channel (OFC) allows the charge on the photodiode (PD) to flow to the drain and then overflow to the charge storage and transfer electrode (ST) through the first charge transfer gate, although it is in an off state. Therefore, the signal charge on the charge storage and transfer electrode (ST) is not destroyed. Therefore, global shutter operation and high conversion gain are achieved.

[0039] According to a fourth aspect of the present application, an electronic device is provided, comprising the image sensor according to any implementation of the third aspect of the present application.

[0040] According to a fifth aspect of the present application, a method for reading a signal from a photosensitive pixel or a pixel array is provided. This method provides advantages similar to those provided by the corresponding photosensitive pixel, the corresponding pixel array or the corresponding image sensor as described above. Therefore, for the sake of brevity, it will not be described here.

[0041] The photosensitive pixel may include: a photodiode (PD) for generating photoelectrons; a first charge transfer gate (Tx1); a charge storage and transfer electrode (ST); a second charge transfer gate (Tx2); a sensing node (SN); a reset gate (RS) coupled to the charge storage and transfer electrode (ST); a drain (VD1) coupled to the reset gate; and an amplifier (AMP) coupled to the sensing node. According to a first implementation of the fifth aspect of the present application, the method includes: (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during an accumulation period; and (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN). node, SN); (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS); (f1) turning off the reset gate (RS); (h2) turning on the charge storage and transfer electrode (ST); (i) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), turning off the first charge transfer gate (Tx1), and turning off the charge storage and transfer electrode (ST); (j) turning on the second charge transfer gate (Tx2) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the sensing node (sensing node, SN), turning off the second charge transfer gate (Tx2), and performing a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (sensing node, SN) through the ADC.

[0042] This corresponds to an embodiment that requires neither correlated double sampling (CDS) nor dual conversion gain (DCG).

[0043] According to the second implementation of the fifth aspect of the present application, based on the first implementation of the fifth aspect of the present application, the method also includes, after the step (f1) of turning off the reset gate (RS): (f2) performing a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN) through an analog-to-digital converter (ADC).

[0044] This implementation supports correlated double sampling (CDS).

[0045] According to the third implementation of the fifth aspect of the present application, based on the second implementation of the fifth aspect of the present application, the method also includes, after (f2): (g) turning on the second charge transfer gate (Tx2), and performing a second reset level AD conversion (AD0_L) on the output of the amplifier coupled to the sensing node through the ADC; (h1) turning off the second charge transfer gate (Tx2); and the method also includes, after (j), (k) turning on the second charge transfer gate (Tx2), and performing a second signal level AD conversion (ADs_L) ​​on the output of the amplifier coupled to the sensing node through the ADC.

[0046] This implementation supports correlated double sampling (CDS) and dual conversion gain (DCG).

[0047] According to the fourth implementation of the fifth aspect of the present application, based on any of the above-mentioned suitable implementations of the fifth aspect of the present application, during the accumulation period, the second charge transfer gate (Tx2), the charge storage and transfer electrode (ST) and the reset gate (RS) are turned off.

[0048] According to a fifth implementation of the fifth aspect of the present application, a method for reading a signal from a photosensitive pixel is provided, wherein the photosensitive pixel comprises: a photodiode (PD) for generating photoelectrons; a first charge transfer gate (Tx1); a charge storage and transfer electrode (ST); a second charge transfer gate (Tx2); a sensing node (SN); a reset gate (RS) coupled to the charge storage and transfer electrode (ST); a drain (VD1) coupled to the reset gate; and an amplifier (AMP) coupled to the sensing node.The method comprises: (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during an accumulation period; (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN); (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS); (f) turning off the reset gate (RS) and coupling to the sensing node (SN) through an analog-to-digital converter (ADC) pair. The method comprises the steps of: (a) turning on the reset gate (RS) and performing a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier of the sensing node (SN); (b) turning on the reset gate (RS) and performing a second reset level AD conversion (AD0_L) on the output of the amplifier coupled to the sensing node through the ADC; (c) turning off the second charge transfer gate (Tx2) and turning on the charge storage and transfer electrode (ST); (d) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST) and turning off the first charge transfer gate (Tx1); and (e) turning on the second charge transfer gate (Tx2) and then turning off the charge storage and transfer electrode (ST) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the second charge transfer electrode (Tx2) and the sensing node (SN), and the ADC is coupled to the sensing node (SN) through the ADC. (k') turning off the second charge transfer gate (Tx2) and performing a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node through the ADC.

[0049] According to a sixth implementation of the fifth aspect of the present application, a method for reading a signal from a pixel array is provided, wherein the pixel array comprises a plurality of photosensitive pixel groups, each photosensitive pixel group comprises: a plurality of photodiodes (PD) for generating photoelectrons; a plurality of first charge transfer gates (Tx1), respectively associated with the plurality of photodiodes (PD); a shared charge storage and transfer electrode (ST); a shared second charge transfer gate (Tx2); a shared sensing node (SN); a shared reset gate (RS), coupled to the charge storage and transfer electrode (ST); a shared drain (VD1), coupled to the reset gate; and a shared amplifier (AMP), coupled to the sensing node, wherein the method comprises performing readout from each pixel according to the method described in any suitable implementation of the fifth aspect.

[0050] According to the seventh implementation of the fifth aspect of the present application, a method for reading a signal from a pixel array is provided, wherein the pixel array includes a plurality of photosensitive pixel groups, each photosensitive pixel group includes: a plurality of photodiodes (PD) for generating photoelectrons; a plurality of first charge transfer gates (Tx1), respectively associated with the plurality of photodiodes (PD); a shared charge storage and transfer electrode (ST); a shared second charge transfer gate (Tx2); a shared sensing node (SN); a shared reset gate (RS), coupled to the charge storage and transfer electrode (ST); a shared drain (VD1), coupled to the reset gate; and a shared amplifier (AMP), coupled to the sensing node. The method includes: (A) all the photodiodes are reset and an accumulation period begins; (B) the charges of the charge storage and transfer electrodes (ST) on all the pixels are cleared; (C) the sensing nodes (SN) of all the pixels are reset; (D) a reset level AD conversion (AD0_H) is performed on the first pixel row, the second charge transfer gate (Tx2) is turned on for the first pixel row, so that the signal charge in the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), then the second charge transfer gate (Tx2) is turned off, and then the signal level AD conversion (ADs_H) is performed on the first pixel row; (E) a reset level AD conversion (AD0_H) is performed on the second pixel row, the second charge transfer gate (Tx2) is turned on for the second pixel row, so that the signal charge in the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), then the second charge transfer gate (Tx2) is turned off, and then the signal level AD conversion (ADs_H) is performed on the second pixel row.

[0051] This implementation provides a global shutter operation.

[0052] According to a sixth aspect of the present application, a computer program is provided for causing a controller to execute the method described in any suitable implementation of the fifth aspect of the present application.

[0053] According to a seventh aspect of the present application, a computer-readable storage medium is provided, on which a computer program for causing a computer to execute the method described in any suitable implementation of the fifth aspect of the present application is stored.

[0054] The above relates to the first type of embodiments of the present application, wherein the photosensitive pixel comprises a first charge transfer gate (Tx1), a charge storage and transfer electrode (ST) and a second charge transfer gate (Tx2).

[0055] According to a second class of embodiments, the second charge transfer gate (Tx2) is eliminated.

[0056] According to a second class of embodiments, a photosensitive pixel is provided, comprising: a photodiode (PD) for generating photoelectrons; a first charge transfer gate (Tx1); a charge storage and transfer electrode (ST); a sensing node (SN); a reset gate (RS) coupled to the charge storage and transfer electrode (ST); a drain (VD1) coupled to the reset gate; and an amplifier (AMP) coupled to the sensing node, wherein the first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the photodiode (PD) to the charge storage and transfer electrode (ST) to allow charge transfer; wherein the charge storage and transfer electrode (ST) and the reset gate (RS) are controlled by a second control signal from the controller to reset the potential of the sensing node (SN); wherein the charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1) and the charge storage and transfer electrode (ST).

[0057] According to another second class of embodiments, the charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1) and the charge storage and transfer electrode (ST) by the following steps: (a) turning on the first charge transfer gate (Tx1) and resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during the accumulation period; (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS) and reset the sensing node (SN); (f) turning off the reset gate (RS) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the analog-to-digital converter (ADC); (a) turning on the charge storage and transfer electrode (ST) to perform a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN); (b) turning on the charge storage and transfer electrode (ST) to perform a second reset level AD conversion (AD0_L) on the output of the amplifier coupled to the sensing node through the ADC; (c) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), turning off the first charge transfer gate (Tx1), and turning off the charge storage and transfer electrode (ST) to perform a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN) through the ADC; and (d) turning on the charge storage and transfer gate (ST) to perform a second signal level AD conversion (ADs_L) ​​on the output of the amplifier coupled to the sensing node through the ADC.

[0058] Compared with the first embodiment, the second embodiment has fewer gates, and can achieve lower complexity and smaller pixel size.

[0059] The second type of embodiment can be combined with any suitable features described in conjunction with the first type of embodiment. For the sake of brevity, no further description will be given.

[0060] The second type of embodiments of the present application are described above, wherein the photosensitive pixel includes the first charge transfer gate (Tx1) and the charge storage and transfer electrode (ST), but does not include the second charge transfer gate (Tx2).

[0061] According to a third class of embodiments, the charge storage and transfer electrodes (ST) are further eliminated.

[0062] According to a third category of embodiments, a photosensitive pixel is provided, comprising: a photodiode (PD) for generating photoelectrons; a first charge transfer gate (Tx1); a sensing node (SN); a reset gate (RS) coupled to the first charge transfer gate (Tx1); a drain (VD1) coupled to the reset gate; and an amplifier (AMP) coupled to the sensing node, wherein the first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the photodiode (PD) to the sensing node (SN) to allow charge transfer; wherein the first charge transfer electrode (Tx1) and the reset gate (RS) are controlled by a second control signal from the controller to reset the potential of the sensing node (SN); wherein the charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1).

[0063] According to another third class of embodiments, the charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1) by the following steps: (a) turning on the first charge transfer gate (Tx1) and resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode and reset the sensing node (SN); (c) accumulating signal charge on the photodiode (PD) during an accumulation period; (f) turning off the reset gate (RS) to couple to the sensing node (SN) through an analog-to-digital converter (ADC) pair. The invention relates to a method for performing a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier of the sensing node (SN); and (i) turning on and then turning off the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the sensing node (SN) to perform a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN) through the ADC.

[0064] Compared with the first and second categories of embodiments, the third category of embodiments can achieve lower complexity and smaller pixel size.

[0065] The third type of embodiment can be combined with any suitable features described in conjunction with the first type of embodiment. For the sake of brevity, no further description will be given.

[0066] According to a general category of embodiments, a photosensitive pixel is provided, comprising: a photodiode (PD) for generating photoelectrons; a gate group; a sensing node (SN); a drain (VD1) coupled to the gate group; and an amplifier (AMP) coupled to the sensing node, wherein the gate group is controlled by a first control signal from a controller to couple the photodiode (PD) to the sensing node (SN) to allow charge transfer, and wherein the gate group is controlled by a second control signal from the controller to reset the potential of the sensing node (SN).

[0067] It will be appreciated that any feature described in conjunction with one aspect of the invention may also be applicable to other aspects as appropriate. BRIEF DESCRIPTION OF THE DRAWINGS

[0068] To facilitate understanding of the technical solutions of the embodiments of the present application, please refer to the accompanying drawings, in which:

[0069] Figure 1 A schematic diagram of an image sensor to which photosensitive pixels can be applied according to an embodiment of the present application;

[0070] Figure 2 histogram of photon counts for pixels with different read noise values;

[0071] Figure 3 A first related technique that can be used to reduce sensor node capacitance is shown;

[0072] Figure 4 A second related technique that can be used to reduce sensor node capacitance is shown;

[0073] Figure 5 A schematic diagram of a photosensitive pixel provided in an embodiment of the present application;

[0074] Figure 6 A timing table of relevant control levels for operating light-sensitive pixels provided in an embodiment of the present application;

[0075] Figure 7 Shows the corresponding Figure 6 A potential diagram of a step for operating a photosensitive pixel provided by an embodiment of the present application;

[0076] Figure 8 A pixel array including photosensitive pixels provided in an embodiment of the present application;

[0077] Fig. 9 It shows a photosensitive pixel group sharing some components provided by an embodiment of the present application;

[0078] Fig.10 A pixel array including a photosensitive pixel group sharing some components provided by an embodiment of the present application is shown;

[0079] Fig.11 A timing table of relevant control levels for operating light-sensitive pixels provided in an embodiment of the present application;

[0080] Fig.12 A timing table of relevant control levels for operating light-sensitive pixels provided in an embodiment of the present application;

[0081] Fig.13 Shows the corresponding Fig.12 A potential diagram of a step for operating a photosensitive pixel provided by an embodiment of the present application;

[0082] Fig.14 A schematic diagram of a photosensitive pixel provided in an embodiment of the present application;

[0083] Fig.15 A timing table of relevant control levels for operating light-sensitive pixels provided in an embodiment of the present application;

[0084] Fig.16 Shows the corresponding Fig.15 A potential diagram of a step for operating a photosensitive pixel provided by an embodiment of the present application;

[0085] Fig.17 A flowchart of a method for operating a photosensitive pixel in a manner supporting CDS and DCG provided in an embodiment of the present application;

[0086] Fig.18 A flowchart of a method for operating a photosensitive pixel in a method that supports CDS but does not support DCG provided in an embodiment of the present application;

[0087] Fig.19 A flowchart of a method for operating a photosensitive pixel in a manner that does not require CDS and DCG provided in an embodiment of the present application;

[0088] Fig. 20 A flowchart of a method for operating a photosensitive pixel provided in an embodiment of the present application;

[0089] Fig.21 A flowchart of a method for operating photosensitive pixels in different rows of a pixel array for global shutter operation provided in an embodiment of the present application;

[0090] Fig. 22 A pixel array including a readout circuit provided in an embodiment of the present application;

[0091] Fig.23 A pixel array including a readout circuit provided in an embodiment of the present application;

[0092] Fig.24 A schematic diagram of a photosensitive pixel provided for the second type of embodiment of the present application;

[0093] Fig.25 A timing table of related control levels for operating light-sensitive pixels provided for the second class of embodiments of the present application;

[0094] Fig.26 Shows the corresponding Fig.25 A potential diagram of a step for operating a photosensitive pixel provided by a second class of embodiments of the present application;

[0095] Fig. 27A schematic diagram of a photosensitive pixel provided for the third embodiment of the present application;

[0096] Fig.28 A timing table of related control levels for operating light-sensitive pixels provided for the third class of embodiments of the present application;

[0097] Fig.29 Shows the corresponding Fig.28 A third class of embodiments of the present application provides potential diagrams for steps of operating a photosensitive pixel. DETAILED DESCRIPTION

[0098] The embodiments of the present application are described below in conjunction with the accompanying drawings.

[0099] Figure 1 1 is a schematic diagram of an electronic device 100 including an image sensor 105. The image sensor 105 may include a pixel array 110 and a readout circuit 115 for taking out image signals from the pixels. The readout circuit 115 includes a row control circuit 120, a column control circuit 130, and a control circuit 150.

[0100] The image signal corresponding to one pixel (unit) is generated by a photosensitive element (also called a sensor element) of a photosensitive pixel (also called a pixel sensor unit) and read out by rows and columns by a readout circuit. The photosensitive element may be, but is not limited to, a photodiode. For example, a photoconductor film made of an organic material may be used as a photosensitive element. Typically, in a readout operation, a particular row of pixels in the array may be selected by a row control circuit 120, and the image signal generated by the pixels in the row may be read out column by column along the column lines by a column control circuit 130. An analog-to-digital conversion (ADC) circuit may be provided to convert the image signal from the pixel into a digital value.

[0101] Light-sensitive pixels, called photon-counting sensors, can image at very low light levels and can even count photoelectrons corresponding to single photons. To count photoelectrons, the sensor's readout noise should be below about 0.2e-rms. Figure 2 A histogram of the photon counts from a pixel is shown (either for multiple readouts from a single pixel or for reading out multiple pixels from a single exposure). It can be seen that for a readout noise of 0.15e-rms, the voltage signals corresponding to no photoelectrons, one photoelectron, two photoelectrons, etc. can be clearly distinguished, whereas a readout noise as high as 0.50e-rms may not allow for specific identification of the number of photoelectrons.

[0102] Therefore, it is desirable to reduce the readout noise. The key to reducing the readout noise is to reduce the capacitance of the sensor's sensing node. For the same number of photoelectrons generated by exposure to light, the lower the capacitance of the sensing node, the larger the voltage signal generated (i.e., the higher the conversion gain), and thus the lower the readout noise generated.

[0103] A first related technique for reducing the capacitance of the sensing node of a light-sensitive pixel (e.g. Figure 3 The TFT-LCD (as shown in FIG. 1 ) uses a pump gate architecture with a vertical storage well (SW) and a remote floating diffusion (FD). However, this requires a special pixel structure and process.

[0104] A second related technique for reducing the capacitance of a sensing node of a light-sensitive pixel (eg Figure 4 As shown in FIG. 1 , the sensing node capacitance is reduced by separating the sensing node SN (also called the drain node) from the intermediate node IN (also called the source node), which is connected to the reset gate RST and into which the photoelectrons generated by exposure to the light current enter. Figure 3 Different technologies are involved. Figure 4 The advantage of the related art is that it does not require a special pixel structure or process. However, there is a problem that the charge transfer from the source node IN to the drain node SN is not a complete transfer. That is, a portion of the photoelectrons generated by exposure to light remain in the intermediate node IN and are not transferred to the sensing node SN. This can lead to problems such as increased noise and image lag. There is also a problem of long conversion time.

[0105] The inventors have recognized that by using charge storage and transfer electrodes (as opposed to diffusion regions without electrodes) to transfer charge from the photodiode to the sensing node, a complete transfer of charge from the photodiode to the sensing node can be achieved.

[0106] Figure 5 The photosensitive pixel provided by the embodiment of the present application is shown.

[0107] A photodiode (PD) for generating photoelectrons is coupled to a charge storage and transfer electrode (ST) through a first charge transfer gate (Tx1), and the charge storage and transfer electrode (ST) is coupled to a sensing node (SN) through a second charge transfer gate (Tx2). The first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the photodiode (PD) to the charge storage and transfer electrode (ST) to allow charge transfer. The second charge transfer gate (Tx2) is controlled by a second control signal from the controller to couple the charge storage and transfer electrode (ST) to the sensing node (SN) to allow charge transfer. Therefore, the charge generated on the photodiode (PD) is transferred to a sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST), and the second charge transfer gate (Tx2). An amplifier (AMP) is coupled to the sensing node. An analog-to-digital converter (ADC) performs analog-to-digital conversion (AD) on the output of the amplifier so that the charge accumulated on the sensing node (SN) can be detected as a voltage signal.

[0108] A reset gate (RS) is coupled to the charge storage and transfer electrode (ST), and a drain (VD1) is coupled to the reset gate (RS). The second transfer gate (Tx2), the charge storage and transfer electrode (ST) and the reset gate (RS) are controlled by a third control signal from the controller to reset the potential of the sensing node (SN).

[0109] In order to transfer the charge from the photodiode (PD) to the sensing node (SN), an embodiment of the present application provides a charge storage and transfer electrode (ST) (as opposed to a diffusion region without an electrode). This allows the charge to be transferred from the photodiode (PD) to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST), and the second charge transfer gate (Tx2) to be a complete transfer. This eliminates or reduces problems caused by incomplete charge transfer, such as noise or image delays caused by the persistence (remaining) of charge in a previously captured frame. In addition, the charge transfer of this embodiment is shorter than the time required to transfer the charge from the diffusion region to the sensing node via the charge transfer gate, and a shorter conversion cycle can be achieved.

[0110] In addition, since the only gate adjacent to the sensing node (SN) is the second charge transfer gate (Tx2), the electrostatic capacitance of the sensing node (SN) can be made smaller, which leads to higher charge-to-voltage conversion efficiency. This is advantageous in applications including photon counting sensors.

[0111] Furthermore, except for providing the charge storing and transferring electrode (ST), no special pixel structure is required, and manufacturing is facilitated.

[0112] In addition, combining the capacitance of the second charge transfer gate (Tx2) with the capacitance of the sensing node (SN) can effectively increase the capacitance of the sensing node (SN). When the second charge transfer gate (Tx2) is turned off, the small capacitance of the sensing node (SN) can achieve a high conversion gain, which is suitable for detection under low light conditions. When the second charge transfer gate (Tx2) is turned on, the capacitance of the second charge transfer gate (Tx2) is combined with the capacitance of the sensing node (e.g., see the following description) Figure 7 The combination of (k) in the figure results in a larger effective capacitance and a lower conversion gain, which is suitable for detection under bright conditions. Appropriate use of high conversion gain and low conversion gain can achieve a high dynamic range (HDR).

[0113] In some embodiments, the first charge transfer gate (Tx1), the second charge transfer gate (Tx2), the reset gate (RS), and / or the charge storage and transfer electrode (ST) are formed as MOSFET transistors.

[0114] Figure 61 shows a timing table provided by an embodiment of the present application. The rows marked Tx1 and Tx2 indicate the on / off of the control signals applied to the first charge transfer gate and the second charge transfer gate, respectively. Figure 6 In the illustrated embodiment, higher levels in the diagram correspond to "on" and lower levels correspond to "off." When "on," charge can pass through the gate. The row labeled ST indicates the on / off of the voltage applied to the charge storage and transfer electrodes. ("on" means a high voltage, and "off" means a low voltage.) The row labeled RS indicates the on / off of the control signal applied to the reset gate.

[0115] Figure 7 Shows the corresponding Figure 6 The potential diagram for steps a to k in Figure 1. In a potential diagram, a lower level in the diagram corresponds to a higher voltage, and a higher level in the diagram corresponds to a lower voltage. This means that the sign of the potential is defined as the electron moving from a higher position in the diagram to a lower position. The corresponding flowchart is shown in Figure 1. Fig.17 shown.

[0116] In (a), the photodiode (PD) is reset by clearing the charge in the photodiode (PD). The potential diagram indicates that the first charge transfer gate (Tx1) is turned on (i.e., there is no potential barrier and charge movement is allowed), the charge storage and transfer electrode (ST) is turned on, the second charge transfer gate (Tx2) is turned on, and the reset gate (RS) is turned on. (In Figure 6 In the figure, the horizontal direction schematically indicates the charge path from PD to Tx1, ST, Tx2, SN. The reset gate RS outside this path overlaps with ST in the figure. Conceptually, RS can be considered to be located after ST. ) The potentials at the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST), and the second charge transfer gate (Tx2) are at the same level (potential) as the drain VD1.

[0117] In (b), the first charge transfer gate (Tx1) is turned off (off) to start charge accumulation (signal integration) at the photodiode (PD).

[0118] In (c), signal charges are accumulated on a photodiode (PD) during an accumulation period (integration period).

[0119] In (d), the second charge transfer gate (Tx2) is turned off (turned off) to separate the sensing node (SN) from the charge storage and transfer electrode (ST). Therefore, the sensing node (SN) now has a floating potential and is ready to measure the charge accumulated on the sensing node (SN). This process is called resetting the sensing node (SN).

[0120] In (e), the charge storage and transfer electrode (ST) is turned off (low voltage; higher level in the potential diagram), and the charge on the charge storage and transfer electrode (ST) is cleared (drained, dumped) to the drain (VD1) (assumed to be behind the sheet in the figure) through the reset gate (RS).

[0121] In (f), the reset gate (RS) is turned off; under this condition, the analog-to-digital converter (ADC) performs a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN). Figure 6 , indicated in the rows labeled AD in the . Since the charge from the photodiode (PD) has not yet accumulated in the sensing node (SN), this is a reset level measurement. This is used in correlated double sampling (CDS), taking the difference between the signal level measurement and the reset level measurement. CDS is a technique that can remove signal-independent noise, such as kTC noise (thermal noise associated with the capacitance of the sensor circuitry), by taking the difference between two measurements (samples): the output when the reset voltage is applied (the "reset level") and the output when the signal voltage is applied (the "signal level").

[0122] In (g), the second charge transfer gate (Tx2) is turned on. Under this condition, the ADC performs a second reset level AD conversion (AD0_L) on the output of the amplifier coupled to the sensing node.

[0123] The difference between the AD conversion in (f) and (g) is that a smaller conversion gain is achieved in (g) by turning on the second charge transfer gate (Tx2) to combine the capacitance of Tx2 with the capacitance of the sensing node (SN), thereby effectively increasing the capacitance of the sensing node (SN). Therefore, the AD conversion (AD0_H) of step (f) provides reset level detection at a higher conversion gain, while the AD conversion (AD0_L) of step (g) provides reset level detection at a lower conversion gain. This dual conversion gain (DCG) technique of performing detection using two conversion gains is used to achieve a high dynamic range (HDR) suitable for dark and bright conditions.

[0124] In (h), the second charge transfer gate (Tx2) is turned off and in preparation for charge transfer in the next step (i), the charge storage and transfer electrode (ST) is turned on (high voltage; lower level in the potential diagram).

[0125] In (i), the first charge transfer gate (Tx1) is turned on so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), and then the first charge transfer gate (Tx1) is turned off. By using the charge storage and transfer electrode (ST) (as opposed to a simple diffusion region without an electrode), the charge transfer from the photodiode (PD) to the charge storage and transfer electrode (ST) is a complete transfer. In preparation for the charge transfer in the next step (j), the charge storage and transfer electrode (ST) is turned off (low voltage; higher level in the potential diagram).

[0126] In (j), the second charge transfer gate (Tx2) is turned on so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the sensing node (SN). The "off" state of the charge storage and transfer electrode (ST) ensures that the charge transfer from the charge storage and transfer electrode (ST) to the sensing node (SN) is a complete transfer. The second charge transfer gate (Tx2) is then turned off. Under this condition, the ADC performs a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN).

[0127] This AD conversion with the second charge transfer gate (Tx2) turned off and the AD conversion of step (f) with the second charge transfer gate (Tx2) turned off are both associated with higher conversion gains. Step (j) performs a signal level measurement, while step (f) performs a reset level measurement. These measurements are combined in the CDS to provide a high conversion gain measurement and remove noise that is not related to the signal.

[0128] As shown in steps (i) and (j), the "on" state (high voltage; lower level in the potential diagram) of the charge storage and transfer electrode (ST) allows the charge from the photodiode (PD) to be stored on the charge storage and transfer electrode (ST), while the "off" state of the charge storage and transfer electrode (ST) allows the charge stored on the charge storage and transfer electrode (ST) to be transferred to the sensing node (SN). Therefore, the charge storage and transfer electrode (ST) is used for storage and transfer of charge.

[0129] In (k), the second charge transfer gate (Tx2) is turned on. Under this condition, the ADC performs a second signal level AD conversion (ADs_L) ​​on the output of the amplifier coupled to the sensing node. When the second charge transfer gate (Tx2) is turned on, the capacitance of the second charge transfer gate (Tx2) is combined with the capacitance of the sensing node (SN), thereby effectively increasing the capacitance of the sensing node (SN), thereby producing a lower conversion gain.

[0130] This AD conversion in which the second charge transfer gate (Tx2) is turned on and the AD conversion in step (g) in which the second charge transfer gate (Tx2) is turned on are both associated with a relatively low conversion gain. Step (k) performs a signal level measurement, while step (g) performs a reset level measurement. These measurements are combined in the CDS to provide a low conversion gain measurement and remove noise that is not related to the signal.

[0131] Combining high conversion gain measurements that remove noise unrelated to the signal with low conversion gain measurements that remove noise unrelated to the signal provides high dynamic range (HDR) in a dual conversion gain (DCG) technique.

[0132] As described above, the photosensitive pixel according to the present embodiment supports CDS for suppressing kTC noise and DCG for expanding the dynamic range.

[0133] A first variation of the above embodiment without DCG is also considered. In this case, there is no need to perform AD conversion at low conversion gains (AD0_L and ADs_L). Reset level AD conversion (AD0_H) and signal level AD conversion (ADs_H) allow CDS. The control flow can be simplified as follows: (the corresponding flowchart is as follows Fig.18 As shown. ) Steps (a) to (f), (i) and (j) are the same as those in the above-mentioned embodiment supporting both DCG and CDS. (Hereinafter, consistent step labels may be used between different embodiments to facilitate comparison between different embodiments. Therefore, the labels may not be continuous. For example, in this embodiment, there is no "step (g)".

[0134] The steps in this embodiment include:

[0135] (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD);

[0136] (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode;

[0137] (c) accumulating signal charge on the photodiode (PD) during an accumulation period;

[0138] (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN);

[0139] (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS);

[0140] (f) turning off the reset gate (RS) and performing a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN) by an analog-to-digital converter (ADC);

[0141] (h') turning on the charge storage and transfer electrode (ST);

[0142] (i) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), turning off the first charge transfer gate (Tx1), and turning off the charge storage and transfer electrode (ST);

[0143] (j) turning on the second charge transfer gate (Tx2) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), turning off the second charge transfer gate (Tx2), and performing a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN) through the ADC.

[0144] A second variation that eliminates CDS and DCG is also considered. The control flow can be simplified to: (The corresponding flowchart is as follows Fig.19 ) This is different from the first variation above in that reset level AD conversion (AD0_H) is not performed in (f′).

[0145] The steps in this embodiment include:

[0146] (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD);

[0147] (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode;

[0148] (c) accumulating signal charge on the photodiode (PD) during an accumulation period;

[0149] (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN);

[0150] (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS);

[0151] (f') turning off the reset gate (RS);

[0152] (h') turning on the charge storage and transfer electrode (ST);

[0153] (i) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), turning off the first charge transfer gate (Tx1), and turning off the charge storage and transfer electrode (ST);

[0154] (j) turning on the second charge transfer gate (Tx2) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), turning off the second charge transfer gate (Tx2), and performing a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN) through the ADC.

[0155] Figure 8 A pixel array is shown, wherein according to Figure 5 The plurality of photosensitive pixels of the embodiment are arranged in a matrix form. (The number of pixels is not limited to the example shown. Usually, there are many more pixels than those shown in the example.)

[0156] The image sensor includes a pixel array and a readout circuit, the readout circuit is used to read out signals from the photosensitive pixels in the pixel array. The readout circuit includes: a vertical scanner for sequentially selecting array rows; a horizontal scanner; an analog-digital conversion (ADC) unit. The control for reading out the detection value of a single pixel of the pixel array can be achieved in a variety of ways, including a column parallel method and a sequential method.

[0157] In the column-parallel approach ( Fig. 22 ), the analog-to-digital conversion unit converts the analog signals from the photosensitive pixels of the corresponding columns on the selected row in parallel, and the horizontal scanner sequentially selects the digital values ​​of the corresponding columns for output.

[0158] In the sequential method ( Fig.23 ), the horizontal scanner sequentially selects analog signals from the photosensitive pixels of the corresponding columns, and the analog-to-digital conversion unit performs analog-to-digital conversion on the sequentially selected analog signals.

[0159] In some embodiments, more than one photosensitive pixel may share the charge storage and transfer electrode (ST), the second charge transfer gate (Tx2), the reset gate (RS), the drain (VD1) and / or the amplifier (AMP). Fig. 9In the example of FIG. 1 , four pixels associated with four photodiodes (PD) have their respective first charge transfer gates (Tx1), but share a charge storage and transfer electrode (ST), a second charge transfer gate (Tx2), a sensing node (SN), a reset gate (RS), a drain (VD1), and an amplifier (AMP). In the illustrated embodiment, the four photodiodes of each photosensitive pixel group are arranged in a 2×2 array, the first charge transfer gate (Tx) is arranged at a corner of each photodiode facing the center of the four photodiodes, and the charge storage and transfer electrode (ST) is arranged in the center of the four photodiodes. Fig.10 A matrix is ​​shown in which four such groups of four pixels are arranged. (The number of groups is not limited to the example shown. Typically, there are many more groups than shown in the example.)

[0160] According to the present embodiment, compared with the embodiment, the number of components such as transistors can be reduced without sharing components between pixels. In addition, the average pitch between pixels in the pixel array can be reduced.

[0161] Fig.11 The embodiment of the present application provides Figure 6 A variation of the timing table. Figure 6 The difference is that during the accumulation period, the second charge transfer gate (Tx2), the charge storage and transfer electrode (ST), and the reset gate (RS) are turned off. The longer duration when the second charge transfer gate (Tx2), the charge storage and transfer electrode (ST), and the reset gate (RS) are turned off can reduce the voltage stress on the second charge transfer gate (Tx2), the charge storage and transfer electrode (ST), and the reset gate (RS), especially on the oxides of these electrodes.

[0162] Fig.12 The embodiment of the present application provides Figure 6 Another variation of the timing table. Fig.13 The corresponding potential diagram is shown in FIG. Fig. 20 ) Steps (a) to (h) and Figure 6 and Figure 7 The corresponding steps in the illustrated embodiment are the same.

[0163] The steps in this embodiment include:

[0164] (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD);

[0165] (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode;

[0166] (c) accumulating signal charge on the photodiode (PD) during an accumulation period;

[0167] (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN);

[0168] (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS);

[0169] (f) turning off the reset gate (RS) and performing a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN) by an analog-to-digital converter (ADC);

[0170] (g) The second charge transfer gate (Tx2) is turned on, and a second reset level AD conversion (AD0_L) is performed on the output of the amplifier coupled to the sensing node by the ADC.

[0171] (h) turning off the second charge transfer gate (Tx2) and turning on the charge storage and transfer electrode (ST);

[0172] (i') turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), and turning off the first charge transfer gate (Tx1);

[0173] (j') turns on the second charge transfer gate (Tx2), and then turns off the charge storage and transfer electrode (ST) (i.e., the higher level in the potential diagram) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the second charge transfer electrode (Tx2) and the sensing node (SN), and performs a second signal level AD conversion (ADs_L) ​​on the output of the amplifier coupled to the sensing node (SN) through the ADC.

[0174] (k′) turning off the second charge transfer gate (Tx2) and performing a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node through the ADC.

[0175] According to this embodiment, in step (i'), after the first charge transfer gate (Tx1) is turned off, the charge storage and transfer electrode (ST) remains turned on. Since this causes the level of the charge storage and transfer electrode (ST) to be deeper, more charge (compared to the charge storage and transfer electrode (ST)) is stored in step (i'). Figure 7 ), and when the second charge transfer gate (Tx2) is turned on (ie, a lower level in the potential diagram), more charges are transferred to the sensing node (SN) in step (j').

[0176] Fig.14 A variation of a photosensitive pixel with an overflow channel (OFC) provided in an embodiment of the present application is shown. The overflow channel (OFC) helps to allow overflow charges to flow out to the drain.

[0177] Fig.15 A timing chart for an embodiment having a global shutter feature is shown, wherein Fig.14 An overflow channel (OFC) of an embodiment may be useful. Fig.16 The corresponding potential diagram is shown in FIG. Fig.21 )It should be noted that Fig.15 and Fig.16 The embodiment of the present invention relates to AD conversion (AD0_H and ADs_H) with high conversion gain for detection, but does not perform Figure 6 and Figure 7 AD conversion (AD0_L and ADs_L) ​​with low conversion gain for detection described in the embodiment.

[0178] Fig.15 The timing table for pixel i and pixel i+1 of the next row is shown. The operation of pixel i is similar to Figure 6 , but the imaging exposure of pixel i+1 is performed simultaneously with pixel i (“global shutter”).

[0179] exist Fig.16 In the potential diagram, Figure 7 and Fig.13, the reset gate (RS) and the drain (VD1) are shown on the left side of the photodiode (PD), and the charge storage and transfer electrode (ST) is shown in two places to intuitively illustrate the charge flow from the photodiode (PD) for light detection to the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST), the second charge transfer gate (Tx2) and the sensing node (SN); the charge flow from the photodiode (PD) to the drain (VD1) through the overflow channel (OFC); and the charge flow from the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS).

[0180] The steps in this embodiment include:

[0181] In (a), the photodiode at each pixel is reset and the accumulation period (integration period) begins. This is similar to the reference Figure 7 Step (a) of the embodiment shown. Thereafter, Figure 7 Steps (b) and (c) are the same, the first charge transfer gate (Tx1) is turned off and charge accumulation on the photodiode (PD) begins. Fig.15 In the timing table, the accumulation period is indicated by t.

[0182] In (b), the charge on the charge storage and transfer electrode (ST) at each pixel is cleared and the sensing node at each pixel is reset. This is similar to the reference Figure 7 Steps (d) and (e) of the embodiment shown.

[0183] In (c), the charge storage and transfer electrode (ST) is turned on; the first charge transfer gate (Tx1) is turned on so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST). Then, the first charge transfer gate (Tx1) is turned off, and the charge storage and transfer electrode (ST) is turned off. (The operations of steps (a), (b) and (c) are performed simultaneously for all photodiodes.) This is similar to reference Figure 7 Steps (h) and (i) of the illustrated embodiment (except for the change in (h) due to the omission of the second reset level AD conversion AD0_L).

[0184] In (d), reset level AD conversion (AD0_H) is performed on the first pixel row (i). This is similar to reference Figure 7In step (f) of the embodiment shown, the second charge transfer gate (Tx2) is turned on for the first pixel row, so that the signal charge in the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), and then the second charge transfer gate (Tx2) is turned off, and then the signal level AD conversion (ADs_H) is performed on the first pixel row.

[0185] In (e), reset level AD conversion (AD0_H) is performed on the second pixel row (i+1). In addition, the second charge transfer gate (Tx2) is turned on for the second pixel row (i+1), so that the signal charge in the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), and then the second charge transfer gate (Tx2) is turned off, and then the signal level AD conversion (ADs_H) is performed on the second pixel row (i+1).

[0186] According to the present embodiment, exposure to light for imaging is completed in steps (a), (b) and (c), and then readout of each pixel row is performed. Since at least some of the readout circuits are shared between pixels along each vertical column, the readout of the first pixel row and the readout of the second pixel row do not occur simultaneously, but sequentially. In a global shutter scheme that exposes all pixel rows simultaneously (as opposed to a rolling shutter scheme that exposes different pixel rows sequentially), simultaneous exposure of the entire image frame provides an advantage that there is no time difference between pixel rows.

[0187] Return to reference Fig.14 , an overflow channel (OFC) is provided for allowing overflow charges from a photodiode (PD) to flow to the drain. In an embodiment in which exposure is performed on a plurality of pixel rows simultaneously and readout is performed sequentially on the corresponding pixel rows thereafter, time may elapse from exposure to readout. If the charge accumulated on the photodiode flows through the first charge transfer gate Tx1 to the charge storage and transfer electrode ST in the off state, correct measurement cannot be performed. The overflow channel (OFC) allows the charge on the photodiode (PD) to flow to the drain and then overflow to the charge storage and transfer electrode (ST) through the first charge transfer gate, although it is in the off state. Therefore, the signal charge on the charge storage and transfer electrode (ST) is not destroyed.

[0188] Therefore, the global shutter operation is suitable for an embodiment of the present application, which achieves high conversion gain by reducing the capacitance of the sensing node (SN).

[0189] The first class of embodiments of the present application is described above, in which the photosensitive pixel includes a first charge transfer gate (Tx1), a charge storage and transfer electrode (ST), and a second charge transfer gate (Tx2). The second class of embodiments in which the second charge transfer gate (Tx2) is eliminated is described below. This class of embodiments has fewer gates, thereby achieving lower complexity and smaller pixel size.

[0190] Fig.24 The photosensitive pixel provided by the embodiment of the present application is shown. Fig.24 The photosensitive pixels are similar to Figure 5 , except that there is no second charge transfer gate (Tx2).

[0191] A photodiode (PD) for generating photoelectrons is coupled to a charge storage and transfer electrode (ST) through a first charge transfer gate (Tx1), and the charge storage and transfer electrode (ST) is coupled to a sensing node (SN). The first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the photodiode (PD) to the charge storage and transfer electrode (ST) to allow charge transfer. The charge storage and transfer electrode (ST) is controlled by a second control signal from a controller to couple the charge storage and transfer electrode (ST) to a sensing node (SN) to allow charge transfer. Therefore, the charge generated on the photodiode (PD) is transferred to a sensing node (SN) through the first charge transfer gate (Tx1) and the charge storage and transfer electrode (ST). An amplifier (AMP) is coupled to the sensing node. An analog-to-digital converter (ADC) performs analog-to-digital conversion (AD) on the output of the amplifier so that the charge accumulated on the sensing node (SN) can be detected as a voltage signal.

[0192] The reset gate (RS) is coupled to the charge storage and transfer electrode (ST), and the drain (VD1) is coupled to the reset gate (RS). The charge storage and transfer electrode (ST) and the reset gate (RS) are controlled by a third control signal from the controller to reset the potential of the sensing node (SN).

[0193] In order to transfer the charge from the photodiode (PD) to the sensing node (SN), an embodiment of the present application provides a charge storage and transfer electrode (ST) (as opposed to a diffusion region without an electrode). This allows the charge to be transferred from the photodiode (PD) to the sensing node (SN) through the first charge transfer gate (Tx1) and the charge storage and transfer electrode (ST) to be a complete transfer. This eliminates or mitigates problems caused by incomplete charge transfer, such as noise or image delays caused by the persistence (remaining) of charge in a previously captured frame. In addition, the charge transfer of this embodiment is shorter than the time required to transfer the charge from the diffusion region to the sensing node via the charge transfer gate, and a shorter conversion cycle can be achieved.

[0194] In addition, since the only gate adjacent to the sensing node (SN) is the charge storage and transfer electrode (ST), the electrostatic capacitance of the sensing node (SN) can be made smaller, which leads to higher charge-to-voltage conversion efficiency. This is advantageous in applications including photon counting sensors.

[0195] Furthermore, except for providing the charge storing and transferring electrode (ST), no special pixel structure is required, and manufacturing is facilitated.

[0196] In addition, combining the capacitance of the charge storage and transfer electrode (ST) with the capacitance of the sensing node (SN) can effectively increase the capacitance of the sensing node (SN). When the charge storage and transfer electrode (ST) is turned off, the small capacitance of the sensing node (SN) can achieve high conversion gain, which is suitable for detection under low light conditions. When the charge storage and transfer gate (ST) is turned on, the capacitance of the charge storage and transfer gate (ST) is combined with the capacitance of the sensing node (e.g., see the following description) Fig.26 The combination of (k) in the figure results in a larger effective capacitance and a lower conversion gain, which is suitable for detection under bright conditions. Appropriate use of high conversion gain and low conversion gain can achieve a high dynamic range (HDR).

[0197] In some embodiments, the first charge transfer gate (Tx1), the reset gate (RS), and / or the charge storage and transfer electrode (ST) are formed as MOSFET transistors.

[0198] Fig.25 The timing table provided by the embodiment of the present application is shown. (Although in Figure 6The transitions at steps d, h and j do not exist in this embodiment, but the labels d, h and j are shown crossed out with an X symbol to facilitate finding the transitions with Figure 6 The row labeled Tx1 indicates the on / off switching of the control signal applied to the first charge transfer gate. Fig.25 In the illustrated embodiment, higher levels in the diagram correspond to "on" and lower levels correspond to "off." When "on," charge can pass through the gate. The row labeled ST indicates the on / off of the voltage applied to the charge storage and transfer electrodes. ("on" means a high voltage, and "off" means a low voltage.) The row labeled RS indicates the on / off of the control signal applied to the reset gate.

[0199] Fig.26 Shows the corresponding Fig.25 The potential diagram for steps a to k in Figure 1. In a potential diagram, lower levels in the diagram correspond to higher voltages, and higher levels in the diagram correspond to lower voltages. This means that the sign of the potential is defined as the electron moving from a higher position in the diagram to a lower position.

[0200] In (a), the photodiode (PD) is reset by clearing the charge in the photodiode (PD). The potential diagram indicates that the first charge transfer gate (Tx1) is turned on (i.e., there is no barrier and charge movement is allowed), the charge storage and transfer electrode (ST) is turned on, and the reset gate (RS) is turned on. (In Fig.26 , the horizontal direction schematically indicates the charge path from PD to Tx1, ST, SN. The reset gate RS outside this path overlaps with ST in the figure. Conceptually, RS can be considered to be located after ST. ) The potential at the first charge transfer gate (Tx1) and the charge storage and transfer electrode (ST) is at the same level (potential) as the drain VD1.

[0201] In (b), the first charge transfer gate (Tx1) is turned off (off) to start charge accumulation (signal integration) at the photodiode (PD).

[0202] In (c), signal charges are accumulated on a photodiode (PD) during an accumulation period (integration period).

[0203] In (e), the charge storage and transfer electrode (ST) is turned off (low voltage; higher level in the potential diagram) to separate the sensing node (SN) from the charge storage and transfer electrode (ST). Therefore, the sensing node (SN) now has a floating potential and is ready to measure the charge accumulated on the sensing node (SN). This process is called resetting the sensing node (SN), and the charge on the charge storage and transfer electrode (ST) is cleared (drained, dumped) to the drain (VD1) (assumed to be behind the sheet in the figure) through the reset gate (RS).

[0204] In (f), the reset gate (RS) is turned off; under this condition, the analog-to-digital converter (ADC) performs a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN). Fig.25 , indicated in the rows labeled AD in the . Since the charge from the photodiode (PD) has not yet accumulated in the sensing node (SN), this is a reset level measurement. This is used in correlated double sampling (CDS), taking the difference between the signal level measurement and the reset level measurement. CDS is a technique that can remove signal-independent noise, such as kTC noise (thermal noise associated with the capacitance of the sensor circuitry), by taking the difference between two measurements (samples): the output when the reset voltage is applied (the "reset level") and the output when the signal voltage is applied (the "signal level").

[0205] In (g), the charge storage and transfer electrode (ST) is turned on. Under this condition, the ADC performs a second reset level AD conversion (AD0_L) on the output of the amplifier coupled to the sensing node.

[0206] The difference between the AD conversion in (f) and (g) is that a smaller conversion gain is achieved in (g) by turning on the charge storage and transfer electrode (ST) to combine the capacitance of ST with the capacitance of the sensing node (SN), thereby effectively increasing the capacitance of the sensing node (SN). Therefore, the AD conversion (AD0_H) of step (f) provides reset level detection at a higher conversion gain, while the AD conversion (AD0_L) of step (g) provides reset level detection at a lower conversion gain. This dual conversion gain (DCG) technique of performing detection using two conversion gains is used to achieve a high dynamic range (HDR) suitable for dark and bright conditions.

[0207] In (i), the first charge transfer gate (Tx1) is turned on so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), and then the first charge transfer gate (Tx1) is turned off. By using the charge storage and transfer electrode (ST) (as opposed to a simple diffusion region without an electrode), the charge transfer from the photodiode (PD) to the charge storage and transfer electrode (ST) is a complete transfer. Then, the charge storage and transfer electrode (ST) is turned off (low voltage; higher level in the potential diagram), so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the sensing node (SN). Under this condition, the ADC performs a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN).

[0208] This AD conversion with the charge storage and transfer electrodes (ST) turned off and the AD conversion of step (f) with the charge storage and transfer electrodes (ST) turned off are both associated with higher conversion gains. Step (i) performs a signal level measurement, while step (f) performs a reset level measurement. These measurements are combined in the CDS to provide a high conversion gain measurement and remove noise that is not related to the signal.

[0209] As shown in step (i), the "on" state (high voltage; lower level in the potential diagram) of the charge storage and transfer electrode (ST) allows the charge from the photodiode (PD) to be stored on the charge storage and transfer electrode (ST), while the "off" state of the charge storage and transfer electrode (ST) allows the charge stored on the charge storage and transfer electrode (ST) to be transferred to the sensing node (SN). Therefore, the charge storage and transfer electrode (ST) is used for storage and transfer of charge.

[0210] In (k), the charge storage and transfer electrode (ST) is turned on. Under this condition, the ADC performs a second signal level AD conversion (ADs_L) ​​on the output of the amplifier coupled to the sensing node. When the charge storage and transfer electrode (ST) is turned on, the capacitance of the charge storage and transfer electrode (ST) is combined with the capacitance of the sensing node (SN), thereby effectively increasing the capacitance of the sensing node (SN), resulting in a lower conversion gain.

[0211] This AD conversion in which the charge storage and transfer electrode (ST) is turned on and the AD conversion in step (g) in which the charge storage and transfer electrode (ST) is turned on are both associated with lower conversion gain. Step (k) performs a signal level measurement, while step (g) performs a reset level measurement. These measurements are combined in the CDS to provide a low conversion gain measurement and remove noise that is not related to the signal.

[0212] Combining high conversion gain measurements that remove noise unrelated to the signal with low conversion gain measurements that remove noise unrelated to the signal provides high dynamic range (HDR) in a dual conversion gain (DCG) technique.

[0213] As described above, the photosensitive pixel according to the present embodiment supports CDS for suppressing kTC noise and DCG for expanding the dynamic range.

[0214] The second type of embodiment can be combined with any suitable features described in conjunction with the first type of embodiment. For the sake of brevity, they will not be described in detail.

[0215] The second class of embodiments of the present application is described above, in which the photosensitive pixel includes a first charge transfer gate (Tx1) and a charge storage and transfer electrode (ST), but does not include a second charge transfer gate (Tx2). The third class of embodiments that further eliminate the charge storage and transfer electrode (ST) is described below. This class of embodiments can achieve lower complexity and smaller pixel size.

[0216] Fig. 27 The photosensitive pixel provided by the embodiment of the present application is shown. Fig. 27 The photosensitive pixels are similar to Figure 5 and Fig.24 The photosensitive pixel is a photosensitive pixel of the embodiment of the present invention, except that the second charge transfer gate (Tx2) and the charge storage and transfer electrode (ST) are not present.

[0217] A photodiode (PD) for generating photoelectrons is coupled to a sensing node (SN) through a first charge transfer gate (Tx1). The first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the photodiode (PD) to a sensing node (SN) to allow charge transfer. Therefore, the charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1). An amplifier (AMP) is coupled to the sensing node. An analog-to-digital converter (ADC) performs analog-to-digital conversion (AD) on the output of the amplifier so that the charge accumulated on the sensing node (SN) can be detected as a voltage signal.

[0218] The reset gate (RS) is coupled to the first charge transfer gate (Tx1), and the drain (VD1) is coupled to the reset gate (RS). The first charge transfer electrode (Tx1) and the reset gate (RS) are controlled by a second control signal from a controller to reset the potential of a sensing node (SN).

[0219] In order to transfer charge from a photodiode (PD) to a sensing node (SN), an embodiment of the present application provides a first charge transfer gate (Tx1) (opposite to a diffusion region without an electrode). This allows the charge to be transferred from a photodiode (PD) to a sensing node (SN) through the first charge transfer gate (Tx1) to be a complete transfer. This eliminates or mitigates problems caused by incomplete charge transfer, such as noise or image delays caused by the persistence (remaining) of charge in a previously captured frame. In addition, the charge transfer of this embodiment is shorter than the time required to transfer charge from a diffusion region to a sensing node via a charge transfer gate, and a shorter conversion cycle can be achieved.

[0220] In addition, since the only gate adjacent to the sensing node (SN) is the first charge transfer gate (Tx1), the electrostatic capacitance of the sensing node (SN) can be made smaller, which leads to higher charge-to-voltage conversion efficiency. This is advantageous in applications including photon counting sensors.

[0221] In addition, no special pixel structure is required, which facilitates manufacturing.

[0222] In some embodiments, the first charge transfer gate (Tx1) and / or the reset gate (RS) are formed as MOSFET transistors.

[0223] Fig.28 The timing table provided by the embodiment of the present application is shown. (Although in Figure 6 The transitions at steps d, e, g, h, j and k do not exist in this embodiment, but the labels d, h and j are shown crossed out with an X symbol to facilitate finding the transitions with respect to steps d, e, g, h, j and k. Figure 6 The row labeled Tx1 indicates the on / off switching of the control signal applied to the first charge transfer gate. Fig.28 In the illustrated embodiment, higher levels in the diagram correspond to "on" and lower levels correspond to "off.") When "on," charge can pass through the gate. ("On" means high voltage, "off" means low voltage.) The row labeled RS indicates the on / off of the control signal applied to the reset gate.

[0224] Fig.29 Shows the corresponding Fig.28 The potential diagram for steps a to i in Figure 1. In a potential diagram, lower levels in the diagram correspond to higher voltages, and higher levels in the diagram correspond to lower voltages. This means that the sign of the potential is defined as the electron moving from a higher position in the diagram to a lower position.

[0225] In (a), the photodiode (PD) is reset by clearing the charge in the photodiode (PD). The potential diagram indicates that the first charge transfer gate (Tx1) is turned on (i.e., there is no barrier and charge movement is allowed), and the reset gate (RS) is turned on. (In Fig.29 In the figure, the horizontal direction schematically indicates the charge path from PD to Tx1, SN. The reset gate RS outside this path overlaps with ST in the figure. Conceptually, RS can be considered to be located after Tx1. ) The potential at the first charge transfer gate (Tx1) is at the same level (potential) as the drain VD1.

[0226] In (b), the first charge transfer gate (Tx1) is turned off (closed) to start charge accumulation (signal integration) at the photodiode (PD). Now, the sensing node (SN) is separated from Tx1, and it now has a floating potential and is ready to measure the charge accumulated on the sensing node (SN). This process is called resetting the sensing node (SN).

[0227] In (c), signal charges are accumulated on a photodiode (PD) during an accumulation period (integration period).

[0228] In (f), the reset gate (RS) is turned off; under this condition, the analog-to-digital converter (ADC) performs a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN). Fig.28 , which is represented in the rows labeled AD in the figure. Since the charge from the photodiode (PD) has not yet accumulated in the sensing node (SN), this is a reset level measurement. This is used in correlated double sampling (CDS), taking the difference between the signal level measurement and the reset level measurement. CDS is a technique that can remove signal-independent noise, such as kTC noise (thermal noise associated with the capacitance of the sensor circuit) by taking the difference between two measurements (samples): the output when the reset voltage is applied ("reset level") and the output when the signal voltage is applied ("signal level").

[0229] In (i), the first charge transfer gate (Tx1) is turned on, so that the signal charge on the photodiode (PD) is transferred to the first charge transfer gate (Tx1) and the sensing node (SN), and then the first charge transfer gate (Tx1) is turned off. By using the first charge transfer gate (Tx1) (as opposed to a simple diffusion region without an electrode), the charge transfer from the photodiode (PD) to the sensing node (SN) is a complete transfer. Then, the first charge transfer gate (Tx1) is turned off (low voltage; higher level in the potential diagram), so that the signal charge on the first charge transfer gate (Tx1) is transferred to the sensing node (SN). Under this condition, the ADC performs a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN).

[0230] This AD conversion with the first charge transfer gate (Tx1) turned off and the AD conversion of step (f) with the first charge transfer gate (Tx1) turned off are both associated with higher conversion gains. Step (i) performs a signal level measurement, while step (f) performs a reset level measurement. These measurements are combined in the CDS to provide a high conversion gain measurement and remove noise that is not related to the signal.

[0231] As shown in step (i), the "on" state (high voltage; lower level in the potential diagram) of the first charge transfer gate (Tx1) allows the charge from the photodiode (PD) to be stored on the first charge transfer gate (Tx1), while the "off" state of the first charge transfer gate (Tx1) allows the charge stored on the first charge transfer gate (Tx1) to be transferred to the sensing node (SN). Therefore, the first charge transfer gate (Tx1) is used for storage and transfer of charge.

[0232] As described above, the photosensitive pixel according to the present embodiment supports CDS for suppressing kTC noise.

[0233] The third embodiment can be combined with any suitable features described in conjunction with the first embodiment. For the sake of brevity, no further description will be given.

[0234] Although various embodiments have been described above and shown in the drawings, the invention is not limited to the specific embodiments described or shown.

[0235] The unit division disclosed in the embodiments of the present application is not limiting, and the embodiments may be configured with other component divisions.

[0236] Where appropriate, some functions may be implemented in the form of a computer program for causing a processor or computing device to perform one or more functions. For example, various control operations may be implemented as computer programs. The computer program may be a non-transitory computer-readable storage medium. The storage medium may be any medium that can store a computer program, and may be a solid-state memory such as a USB drive, a flash drive, a read-only memory (ROM), a random-access memory (RAM), or a magnetic storage medium, such as a removable or non-removable hard disk, or an optical storage medium such as a CD. The control functions may also be implemented using discrete or integrated circuit components.

[0237] Terms such as "first", "second" and the like may be used to distinguish different instances of an entity and may not indicate any order in time, space or level.

[0238] The expression "A and / or B" may mean "A and B" as well as "A or B", thus including "A and B", "A", and "B". The expression "A, B, and / or C" means "A and / or B and / or C", thus including "A and B and C", "A and B", "B and C", "A and C", "A", "B", and "C". The same principle applies to any number of elements connected with "and / or".

[0239] The above description is only used to illustrate various embodiments of the present application and is not intended to limit the scope of the present invention. Any changes that those skilled in the art can easily think of according to the present invention should be within the scope of the present application. For example, the measures disclosed separately can be appropriately combined in a single embodiment, as long as these measures are not mutually exclusive.

Claims

1. A photosensitive pixel, characterized in that: include: Photodiode (PD), used to generate photoelectrons; a first charge transfer gate (Tx1); Charge storage and transfer electrodes (ST); a second charge transfer gate (Tx2); Sensing node (SN); a reset gate (RS) coupled to the charge storage and transfer electrode (ST); a drain (VD1) coupled to the reset gate; an amplifier (AMP), coupled to the sensing node, wherein the first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the photodiode (PD) to the charge storage and transfer electrode (ST) to allow charge transfer; wherein the second charge transfer gate (Tx2) is controlled by a second control signal from the controller to couple the charge storage and transfer electrode (ST) to the sensing node (SN) to allow charge transfer; wherein the second transfer gate (Tx2), the charge storage and transfer electrode (ST) and the reset gate (RS) are controlled by a third control signal from the controller to reset the potential of the sensing node (SN); The charges generated on the photodiode (PD) are transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2).

2. The photosensitive pixel according to claim 1, characterized in that: The first charge transfer gate (Tx1), the second charge transfer gate (Tx2), the reset gate (RS) and / or the charge storage and transfer electrode (ST) are formed as MOSFET transistors.

3. The photosensitive pixel according to claim 1, characterized in that: The charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2) by the following steps: (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during an accumulation period; (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN); (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS); (f) turning off the reset gate (RS) to perform a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN) through an analog-to-digital converter (ADC); (g) turning on the second charge transfer gate (Tx2) to perform a second reset level AD conversion (AD0_L) on the output of the amplifier coupled to the sensing node through the ADC; (h) turning off the second charge transfer gate (Tx2) and turning on the charge storage and transfer electrode (ST); (i) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), turning off the first charge transfer gate (Tx1), and turning off the charge storage and transfer electrode (ST); (j) turning on the second charge transfer gate (Tx2) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), and turning off the second charge transfer gate (Tx2) to perform a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN) through the ADC; (k) turning on the second charge transfer gate (Tx2) to perform a second signal level AD conversion (ADs_L) ​​on the output of the amplifier coupled to the sensing node through the ADC.

4. The photosensitive pixel according to claim 1, characterized in that: The charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2) by the following steps: (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during an accumulation period; (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN); (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS); (f) turning off the reset gate (RS) to perform a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN) through an analog-to-digital converter (ADC); (h') turning on the charge storage and transfer electrode (ST); (i) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), turning off the first charge transfer gate (Tx1), and turning off the charge storage and transfer electrode (ST); (j) turning on the second charge transfer gate (Tx2) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), and turning off the second charge transfer gate (Tx2) to perform a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN) through the ADC.

5. The photosensitive pixel according to claim 1, characterized in that: The charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2) by the following steps: (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during an accumulation period; (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN); (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS); (f') turning off the reset gate (RS); (h') turning on the charge storage and transfer electrode (ST); (i) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), turning off the first charge transfer gate (Tx1), and turning off the charge storage and transfer electrode (ST); (j) turning on the second charge transfer gate (Tx2) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), and turning off the second charge transfer gate (Tx2) to perform a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN) through the ADC.

6. The photosensitive pixel according to claim 3, characterized in that: During the accumulation period, the second charge transfer gate (Tx2), the charge storage and transfer electrode (ST) and the reset gate (RS) are turned off.

7. The photosensitive pixel according to claim 1, characterized in that: The charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2) by the following steps: (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during an accumulation period; (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN); (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS); (f) turning off the reset gate (RS) to perform a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN) through an analog-to-digital converter (ADC); (g) turning on the second charge transfer gate (Tx2) to perform a second reset level AD conversion (AD0_L) on the output of the amplifier coupled to the sensing node through the ADC; (h) turning off the second charge transfer gate (Tx2) and turning on the charge storage and transfer electrode (ST); (i') turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), and turning off the first charge transfer gate (Tx1); (j') turning on the second charge transfer gate (Tx2) and then turning off the charge storage and transfer electrode (ST) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the second charge transfer electrode (Tx2) and the sensing node (SN), so as to perform a second signal level AD conversion (ADs_L) ​​on the output of the amplifier coupled to the sensing node (SN) through the ADC; (k′) turning off the second charge transfer gate (Tx2) to perform a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node through the ADC.

8. The photosensitive pixel according to claim 1, characterized in that: Also includes: An overflow channel (OFC) is used to allow the overflow charges to flow out to the drain.

9. A pixel array, characterized in that: A method of manufacturing a photosensitive image sensor comprising a plurality of light-sensitive pixels arranged in an array of a plurality of rows and a plurality of columns, wherein each light-sensitive pixel comprises: Photodiode (PD), used to generate photoelectrons; a first charge transfer gate (Tx1); Charge storage and transfer electrodes (ST); a second charge transfer gate (Tx2); Sensing node (SN); a reset gate (RS) coupled to the charge storage and transfer electrode (ST); a drain (VD1) coupled to the reset gate; an amplifier (AMP), coupled to the sensing node, wherein the first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the photodiode (PD) to the charge storage and transfer electrode (ST) to allow charge transfer; wherein the second charge transfer gate (Tx2) is controlled by a second control signal from the controller to couple the charge storage and transfer electrode (ST) to the sensing node (SN) to allow charge transfer; wherein the second transfer gate (Tx2), the charge storage and transfer electrode (ST) and the reset gate (RS) are controlled by a third control signal from the controller to reset the potential of the sensing node (SN); The charges generated on the photodiode (PD) are transferred to the sensing node (SN) through the first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2).

10. The pixel array according to claim 9, characterized in that: More than one photosensitive pixel shares the charge storage and transfer electrode (ST), the second charge transfer gate (Tx2), the sending node (SN), the reset gate (RS), the drain (VD1) and the amplifier (AMP).

11. A pixel array, characterized in that: The method comprises a plurality of photosensitive pixel groups, each of which comprises: A plurality of photodiodes (PDs) for generating photoelectrons; A plurality of first charge transfer gates (Tx1), respectively associated with the plurality of photodiodes (PD); Shared charge storage and transfer electrodes (ST); a shared second charge transfer gate (Tx2); Shared sensing node (SN); a shared reset gate (RS) coupled to the charge storage and transfer electrode (ST); a shared drain (VD1) coupled to the reset gate; a shared amplifier (AMP), coupled to the sensing node, wherein the first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the associated photodiode (PD) to the charge storage and transfer electrode (ST) to allow charge transfer; wherein the second charge transfer gate (Tx2) is controlled by a second control signal from the controller to couple the charge storage and transfer electrode (ST) to the sensing node (SN) to allow charge transfer; wherein the second transfer gate (Tx2), the charge storage and transfer electrode (ST) and the reset gate (RS) are controlled by a third control signal from the controller to reset the potential of the sensing node (SN); The charges generated on each photodiode (PD) are transferred to the sensing node (SN) through the associated first charge transfer gate (Tx1), the charge storage and transfer electrode (ST) and the second charge transfer gate (Tx2).

12. The pixel array according to claim 11, characterized in that: Each photosensitive pixel group includes four photodiodes and four associated first charge transfer gates.

13. The pixel array according to claim 12, characterized in that: The four photodiodes of each photosensitive pixel group are arranged in a 2×2 array, wherein the first charge transfer gate (Tx) is arranged at a corner of each photodiode facing the center of the four photodiodes, and the charge storage and transfer electrode is arranged in the center of the four photodiodes.

14. An image sensor, characterized in that: include: A pixel array according to any one of claims 9 to 13; a readout circuit for reading out signals from the photosensitive pixels in the pixel array, Wherein, the readout circuit comprises: a vertical scanner for sequentially selecting rows of the array; Horizontal scanner; Analog-to-digital conversion unit; (i) the analog-to-digital conversion unit converts analog signals from photosensitive pixels of corresponding columns on the selected row in parallel, and the horizontal scanner sequentially selects digital values ​​of corresponding columns for output; or (ii) The horizontal scanner sequentially selects analog signals from the photosensitive pixels of the corresponding columns, and the analog-to-digital conversion unit performs analog-to-digital conversion on the sequentially selected analog signals.

15. The image sensor according to claim 14, characterized in that: Correlated double sampling (CDS) is performed, so that the difference between the value obtained by the first signal level AD conversion (ADs_H) and the value obtained by the first reset level AD conversion (AD0_H) is used as a high conversion gain signal, and the difference between the value obtained by the second signal level AD conversion (ADs_L) ​​and the value obtained by the second reset level AD conversion (AD0_L) is used as a low conversion gain signal.

16. The image sensor according to claim 14, characterized in that (A) All the photodiodes are reset and the accumulation cycle begins; (B) the charge storage and transfer electrode (ST) is cleared of charges on all the pixels; (C) the sensing nodes (SN) of all the pixels are reset; (D) performing a reset level AD conversion (AD0_H) on the first pixel row, turning on the second charge transfer gate (Tx2) on the first pixel row so that the signal charge in the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), and then the second charge transfer gate (Tx2) is turned off, and then performing a signal level AD conversion (ADs_H) on the first pixel row; (E) performing a reset level AD conversion (AD0_H) on the second pixel row, turning on the second charge transfer gate (Tx2) of the second pixel row so that the signal charge in the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), and then the second charge transfer gate (Tx2) is turned off, and then performing a signal level AD conversion (ADs_H) on the second pixel row.

17. The image sensor according to claim 16, characterized in that: Correlated double sampling (CDS) is performed, in which, for each pixel row, a difference between a value obtained by a corresponding signal level AD conversion (ADs_H) and a value obtained by a corresponding reset level AD conversion is determined.

18. The image sensor according to claim 16 or 17, characterized in that: An overflow channel is also included for releasing overflow charges from the photodiode to the drain.

19. An electronic device, characterized in that: Comprising the image sensor according to claim 14.

20. A method for reading a signal from a photosensitive pixel, characterized in that: include: Photodiode (PD), used to generate photoelectrons; a first charge transfer gate (Tx1); Charge storage and transfer electrodes (ST); a second charge transfer gate (Tx2); Sensing node (SN); a reset gate (RS) coupled to the charge storage and transfer electrode (ST); a drain (VD1) coupled to the reset gate; an amplifier (AMP) coupled to the sensing node, the method comprising: (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during an accumulation period; (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN); (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS); (f1) turning off the reset gate (RS); (h2) turning on the charge storage and transfer electrode (ST); (i) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), turning off the first charge transfer gate (Tx1), and turning off the charge storage and transfer electrode (ST); (j) turning on the second charge transfer gate (Tx2) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), turning off the second charge transfer gate (Tx2), and performing a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN) through the ADC.

21. The method according to claim 20, characterized in that The method further comprises, after the step of (f1) turning off the reset gate (RS): (f2) performing a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN) through an analog-to-digital converter (ADC).

22. The method according to claim 21, characterized in that Also includes: After (f2), (g) turning on the second charge transfer gate (Tx2) and performing a second reset level AD conversion (AD0_L) on the output of the amplifier coupled to the sensing node through the ADC; (h1) turning off the second charge transfer gate (Tx2); After (j), (k) turning on the second charge transfer gate (Tx2) and performing a second signal level AD conversion (ADs_L) ​​on the output of the amplifier coupled to the sensing node through the ADC.

23. The method according to claim 20, characterized in that During the accumulation period, the second charge transfer gate (Tx2), the charge storage and transfer electrode (ST) and the reset gate (RS) are turned off.

24. A method for reading a signal from a photosensitive pixel, characterized in that: include: Photodiode (PD), used to generate photoelectrons; a first charge transfer gate (Tx1); Charge storage and transfer electrodes (ST); a second charge transfer gate (Tx2); Sensing node (SN); a reset gate (RS) coupled to the charge storage and transfer electrode (ST); a drain (VD1) coupled to the reset gate; an amplifier (AMP) coupled to the sensing node, the method comprising: (a) resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during an accumulation period; (d) turning off the second charge transfer gate (Tx2) to reset the sensing node (SN); (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS); (f) turning off the reset gate (RS) and performing a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN) by an analog-to-digital converter (ADC); (g) turning on the reset gate (RS) and performing a second reset level AD conversion (AD0_L) on the output of the amplifier coupled to the sensing node through the ADC; (h) turning off the second charge transfer gate (Tx2) and turning on the charge storage and transfer electrode (ST); (i') turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), and turning off the first charge transfer gate (Tx1); (j') turning on the second charge transfer gate (Tx2), and then turning off the charge storage and transfer electrode (ST) so that the signal charge on the charge storage and transfer electrode (ST) is transferred to the second charge transfer electrode (Tx2) and the sensing node (SN), and performing a second signal level AD conversion (ADs_L) ​​on the output of the amplifier coupled to the sensing node (SN) through the ADC; (k′) turning off the second charge transfer gate (Tx2) and performing a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node through the ADC.

25. A method for reading a signal from a pixel array, characterized in that: The pixel array includes a plurality of photosensitive pixel groups, each photosensitive pixel group including: A plurality of photodiodes (PDs) for generating photoelectrons; A plurality of first charge transfer gates (Tx1), respectively associated with the plurality of photodiodes (PD); Shared charge storage and transfer electrodes (ST); a shared second charge transfer gate (Tx2); Shared sensing node (SN); a shared reset gate (RS) coupled to the charge storage and transfer electrode (ST); a shared drain (VD1) coupled to the reset gate; a shared amplifier (AMP), coupled to the sensing node, The method comprises performing a readout from each pixel according to any one of claims 20 to 24.

26. A method for reading a signal from a pixel array, characterized in that: The pixel array includes a plurality of photosensitive pixel groups, each photosensitive pixel group including: A plurality of photodiodes (PDs) for generating photoelectrons; A plurality of first charge transfer gates (Tx1), respectively associated with the plurality of photodiodes (PD); Shared charge storage and transfer electrodes (ST); a shared second charge transfer gate (Tx2); Shared sensing node (SN); a shared reset gate (RS) coupled to the charge storage and transfer electrode (ST); a shared drain (VD1) coupled to the reset gate; a shared amplifier (AMP), coupled to the sensing node, The method comprises: (A) All the photodiodes are reset and the accumulation cycle begins; (B) the charge storage and transfer electrode (ST) is cleared of charges on all the pixels; (C) the sensing nodes (SN) of all the pixels are reset; (D) performing a reset level AD conversion (AD0_H) on the first pixel row, turning on the second charge transfer gate (Tx2) on the first pixel row so that the signal charge in the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), and then the second charge transfer gate (Tx2) is turned off, and then performing a signal level AD conversion (ADs_H) on the first pixel row; (E) performing a reset level AD conversion (AD0_H) on the second pixel row, turning on the second charge transfer gate (Tx2) of the second pixel row so that the signal charge in the charge storage and transfer electrode (ST) is transferred to the sensing node (SN), and then the second charge transfer gate (Tx2) is turned off, and then performing a signal level AD conversion (ADs_H) on the second pixel row.

27. A computer program, characterized in that Used to cause a controller to execute the method according to any one of claims 20 to 26.

28. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program for causing a computer to execute the method according to any one of claims 20 to 26.

29. A photosensitive pixel, characterized in that: include: Photodiode (PD), used to generate photoelectrons; Grid group; Sensing node (SN); a drain (VD1) coupled to the gate set; an amplifier (AMP), coupled to the sensing node, wherein the gate set is controlled by a first control signal from a controller to couple the photodiode (PD) to the sensing node (SN) to allow charge transfer, The gate group is controlled by a second control signal from the controller to reset the potential of the sensing node (SN).

30. The light-sensitive pixel according to claim 29, characterized in that More than one photosensitive pixel shares a portion of the gate set, the sending node (SN), the reset gate (RS), the drain (VD1), and the amplifier (AMP).

31. A photosensitive pixel, characterized in that: include: Photodiode (PD), used to generate photoelectrons; a first charge transfer gate (Tx1); Charge storage and transfer electrodes (ST); Sensing node (SN); a reset gate (RS) coupled to the charge storage and transfer electrode (ST); a drain (VD1) coupled to the reset gate; an amplifier (AMP), coupled to the sensing node, wherein the first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the photodiode (PD) to the charge storage and transfer electrode (ST) to allow charge transfer; wherein the charge storage and transfer electrode (ST) and the reset gate (RS) are controlled by a second control signal from the controller to reset the potential of the sensing node (SN); The charges generated on the photodiode (PD) are transferred to the sensing node (SN) through the first charge transfer gate (Tx1) and the charge storage and transfer electrode (ST).

32. A photosensitive pixel, characterized in that: include: Photodiode (PD), used to generate photoelectrons; a first charge transfer gate (Tx1); Sensing node (SN); a reset gate (RS) coupled to the first charge transfer gate (Tx1); a drain (VD1) coupled to the reset gate; an amplifier (AMP), coupled to the sensing node, wherein the first charge transfer gate (Tx1) is controlled by a first control signal from a controller to couple the photodiode (PD) to the sensing node (SN) to allow charge transfer; wherein the first charge transfer electrode (Tx1) and the reset gate (RS) are controlled by a second control signal from the controller to reset the potential of the sensing node (SN); The charges generated on the photodiode (PD) are transferred to the sensing node (SN) through the first charge transfer gate (Tx1).

33. The photosensitive pixel according to claim 31, characterized in that The charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1) and the charge storage and transfer electrode (ST) by the following steps: (a) turning on the first charge transfer gate (Tx1) and resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode; (c) accumulating signal charge on the photodiode (PD) during an accumulation period; (e) turning off the charge storage and transfer electrode (ST) to clear the charge on the charge storage and transfer electrode (ST) to the drain (VD1) through the reset gate (RS), and resetting the sensing node (SN); (f) turning off the reset gate (RS) to perform a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN) through an analog-to-digital converter (ADC); (g) turning on the charge storage and transfer electrode (ST) to perform a second reset level AD conversion (AD0_L) on the output of the amplifier coupled to the sensing node through the ADC; (i) turning on the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the charge storage and transfer electrode (ST), turning off the first charge transfer gate (Tx1), and turning off the charge storage and transfer electrode (ST) to perform a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN) through the ADC; (k) turning on the charge storage and transfer gate (ST) to perform a second signal level AD conversion (ADs_L) ​​on the output of the amplifier coupled to the sensing node through the ADC.

34. The photosensitive pixel according to claim 32, characterized in that The charge generated on the photodiode (PD) is transferred to the sensing node (SN) through the first charge transfer gate (Tx1) by the following steps: (a) turning on the first charge transfer gate (Tx1) and resetting the photodiode (PD) by clearing the charge in the photodiode (PD); (b) turning off the first charge transfer gate (Tx1) to start charge accumulation on the photodiode and resetting the sensing node (SN); (c) accumulating signal charge on the photodiode (PD) during an accumulation period; (f) turning off the reset gate (RS) to perform a first reset level analog-to-digital (AD) conversion (AD0_H) on the output of the amplifier coupled to the sensing node (SN) through an analog-to-digital converter (ADC); (i) turning on and then turning off the first charge transfer gate (Tx1) so that the signal charge on the photodiode (PD) is transferred to the sensing node (SN) to perform a first signal level AD conversion (ADs_H) on the output of the amplifier coupled to the sensing node (SN) through the ADC.

Images