Thermal interface material for multi-chip packaging and preparation method thereof

By using pulsed laser deposition technology to lay the gradient transition structure and inject phase change materials in multi-chip packaging, the problems of insufficient thermal conductivity and poor thermal equalization capabilities of traditional thermal interface materials are solved, and efficient thermal management and heat dissipation effects are achieved.

CN119614155APending Publication Date: 2025-03-14CHONGQING RES INST OF BEIJING UNIV OF TECH +1
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Patent Information

Application Number
CN202411679877.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-22
Publication Date
2025-03-14

AI Technical Summary

Technical Problem

Traditional thermal interface materials have problems such as insufficient thermal conductivity, concentrated interface stress and poor thermal equalization capabilities in multi-chip packaging, which is difficult to meet the needs of high power density scenarios.

Method used

Pulse laser deposition technology is used to lay gradient transition structures on ceramic-based copper clad plates, including nano-small particles, nano-medium particles and micro-large particle areas, and phase change materials and epoxy resins are injected into the sintered structure to seal.

Benefits of technology

Through the combination of gradient transition structure and phase change materials, efficient heat conduction and condensate reflux are achieved, which significantly improves the heat dissipation efficiency and interface stability of multi-chip packaging.

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Abstract

The invention relates to the technical field of chip packaging heat dissipation, in particular to a thermal interface material for multi-chip packaging and a preparation method of the thermal interface material. The preparation method comprises the following steps that 1, a nano small particle area, a nano medium particle area and a micron large particle area are sequentially laid on a DBC substrate in a pulse laser deposition mode to form a gradient transition structure; 2, sintering the DBC substrate deposited in the step 1 on a heat sink; step 3, cooling the sintered DBC substrate to room temperature in an inert gas environment; and 4, a phase change material is injected into the sintered gradient transition structure, and a circle of epoxy resin is printed on the periphery of the gradient transition structure for sealing. According to the thermal interface material for multi-chip packaging provided by the invention, a continuous multi-layer pore structure is formed through the gradual change design of the particle size, so that the heat-conducting property, the condensate backflow capability and the interface stability are improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging heat dissipation, and in particular to a thermal interface material for multi-chip packaging and a preparation method thereof. Background Art

[0002] With the increasing integration of electronic devices, especially in multi-chip packages (MCPs), the thermal management problem of devices is becoming increasingly serious. Traditional thermal interface materials (TIMs) used for power device packaging mainly include thermal paste, thermal pads, thermal films, thermal silicone and metal-based TIMs. Thermal paste has excellent thermal conductivity, but may dry and flow over time; thermal pads are easy to use, but have high thermal resistance; thermal films provide consistent performance and are suitable for mass production, but may fail at high temperatures; thermal silicone has good flexibility and strong insulation, but relatively low thermal conductivity; metal-based TIMs such as tin-based or Au-based materials have good thermal conductivity, but the service temperature of tin-based materials is limited, and the cost of Au-based materials is too high.

[0003] In summary, traditional thermal interface materials (TIMs) have problems such as insufficient thermal conductivity, interface stress concentration, and poor thermal balance, making it difficult to meet the needs of high power density scenarios. Summary of the invention

[0004] The object of the present invention is to provide a thermal interface material for multi-chip packaging and a preparation method thereof, which can solve the above technical problems.

[0005] The present invention provides a method for preparing a thermal interface material for multi-chip packaging, comprising the following steps:

[0006] Step 1: Pulsed laser deposition is used to sequentially lay nano-small particle areas, nano-medium particle areas and micron-large particle areas on the DBC substrate (ceramic-based copper-clad laminate) to form a gradient transition structure;

[0007] Step 2: Sintering the DBC substrate deposited in step 1 on a heat sink;

[0008] Step 3: Cool the sintered DBC substrate to room temperature in an inert gas environment;

[0009] Step 4: Inject phase change material into the sintered gradient transition structure and print a circle of epoxy resin around it for sealing.

[0010] Pulsed laser deposition (PLD) technology is used for micro / nano-laying of particles, such as Figure 3As shown. First, in an Ar atmosphere, turn on each device and place the DBC in the deposition chamber. The preferred target materials are high melting point single substances or intermetallic compound targets such as Cu, Ag, Ni, Cu3Sn, and Ag3Sn. The laser power is set to 20-100 W, the frequency is 50-400 kHz, the target-substrate distance is 50-200 mm, and the chamber pressure is 200-2000 Pa. The target-substrate distance changes continuously during the deposition process, ensuring the gradual transition of the particle size of the deposited particles. The deposition process is roughly divided into three stages.

[0011] The first stage: the deposition thickness of the nanoparticle area is 20-50 μm, the laser power is set to 20-60 W, the frequency is 50-400 kHz, the target-substrate distance is 150-200 mm, the gas pressure is 1500-2000 Pa, and a 50-400 nanometer small particle area is formed.

[0012] In the second stage, the deposition thickness of the nano-medium particle region in step 1 is 50-100 μm, the laser power is set to 60-80 W, the frequency is 50-400 kHz, the target-substrate distance is 100-150 mm, the gas pressure is 1000-1500 Pa, and a 400-1000 nanometer medium particle region (excluding 400 nanometers) is formed.

[0013] In the third stage, the deposition thickness of the micron-sized large particle area in step 1 is 100-150 μm, the laser power is set to 80-100 W, the frequency is 50-400 kHz, the target-substrate distance is 50-100 mm, the gas pressure is 500-1000 Pa, and a 1-3 μm large particle area (excluding 1 μm) is formed.

[0014] Preferably, the specific method of step 2 is: placing the DBC substrate deposited in step 1 into a hot pressing sintering furnace, evacuating the vacuum and introducing an inert gas to a positive pressure, and sintering at 160-260° C. The inert gas here is not limited to the gases of group 18 of the periodic table. Nitrogen is chemically inactive and has a certain degree of inertness, and is often used as an inert gas.

[0015] Preferably, in step 2, the vacuum is evacuated to 1×10- 2 -1×10- 4 Pa, and then introduce inert gas to positive pressure.

[0016] Preferably, the heating rate in step 2 is 20-60° C. / min.

[0017] Preferably, when the temperature reaches the set temperature, a pressure of 5-20 MPa is applied and the pressure is applied for 3-10 minutes.

[0018] Preferably, the phase change material is one of ultrapure water or ethanol.

[0019] The present invention also provides a thermal interface material for multi-chip packaging, which is prepared according to the above preparation method. The thermal interface material can fill the gap between the chip / DBC and DBC / heat sink interfaces, reduce the contact thermal resistance, and thus promote the conduction of heat from chip-DBC-heat sink, and improve the heat dissipation efficiency. In order to improve the heat dissipation effect of multi-chip packaging, a particle sintering method is adopted, and a sintering material structure based on a gradient transition of micro / nano particle size is proposed to avoid interface stratification and stress concentration; innovatively introduce phase change materials to improve the thermal conductivity of TIM materials, optimize the thermal conduction path and fluid flow channel, improve the reflux capacity of the condensate through the gradual pore structure, and use capillary action to solve the problem of poor thermal balance of the thermal conductive layer, so as to achieve stronger thermal conductivity and more efficient thermal management capabilities.

[0020] Beneficial effects:

[0021] The present invention proposes a thermal interface material for multi-chip packaging, which forms a continuous multi-level pore structure through a gradual change in particle size, thereby improving thermal conductivity, condensate reflux capacity and interface stability. The material and structure utilize the gradient change of particle size to avoid interface stress concentration and stratification problems, and provide an efficient and reliable thermal management solution. The present invention is suitable for high power density and multi-chip packaging scenarios, and can significantly improve the thermal management effect of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0023] Figure 1 This is a schematic diagram of the packaging structure of the thermal interface material of the present invention;

[0024] Figure 2 It is a schematic diagram of the automatic distribution of liquid by capillary action in the present invention;

[0025] Figure 3 Schematic diagram of the pulsed laser deposition (PLD) technology used in the present invention;

[0026] Figure 4 It is a comparison diagram of junction temperature between a common sintered copper structure and the structure of the present invention.

[0027] Explanation of the reference numerals: 1-DBC substrate, 2-mask plate, 3-incident laser, 4-target material, 5-chip, 6-alumina ceramic, 7-Cu coating layer, 8-gradient transition structure, 9-phase change material, 10-heat sink, 11-epoxy resin. DETAILED DESCRIPTION

[0028] The technical solution of the present invention will be described clearly and completely in conjunction with the embodiments below. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0029] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0030] In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. In addition, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, and it can be the internal connection of two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0031] Example 1

[0032] In a high heat density vehicle IGBT module, the material of the present invention is used for thermal management. A condensate channel is designed in a 60mm×150mm thermal interface layer, and efficient condensate flow and reflux management is achieved within a thickness of 300 microns. The following are specific design solutions and parameters:

[0033] The thermal interface layer is composed of sintered copper material and is designed in layers with particles of different sizes to form an effective condensate channel network, allowing the condensate to flow efficiently within the thermal interface layer.

[0034] Pulsed laser deposition (PLD) technology is used to lay copper particles, such as Figure 3 First, in an Ar atmosphere, turn on each device and place DBC into the deposition chamber, with the target material being Cu. The deposition process is roughly divided into three stages:

[0035] In the first stage, the deposition thickness was 50 μm, the laser power was set to 60 W, the frequency was 400 kHz, the target-substrate distance was continuously changed from 150 to 200 mm, and the gas pressure was 1500 Pa, forming a region of small particles of 50 to 400 nanometers.

[0036] In the second stage, the deposition thickness was 100 μm, the laser power was set to 80 W, the frequency was 400 kHz, the target-substrate distance was continuously changed from 100 to 150 mm, and the gas pressure was 1000 Pa, forming a medium-sized particle region of 400 to 1000 nanometers.

[0037] The deposition thickness in the third stage was 150 μm, the laser power was set to 100 W, the frequency was 200-400 kHz, the target-substrate distance was continuously changed from 50 to 100 mm, and the gas pressure was 500 Pa, forming a 1-3 μm large particle area.

[0038] After that, the sample is sintered on the heat sink, and the sample is placed in the hot pressing sintering furnace of the sintering equipment. The inner cavity of the packaging equipment is evacuated to 1×10- 2 Pa, and then N2 gas is introduced to positive pressure. The temperature is raised to 260 °C, and the heating rate is 60 °C / min. When the temperature reaches the specified temperature, a pressure of 10 MPa is applied and pressurized for 5 minutes. After the pressurization is completed, the sample is cooled to room temperature in an inert gas environment. Finally, ultrapure water is injected into the sintered gradient transition structure, and a circle of epoxy resin is printed around it for sealing. The packaging structure is as follows Figure 1 shown.

[0039] Example 2

[0040] In the manufacture of high-power vertical GaN RF modules, the material-level structural packaging of the present invention is used to achieve efficient condensate flow and heat management. The following are specific design solutions and parameters:

[0041] The thermal interface layer is composed of sintered Ag material and is designed in layers with particles of different sizes to form an effective condensate channel network, allowing the condensate to flow efficiently within the thermal interface layer.

[0042] The silver particles are laid using pulsed laser deposition (PLD) technology, such as Figure 3 As shown. First, in N2 atmosphere, turn on each device and put DBC into the deposition chamber, with Ag as the target material. The deposition process is roughly divided into three stages:

[0043] In the first stage, the deposition thickness was 20 μm, the laser power was set to 40 W, the frequency was 400 kHz, the target-substrate distance was continuously changed from 150 to 200 mm, and the gas pressure was 2000 Pa, forming a region of small particles of 50 to 400 nanometers.

[0044] In the second stage, the deposition thickness was 100 μm, the laser power was set to 50 W, the frequency was 400 kHz, the target-substrate distance was continuously changed from 100 to 150 mm, and the gas pressure was 1500 Pa, forming a medium-sized particle region of 400-1000 nanometers.

[0045] The deposition thickness in the third stage was 100 μm, the laser power was set to 80 W, the frequency was 400 kHz, the target-substrate distance was continuously changed from 50 to 100 mm, and the gas pressure was 500 Pa, forming a large particle area of ​​1 to 3 μm.

[0046] Afterwards, the sample was sintered on a heat sink, and the sample was placed in a sintering device. The inner cavity of the packaging device was evacuated to 1×10- 2 Pa, and then N2 gas is introduced to positive pressure. The temperature is raised to 250 ℃, and the heating rate is 60 ℃ / min. When the temperature reaches the specified temperature, a pressure of 5 MPa is applied and pressurized for 3 min. After the pressurization is completed, the sample is cooled to room temperature in an inert gas environment. Finally, ultrapure water is injected into the sintered gradient transition structure, and a circle of epoxy resin is printed around it for sealing.

[0047] Comparative Example 1:

[0048] The half-bridge IGBT device was packaged using the material of the present invention, and was packaged using a Cu material with a particle size of 400 nm as a comparative example. The sintering and packaging processes used in both were consistent with those in Example 1. After the preparation was completed, a power cycle method was used for testing. The test conditions are shown in Table 1 below. The junction temperature is Figure 4 As shown, it can be found that the junction temperature is significantly reduced by using the material and structure of the present invention, which can prove that the present invention is more helpful for chip heat dissipation.

[0049] Table 1 Power cycle test conditions

[0050]

[0051] The present invention relates to the design and preparation of a gradient sintered material structure, which aims to form a continuous porous structure through a gradient transition of micro / nano particle size to achieve excellent heat conduction, condensate reflux and thermal management. Specifically, the design gradually transitions the particles from nanometer size (50-400 nanometers) to micrometer size (1-3 micrometers) to form microchannels of different widths. The thermal interface area can be roughly divided into a small particle area, a medium particle area, and a large particle area. Among them, the small particle area (50-400 nanometers) helps to improve capillary force and promote liquid reflux; the medium particle area (400-1000 nanometers) serves as a transition of the thermal conduction path to enhance the interface bonding strength; and the large particle area (1-3 micrometers) ensures rapid heat transfer and condensate flow.

[0052] This gradient structure is particularly suitable for the mechanical-thermal coordinated management of multi-chip packaging. When there are multiple heat sources, when a chip is overheated, the phase change material in the corresponding area will evaporate faster, resulting in less liquid. The sintering of small particles to form microchannels can enhance the capillary effect. The liquid is automatically distributed to the high-temperature area through capillary action, thereby effectively dissipating the heat and avoiding local overheating. Figure 2 As shown. The large particle area provides an efficient heat conduction channel, which quickly conducts the heat inside the package to the heat sink, improving the heat dissipation efficiency. In addition, the gradient transition structure effectively avoids the stress concentration problem and ensures the long-term stability of the material during the thermal cycle. Through these designs and processes, the present invention not only improves the heat dissipation capacity of the multi-chip package, but also extends the service life of the entire system. It has broad application prospects.

[0053] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. However, these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing a thermal interface material for multi-chip packaging, characterized in that The following steps are involved: Step 1: Pulsed laser deposition is used to sequentially lay a nano-small particle area, a nano-medium particle area and a micron-large particle area on the DBC substrate to form a gradient transition structure; Step 2: Sintering the DBC substrate deposited in step 1 on a heat sink; Step 3: Cool the sintered DBC substrate to room temperature in an inert gas environment; Step 4: Inject phase change material into the sintered gradient transition structure and print a circle of epoxy resin around it for sealing.

2. The preparation method according to claim 1, characterized in that: In the step 1, the deposition thickness of the nanoparticle region is 20-50 μm, the laser power is set to 20-60 W, the frequency is 50-400 kHz, the target-substrate distance is 150-200 mm, the gas pressure is 1500-2000 Pa, and a 50-400 nanometer particle region is formed.

3. The preparation method according to claim 1, characterized in that: In the step 1, the deposition thickness of the nano-medium particle region is 50-100 μm, the laser power is set to 60-80 W, the frequency is 50-400 kHz, the target-substrate distance is 100-150 mm, the gas pressure is 1000-1500 Pa, and a 400-1000 nanometer medium particle region is formed.

4. The preparation method according to claim 1, characterized in that: In step 1, the deposition thickness of the micron-sized large particle area is 100-150 μm, the laser power is set to 80-100 W, the frequency is 50-400 kHz, the target-substrate distance is 50-100 mm, the air pressure is 500-1000 Pa, and a 1-3 micron-sized large particle area is formed.

5. The preparation method according to claim 1, characterized in that: The specific method of step 2 is: placing the DBC substrate deposited in step 1 into a hot pressing sintering furnace, evacuating the vacuum and introducing inert gas to a positive pressure, and sintering at 160-260°C.

6. The preparation method according to claim 5, characterized in that: In step 2, the vacuum is evacuated to 1×10 -2 -1×10 - 4 Pa, and then introduce inert gas to positive pressure.

7. The preparation method according to claim 5, characterized in that: The heating rate of step 2 is 20-60°C / min.

8. The preparation method according to claim 5, characterized in that: When the temperature reaches the set temperature, apply 5-20MPa pressure and pressurize for 3-10 minutes.

9. The preparation method according to claim 1, characterized in that: The phase change material is one of ultrapure water or ethanol.

10. A thermal interface material for multi-chip packaging, characterized in that: Prepared according to any one of the preparation methods of claims 1-9.