A cluster scheduling method and device of an algorithm chip

Abstract

The application discloses a kind of cluster scheduling method and device of algorithm chip, obtains the scheduling task of algorithm chip cluster, chip function information and chip data information, and according to scheduling task identification algorithm chip cluster determines functional requirement information, according to chip function information screening determines the target algorithm chip of functional requirement information corresponding, and then generates and executes chip scheduling information, obtains the execution result information of feedback, and when determining that there is abnormal scheduling information, based on scheduling exception information determines the abnormal reason of abnormal algorithm chip, adjusts its corresponding chip scheduling information according to abnormal reason, executes the chip scheduling information of adjustment until there is no abnormal scheduling information in the execution result of feedback. Through the above scheduling method, the automatic scheduling of algorithm chip cluster is realized, the integrity of the normal execution of the scheduling information of algorithm chip cluster is ensured, and the execution efficiency of the scheduling task and the accuracy of the scheduling task execution are improved.

Description

Technical Field

[0001] This invention relates to the field of algorithm chip cluster technology, and in particular to a cluster scheduling method and apparatus for algorithm chips. Background Technology

[0002] Traditional algorithm controller chip-driven algorithm chip technology typically relies on internal manuals provided by manufacturers to schedule individual algorithm chips, and cannot schedule algorithm chip clusters. Therefore, how to directly schedule algorithm chip clusters is a current research focus.

[0003] Traditional scheduling methods for algorithm chip clusters require a large number of main control chips to schedule each algorithm chip individually in order to schedule the entire algorithm chip cluster. However, this method has high resource costs and long scheduling time, resulting in low scheduling efficiency for the algorithm chip cluster. Summary of the Invention

[0004] This invention provides a cluster scheduling method and apparatus for algorithm chips, which improves the cluster scheduling efficiency of algorithm chips and enhances the efficiency of anomaly elimination in processing abnormal data of abnormal algorithm chips.

[0005] To address the aforementioned technical problems, this invention provides a cluster scheduling method for algorithm chips, comprising the following steps:

[0006] The algorithm chip cluster is obtained by acquiring the scheduling task of the algorithm chip cluster, as well as the first chip function information and the first chip data information of each algorithm chip. Based on the scheduling task, the algorithm chip cluster is identified to obtain the first functional requirement information.

[0007] Based on the first chip function information, the target algorithm chip corresponding to each first function requirement information is determined, and based on the second chip data information of the target algorithm chip, the first chip scheduling information corresponding to the first function requirement information is generated.

[0008] The algorithm chip cluster is scheduled according to the first chip scheduling information, and the execution result information fed back by the algorithm chip cluster is obtained;

[0009] When the execution result information contains abnormal scheduling information, the abnormal cause of the corresponding abnormal algorithm chip is identified based on the abnormal scheduling information, and the first chip scheduling information of the abnormal algorithm chip is adjusted according to the abnormal cause to obtain the second chip scheduling information;

[0010] The first chip scheduling information of the abnormal algorithm chip is updated according to the second chip scheduling information, and the algorithm chip cluster is scheduled according to the second chip scheduling information until the execution result information does not contain the abnormal scheduling information.

[0011] The algorithm chip cluster scheduling method provided by this invention first obtains the scheduling task of the algorithm chip cluster, as well as the first chip function information and first chip data information of each algorithm chip. That is, it obtains the chip function information and chip data information of all algorithm chips in the algorithm chip cluster that needs to be clustered and scheduled. Based on the obtained scheduling task, it identifies the algorithm chip cluster that needs to be scheduled and obtains the functional requirement information of each algorithm chip, providing data reference for subsequently determining the target scheduling chip of each algorithm chip to be scheduled.

[0012] After determining the functional requirements of each algorithm chip, the system identifies the target algorithm chip corresponding to each chip's functional requirements. Specifically, it determines the corresponding functional information that can fulfill the requirements of each algorithm chip based on the data information needed to schedule them, and then identifies the target scheduling chip that can schedule that algorithm chip. After identifying the target algorithm chips that can schedule the cluster, the system generates chip scheduling information corresponding to the functional requirements of the scheduling algorithm chip cluster based on the data information of the target algorithm chips. This first chip scheduling information enables automated scheduling of the algorithm chip cluster.

[0013] After determining the first chip scheduling information for the algorithm chip cluster, the system will schedule the algorithm chip cluster according to the scheduling information and obtain the execution result information fed back by the chip cluster, providing a data foundation for subsequent detection of abnormal scheduling data.

[0014] If abnormal scheduling information is found in the execution result information, the system will identify the cause of the abnormality of the algorithm chip based on the abnormal scheduling information, that is, determine the specific information content of the abnormality of the algorithm chip, and adjust the scheduling information of the algorithm chip according to the determined cause of the abnormality to obtain the second chip scheduling information. That is, the scheduling information of each algorithm chip is adjusted in a timely manner to avoid the execution efficiency of the chip scheduling information being affected by temporary abnormal states such as abnormal chip operation status, lag, and running bugs. This ensures the normal execution of the scheduling information of each chip, improves the efficiency of chip abnormal scheduling, and indirectly improves the scheduling efficiency of each algorithm chip.

[0015] After adjusting the scheduling information of the first chip to obtain the corresponding scheduling information of the second chip, the system will schedule the algorithm chip cluster according to the adjusted chip scheduling information until there is no abnormal scheduling information in the feedback information received by the system. This ensures the integrity of the normal execution of the scheduling information of the algorithm chip cluster and improves the execution efficiency of its scheduling tasks.

[0016] As a preferred example, the step of identifying the algorithm chip cluster based on the scheduling task to obtain the first functional requirement information specifically includes:

[0017] The scheduling task is divided into multiple scheduling subtasks, and the task objective information and task criticality of each scheduling subtask are determined.

[0018] The task target information is identified and processed to obtain target data information for each scheduled subtask, and the initial functional requirements information corresponding to the task target information is determined based on the target data information.

[0019] The initial functional requirement information corresponding to the scheduled subtask is sorted according to the task criticality to obtain the first functional requirement information.

[0020] Before determining the functional requirements of each algorithm chip in the algorithm chip cluster, the system divides the acquired scheduling tasks into several scheduling subtasks, determines the task objective information and task criticality of each scheduling subtask, and obtains the target data information of each scheduling subtask by identifying the task objective information. Then, based on the target data information, the system determines the initial functional requirements information corresponding to each task objective information. Before outputting the functional requirements information, the initial functional requirements are sorted according to the task criticality, so that the execution priority of important tasks is ensured when subsequent scheduling tasks are executed, avoiding the impact of abnormal tasks on the execution of critical tasks and improving the execution efficiency of critical tasks.

[0021] As a preferred example, determining the initial functional requirements information corresponding to the task target information based on the target data information specifically includes:

[0022] Based on the target requirement information in the target data information, the key requirement features of the target task information are extracted and obtained, and based on the target condition information in the target data information, the feature limitation range of the key requirement features is identified and determined.

[0023] The key requirement features and their corresponding feature limitation ranges are output as the initial functional requirement information of the task objective information.

[0024] The system first extracts key requirement features from the target requirement information in the target data information to obtain the task target information. Then, based on the target condition information in the target data information, it identifies the feature limitation range corresponding to each key requirement feature. Subsequently, each key requirement feature and the feature limitation range corresponding to each key requirement feature are output as the functional requirement information corresponding to the task target information, thereby improving the efficiency of identifying the target algorithm chip corresponding to the functional requirement information.

[0025] As a preferred example, the step of filtering and determining the target algorithm chip corresponding to each of the first functional requirements based on the first chip functional information includes:

[0026] Feature extraction is performed on the first chip functional information to obtain first functional feature information, and the functional operating range corresponding to the first functional feature information is identified and determined based on the first chip data information of each algorithm chip. The first functional feature information and the functional operating range are integrated into first functional operating information.

[0027] Based on the first functional requirement information and the first functional operation information, the corresponding target functional information is determined, and the algorithm chip corresponding to the target functional information is used as the target algorithm chip and associated with the corresponding first functional requirement information for output.

[0028] After determining the functional requirements of the algorithm chip cluster, the system extracts the functional feature information from the chip function information of each algorithm chip. Based on the chip data information of each algorithm chip, it identifies and determines the functional operating range corresponding to the functional feature information of each algorithm chip, and integrates the above two into functional operating information. After integration, the system filters and determines the scheduling chip corresponding to each algorithm chip according to the matching degree between the functional requirement information and the functional operating information, thereby determining the target algorithm chip.

[0029] As a preferred example, the step of filtering and determining the corresponding target function information based on the first functional requirement information and the first functional operation information includes:

[0030] Candidate algorithm chips are selected by screening, and the first function operation information of each candidate algorithm chip is screened and matched according to the first function requirement information to obtain the corresponding matching results.

[0031] The first function operation information with the highest matching value to the first function requirement information in the matching results is output as the target function information.

[0032] The system provided by this invention determines the target algorithm chip for scheduling each algorithm chip by identifying the functional operation information that best matches each functional requirement. Since the system filters functional requirements based on task criticality during the matching process, this method prioritizes highly critical functional requirements, preventing situations where the data processing capabilities of the functional operation information matched with the highly critical requirement are poorly compatible, thus affecting the data scheduling needs of the highly critical requirement and ensuring a high degree of matching between the task-critical functional requirements and the requirements.

[0033] As a preferred example, the step of generating first chip scheduling information corresponding to the first functional requirement information based on the second chip data information of the target algorithm chip includes:

[0034] The target algorithm chip is identified and processed according to the first chip data information to obtain the corresponding second access data information, and the corresponding scheduling data information is obtained by querying the preset scheduling database according to the first functional requirement information.

[0035] The scheduling data information is adjusted based on the second access data information to obtain the first chip scheduling information.

[0036] Before generating chip scheduling information for the algorithm chip cluster, the system needs to identify the target algorithm chip through the chip data information of the chips in the algorithm chip cluster, obtain the access data information of the target algorithm chip, query the corresponding scheduling data information in the system's scheduling database according to the functional requirements information, and then adjust the scheduling data information according to the access data information of the target algorithm chip to obtain the first chip scheduling information.

[0037] The system adds the access data information and functional requirement information corresponding to the target algorithm chip to the scheduling data information to obtain the chip scheduling information corresponding to the functional requirement information. This not only improves the comprehensiveness, intelligence and matching accuracy of the chip scheduling information with the target algorithm chip, but also indirectly improves the scheduling efficiency of scheduling each algorithm chip.

[0038] As a preferred example, the step of identifying the cause of the anomaly of the corresponding abnormal algorithm chip based on the abnormal scheduling information includes:

[0039] The abnormal scheduling information is identified and processed to obtain chip operating status distribution information and data processing tasks. The data processing tasks are then parsed to obtain task execution results and task execution time periods.

[0040] Based on the chip operating status distribution information, the chip operating status corresponding to each task execution period is queried and determined. Based on the task execution results and the chip operating status, abnormal data processing tasks are obtained from the data processing tasks. Then, the abnormal data processing tasks are determined as the abnormal cause of the abnormal algorithm chip.

[0041] When determining the cause of a chip's anomaly based on abnormal scheduling information, the system first identifies the chip's operating status distribution information and the task execution results of each data processing task in the scheduling execution result information. Then, based on the task execution time period of each data processing task, the system queries the chip's operating status distribution information to determine the chip's operating status during each task execution time period. Finally, based on the chip's operating status and task execution results, the system jointly determines the abnormal data processing task in the abnormal algorithm chip, thus improving the accuracy of identifying abnormal data processing tasks.

[0042] As a preferred example, adjusting the first chip scheduling information of the anomaly algorithm chip according to the cause of the anomaly to obtain the second chip scheduling information includes:

[0043] The real-time power consumption of the abnormal algorithm chip is calculated, and the real-time power consumption is compared with a preset power consumption threshold to obtain the corresponding comparison result.

[0044] If the comparison result is that the real-time power consumption is less than or equal to the power consumption threshold, then the first chip scheduling information is adjusted according to the cause of the anomaly to obtain the second chip scheduling information;

[0045] If the comparison result indicates that the real-time power consumption is greater than the power consumption threshold, then the abnormal cause is handled by an abnormal scheduling mechanism until the real-time power consumption is reduced to within the power consumption threshold range. The first chip scheduling information after the abnormal scheduling is then adjusted to obtain the second chip scheduling information.

[0046] Before processing the abnormal data processing tasks in the abnormal algorithm chips, the system will also determine the real-time power consumption of each abnormal algorithm chip and compare it with the power consumption threshold. This will determine whether the real-time power consumption of each abnormal algorithm chip exceeds the power consumption threshold, i.e. whether the abnormal tasks in the abnormal algorithm chip need to be transferred to other chips for processing. This will prevent the abnormal algorithm chip from exceeding the power consumption threshold, which would cause the tasks to fail and affect the accuracy and completeness of the scheduled task execution.

[0047] As a preferred example, the step of adjusting the first chip scheduling information according to the cause of the anomaly to obtain the second chip scheduling information specifically includes:

[0048] The data processing tasks of the abnormal algorithm chip are filtered according to the task execution results. The data processing tasks whose execution results are currently being executed are determined as the first target data processing tasks, and the data processing tasks whose execution results are not being executed are determined as the second target data processing tasks.

[0049] The processing order of the abnormal data processing tasks corresponding to the abnormal cause is adjusted to be between the first target data processing task and the second target data processing task. The second chip scheduling information is generated and output according to the adjusted processing order.

[0050] If it is determined that the remaining power consumption of the abnormal algorithm chip can still meet the processing needs of its corresponding abnormal data processing task, the processing order of the abnormal data processing task it contains is adjusted to the next task of the currently executing task. This avoids affecting the execution order of subsequent tasks and ensures that high-priority abnormal tasks can be executed quickly, thereby improving the abnormal processing efficiency of abnormal data processing tasks in each abnormal algorithm chip.

[0051] Accordingly, embodiments of the present invention also provide a cluster scheduling device for an algorithm chip, the cluster scheduling device comprising an acquisition module, an adaptation module, a feedback module, an adjustment module, and an iteration module; wherein:

[0052] The acquisition module is used to acquire the scheduling tasks of the algorithm chip cluster, as well as the first chip function information and the first chip data information of each algorithm chip, and to identify the algorithm chip cluster based on the scheduling tasks to obtain the first functional requirement information.

[0053] The adaptation module is used to filter and determine the target algorithm chip corresponding to each of the first functional requirement information based on the first chip functional information, and to generate the first chip scheduling information corresponding to the first functional requirement information based on the second chip data information of the target algorithm chip.

[0054] The feedback module is used to schedule the algorithm chip cluster according to the first chip scheduling information and obtain the execution result information fed back by the algorithm chip cluster.

[0055] The adjustment module is used to identify the abnormal cause of the corresponding abnormal algorithm chip based on the abnormal scheduling information when there is abnormal scheduling information in the execution result information, and adjust the first chip scheduling information of the abnormal algorithm chip according to the abnormal cause to obtain the second chip scheduling information.

[0056] The iteration module is used to update the first chip scheduling information of the abnormal algorithm chip according to the second chip scheduling information, and to schedule the algorithm chip cluster according to the second chip scheduling information until the execution result information does not contain the abnormal scheduling information. Attached Figure Description

[0057] Figure 1 : A flowchart of an embodiment of the cluster scheduling method for the algorithm chip provided by the present invention;

[0058] Figure 2 : A structural diagram of an embodiment of the cluster scheduling device for the algorithm chip provided by the present invention. Detailed Implementation

[0059] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0060] Example 1

[0061] Please refer to Figure 1 The flowchart below shows an embodiment of the cluster scheduling method for the algorithm chip provided by the present invention, including steps 101 to 105, each step of which is as follows:

[0062] Step 101: Obtain the scheduling task of the algorithm chip cluster, as well as the first chip function information and first chip data information of each algorithm chip. Based on the scheduling task, identify the algorithm chip cluster and obtain the first functional requirement information.

[0063] The algorithm chip cluster scheduling method provided in this embodiment of the invention first obtains the scheduling task of the algorithm chip cluster, as well as the first chip function information and the first chip data information of each algorithm chip. That is, it obtains the chip function information and chip data information of all algorithm chips in the algorithm chip cluster that needs to be clustered and scheduled. Based on the obtained scheduling task, it identifies the algorithm chip cluster that needs to be scheduled and obtains the functional requirement information of each algorithm chip, providing data reference for subsequently determining the target scheduling chip of each algorithm chip to be scheduled.

[0064] In this embodiment, the system responds to the user's scheduling task upload operation and obtains the scheduling task for the algorithm chip cluster. In this embodiment, the scheduling task comprises scheduling function requirement information for the algorithm chip cluster, and criticality information for each scheduling function requirement. The scheduling function requirement information is mandatory, while the criticality information is optional; that is, the scheduling task must include the scheduling function requirement information, but may not necessarily include the criticality information.

[0065] The system directly uses the algorithm chip corresponding to each functional requirement as the target algorithm chip for that functional requirement, that is, it determines the algorithm chip to perform the task based on the functional requirement information. Simultaneously, the system also acquires the chip function information, chip specification information, and security identification code for each algorithm chip, wherein the chip specification information and security identification code are the chip data information described in this embodiment.

[0066] Among them, the chip function information is the functional information that the algorithm chip can run. The function information is the normal operating function of the algorithm chip type, while the specific functional information that each algorithm chip can run can be adjusted and determined by the user or staff.

[0067] The security identification code in the chip data information is specifically the access identification code of each algorithm chip when accessing each algorithm chip, used to restrict the input of data information containing the access verification code of the algorithm chip to the algorithm chip.

[0068] The chip specification information in the chip data information specifically includes the data format information that the algorithm chip can process, as well as the functional operating range of each operating function information of the algorithm chip.

[0069] Specifically, the identification of the algorithm chip cluster based on the scheduling task to obtain the first functional requirement information described in this embodiment includes:

[0070] The scheduling task is divided into multiple scheduling subtasks, and the task objective information and task criticality of each scheduling subtask are determined.

[0071] The task target information is identified and processed to obtain target data information for each scheduled subtask, and the initial functional requirements information corresponding to the task target information is determined based on the target data information.

[0072] The initial functional requirement information corresponding to the scheduled subtask is sorted according to the task criticality to obtain the first functional requirement information.

[0073] Before determining the functional requirements of each algorithm chip in the algorithm chip cluster, the system divides the acquired scheduling tasks into several scheduling subtasks, determines the task objective information and task criticality of each scheduling subtask, and obtains the target data information of each scheduling subtask by identifying the task objective information. Then, based on the target data information, the system determines the initial functional requirements information corresponding to each task objective information. Before outputting the functional requirements information, the initial functional requirements are sorted according to the task criticality, so that the execution priority of important tasks is ensured when subsequent scheduling tasks are executed, avoiding the impact of abnormal tasks on the execution of critical tasks and improving the execution efficiency of critical tasks.

[0074] Furthermore, the determination of the initial functional requirements information corresponding to the task target information based on the target data information in this embodiment specifically includes:

[0075] Based on the target requirement information in the target data information, the key requirement features of the target task information are extracted and obtained, and based on the target condition information in the target data information, the feature limitation range of the key requirement features is identified and determined.

[0076] The key requirement features and their corresponding feature limitation ranges are output as the initial functional requirement information of the task objective information.

[0077] The system first extracts key requirement features from the target requirement information in the target data information to obtain the task target information. Then, based on the target condition information in the target data information, it identifies the feature limitation range corresponding to each key requirement feature. Subsequently, each key requirement feature and the feature limitation range corresponding to each key requirement feature are output as the functional requirement information corresponding to the task target information, thereby improving the efficiency of identifying the target algorithm chip corresponding to the functional requirement information.

[0078] In this embodiment, the system extracts key requirement features of the task target information based on the target requirement information. The specific methods employed may include:

[0079] 1. When the target requirement information is text information, the system will extract the key requirement features of the target requirement information through a text feature recognition network.

[0080] 2. When the target requirement information is non-textual information, the system will query the database for the identification information of the key requirement features, and in the target requirement information, query the target requirement content corresponding to each identification information, and then convert the target requirement content into feature vectors to obtain each key requirement feature.

[0081] Specifically, the feature limitation range described in this embodiment refers to the limitation range of the requirement content corresponding to each key requirement feature. For example, if the requirement content is data summation, data classification, or data recognition, then the limitation range of data summation is the range of the number of input data to be summed simultaneously, the limitation range of data classification is the range of categories and the range of numbers that can be classified, and the limitation range of data recognition is the range of data types that can be recognized, etc.

[0082] Step 102: Based on the first chip function information, filter and determine the target algorithm chip corresponding to each of the first function requirement information, and based on the second chip data information of the target algorithm chip, generate the first chip scheduling information corresponding to the first function requirement information.

[0083] After determining the functional requirements of each algorithm chip, the system identifies the target algorithm chip corresponding to each chip's functional requirements. Specifically, it determines the corresponding functional information that can fulfill the requirements of each algorithm chip based on the data information needed to schedule them, and then identifies the target scheduling chip that can schedule that algorithm chip. After identifying the target algorithm chips that can schedule the cluster, the system generates chip scheduling information corresponding to the functional requirements of the scheduling algorithm chip cluster based on the data information of the target algorithm chips. This first chip scheduling information enables automated scheduling of the algorithm chip cluster.

[0084] Specifically, the method described in this embodiment for selecting and determining the target algorithm chip corresponding to each of the first functional requirements based on the first chip functional information includes:

[0085] Feature extraction is performed on the first chip functional information to obtain first functional feature information, and the functional operating range corresponding to the first functional feature information is identified and determined based on the first chip data information of each algorithm chip. The first functional feature information and the functional operating range are integrated into first functional operating information.

[0086] Based on the first functional requirement information and the first functional operation information, the corresponding target functional information is determined, and the algorithm chip corresponding to the target functional information is used as the target algorithm chip and associated with the corresponding first functional requirement information for output.

[0087] After determining the functional requirements of the algorithm chip cluster, the system extracts the functional feature information from the chip function information of each algorithm chip. Based on the chip data information of each algorithm chip, it identifies and determines the functional operating range corresponding to the functional feature information of each algorithm chip, and integrates the above two into functional operating information. After integration, the system filters and determines the scheduling chip corresponding to each algorithm chip according to the matching degree between the functional requirement information and the functional operating information, thereby determining the target algorithm chip.

[0088] In this embodiment, the system extracts the functional feature information of each chip function information, and based on the chip specification information of each algorithm chip, identifies and determines the functional operating range of each functional feature information. Then, according to the ranking of each functional requirement information in the criticality of functional requirements, the system filters the target functional information corresponding to each functional requirement information in order from front to back, and takes the algorithm chip of the target functional information as the target algorithm chip corresponding to the functional requirement information.

[0089] Furthermore, the step of filtering and determining the corresponding target function information based on the first functional requirement information and the first function operation information in this embodiment includes:

[0090] Candidate algorithm chips are selected by screening, and the first function operation information of each candidate algorithm chip is screened and matched according to the first function requirement information to obtain the corresponding matching results.

[0091] The first function operation information with the highest matching value to the first function requirement information in the matching results is output as the target function information.

[0092] The system provided in this embodiment of the invention determines the target algorithm chip for scheduling each algorithm chip by identifying the functional operation information that has the highest matching degree with each functional requirement information. Since the system filters functional requirements based on task criticality during the matching degree screening, this screening method improves the priority screening of functional requirement information with high criticality. This avoids situations where the data processing capabilities of the functional operation information matched with the functional requirement information have a low compatibility with that functional requirement information, thus affecting the data scheduling requirements of the high-critical functional requirement information and ensuring the matching degree of the task-critical functional requirement information.

[0093] In this embodiment, the system uses algorithm chips that are not identified as target algorithm chips as candidate algorithm chips. For each functional requirement information, based on the key requirement features of the functional requirement information, the feature limitation range corresponding to each key requirement feature, the functional feature information of each candidate algorithm chip, and the functional operation range of each functional feature information, the system filters the candidate chip functional information from the chip functional information, that is, determines the matching value between each candidate chip functional information and the functional requirement information.

[0094] Specifically, the candidate chip functional information described in this embodiment refers to the functional feature information required to satisfy all the key requirements of the functional requirement information, and the functional operating range of each functional feature information is not less than the feature limitation range of the key requirement feature information corresponding to that functional feature information.

[0095] Furthermore, the method for identifying the functional feature information required for key requirement features is as follows: A similarity recognition algorithm is used to calculate the similarity between each key requirement feature and each functional feature information. The functional feature information with a similarity greater than a preset similarity threshold on the terminal, and corresponding to the highest similarity, is taken as the functional feature information required for that key requirement feature. This similarity threshold can be adjusted and changed by the user or staff, for example, with similarity values ​​of 90%, 95%, 97%, or 99%.

[0096] The system can also calculate the average range deviation between the feature limitation range corresponding to each key requirement feature of the functional requirement information and the functional operating range of each chip functional information. Then, by filtering, it determines the chip functional information with the smallest average range deviation and uses it as the target chip functional information corresponding to the functional requirement information. The system provided in this embodiment improves the utilization rate of each algorithm chip while ensuring that the functional requirement information is met by filtering chip functional information with similar key requirement features, functional operating ranges, and functional limitation ranges as the target chip functional information corresponding to the functional requirement information.

[0097] Specifically, in this embodiment, generating first chip scheduling information corresponding to the first functional requirement information based on the second chip data information of the target algorithm chip includes:

[0098] The target algorithm chip is identified and processed according to the first chip data information to obtain the corresponding second access data information, and the corresponding scheduling data information is obtained by querying the preset scheduling database according to the first functional requirement information.

[0099] The scheduling data information is adjusted based on the second access data information to obtain the first chip scheduling information.

[0100] Before generating chip scheduling information for the algorithm chip cluster, the system needs to identify the target algorithm chip through the chip data information of the chips in the algorithm chip cluster, obtain the access data information of the target algorithm chip, query the corresponding scheduling data information in the system's scheduling database according to the functional requirements information, and then adjust the scheduling data information according to the access data information of the target algorithm chip to obtain the first chip scheduling information.

[0101] The system adds the access data information and functional requirement information corresponding to the target algorithm chip to the scheduling data information to obtain the chip scheduling information corresponding to the functional requirement information. This not only improves the comprehensiveness, intelligence and matching accuracy of the chip scheduling information with the target algorithm chip, but also indirectly improves the scheduling efficiency of scheduling each algorithm chip.

[0102] In this embodiment, the system first generates an access verification code corresponding to each target algorithm chip based on the security identification code of each target algorithm chip, and identifies the data format information corresponding to each target algorithm chip based on the chip specification information. Then, for each functional requirement information, the system queries the database for the scheduling data and the data processing task corresponding to the functional requirement information, and outputs the scheduling data and the corresponding data processing task as the scheduling data information of the functional requirement information. Then, based on the data format information of the target algorithm chip corresponding to the functional requirement information, the system adjusts the scheduling data information to obtain the initial chip scheduling information, i.e., the scheduling data information. Finally, the system adds the access verification code corresponding to the target algorithm chip and the sequence position of the functional requirement information in the functional requirement sequence, i.e., the position of the task criticality sorting as described in this embodiment, to the initial chip scheduling information to obtain the chip scheduling information corresponding to the functional requirement information.

[0103] The database stores scheduling data corresponding to various functional requirements during historical scheduling processes, as well as the correspondence between data processing tasks for each scheduling data. Users or staff can update, improve, and add data as needed, thereby increasing the quantity and variety of functional requirements information, scheduling data, and data processing tasks.

[0104] Based on the data format information of the target algorithm chip corresponding to the functional requirement information, the system adjusts the data characteristics of the scheduling data in the scheduling data information to the data format information of the target algorithm chip to obtain the initial chip scheduling information, namely the scheduling data information described in this embodiment. The system then adds the access verification code corresponding to the target algorithm chip and the sequence position of the functional requirement information in the functional requirement sequence to the initial chip scheduling information to obtain the chip scheduling information corresponding to the functional requirement information.

[0105] Step 103: Schedule the algorithm chip cluster according to the first chip scheduling information, and obtain the execution result information fed back by the algorithm chip cluster.

[0106] After determining the first chip scheduling information for the algorithm chip cluster, the system will schedule the algorithm chip cluster according to the scheduling information and obtain the execution result information fed back by the chip cluster, providing a data foundation for subsequent detection of abnormal scheduling data.

[0107] In this embodiment, the system generates chip scheduling information corresponding to each functional requirement based on the chip specification information and security identification code of each algorithm chip. This allows the system to transmit the chip scheduling information to the algorithm chip cluster without establishing a separate transmission channel for each algorithm chip. Instead, all chip scheduling information can be transmitted to the algorithm chip cluster directly through a single channel. Access requests are made to each algorithm chip one by one using the access verification code in each chip scheduling information, thereby transmitting each chip scheduling information to the target algorithm chip corresponding to each chip scheduling information.

[0108] This method not only reduces the number of scheduling channels and saves data transmission costs during scheduling, but also improves the accuracy of data transmission through access verification. By generating scheduling information for each algorithm chip based on the chip specification information of each algorithm chip, it improves the chip scheduling efficiency and chip scheduling success rate for that algorithm chip.

[0109] Step 104: When there is abnormal scheduling information in the execution result information, the abnormal cause of the corresponding abnormal algorithm chip is identified based on the abnormal scheduling information, and the first chip scheduling information of the abnormal algorithm chip is adjusted according to the abnormal cause to obtain the second chip scheduling information.

[0110] If abnormal scheduling information is found in the execution result information, the system will identify the cause of the abnormality of the algorithm chip based on the abnormal scheduling information, that is, determine the specific information content of the abnormality of the algorithm chip, and adjust the scheduling information of the algorithm chip according to the determined cause of the abnormality to obtain the second chip scheduling information. That is, the scheduling information of each algorithm chip is adjusted in a timely manner to avoid the execution efficiency of the chip scheduling information being affected by temporary abnormal states such as abnormal chip operation status, lag, and running bugs. This ensures the normal execution of the scheduling information of each chip, improves the efficiency of chip abnormal scheduling, and indirectly improves the scheduling efficiency of each algorithm chip.

[0111] Specifically, the method described in this embodiment for identifying the cause of anomalies in the corresponding abnormal algorithm chip based on the abnormal scheduling information includes:

[0112] The abnormal scheduling information is identified and processed to obtain chip operating status distribution information and data processing tasks. The data processing tasks are then parsed to obtain task execution results and task execution time periods.

[0113] Based on the chip operating status distribution information, the chip operating status corresponding to each task execution period is queried and determined. Based on the task execution results and the chip operating status, abnormal data processing tasks are obtained from the data processing tasks. Then, the abnormal data processing tasks are determined as the abnormal cause of the abnormal algorithm chip.

[0114] When determining the cause of a chip's anomaly based on abnormal scheduling information, the system first identifies the chip's operating status distribution information and the task execution results of each data processing task in the scheduling execution result information. Then, based on the task execution time period of each data processing task, the system queries the chip's operating status distribution information to determine the chip's operating status during each task execution time period. Finally, based on the chip's operating status and task execution results, the system jointly determines the abnormal data processing task in the abnormal algorithm chip, thus improving the accuracy of identifying abnormal data processing tasks.

[0115] In this embodiment, the execution order of each data processing task is not further limited. The user can determine the data processing priority strategy according to the data processing priority strategy of each algorithm chip. The data processing priority strategy can be the algorithm chip's own strategy or a different data processing priority strategy set by each algorithm chip. Each algorithm chip can only execute a single data processing task at the same time.

[0116] Furthermore, in this embodiment, adjusting the first chip scheduling information of the anomaly algorithm chip according to the cause of the anomaly to obtain the second chip scheduling information includes:

[0117] The real-time power consumption of the abnormal algorithm chip is calculated, and the real-time power consumption is compared with a preset power consumption threshold to obtain the corresponding comparison result.

[0118] If the comparison result is that the real-time power consumption is less than or equal to the power consumption threshold, then the first chip scheduling information is adjusted according to the cause of the anomaly to obtain the second chip scheduling information;

[0119] If the comparison result indicates that the real-time power consumption is greater than the power consumption threshold, then the abnormal cause is handled by an abnormal scheduling mechanism until the real-time power consumption is reduced to within the power consumption threshold range. The first chip scheduling information after the abnormal scheduling is then adjusted to obtain the second chip scheduling information.

[0120] Before processing the abnormal data processing tasks in the abnormal algorithm chips, the system will also determine the real-time power consumption of each abnormal algorithm chip and compare it with the power consumption threshold. This will determine whether the real-time power consumption of each abnormal algorithm chip exceeds the power consumption threshold, i.e. whether the abnormal tasks in the abnormal algorithm chip need to be transferred to other chips for processing. This will prevent the abnormal algorithm chip from exceeding the power consumption threshold, which would cause the tasks to fail and affect the accuracy and completeness of the scheduled task execution.

[0121] In this embodiment, the scheduling mechanism includes hot migration or locking. The preset scheduling mechanism is as follows: abnormal scheduling tasks with a "general" importance level from algorithm chips whose real-time power consumption exceeds a preset power consumption threshold are hot-migrated to the algorithm chip with the lowest current power consumption among non-overloaded algorithm chips, and the real-time power consumption of algorithm chips whose real-time power consumption exceeds the preset power consumption threshold is monitored. The importance level can include multiple levels such as unimportant, general, important, and very important.

[0122] If the real-time power consumption of the algorithm chip exceeds the preset power consumption threshold, and the real-time power consumption has been reduced to the corresponding preset power consumption threshold range, then the hot migration of the abnormal data processing task will be stopped.

[0123] Otherwise, the system will first transfer the critical abnormal scheduling tasks from the algorithm chips whose real-time power consumption exceeds the preset power consumption threshold to the algorithm chips with the lowest current power consumption that are not overloaded, and continue to monitor the real-time power consumption of the algorithm chips whose real-time power consumption exceeds the preset power consumption threshold.

[0124] Secondly, the system locks the GPU frequency of the algorithm chips that have real-time power consumption exceeding the preset power consumption threshold, based on the chip containing the most critical abnormal scheduling tasks, from high to low, until the real-time power consumption of the algorithm chip that has real-time power consumption exceeding the preset power consumption threshold is reduced to the corresponding preset power consumption threshold range.

[0125] Furthermore, the method described in this embodiment for adjusting the first chip scheduling information based on the cause of the anomaly to obtain the second chip scheduling information specifically includes:

[0126] The data processing tasks of the abnormal algorithm chip are filtered according to the task execution results. The data processing tasks whose execution results are currently being executed are determined as the first target data processing tasks, and the data processing tasks whose execution results are not being executed are determined as the second target data processing tasks.

[0127] The processing order of the abnormal data processing tasks corresponding to the abnormal cause is adjusted to be between the first target data processing task and the second target data processing task. The second chip scheduling information is generated and output according to the adjusted processing order.

[0128] If it is determined that the remaining power consumption of the abnormal algorithm chip can still meet the processing needs of its corresponding abnormal data processing task, the processing order of the abnormal data processing task it contains is adjusted to the next task of the currently executing task. This avoids affecting the execution order of subsequent tasks and ensures that high-priority abnormal tasks can be executed quickly, thereby improving the abnormal processing efficiency of abnormal data processing tasks in each abnormal algorithm chip.

[0129] In this embodiment, for each abnormal algorithm chip, the system filters and determines data processing tasks whose execution results are incomplete from the task execution results of their corresponding data processing tasks, and designates these as target data processing tasks. Then, the abnormal data processing tasks are arranged after the execution sequence of each target data processing task, that is, after the currently being processed task and before the tasks that have not yet been processed. By adjusting the execution order of the abnormal data processing tasks, the system reruns the data processing task without affecting the normal execution of other data processing tasks, thereby ensuring that all data processing tasks are executed normally.

[0130] Step 105: Update the first chip scheduling information of the abnormal algorithm chip according to the second chip scheduling information, and schedule the algorithm chip cluster according to the second chip scheduling information until the execution result information does not contain the abnormal scheduling information.

[0131] After adjusting the scheduling information of the first chip to obtain the corresponding scheduling information of the second chip, the system will schedule the algorithm chip cluster according to the adjusted chip scheduling information until there is no abnormal scheduling information in the feedback information received by the system. This ensures the integrity of the normal execution of the scheduling information of the algorithm chip cluster and improves the execution efficiency of its scheduling tasks.

[0132] To better illustrate the working principle and steps of the cluster scheduling method and device for an algorithm chip according to the present invention, please refer to the relevant description above, but not limited to.

[0133] Accordingly, see Figure 2 , Figure 2 This is a structural diagram of one embodiment of the cluster scheduling device for the algorithm chip provided by the present invention. Figure 2 As shown, the cluster scheduling device includes an acquisition module 201, an adaptation module 202, a feedback module 203, an adjustment module 204, and an iteration module 205; wherein:

[0134] The acquisition module 201 is used to acquire the scheduling task of the algorithm chip cluster, as well as the first chip function information and first chip data information of each algorithm chip, and to identify the algorithm chip cluster based on the scheduling task to obtain the first functional requirement information.

[0135] Furthermore, the acquisition module 201 identifies the algorithm chip cluster based on the scheduling task to obtain first functional requirement information, specifically including:

[0136] The scheduling task is divided into multiple scheduling subtasks, and the task objective information and task criticality of each scheduling subtask are determined.

[0137] The task target information is identified and processed to obtain target data information for each scheduled subtask, and the initial functional requirements information corresponding to the task target information is determined based on the target data information.

[0138] The initial functional requirement information corresponding to the scheduled subtask is sorted according to the task criticality to obtain the first functional requirement information.

[0139] Furthermore, the acquisition module 201 determines the initial functional requirements information corresponding to the task target information based on the target data information, specifically including:

[0140] Based on the target requirement information in the target data information, the key requirement features of the target task information are extracted and obtained, and based on the target condition information in the target data information, the feature limitation range of the key requirement features is identified and determined.

[0141] The key requirement features and their corresponding feature limitation ranges are output as the initial functional requirement information of the task objective information.

[0142] The adaptation module 202 is used to filter and determine the target algorithm chip corresponding to each of the first functional requirement information based on the first chip functional information, and to generate the first chip scheduling information corresponding to the first functional requirement information based on the second chip data information of the target algorithm chip.

[0143] Furthermore, the adaptation module 202 determines the target algorithm chip corresponding to each of the first functional requirements based on the first chip functional information, including:

[0144] Feature extraction is performed on the first chip functional information to obtain first functional feature information, and the functional operating range corresponding to the first functional feature information is identified and determined based on the first chip data information of each algorithm chip. The first functional feature information and the functional operating range are integrated into first functional operating information.

[0145] Based on the first functional requirement information and the first functional operation information, the corresponding target functional information is determined, and the algorithm chip corresponding to the target functional information is used as the target algorithm chip and associated with the corresponding first functional requirement information for output.

[0146] Furthermore, the adaptation module 202 filters and determines the corresponding target function information based on the first functional requirement information and the first function operation information, including:

[0147] Candidate algorithm chips are selected by screening, and the first function operation information of each candidate algorithm chip is screened and matched according to the first function requirement information to obtain the corresponding matching results.

[0148] The first function operation information with the highest matching value to the first function requirement information in the matching results is output as the target function information.

[0149] Furthermore, the adaptation module 202 generates first chip scheduling information corresponding to the first functional requirement information based on the second chip data information of the target algorithm chip, including:

[0150] The target algorithm chip is identified and processed according to the first chip data information to obtain the corresponding second access data information, and the corresponding scheduling data information is obtained by querying the preset scheduling database according to the first functional requirement information.

[0151] The scheduling data information is adjusted based on the second access data information to obtain the first chip scheduling information.

[0152] The feedback module 203 is used to schedule the algorithm chip cluster according to the first chip scheduling information and obtain the execution result information fed back by the algorithm chip cluster.

[0153] The adjustment module 204 is used to identify the abnormal cause of the corresponding abnormal algorithm chip based on the abnormal scheduling information when there is abnormal scheduling information in the execution result information, and adjust the first chip scheduling information of the abnormal algorithm chip according to the abnormal cause to obtain the second chip scheduling information.

[0154] Furthermore, the adjustment module 204 identifies the cause of the anomaly in the corresponding abnormal algorithm chip based on the abnormal scheduling information, including:

[0155] The abnormal scheduling information is identified and processed to obtain chip operating status distribution information and data processing tasks. The data processing tasks are then parsed to obtain task execution results and task execution time periods.

[0156] Based on the chip operating status distribution information, the chip operating status corresponding to each task execution period is queried and determined. Based on the task execution results and the chip operating status, abnormal data processing tasks are obtained from the data processing tasks. Then, the abnormal data processing tasks are determined as the abnormal cause of the abnormal algorithm chip.

[0157] Furthermore, the adjustment module 204 adjusts the first chip scheduling information of the abnormal algorithm chip according to the cause of the abnormality to obtain the second chip scheduling information, including:

[0158] The real-time power consumption of the abnormal algorithm chip is calculated, and the real-time power consumption is compared with a preset power consumption threshold to obtain the corresponding comparison result.

[0159] If the comparison result is that the real-time power consumption is less than or equal to the power consumption threshold, then the first chip scheduling information is adjusted according to the cause of the anomaly to obtain the second chip scheduling information;

[0160] If the comparison result indicates that the real-time power consumption is greater than the power consumption threshold, then the abnormal cause is handled by an abnormal scheduling mechanism until the real-time power consumption is reduced to within the power consumption threshold range. The first chip scheduling information after the abnormal scheduling is then adjusted to obtain the second chip scheduling information.

[0161] Furthermore, the adjustment module 204 adjusts the first chip scheduling information according to the cause of the anomaly to obtain the second chip scheduling information, specifically including:

[0162] The data processing tasks of the abnormal algorithm chip are filtered according to the task execution results. The data processing tasks whose execution results are currently being executed are determined as the first target data processing tasks, and the data processing tasks whose execution results are not being executed are determined as the second target data processing tasks.

[0163] The processing order of the abnormal data processing tasks corresponding to the abnormal cause is adjusted to be between the first target data processing task and the second target data processing task. The second chip scheduling information is generated and output according to the adjusted processing order.

[0164] The iteration module 205 is used to update the first chip scheduling information of the abnormal algorithm chip according to the second chip scheduling information, and to schedule the algorithm chip cluster according to the second chip scheduling information until the execution result information does not contain the abnormal scheduling information.

[0165] In summary, this invention provides a method and apparatus for cluster scheduling of algorithm chips. It acquires scheduling tasks, chip function information, and chip data information of an algorithm chip cluster. Based on the scheduling tasks, it identifies the functional requirements of the algorithm chip cluster, filters and determines the target algorithm chips corresponding to the functional requirements, generates and executes chip scheduling information, obtains feedback execution results, and, when abnormal scheduling information is detected, determines the cause of the abnormal algorithm chip based on the scheduling anomaly information, adjusts the corresponding chip scheduling information according to the cause, and executes the adjusted chip scheduling information until no abnormal scheduling information is found in the feedback execution results. This scheduling method achieves automated scheduling of the algorithm chip cluster, ensures the integrity of the normal execution of the algorithm chip cluster's scheduling information, and improves the execution efficiency and accuracy of scheduling tasks.

[0166] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. In particular, it should be noted that any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention for those skilled in the art.

Claims

1. A cluster scheduling method for an algorithm chip, characterized in that, Includes the following steps: The process involves acquiring the scheduling tasks of an algorithm chip cluster, as well as the first chip function information and first chip data information of each algorithm chip. Based on the scheduling tasks, the algorithm chip cluster is identified to obtain first functional requirement information. Specifically, this includes: dividing the scheduling tasks into multiple scheduling sub-tasks and determining the task target information and task criticality of each scheduling sub-task; identifying and processing the task target information to obtain target data information for each scheduling sub-task; extracting key requirement features of the task target information based on the target requirement information in the target data information; identifying and determining the feature limitation range of the key requirement features based on the target condition information in the target data information; and then outputting the key requirement features and the corresponding feature limitation range as the initial functional requirement information of the task target information; and sorting the initial functional requirement information corresponding to the scheduling sub-tasks according to the task criticality to obtain the first functional requirement information. Based on the first chip function information, the target algorithm chip corresponding to each first function requirement information is determined, and based on the second chip data information of the target algorithm chip, the first chip scheduling information corresponding to the first function requirement information is generated. The algorithm chip cluster is scheduled according to the first chip scheduling information, and the execution result information fed back by the algorithm chip cluster is obtained; When the execution result information contains abnormal scheduling information, the abnormal cause of the corresponding abnormal algorithm chip is identified based on the abnormal scheduling information, and the first chip scheduling information of the abnormal algorithm chip is adjusted according to the abnormal cause to obtain the second chip scheduling information; The first chip scheduling information of the abnormal algorithm chip is updated according to the second chip scheduling information, and the algorithm chip cluster is scheduled according to the second chip scheduling information until the execution result information does not contain the abnormal scheduling information.

2. The cluster scheduling method for an algorithm chip as described in claim 1, characterized in that, The step of determining the target algorithm chip corresponding to each of the first functional requirements based on the first chip functional information includes: Feature extraction is performed on the first chip functional information to obtain first functional feature information, and the functional operating range corresponding to the first functional feature information is identified and determined based on the first chip data information of each algorithm chip. The first functional feature information and the functional operating range are integrated into first functional operating information. Based on the first functional requirement information and the first functional operation information, the corresponding target functional information is determined, and the algorithm chip corresponding to the target functional information is used as the target algorithm chip and associated with the corresponding first functional requirement information for output.

3. The cluster scheduling method for an algorithm chip as described in claim 2, characterized in that, The step of filtering and determining the corresponding target function information based on the first function requirement information and the first function operation information includes: Candidate algorithm chips are selected by screening, and the first function operation information of each candidate algorithm chip is screened and matched according to the first function requirement information to obtain the corresponding matching results. The first function operation information with the highest matching value to the first function requirement information in the matching results is output as the target function information.

4. The cluster scheduling method for an algorithm chip as described in claim 1, characterized in that, The generation of first chip scheduling information corresponding to the first functional requirement information based on the second chip data information of the target algorithm chip includes: The target algorithm chip is identified and processed according to the first chip data information to obtain the corresponding second access data information, and the corresponding scheduling data information is obtained by querying the preset scheduling database according to the first functional requirement information. The scheduling data information is adjusted based on the second access data information to obtain the first chip scheduling information.

5. The cluster scheduling method for an algorithm chip as described in claim 1, characterized in that, The step of identifying the cause of the anomaly in the corresponding abnormal algorithm chip based on the abnormal scheduling information includes: The abnormal scheduling information is identified and processed to obtain chip operating status distribution information and data processing tasks. The data processing tasks are then parsed to obtain task execution results and task execution time periods. Based on the chip operating status distribution information, the chip operating status corresponding to each task execution period is queried and determined. Based on the task execution results and the chip operating status, abnormal data processing tasks are obtained from the data processing tasks. Then, the abnormal data processing tasks are determined as the abnormal cause of the abnormal algorithm chip.

6. The cluster scheduling method for an algorithm chip as described in claim 1, characterized in that, The step of adjusting the first chip scheduling information of the abnormal algorithm chip according to the cause of the abnormality to obtain the second chip scheduling information includes: The real-time power consumption of the abnormal algorithm chip is calculated, and the real-time power consumption is compared with a preset power consumption threshold to obtain the corresponding comparison result. If the comparison result is that the real-time power consumption is less than or equal to the power consumption threshold, then the first chip scheduling information is adjusted according to the cause of the anomaly to obtain the second chip scheduling information; If the comparison result indicates that the real-time power consumption is greater than the power consumption threshold, then the abnormal cause is handled by an abnormal scheduling mechanism until the real-time power consumption is reduced to within the power consumption threshold range. The first chip scheduling information after the abnormal scheduling is then adjusted to obtain the second chip scheduling information.

7. The cluster scheduling method for an algorithm chip as described in claim 6, characterized in that, The step of adjusting the first chip scheduling information according to the cause of the anomaly to obtain the second chip scheduling information specifically includes: The data processing tasks of the abnormal algorithm chip are filtered according to the task execution results. The data processing tasks whose execution results are currently being executed are determined as the first target data processing tasks, and the data processing tasks whose execution results are not being executed are determined as the second target data processing tasks. The processing order of the abnormal data processing tasks corresponding to the abnormal cause is adjusted to be between the first target data processing task and the second target data processing task. The second chip scheduling information is generated and output according to the adjusted processing order.

8. A cluster scheduling device for an algorithm chip, characterized in that, The cluster scheduling device includes an acquisition module, an adaptation module, a feedback module, an adjustment module, and an iteration module; wherein: The acquisition module is used to acquire the scheduling tasks of the algorithm chip cluster, as well as the first chip function information and first chip data information of each algorithm chip. Based on the scheduling tasks, the algorithm chip cluster is identified to obtain first functional requirement information. Specifically, this includes: dividing the scheduling tasks into multiple scheduling sub-tasks and determining the task target information and task criticality of each scheduling sub-task; identifying and processing the task target information to obtain the target data information of each scheduling sub-task, extracting key requirement features of the task target information based on the target requirement information in the target data information, identifying and determining the feature limitation range of the key requirement features based on the target condition information in the target data information, and then outputting the key requirement features and the corresponding feature limitation range as the initial functional requirement information of the task target information; sorting the initial functional requirement information corresponding to the scheduling sub-tasks according to the task criticality to obtain the first functional requirement information. The adaptation module is used to filter and determine the target algorithm chip corresponding to each of the first functional requirement information based on the first chip functional information, and to generate the first chip scheduling information corresponding to the first functional requirement information based on the second chip data information of the target algorithm chip. The feedback module is used to schedule the algorithm chip cluster according to the first chip scheduling information and obtain the execution result information fed back by the algorithm chip cluster. The adjustment module is used to identify the abnormal cause of the corresponding abnormal algorithm chip based on the abnormal scheduling information when there is abnormal scheduling information in the execution result information, and adjust the first chip scheduling information of the abnormal algorithm chip according to the abnormal cause to obtain the second chip scheduling information. The iteration module is used to update the first chip scheduling information of the abnormal algorithm chip according to the second chip scheduling information, and to schedule the algorithm chip cluster according to the second chip scheduling information until the execution result information does not contain the abnormal scheduling information.

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