A DFX method for discrete grabbing buckets based on anchor points

Abstract

The purpose of the present invention is to provide a DFX method of discrete grab bucket based on anchor points, the method comprising: obtaining data grabbing requirements; the logic module configures parameters of the grab template according to the data grabbing requirements; the logic module selects anchor points according to the data grabbing requirements; the anchor points grab data into the grab bucket according to the grab template; and the chip information is analyzed according to the grabbed data. The present invention can grab according to different grabbing conditions in different subsystems and submodules, and can grab multiple times at the same time, solving the problem of timing and directional simultaneous grabbing of internal signals, thereby accelerating the debugging and positioning of chip problems, and greatly improving the efficiency of locating chip problems.

Description

Technical Field

[0001] The present invention relates to the field of chip detection technology, and in particular to a DFX method of discrete grabbing buckets based on anchor points. Background Art

[0002] For the current chip design, the chip DFX function mainly includes design testability (DFT), design debuggability (DFD), design reliability (DFR), design power consumption (DFP) and design manufacturability (DFM). The chip DFX function mainly focuses on taking various factors into consideration at all stages of chip design (design, verification, testing, etc.) to achieve excellent design quality and maintainability. DFX is the abbreviation of Design for eXcellence, where X can be seen as a wildcard, emphasizing that factors such as quality, testability, reliability, maintainability, etc. are taken into consideration in all aspects of chip design to improve the excellence of the overall design. Specifically, DFX includes the following key aspects: DFT: Focus on how to design the chip for easy testing, including adding test modes, test circuits and other features to ensure effective testing after the chip is manufactured. Common DFT technologies include scan chains, BIST, JTAG, etc. DFD: Consider the need for debugging in the design, including adding debug interfaces and debug signals, so that the internal state can be more easily observed and analyzed during the chip verification and debugging stages. DFR‌: Focuses on the reliability of the design, including the long-term stability and reliability of the chip under different working conditions, considering factors such as tolerance to environmental changes, temperature, voltage, etc. DFP: Focuses on power consumption issues in the design, including optimizing power management, reducing power consumption, reducing power consumption in idle state, etc. DFM‌: Emphasizes taking the manufacturing process into consideration in the design to ensure that the design can achieve high yield and quality in actual manufacturing. The exact requirements of DFX may vary depending on the application area of ​​the chip, process technology, etc., but the overall goal is to ensure that quality, testability, reliability and other factors are taken into account in all aspects of the design, thereby improving the excellence of the overall design‌.

[0003] The DFD function observes internal data by outputting it step by step in the form of an embedded logic analyzer, and finally performs real-time observation or capture observation at the Endpoint. Figure 2This is the architecture of a logic analyzer embedded in a chip. The chip is divided into several subsystems (such as sub-system A, B, C, D...), and each subsystem contains several blocks (Block 0, 1, 2...). Each block can choose to output the internal signal of the module at this level, or to output the internal signal transmitted from the previous level module. After selecting level by level, the final point X is observed in real time or captured for observation. Although the above scheme can observe or capture some signals in real time, it cannot capture the internal signals of multiple subsystems and multiple blocks at the same time. At this time, it is impossible to analyze the data of each module, resulting in poor timeliness in locating chip problems, or even causing the problem of being unable to be located. Summary of the invention

[0004] The purpose of the present invention is to provide a DFX method of discrete grab bucket based on anchor points, which can grab according to different grab conditions in different subsystems and submodules, and can perform multiple grabs at the same time, solving the problem of timing, directional and simultaneous grabbing of internal signals, thereby accelerating the debugging and positioning of chip problems, and greatly improving the efficiency of locating chip problems.

[0005] A DFX method of discrete grab buckets based on anchor points is applied to a chip system, wherein the chip system includes multiple subsystems and grab buckets, and the subsystem includes at least one logic module. The method includes:

[0006] Obtain data crawling requirements;

[0007] The logic module configures parameters of the crawling template according to the data crawling requirements;

[0008] The logic module selects an anchor point according to the data capture requirement;

[0009] The anchor point captures data into a capture bucket according to the capture template;

[0010] Analyze chip information based on the captured data.

[0011] Preferably, the data acquisition requirements include:

[0012] Get the valid data that needs to be captured;

[0013] Get the number of valid data that needs to be captured;

[0014] Get the real-time and historical status of the back pressure signal that needs to be captured.

[0015] Preferably, the logic module configures the parameters of the crawling template according to the data crawling requirements, including:

[0016] Add at least one crawling template to the subsystem;

[0017] Using a crawling template to divide the crawling area according to the data crawling requirements;

[0018] The depth of the grab template is the number of grabs required, and the width is set according to the grab conditions for storing each anchor point. The grab template is used to store the conditions for grabbing the anchor points.

[0019] Preferably, the logic module selects an anchor point according to the data capture requirement, including:

[0020] The anchor points include: a first anchor point, used to capture valid data from a current subsystem module to another subsystem module;

[0021] The second anchor point is used to capture the number of valid data from the current subsystem module to another subsystem module;

[0022] The third anchor point is used to capture the historical state or real-time back pressure state from the current subsystem module to another subsystem module.

[0023] Preferably, the anchor point captures data into the capture bucket according to the capture template, including:

[0024] In each subsystem, add at least one grab bucket;

[0025] The depth of the grab bucket is equal to the depth of the grab template, and the width is the maximum data bit width of the grab area anchor point;

[0026] Traverse the configuration of the anchor points and capture templates of the sub-modules of each subsystem, and determine whether to use the logical function module corresponding to the anchor point to capture the corresponding data and write it into the corresponding capture bucket.

[0027] Preferably, traversing the configuration of the anchor points and the grab template of the submodules of each subsystem and determining whether to use the logical function module corresponding to the anchor point to grab the corresponding data and write it into the corresponding grab bucket includes:

[0028] Traverse all the projects of all crawling templates. If there is a project whose configuration belongs to an anchor point, use the logical function of the anchor point to crawl data;

[0029] The captured data is sent to the corresponding position of the capture bucket for storage.

[0030] Preferably, analyzing chip information according to captured data includes:

[0031] Read the data information in the crawl bucket;

[0032] The DFX function of the chip is observed based on the data information.

[0033] A DFX device for discrete grabbing buckets based on anchor points is applied to a DFX method for discrete grabbing buckets based on anchor points, and is characterized by comprising:

[0034] Parameter configuration module, used to configure the parameters of the crawling template;

[0035] A data capture module, used for capturing data according to the capture template;

[0036] The data analysis module is used to analyze chip information based on the captured data.

[0037] An electronic device comprises: a chip, a processor and a memory, wherein the memory is used to store computer program code, the computer program code comprises computer instructions, and when the chip executes the computer instructions, the electronic device executes a DFX method of discrete grabbing buckets based on anchor points.

[0038] The beneficial effects of the present invention are: 1. The present invention can realize the data information capture of chip internal signals in different systems and different sub-modules according to the needs of chip detection; 2. The present invention can realize serial capture of anchor point data information, and the capture template can be assigned to different anchor points for capture. If a capture template contains multiple configurations of an anchor point, the anchor point data information can be captured serially; 3. The present invention can also realize parallel capture of anchor point data information, and the capture template can be assigned to different anchor points for capture. If a capture template contains multiple anchor point configurations, the data information of multiple anchor points can be captured in parallel at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0040] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0041] Figure 1 It is a flow chart of a DFX method of discrete grabbing bucket based on anchor points of the present invention;

[0042] Figure 2 It is a schematic diagram of observing the existing chip of the present invention;

[0043] Figure 3 This is a schematic diagram of the structure of directional and simultaneous capture of internal signals of a chip according to the present invention;

[0044] Figure 4 A schematic diagram of the hardware structure of an electronic device of the present invention;

[0045] Figure 5 It is a schematic diagram of the grabbing template of the present invention;

[0046] Figure 6 It is a schematic diagram of the grabbing area division of the present invention. DETAILED DESCRIPTION

[0047] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0048] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0049] In addition, the descriptions of "first", "second", etc. in the present invention are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0050] The DFD function observes internal data, often outputting it step by step in the form of an embedded logic analyzer, and finally performs real-time observation or capture observation at the Endpoint. Figure 2This is the architecture of a logic analyzer embedded in a chip. The chip is divided into several subsystems (such as sub-system A, B, C, D...), and each subsystem contains several blocks (Block 0, 1, 2...). Each block can choose to output the internal signal of the module at this level, or to output the internal signal transmitted from the previous level module. After selecting level by level, the final point X is observed in real time or captured for observation. Although the above scheme can observe or capture some signals in real time, it cannot capture the internal signals of multiple subsystems and multiple blocks at the same time. At this time, it is impossible to analyze the data of each module, resulting in poor timeliness in locating chip problems, or even causing the problem of being unable to be located.

[0051] The present invention can realize the data information capture of chip internal signals in different systems and different sub-modules according to the needs of chip detection; the present invention can realize serial capture of anchor point data information, and the capture template can be assigned to different anchor points for capture. If a capture template contains multiple configurations of an anchor point, the anchor point data information can be captured serially; the present invention can also realize parallel capture of anchor point data information, and the capture template can be assigned to different anchor points for capture. If a capture template contains multiple anchor point configurations, the multiple anchor point data information can be captured in parallel at the same time.

[0052] Example 1

[0053] A DFX method for discrete grabbing buckets based on anchor points, refer to Figure 1 , applied to a chip system, the chip system includes multiple subsystems and grab buckets, the subsystem includes at least one logic module, the method includes:

[0054] S100, obtain data crawling requirements;

[0055] S200, the logic module configures the parameters of the crawling template according to the data crawling requirements;

[0056] S300, the logic module selects an anchor point according to data capture requirements;

[0057] S400, the anchor point captures data into a capture bucket according to a capture template;

[0058] S500, analyzing chip information according to the captured data.

[0059] The subsystems of SOC chips mainly include the following: System control subsystem: including functions such as power supply, clock, reset and startup. This subsystem is responsible for managing the system's power supply, clock signal, reset operation and system startup process, and is the basis for the normal operation of the system. Memory subsystem: The memory subsystem is a memory device used to store data and programs in SOC. It includes multi-layer storage structures such as SRAM, DRAM, ROM, etc., as well as different types of memory such as NOR and NAND Flash. In addition, an external memory controller (EMI) is also included to manage off-chip memory. Memory subsystem: The memory subsystem is one of the most complex systems in SoC, including main memory, memory controller and PHY. The complexity of memory controllers is increasing, and the efficiency of the memory subsystem has an important impact on the overall system performance.

[0060] The embodiment of the present invention can place different anchor points, capture templates, and capture buckets in different subsystems and submodules as needed, and flexibly realize parallel or serial, single or multiple capture of data information of internal signals, thereby quickly and effectively locating problems in the chip system.

[0061] Preferably, S100, obtaining data capture requirements includes:

[0062] Get the valid data that needs to be captured;

[0063] Capture the i-th valid data sent from the first module of the first subsystem to the target subsystem;

[0064] Capture valid data sent by the first module of the first subsystem to the target subsystem;

[0065] Get the number of valid data that needs to be captured;

[0066] Capture the total amount of valid data sent by the target subsystem to the first module of the first subsystem;

[0067] Get the real-time and historical status of the back pressure signal that needs to be captured.

[0068] Capture the historical state of the back pressure signal sent by the target subsystem to the first module of the first subsystem;

[0069] The real-time status of the back pressure signal sent by the target subsystem to the first module of the first subsystem is captured.

[0070] In this embodiment of the present invention, suppose that the following information is desired to be captured:

[0071] Requirement 0: Capture the M0th valid data sent from Block A0 of subsystem A to this module;

[0072] Requirement 1: Capture the real-time valid data sent from Block A0 of subsystem A to this module;

[0073] Requirement 2: Capture the total number of valid data sent from Block A0 of subsystem A to this module;

[0074] Requirement 3: Capture the historical status of the back pressure signal sent from this module to Block A0 of subsystem A;

[0075] Requirement 4: Capture the real-time status of the back pressure signal sent from this module to Block A0 of subsystem A.

[0076] Configure different crawling templates according to different demand information.

[0077] Preferably, S200, the logic module configures the parameters of the capture template according to the data capture requirements, including:

[0078] Add at least one crawling template to the subsystem;

[0079] Use crawling templates to divide crawling areas according to data crawling requirements;

[0080] The depth of the grab template is the number of grabs required, and the width is set according to the grab conditions for storing each anchor point. The grab template is used to store the conditions for grabbing the anchor points.

[0081] The capture template refers to the control information required by each subsystem subblock according to each anchor point of the module so as to capture the required data. After the template depth and width are selected, each anchor point can re-divide the bit area except the anchor point number as needed.

[0082] For example, according to the requirements of Block C0 of subsystem C, its template is set to a template with a depth of 8 and a bit width of 32 bits. The default value of each row entry of the template is 32'hffff_ffff, such as Figure 5 shown.

[0083] According to the crawling requirements, the crawling template settings and areas are divided as follows: Figure 6 As shown:

[0084] Item 0: In addition to configuring the anchor number, split the remaining bit field into three parts, namely ctrl_type, M0, and Reserved. Corresponding to requirement 0.

[0085] Item 1: In addition to configuring the anchor number, split the remaining bit field into two parts, namely, ctrl_type and Reserved. Corresponding to requirement 1.

[0086] Item 2: Contains the anchor number field and the Reserved field. Corresponding to requirement 2.

[0087] Item 3: In addition to configuring the anchor number, split the remaining bit field into two parts, namely, ctrl_type and Reserved. Corresponding to requirement 3.

[0088] Item 4: In addition to configuring the anchor number, split the remaining bit field into two parts, namely, ctrl_type and Reserved. Corresponding to requirement 4.

[0089] Item5-7: Not used.

[0090] Preferably, in S300, the logic module selects an anchor point according to data capture requirements, including:

[0091] The anchor points include: a first anchor point, used to capture valid data from a current subsystem module to another subsystem module;

[0092] The second anchor point is used to capture the number of valid data from the current subsystem module to another subsystem module;

[0093] The third anchor point is used to capture the historical state or real-time back pressure state from the current subsystem module to another subsystem module.

[0094] An anchor point refers to a signal point in the chip and the corresponding capture logic function module. The signal point includes data signals, valid signals, control signals, etc. and the corresponding capture logic function module.

[0095] For example Figure 3 As shown in the figure. In a certain SOC chip, Block A0 of subsystem A sends two types of signals to Block C0, including valid signal Valid and data signal [23:0] (bit width is 16 bits). In addition, the module sends the back pressure signal FIFO_XOFF to Block A0 of subsystem A. In order to debug the relevant information of the interface, three anchor points are placed in Block C0 of subsystem C, namely anchor points x0, x1, x2, y0, and y1.

[0096] Among them, the anchor point x0 is used to capture the Mth valid data or real-time data sent to this module from Block A0 of subsystem A; its corresponding logic function module will determine whether the received valid data is equal to M. If it is equal to M, it will send the data at this time to the capture bucket. For real-time data, the data signal is directly sent to the capture bucket.

[0097] Anchor point x1, the purpose of this anchor point is to capture the total number of valid data sent to this module from Block A0 of subsystem A; its corresponding logic function module is a simple counter, which sends the result of the counter to the capture bucket.

[0098] Anchor point y0, the purpose of this anchor point is to capture the historical state or real-time back pressure state of the back pressure signal sent from this module to Block A0 of subsystem A; its corresponding logic function module detects the back pressure signal and keeps sending a valid signal to the capture bucket. For the real-time back pressure state, the back pressure signal is directly sent to the capture bucket.

[0099] exist Figure 3 In the figure, 1 is step 1: when the system is initialized or stopped, all grab templates are configured through the low-speed interface. According to the chip positioning requirements, etc., the conditions of the grab template are determined, such as the grab time, the number of grabs, the effective conditions of the grab, etc.;

[0100] 2 is step 2: After configuring the capture template, start the system, and each anchor point monitors the data flow information according to the configuration in the template and waits to capture the corresponding data;

[0101] 3 is the third step: after the anchor point meets the conditions of the capture template, the corresponding data information is captured and the corresponding information is captured into the capture bucket. Here, the function of parallel capture or serial capture can be implemented according to the needs.

[0102] 4 is step 4: The system reads the data information in the grab bucket, and can further analyze and locate based on this data information.

[0103] Preferably, in S400, the anchor point captures data into a capture bucket according to the capture template, including:

[0104] S410, adding at least one grab bucket in each subsystem;

[0105] S420, the depth of the grab bucket is equal to the depth of the grab template, and the width is the maximum data bit width of the grab area anchor point;

[0106] S430, traversing the configuration of the anchor points and the capture template of the sub-modules of each sub-system, and determining whether to adopt the logical function module corresponding to the anchor point to capture the corresponding data and write it into the corresponding capture bucket.

[0107] When an anchor point meets the crawling conditions, the crawling data is mainly based on the anchor point data to crawl the data around the anchor point. Anchor points allow users to jump directly to a specific part of the data stream. In the context of data stream crawling, the main function of the anchor point is positioning. By setting the anchor point position, the surrounding data can be crawled based on the anchor point data.

[0108] Preferably, S430, traversing the configuration of the anchor points and the capture template of the submodules of each subsystem, and determining whether to use the logical function module corresponding to the anchor point to capture the corresponding data and write it into the corresponding capture bucket includes:

[0109] S431, traverse all items of all crawling templates, if there is an item whose configuration belongs to an anchor point, use the logic function of the anchor point to crawl data;

[0110] S432, the captured data is sent to the corresponding position of the capture bucket for storage.

[0111] The grab bucket refers to the configuration of the anchor point traversal grab template of each subsystem sub-block, and determines whether to use the logical function module corresponding to the anchor point to grab the corresponding information and write it into the corresponding grab bucket.

[0112] For example, the anchor point x0 mentioned above will traverse all items in all the grab templates and find that item0 and item1 are configured to belong to anchor point x0, and the ctrl_type of item0 is 1'd0, indicating that the item is to grab the M0th valid data. When the module receives the M0th valid data, it will send the data to the corresponding position of the grab bucket for storage so that the upper-level software can read and debug it.

[0113] For item1's ctrl_type=1'd1, it means that the item is to obtain real-time data, and the data of anchor point x0 will be sent to the corresponding position of the grab bucket for the upper-level software to read and debug.

[0114] Do similar processing for other item2~4.

[0115] Preferably, S500, analyzing chip information according to captured data includes:

[0116] S510, reading data information in the grab bucket;

[0117] S520, observing the DFX function of the chip according to the data information.

[0118] When the system is initialized or stopped, all the grab templates are configured through the low-speed interface. According to the chip positioning requirements, etc., determine the conditions of the grab template, such as the grab time, the number of grabs, the effective conditions of the grab, etc.; after configuring the grab template, start the system, and each anchor point monitors the data flow information according to the configuration in the template, waiting to grab the corresponding data; after the anchor point meets the conditions of the grab template, grab the corresponding data information and grab the corresponding information into the grab bucket. Here, the function of parallel grabbing or serial grabbing can be realized according to the requirements. The system reads the data information in the grab bucket, and can further analyze and locate based on this data information.

[0119] Example 2

[0120] A DFX device for discrete grabbing buckets based on anchor points is applied to a DFX method for discrete grabbing buckets based on anchor points, and is characterized by comprising:

[0121] Parameter configuration module, used to configure the parameters of the crawling template;

[0122] A data capture module is used to capture data according to a capture template;

[0123] The data analysis module is used to analyze chip information based on the captured data.

[0124] In the chip system, if this function is implemented, the following components need to be added: Add several anchor points, and put different numbers of anchor points and corresponding anchor logic function modules in each sub-system sub-block according to needs (for example, a certain anchor point: the value of the Nth valid data passing through sub-systemA.Block A). Add a capture template. In each subsystem, add one or more capture templates with a template depth of X and a width of Y, where X is the number of captures required, and the width of Y depends on the capture conditions for storing each anchor point. This template stores the conditions for capturing anchor points. Add a capture bucket. In each subsystem, add one or more capture buckets with a template depth of X and a width of Z, where X is consistent with the capture template depth, and Y is the maximum data bit width of the anchor point in this area. This template stores the conditions for capturing anchor points.

[0125] Example 3

[0126] An electronic device includes: a chip, a processor and a memory, the memory is used to store computer program code, the computer program code includes computer instructions, and when the chip executes the computer instructions, the electronic device executes a DFX method of discrete grabbing buckets based on anchor points.

[0127] refer to Figure 4 , the electronic device 2 includes a processor 21, a memory 22, an input device 23, and an output device 24. The processor 21, the memory 22, the input device 23, and the output device 24 are coupled via a connector, and the connector includes various interfaces, transmission lines, or buses, etc., which are not limited in the embodiments of the present invention. It should be understood that in various embodiments of the present invention, coupling refers to mutual connection in a specific manner, including direct connection or indirect connection through other devices, for example, through various interfaces, transmission lines, buses, etc.

[0128] The processor 21 may be one or more graphics processing units (GPUs). When the processor 21 is a GPU, the GPU may be a single-core GPU or a multi-core GPU. Optionally, the processor 21 may be a processor group consisting of multiple GPUs, and the multiple processors are coupled to each other via one or more buses. Optionally, the processor may also be other types of processors, etc., which are not limited in the embodiments of the present invention.

[0129] The memory 22 can be used to store computer program instructions and various computer program codes including program codes for executing the scheme of the present invention. Optionally, the memory includes but is not limited to random access memory (RAM), read-only memory (ROM), erasable programmable read only memory (EPROM), or portable read only memory (CD-ROM), which is used for related instructions and data.

[0130] The input device 23 is used to input data and / or signals, and the output device 24 is used to output data and / or signals. The output device 24 and the input device 23 may be independent devices or an integrated device.

[0131] The present invention can realize the data information capture of chip internal signals in different systems and different sub-modules according to the needs of chip detection; the present invention can realize serial capture of anchor point data information, and the capture template can be assigned to different anchor points for capture. If a capture template contains multiple configurations of an anchor point, the anchor point data information can be captured serially; the present invention can also realize parallel capture of anchor point data information, and the capture template can be assigned to different anchor points for capture. If a capture template contains multiple anchor point configurations, the multiple anchor point data information can be captured in parallel at the same time.

[0132] The foregoing is merely a specific embodiment of the present invention, which enables those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A DFX method based on anchor point discrete grab bucket, applied in chip system, characterized in that: The chip system includes a plurality of subsystems and a grab bucket, the subsystem includes at least one logic module, and the method includes: Obtain data crawling requirements; The logic module configures parameters of the crawling template according to the data crawling requirements; The logic module selects an anchor point according to the data capture requirement; The logic module selects an anchor point according to the data capture requirement, including: The anchor points include: a first anchor point, used to capture valid data from a current subsystem module to another subsystem module; The second anchor point is used to capture the number of valid data from the current subsystem module to another subsystem module; The third anchor point is used to capture the historical state or real-time back pressure state from the current subsystem module to another subsystem module; The anchor point captures data into a capture bucket according to the capture template; The anchor point captures data into the capture bucket according to the capture template, including: In each subsystem, add at least one grab bucket; The depth of the grab bucket is equal to the depth of the grab template, and the width is the maximum data bit width of the grab area anchor point; Traverse the configuration of the anchor points and crawling templates of the sub-modules of each subsystem, and determine whether to use the logical function module corresponding to the anchor point to crawl the corresponding data and write it into the corresponding crawling bucket; Analyze chip information based on the captured data.

2. The DFX method of discrete grab bucket based on anchor points according to claim 1, characterized in that: The data acquisition requirements include: Get the valid data that needs to be captured; Get the number of valid data that needs to be captured; Get the real-time and historical status of the back pressure signal that needs to be captured.

3. The DFX method of discrete grab bucket based on anchor points according to claim 1, characterized in that: The logic module configures the parameters of the crawling template according to the data crawling requirements, including: Add at least one crawling template to the subsystem; Using a crawling template to divide the crawling area according to the data crawling requirements; The depth of the grab template is the number of grabs required, and the width is set according to the grab conditions for storing each anchor point. The grab template is used to store the conditions for grabbing the anchor points.

4. The DFX method of discrete grab bucket based on anchor points according to claim 1, characterized in that: The traversing of the anchor points and the configuration of the grab template of each sub-module of each sub-system and determining whether to use the logic function module corresponding to the anchor point to grab the corresponding data and write it into the corresponding grab bucket includes: Traverse all the projects of all crawling templates. If there is a project whose configuration belongs to an anchor point, use the logical function of the anchor point to crawl data; The captured data is sent to the corresponding position of the capture bucket for storage.

5. The DFX method of discrete grabbing bucket based on anchor points according to claim 1, characterized in that: Analyzing chip information according to captured data includes: Read the data information in the crawl bucket; The DFX function of the chip is observed based on the data information.

6. A DFX device based on an anchor point discrete grab bucket, applied to a DFX method based on an anchor point discrete grab bucket according to any one of claims 1 to 5, characterized in that: include: Parameter configuration module, used to configure the parameters of the crawling template; A data capture module, used for capturing data according to the capture template; The data analysis module is used to analyze chip information based on the captured data.

7. An electronic device, characterized in that: include: A chip, a processor and a memory, wherein the memory is used to store computer program code, wherein the computer program code includes computer instructions. When the chip executes the computer instructions, the electronic device executes a DFX method of discrete grabbing buckets based on anchor points as described in any one of claims 1 to 5.

Images