Page table virtual address translation method, apparatus, device, and storage medium

Abstract

Embodiments of the present application provide a page table virtual address conversion method, device and equipment and a storage medium, relating to the technical field of financial technology and artificial intelligence. The method obtains a page table virtual address, wherein the page table virtual address comprises first address information and an offset. The first address information is input into an address index model to perform an address query process. A regression function is selected from a tree structure as a target function. The predicted page table item address of the first address information is calculated according to the target function. Then, the second address information is calculated according to the first address information and the predicted page table item address. Then, the physical address of the page table virtual address is obtained by performing address offset based on the second address information and the offset. In the embodiments of the present application, the address index model is used to predict the page table item address corresponding to the first address information, without performing level-by-level search according to the number of page tables, so that the delay of searching the page table item address can be reduced, and the conversion efficiency of the virtual address to the physical address can be accelerated.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of financial technology and artificial intelligence, and in particular to a page table virtual address conversion method, device, equipment and storage medium. BACKGROUND

[0002] With the continuous growth of data in the financial industry, financial institutions need to carry more data, which makes cloud storage as a way of information management increasingly important. By using cloud storage technology, financial institutions can store a large amount of data in the cloud at a low cost, while allowing users to access and process data anytime and anywhere. Cloud storage technology allocates virtual memory for each process through the operating system, and when a certain space is used, the data is stored in the real physical memory through address conversion. Since the physical address is the real physical memory access address, when allocating memory to a process, the virtual address needs to be mapped to the physical address. The conversion between virtual address and physical address is realized through the paging mechanism. In cloud storage, page table virtual address conversion is usually used for file retrieval and access.

[0003] In related technologies, the operating system uses a multi-level page table to search for page table entries. When searching, it first searches from each level of the page table one by one until the address of the page table entry is located, and then finds the final physical address through the page offset. However, this search method of page lookup is time-consuming, resulting in low efficiency of the virtual address conversion process, which is not suitable for scenarios that require fast access to processes. SUMMARY

[0004] The main purpose of the embodiments of the present application is to propose a page table virtual address conversion method, device, equipment and storage medium to improve the efficiency of virtual address conversion.

[0005] To achieve the above purpose, a first aspect of the embodiments of the present application proposes a page table virtual address conversion method applied to an address index model, the address index model being a tree structure, the address index model comprising at least one original node, the original node being a regression function; the method comprises:

[0006] Obtaining a page table virtual address, the page table virtual address comprising: first address information and an offset, the first address information comprising a page global directory address, a page upper directory address and a page intermediate directory address;

[0007] Performing address query processing on the first address information through the address index model to obtain a query result, and filtering a target function from the regression function according to the query result;

[0008] Obtaining a predicted page table item address according to the target function and the first address information;

[0009] perform address calculation according to the page global directory address, the page upper directory address, the page middle directory address and the predicted page table item address, to obtain second address information;

[0010] perform address offset based on the second address information and the offset, to obtain a physical address of the page table virtual address.

[0011] In some embodiments, the original node includes a parent node and a child node, the parent node includes a root node, and the child node includes a leaf node; the address query processing of the first address information by the address index model to obtain a query result, and screening a target function from the regression function according to the query result, includes:

[0012] obtaining a target node according to the root node; wherein the target node includes a child node, and an initial value of the target node is the root node;

[0013] screening a query node from the child node according to the first address information;

[0014] judging whether the query node is the leaf node; if the query node is not the leaf node, taking the query node as the target node, and repeating the address query process until the query node is the leaf node;

[0015] obtaining the regression function of the leaf node as the target function.

[0016] In some embodiments, the screening of the query node from the child node according to the first address information includes:

[0017] obtaining an input data range of each child node to obtain a target data range;

[0018] if the first address information is found in the target data range, taking the child node as the query node.

[0019] In some embodiments, the address acquisition of the first address information according to the target function to obtain a predicted page table item address includes:

[0020] obtaining a plurality of address prediction values according to an output data range of the target function;

[0021] obtaining an output address corresponding to the first address information in the target function;

[0022] performing difference calculation on the address prediction values and the output address to obtain an address difference value;

[0023] selecting the address prediction value corresponding to the minimum value of the address difference value as the predicted page table item address.

[0024] In some embodiments, before the address query processing of the first address information by the address index model, the method further comprises:

[0025] constructing a plurality of training address information, the training address information being generated according to a page global directory address, a page upper directory address and a page intermediate directory address;

[0026] sorting the training address information to obtain a first address value and a second address value, and generating a first input range according to the first address value and the second address value, and sorting the destination page table item address to obtain a first page table item address and a second page table item address, and generating a first output range according to the first page table item address and the second page table item address;

[0027] performing an original node differentiation step to construct the address index model, the original node differentiation step comprising:

[0028] generating an input data range and an output data range of a training parent node, and fitting a regression function of the training parent node according to the input data range and the output data range; the initial value of the training parent node is a root node; the input data range of the root node includes the first input range, and the output data range of the root node includes the first output range;

[0029] dividing the input data range of the training parent node into a plurality of sub-input ranges according to a number of training child nodes, and dividing the output data range into sub-output ranges corresponding to the sub-input ranges, the number of training child nodes being a first number; the first number is an integer greater than or equal to 1;

[0030] fitting a regression function of the training child node according to the sub-input range and the sub-output range; the sub-input range of the training child node constitutes the input data range of the training parent node, and the sub-output range of the training child node constitutes the output data range of the training parent node;

[0031] repeating the original node differentiation step with the training child node as the next training parent node until each of the training address information corresponds to a leaf node as a target training node, to obtain the address index model.

[0032] In some embodiments, the training address information further includes a page table label, the page table label being a destination page table item address of the training address information; and the repeating the original node differentiation step with the training child node as the next training parent node until each of the training address information corresponds to a leaf node as a target training node, to obtain the address index model, comprises:

[0033] obtaining a training address information corresponding to the training page table item address in the regression function of the leaf node;

[0034] calculating a loss value of the training page table item address and the target page table item address;

[0035] if the loss value is less than a preset threshold, determining that the leaf node is the target training node.

[0036] In some embodiments, before the second address information is calculated according to the page global directory address, the page upper directory address, the page intermediate directory address and the predicted page table item address, the method further comprises:

[0037] obtaining a flag bit of the predicted page table item address;

[0038] performing validity verification on the predicted page table item address by using the flag bit, and if the flag bit indicates that the predicted page table item address exists in the physical memory, the validity verification is passed.

[0039] To achieve the above object, a second aspect of the embodiment of the present application proposes a page table virtual address conversion device, applied to an address index model, the address index model is a tree structure, the address index model comprises at least one original node, the original node is a regression function; the device comprises:

[0040] a page table virtual address obtaining module, configured to obtain a page table virtual address, the page table virtual address comprising: first address information and an offset, the first address information comprising a page global directory address, a page upper directory address and a page intermediate directory address;

[0041] a target function selecting module, configured to perform address query processing on the first address information by using the address index model, to obtain a query result, and to select a target function from the regression function according to the query result;

[0042] a prediction module, configured to perform address acquisition on the first address information according to the target function, to obtain a predicted page table item address;

[0043] a second address calculating module, configured to perform address calculation according to the page global directory address, the page upper directory address, the page intermediate directory address and the predicted page table item address, to obtain a second address information;

[0044] a physical address calculating module, configured to perform address offset based on the second address information and the offset, to obtain a physical address of the page table virtual address.

[0045] To achieve the above object, a third aspect of the embodiments of the present application provides an electronic device, comprising a memory and a processor, the memory stores a computer program, and the processor implements the method of the first aspect when executing the computer program.

[0046] To achieve the above object, a fourth aspect of the embodiments of the present application provides a storage medium, which is a computer readable storage medium, and the storage medium stores a computer program, and the computer program is executed by a processor to implement the method of the first aspect.

[0047] The page table virtual address conversion method, device, equipment and storage medium provided by the embodiments of the present application, wherein the page table virtual address conversion method obtains a page table virtual address, wherein the page table virtual address comprises first address information and an offset, then the first address information is input into an address index model to perform an address query process, a regression function is selected as a target function from a tree structure, the predicted page table item address of the first address information is calculated according to the target function, then the second address information is calculated according to the first address information and the predicted page table item address; and then the physical address of the page table virtual address is obtained by offsetting based on the second address information and the offset. The embodiments of the present application predict the page table item address corresponding to the first address information by using the address index model, without searching the page table item address level by level, which can reduce the delay of searching the page table item address and accelerate the conversion efficiency of the virtual address to the physical address. Thus, the cloud storage is optimized, and the processing efficiency of the data of the financial institutions is improved. BRIEF DESCRIPTION OF DRAWINGS

[0048] Figure 1 is a flowchart of the page table virtual address conversion method provided by the embodiments of the present application.

[0049] Figure 2a is a schematic diagram of a multi-level page table structure in the related art.

[0050] Figure 2b is a principle schematic diagram of the page table virtual address conversion method provided by the embodiments of the present application.

[0051] Figure 3 is a structure schematic diagram of the address index model of the page table virtual address conversion method provided by another embodiment of the present application.

[0052] Figure 4 is a flowchart of constructing and training the address index model of the page table virtual address conversion method provided by another embodiment of the present application.

[0053] Figure 5 is Figure 4 the flowchart of step S430 in

[0054] Figure 6is a one function diagram of a root node in an address index model of a page table virtual address conversion method provided by another embodiment of the present application.

[0055] Figure 7 is a flow chart of an end condition of a primitive node differentiation step of a page table virtual address conversion method provided by another embodiment of the present application.

[0056] Figure 8 is Figure 1 is a flow chart of step S120 in.

[0057] Figure 9 is Figure 8 is a flow chart of step S1220 in.

[0058] Figure 10 is Figure 1 is a flow chart of step S130 in.

[0059] Figure 11 is a structure diagram of an address index model of a page table virtual address conversion method provided by another embodiment of the present application.

[0060] Figure 12 is Figure 11 is a one function diagram of a root node of an address index model.

[0061] Figure 13 is a flow chart of a page table virtual address conversion method provided by another embodiment of the present application.

[0062] Figure 14 is a structure block diagram of a page table virtual address conversion device provided by another embodiment of the present application.

[0063] Figure 15 is a hardware structure diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0064] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and should not be used to limit the present application.

[0065] It should be noted that although the functional modules are divided in the device diagram and the logical order is shown in the flow chart, in some cases, the steps shown or described can be executed in a manner different from the module division in the device or the order in the flow chart.

[0066] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to be limiting.

[0067] First, several terms involved in the present application are analyzed:

[0068] Artificial intelligence (AI): is a new technical science of studying, developing the theory, method, technology and application system for simulating, extending and expanding human intelligence; artificial intelligence is a branch of computer science, artificial intelligence attempts to understand the essence of intelligence, and produces a new intelligent machine that can react in a similar way to human intelligence, the research in this field includes robots, language recognition, image recognition, natural language processing and expert system, etc. Artificial intelligence can simulate the information process of human consciousness and thinking. Artificial intelligence is also the theory, method, technology and application system of using digital computer or digital computer controlled machine to simulate, extend and expand human intelligence, to perceive the environment, acquire knowledge and use knowledge to obtain the best results.

[0069] Physical address (Physical Address): the information stored in the memory is in bytes, for correct storage or retrieval of information, each byte unit is given a unique memory address, called physical address, also called actual address or absolute address. Physical address is numbered from 0, sequentially each time plus 1, so the physical address space of the memory is linearly increasing. Physical address is represented by binary number, which is unsigned integer, written in hexadecimal number, which is the address signal of the physical memory on the CPU external address bus. Physical address exists in electronic form on the address bus, so that the data bus can access the memory address of a specific storage unit in the main memory.

[0070] Virtual Address: The main memory of a computer system is usually composed of semiconductor memory. Due to the process and cost reasons, the capacity of the main memory is limited. However, the functions of computer system software and application software are constantly enhanced, and the program size is rapidly expanded, and the capacity demand of the main memory is increased. In order to provide convenience for large programs and make them free from the capacity limitation of the main memory, the operating system manages the two levels of storage systems of the main memory and the auxiliary memory to realize automatic overlay. For example, when a process is executed, part of the address space is in the main memory and the other part is in the auxiliary memory. When the accessed information is not in the main memory, the operating system arranges I / O instructions to call the information from the auxiliary memory into the main memory. From the effect, it seems that a storage with a much larger capacity than the actual main memory is provided, and the user does not need to consider whether the program is placed in the main memory or the location, etc. This storage is called virtual memory. When the program runs, the CPU accesses the main memory with a virtual address, and the auxiliary hardware finds out the correspondence between the virtual address and the actual address, and judges whether the storage unit indicated by the virtual address contains the content. If it is in the main memory, the CPU can directly access the actual unit of the main memory through address conversion; if it is not in the main memory, a storage block containing the word is called into the main memory and then accessed by the CPU. If the main memory is full, a block that is not running is called back from the main memory to the external storage, and a new block is called from the external storage to the main memory.

[0071] With the increasing amount of data in the financial industry, financial institutions need to carry more data, which makes cloud storage increasingly important as a way of information management. By using cloud storage technology, financial institutions can store large amounts of data in the cloud at a low cost, while allowing users to access and process data anytime and anywhere. Cloud storage technology allocates virtual memory to each process through the operating system, and when a certain block of space is used, the data is stored in the real physical memory through address conversion. Since the physical address is the real physical memory access address, when allocating memory to a process, the virtual address needs to be mapped to the physical address. The conversion between virtual address and physical address is realized through the paging mechanism. In cloud storage, page table virtual address conversion is usually used for file retrieval and access. The operating system allocates virtual memory to each process, and since the physical address is the real physical memory access address, when allocating memory to a process, the virtual address needs to be mapped to the physical address, and when a certain block of space is used, the data is stored in the real physical memory through address conversion. The conversion between virtual address and physical address is realized through the paging mechanism.

[0072] In the related art, an operating system searches a page table entry using a multi-level page table, searches from each level of the page table one by one, locates the address of the page table entry, and then finds the final physical address through a page offset. This search method of page lookup is time-consuming, which leads to a low efficiency of the virtual address conversion process and is not suitable for scenarios requiring fast access to processes.

[0073] Therefore, the embodiments of the present application provide a page table virtual address conversion method, device, equipment and storage medium, which uses an address index model to predict the page table item address corresponding to the first address information, does not need to search level by level according to the number of levels of the page table, can reduce the delay of searching the page table item address, and accelerates the conversion efficiency of the virtual address to the physical address.

[0074] The embodiments of the present application provide a page table virtual address conversion method, device, equipment and storage medium, which are specifically described by the following embodiments. First, the page table virtual address conversion method in the embodiments of the present application is described.

[0075] The embodiments of the present application can acquire and process related data based on artificial intelligence technology. Artificial intelligence (AI) is a theory, method, technology and application system for simulating, extending and expanding human intelligence by using a digital computer or a machine controlled by a digital computer, perceiving an environment, acquiring knowledge and using the knowledge to obtain the best results. In other words, artificial intelligence is a comprehensive technology of computer science, which aims to understand the essence of intelligence and produce a new intelligent machine that can react in a similar way to human intelligence. Artificial intelligence is to study the design principles and implementation methods of various intelligent machines, so that the machines have the functions of perception, reasoning and decision-making.

[0076] Artificial intelligence technology is a comprehensive discipline, involving a wide range of fields, including both hardware and software technologies. Artificial intelligence basic technologies generally include sensors, special artificial intelligence chips, cloud computing, distributed storage, big data processing technology, operation / interaction systems, mechatronics and other technologies. Artificial intelligence software technologies mainly include computer vision technology, speech processing technology, natural language processing technology, and machine learning / deep learning and other major directions.

[0077] The page table virtual address conversion method provided by the embodiment of the present application relates to the technical field of artificial intelligence, in particular to the technical field of data mining. The page table virtual address conversion method provided by the embodiment of the present application can be applied to a terminal, can be applied to a server, and can also be a computer program running in the terminal or the server. For example, the computer program can be a native program or a software module in an operating system; can be a native application program (APP), that is, a program that needs to be installed in an operating system to run, such as a client supporting page table virtual address conversion, and can also be a small program, that is, a program that only needs to be downloaded into a browser environment to run; and can also be a small program that can be embedded into any APP. In summary, the above computer program can be any form of application program, module or plug-in. The terminal communicates with the server through a network. The page table virtual address conversion method can be executed by the terminal or the server, or cooperatively executed by the terminal and the server.

[0078] In some embodiments, the terminal can be a smartphone, a tablet computer, a notebook computer, a desktop computer or a smart watch, etc. The server can be a standalone server, or a cloud server providing cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, content delivery networks (CDNs), and basic cloud computing services such as big data and artificial intelligence platforms; or a service original node in a blockchain system, the service original nodes in the blockchain system form a peer-to-peer (P2P) network among each other, and the P2P protocol is an application layer protocol running on the transmission control protocol (TCP) protocol. The server can install a server of a page table virtual address conversion system, and can interact with the terminal through the server, for example, the server installs corresponding software, and the software can be an application program for implementing the page table virtual address conversion method, but is not limited to the above forms. The terminal and the server can be connected through communication connection modes such as Bluetooth, universal serial bus (USB) or network, and the present embodiment does not limit this.

[0079] The application is operable in numerous general purpose or special purpose computer system environments or configurations. Examples of well-known computing systems, environments, and / or configurations that can be suitable for use with the application include personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, distributed computing environments that include any of the above systems or devices, and the like. The application can be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, and the like, that perform particular tasks or implement particular abstract data types. The application can also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules can be located in local and remote computer storage media including memory storage devices.

[0080] It should be noted that in each of the specific embodiments of the present application, when it is necessary to process relevant data related to the identity or characteristics of the user according to user information, user behavior data, user historical data, and user location information, etc., the user's permission or consent will be obtained first, and the collection, use, and processing of these data will comply with relevant national and regional laws, regulations, and standards. In addition, when the embodiments of the present application need to obtain sensitive personal information of the user, the separate permission or separate consent of the user will be obtained through a pop-up window or a jump to a confirmation page, etc., and after obtaining the separate permission or separate consent of the user, the necessary user-related data for enabling the embodiments of the present application to operate normally will be obtained.

[0081] In cloud storage, page table virtual address translation is commonly used for file retrieval and access. Most cloud storage service providers use virtualization technology to manage storage resources and use page table virtual address translation to map stored data to the virtual address space of user programs. Embodiments of the present application can be used in the optimization scenario of cloud storage services for financial cloud computing. For example, the storage mode of financial data adopts the Nearline Storage mode, which can achieve fast, low-cost, and highly reliable storage of infrequently accessed data backups and archives. These backup and archive data can be accessed and managed through the page table virtual address translation method of the embodiments of the present application. When the user needs to restore the data, the cloud storage service uses page table virtual address translation to map the physical address of the backup and archive data to the virtual address of the user program. In addition, the cloud storage service can also use a distributed database management system (DBMS) in combination with page table virtual address translation to achieve efficient data retrieval and storage. In this way, even if the data accessed by the user is stored in different physical locations, it can be regarded as continuous memory space through virtual address translation, facilitating retrieval and invocation. By using cloud storage technology, financial institutions can store a large amount of data in the cloud at a low cost, while allowing users to access and process data anytime and anywhere. Cloud storage optimization can also improve the processing efficiency of financial institutions for data. Cloud storage platforms usually have high availability, scalability, and strong performance, and can support multiple users to access and process data at the same time. At the same time, the cloud storage platform is equipped with data analysis tools and machine learning algorithms to accelerate the data analysis and decision-making process of financial institutions.

[0082] The page table virtual address translation method in the embodiments of the present application is described below.

[0083] Figure 1 is an optional flowchart of the page table virtual address translation method provided by the embodiments of the present application, Figure 1 The method in can include but is not limited to steps S110 to S150. It can be understood that the order of steps S110 to S150 in the embodiments is not specifically limited, and the order of steps can be adjusted or some steps can be reduced or added according to actual needs. Figure 1 The order of steps S110 to S150 in the embodiments is not specifically limited, and the order of steps can be adjusted or some steps can be reduced or added according to actual needs.

[0084] Step S110: Obtain a page table virtual address.

[0085] In an embodiment, refer to Figure 2a for a schematic diagram of a multi-level page table structure in related art.

[0086] The multi-level page table structure in this embodiment is a four-level mapping page table structure. For a virtual address, the address composition includes five parts, which are global directory address, upper directory address, intermediate directory address, table address, and offset.Figure 2a The number of page table directories is 5, which are a page global directory (PGD), a page upper directory (PUD), a page middle directory (PMD), a page table entry (PTE) and a physical page frame (Page).

[0087] For an x86 structure 64-bit system, a virtual address can be represented by a 48-bit binary number, and the size of each page table directory in the page table structure is 4 kb. The page table directory stores the address of the next level page table. Since the byte addressing number of the 64-bit system is 64 bits, 64 bits are 8 b, and 4 kb / 8 b = 2 9 , that is, each page table has 2 9 entries, so the index of the page table is set to 9 bits. Since a four-level mapping structure is used, 4*9 = 36 bits are needed for indexing, and the high 36 bits of the virtual address are used to store the page table directory. The global directory, the upper directory, the middle directory and the table each occupy 9 bits. The low 12 bits of the virtual address represent the offset, and the physical address of the virtual address can be obtained by the page table information and the offset.

[0088] In the process of converting the virtual address into the physical address, the PGD base address is first obtained from the Cr3 register, and then the page table in which the PGD is located is found according to the PGD base address and the global directory address in the virtual address. Then the PUD base address is obtained in the page table of the PGD, and then the page table in which the PUD is located is found according to the PUD base address and the upper directory address in the virtual address. Then the PMD base address is obtained in the page table of the PUD, and then the page table in which the PMD is located is found according to the PMD base address and the middle directory address in the virtual address. Then the PTE base address is obtained in the page table of the PMD, and then the page table in which the PTE is located is found according to the PTE base address and the table address in the virtual address. Then the Page base address is obtained in the page table of the PTE, and then the physical address is found according to the Page base address and the offset in the virtual address.

[0089] It can be seen that the way of layer-by-layer searching the page table directory is time-consuming, and therefore, with reference to Figure 2b , the embodiment of the present application uses the first address information composed of the global directory address + the upper directory address + the middle directory address to predict the page table of the PTE, so as to improve the conversion efficiency of the virtual address into the physical address. In an embodiment, the address index model is a learning index model which is pre-constructed and trained, and the learning index model is constructed according to a recursive model index.

[0090] In an embodiment, referring to Figure 3 , a structural diagram of an address index model in an embodiment of the present application. The address index model in this embodiment is a tree structure, including a plurality of original nodes, which are divided into two categories, one category is a parent node, and the other category is a child node of the parent node. The root node located at the bottom layer of the tree structure belongs to one of the parent nodes, and the leaf node located at the outermost layer of the tree structure belongs to one of the child nodes. In this embodiment, each original node in the tree structure is a regression function, which can be a linear function, for example, which can be expressed as: y = f(x) = ax + b, where a and b are constants, and the linear function can obtain a determined output according to the input. In this embodiment, the parameters of the regression functions of the original nodes located at different positions can be the same or different, and the parameters of the regression functions are determined through a training process in this embodiment.

[0091] The construction and training process of the address index model in an embodiment of the present application are described below. Referring to Figure 4 , a flowchart for constructing and training the address index model, including the following steps:

[0092] Step S410: Constructing a plurality of training address information.

[0093] In an embodiment, each training address information and its corresponding page table label constitute a training sample, and a plurality of training samples constitute a training sample set. In this embodiment, the address information of the PTE is predicted by the address information of the PGD, the PUD and the PMD, so the training address information is composed of 27-bit address data of the page global directory address, the page upper directory address and the page middle directory address. The page table label of each training address information is the corresponding 9-bit PTE page table item address, which is called the destination page table item address. It can be understood that assuming that there are M training samples, the training sample is represented as: [27-bit address information, page table label], and the training sample set can be represented as {[27-bit address information 1, page table label 1}, [27-bit address information 2, page table label 2], …, [27-bit address information M, page table label M]}, where M is an integer greater than 1.

[0094] Step S420: Address sorting the training address information to obtain a first address value and a second address value, and generating a first input range according to the first address value and the second address value, and sorting the destination page table item address to obtain a first page table item address and a second page table item address, and generating a first output range according to the first page table item address and the second page table item address.

[0095] In an embodiment, all the training samples in the training sample set are analyzed, each training sample can be understood as a one-to-one relationship between the training address information and the page table label, and the training address information and the page table label can be expressed as values. Therefore, the training address information in all the training samples is sorted in size to obtain the maximum value and the minimum value of the training address information, the maximum value is taken as the second address value, and the minimum value is taken as the first address value, the first input range is generated according to the first address value and the second address value, and the first input range is expressed as: [first address value, second address value]. Similarly, the destination page table item addresses in all the training samples are sorted in size to obtain the maximum value and the minimum value of the destination page table item addresses, the maximum value is taken as the second page table item address, and the minimum value is taken as the first page table item address, the first output range is generated according to the first page table item address and the second page table item address, and the first output range is expressed as: [first page table item address, second page table item address].

[0096] The address index model of the embodiment is composed of a plurality of linear first-order functions, and the purpose of address sorting is to enable the input range of all the first-order functions to cover the first input range, and similarly, enable the output range of all the first-order functions to cover the first output range, so that each training sample has a corresponding first-order function, and the training address information in the training sample input into the first-order function can obtain the closest output value same as or satisfying the error requirement of the destination page table item address.

[0097] Step S430: performing an original node differentiation step to construct the address index model.

[0098] In an embodiment, referring to Figure 5 , the original node differentiation step includes the following steps:

[0099] Step S431: generating the input data range and the output data range of the training parent node, and fitting the regression function of the training parent node according to the input data range and the output data range.

[0100] In an embodiment, when the tree structure of the address index model is constructed, the hierarchy of the tree structure and the number of original nodes of each layer are unknown, and these information are obtained by calculating the training samples. When constructing, the parent node is started to construct the child node one by one, and then the child node is taken as the parent node to construct the corresponding child node until the end condition is reached. Here, it is a training process, the parent node of the training process is called a training parent node, and the child node is called a training child node. Since the tree structure is from the root node to the child node, the initial value of the training parent node is the root node, that is, in the embodiment, a root node is first constructed when the address index model is constructed, and the root node is a first-order function. Referring to Figure 6The root node is a first-order function fitted from the coordinate pairs, the horizontal coordinate of each coordinate pair is the 27-bit address information of the training sample, and the vertical coordinate is the page table label of the training sample. Then, all the coordinate pairs in the data range are fitted to obtain a first-order function, which constitutes the root node. The parameters of the corresponding first-order function f(x) only need to satisfy that the input data range can cover the first input range, and the output data range can cover the first output range. Here, the coverage means that the upper limit a2 of the input data range of the root node is greater than or equal to the second address value b2, the lower limit a1 of the input data range is less than or equal to the first address value b1, the upper limit c2 of the output data range of the root node is greater than or equal to the second page table item address d2, and the lower limit c1 of the input data range is less than or equal to the first page table item address c1.

[0101] Step S432: dividing the input data range of the training parent node into a plurality of sub-input ranges according to the number of training child nodes, and dividing the output data range into sub-output ranges corresponding to the sub-input ranges.

[0102] Step S433: fitting to generate a regression function of the training child node according to the sub-input range and the sub-output range.

[0103] In an embodiment, the input data range of the training parent node is divided into a first number of input sub-ranges, and the output data range of the training parent node is divided into a first number of output sub-ranges consistent with the number of input sub-ranges. In order, the input sub-ranges and the output sub-ranges are one-to-one corresponding to obtain a first number of sub-node ranges, and a first-order function is generated for each sub-node range. Referring to the root node, the input data range of the first-order function is the input sub-range, and the output data range is the output sub-range, which is fitted from a plurality of coordinate pairs composed of different training samples. It can be understood that the first number and the parameters of the first-order function of each sub-node range are trained and adjusted according to the training samples.

[0104] In the above embodiment, the input data range of the first number of training child nodes constitutes the input data range of the training parent node, and the output data range of the first number of training child nodes constitutes the output data range of the training parent node, wherein the first number is an integer greater than or equal to 1.

[0105] It can be understood that since the values in the input data range and the output data range can be one-to-one corresponding to coordinate points, whether training the parent node or the child node, the linear function thereof is a function obtained by fitting the coordinate points in the input data range thereof, and the fitting function is used to cover the corresponding data range.

[0106] Step S434: taking the training child node as the training parent node of the next original node differentiation step, repeating the original node differentiation step until each training address information corresponds to a leaf node as the target training node, and obtaining the address index model.

[0107] In an embodiment, each training child node is taken as the training parent node of the next original node differentiation step, and the original node differentiation step is repeatedly executed multiple times. The end condition of the original node differentiation step is that each training sample has a leaf node as its target training node, that is, if each training sample corresponds to a leaf node, the generated tree structure is the address index model of the embodiment.

[0108] In an embodiment, referring to Figure 7 The end condition of the above original node differentiation step can be divided into the following judgment steps:

[0109] Step S710: obtaining the training page table item address corresponding to the training address information in the regression function of the leaf node.

[0110] Step S720: calculating the loss value of the training page table item address and the target page table item address.

[0111] Step S730: if the loss value is less than a preset threshold, determining that the leaf node is the target training node.

[0112] In an embodiment, after each original node differentiation step is performed, a corresponding target training node is selected for each training sample in the current leaf node. The selection process is to input the training address information of the training sample into the leaf node. Since the leaf node is also a linear function, the training address information is taken as the independent variable, and the dependent variable of the linear function is obtained. The training page table item address is then compared with the target page table item address to determine the similarity. The similarity is represented by calculating the loss value of the training page table item address and the target page table item address. If the two are closer, the loss value will be less than the preset threshold, at which point the leaf node is determined to be the target training node. If there is no target training node that can be found, the parameters of the linear function of all original nodes in the currently constructed tree structure are adjusted, or the structure of the original nodes in the currently constructed tree structure is adjusted, or a new training sub-node is generated by continuing to perform the original node differentiation step. The selection of these measures is not limited in this embodiment, and can be determined by the model itself according to the training situation. It can be understood that for each training sample, a corresponding target training node can be found, indicating that the training process is complete, and an address index model is constructed.

[0113] In an embodiment, the training of the address index model can be a time-consuming task. In order to improve the learning efficiency, the following improvements are made: first, the structure of the address index model is fixed for the same processor, which means that only the parameters of the specific original node need to be determined during program execution. Second, the server application program usually runs for a long time, and its memory occupation is also very stable; therefore, the training time can be spread over the life cycle of the application program. For example, a daemon thread can be written in the program to periodically (e.g., every 2 minutes) check the CPU occupation of the program, and if the CPU occupation is low, the training of the address index model is triggered; the address index model can also be directly trained periodically without judging the CPU load. The method of triggering the training can be selected according to actual needs. In addition, the training does not need to be performed immediately after the application program is started; on the contrary, it can be performed as a background task or when the load on the server is idle. Before the address index model is trained, the traditional multi-level page table lookup can be used to solve the problem of missing page table items. In addition, large memory application programs often allocate memory at startup and then manage it internally; therefore, the frequency of retraining of the address index model is very low.

[0114] The address index model in the embodiment of the present application can be obtained from the above process. How to use the address index model to perform page table virtual address translation is described below.

[0115] In an embodiment, the page table virtual address that needs to be translated includes first address information and an offset, wherein the first address information includes a page global directory address, a page upper directory address, and a page intermediate directory address.

[0116] Step S120: performing address query processing on the first address information through the address index model to obtain a query result, and screening a target function from the regression functions according to the query result.

[0117] In an embodiment, referring to Figure 8 , the address query processing on the first address information through the address index model to obtain a query result, and screening a target function from the regression functions according to the query result includes the following steps:

[0118] Step S1210: obtaining a target node according to the root node.

[0119] In an embodiment, the target node includes a child node, and the initial value of the target node is the root node.

[0120] Step S1220: screening a query node from the child node according to the first address information.

[0121] In an embodiment, the initial value of the target node is the root node, and all child nodes of the target node are taken as candidate nodes. For example, when querying for the first time, the root node is queried, all child nodes of the root node are taken as candidate nodes, and then a query node is selected from the candidate nodes.

[0122] In an embodiment, referring to Figure 9 , the screening of the query node from the child node according to the first address information includes the following steps:

[0123] Step S1221: obtaining an input data range of each child node to obtain a target data range.

[0124] In an embodiment, according to the construction process of the address index model in the foregoing embodiment, the input data ranges of all candidate nodes can constitute the input data range of the corresponding target node, and the input data range of the candidate node is obtained by dividing the input data range of the target node. The input data range of each candidate node is referred to as a target data range.

[0125] Step S1222: if the first address information is found in the target data range, the child node is taken as the query node.

[0126] In an embodiment, if the first address information is contained in the target data range of the candidate node, it indicates that the predicted page table item address corresponding to the page table virtual address can be obtained through the related child node of the candidate node.

[0127] Step S1230: judging whether the query node is a leaf node; if the query node is not a leaf node, the query node is taken as the target node, and the address query process is repeated until the query node is a leaf node.

[0128] Step S1240: Obtain the regression function of the leaf node as the target function.

[0129] In an embodiment, if it is found that the query node is a leaf node, a one-time function of the query node is taken as the target function, and if the query node is not a leaf node, it is indicated that the query node also has its corresponding child nodes as a parent node, and the input data range thereof is combined by input data ranges of all child nodes, and it is necessary to further select the original node capable of matching the first address information in the child nodes.

[0130] Step S130: Perform address acquisition on the first address information according to the target function to obtain a predicted page table item address.

[0131] In an embodiment, after the target function is obtained, the predicted page table item address can be calculated according to the target function. Referring to Figure 10 , performing address acquisition on the first address information according to the target function to obtain a predicted page table item address includes the following steps:

[0132] Step S1010: Obtain a plurality of address prediction values according to an output data range of the target function.

[0133] In an embodiment, since the target function is a one-time function, the one-time function is a continuous function, when the input data of the target function is a numerical range, the output data is also a numerical range, and the page table item address cannot be a decimal number, but an integer, therefore, each integer value in the numerical range of the output data is obtained, and the integer value is taken as a series of address prediction values.

[0134] Step S1020: Obtain an output address corresponding to the first address information in the target function.

[0135] In an embodiment, the first address information is input into the target function to obtain a corresponding output value.

[0136] Step S1030: Perform difference calculation on the address prediction value and the output address to obtain an address difference value.

[0137] Step S1040: Select the address prediction value corresponding to the minimum value of the address difference value as the predicted page table item address.

[0138] In an embodiment, since the idea of the embodiment is to utilize a linear function to fit the relationship between the first address information and the predicted page table entry address, but the fitted function cannot guarantee that the output value of each first address information is exactly the predicted page table entry address, that is, the fitted function only represents the general trend of the data points and cannot guarantee that each point is on the fitted function, therefore, after obtaining the fitted function of the leaf node, the embodiment calculates the output value corresponding to the first address information according to the fitted function, which may be a decimal number, and then compares the output value with the series of address prediction values obtained in the above step, and selects the address prediction value closest to the output value as the predicted page table entry address, where the closest means that the difference between the two is the smallest.

[0139] The following is described by a specific example.

[0140] In an embodiment, referring to Figure 11 , it is assumed that the tree structure of the address index model contains 4 layers, the first layer is a root node, and the linear function thereof is F(x), the root node contains 6 child nodes, and the linear functions thereof are F1(x), F2(x), F3(x), F4(x), F5(x) and F6(x), respectively, each child node serves as a parent node and contains multiple child nodes (not all original nodes are shown in the figure), wherein the child node F1(x) contains two child nodes, which are F 11 (x) and F 12 (x), the child node F6(x) contains 2 child nodes, which are F 61 (x), … and F 62 (x), the child node F 11 (x) contains two child nodes, which are F 111 (x) and F 112 (x).

[0141] Referring to Figure 11 , it is assumed that in an embodiment, for the first address information x, the process of selecting the query node in the address query process is as follows:

[0142] First address query process:

[0143] The root node F(x) serves as the target node, and the selected query node in the candidate nodes thereof is F1(x), since F1(x) is not a leaf node, the second address query process is performed.

[0144] Second address query process:

[0145] The original node F1(x) serves as the target node, and the selected query node in the candidate nodes thereof is F 11 (x), since F 11 (x) is not a leaf node, the third address query process is performed.

[0146] The third address query process:

[0147] Original node F 11 (x) is the target node, and the query node selected from its candidate nodes is F 111 (x), due to F 111 (x) is a leaf node, so the address query process ends and F 111 A linear function of (x) is used as the target function of the first address information.

[0148] Then input the first address data x into F 111 (x) gets the output value y', in F 111 The address prediction value y closest to the output value y' is selected from the multiple address prediction values ​​of (x), and the address prediction value y is used as the predicted page table entry address.

[0149] Figure 12 for Figure 11 Schematic diagram of the linear function of each original node in .

[0150] Reference Figure 12 , the linear function of each original node is a monotonically increasing function. The input data range of F(x) is [A1, A2], the output data range is [B1, B2], and the first address data is located at [A1, A2].

[0151] Split the input data range [A1, A2] and output data range [B1, B2] of F(x) to obtain the child nodes of F(x). The data ranges are:

[0152] The input data range of F1(x) is [A1,A11], and the output data range is [B1,B11];

[0153] The input data range of F2(x) is [A11,A12], and the output data range is [B11,B12];

[0154] The input data range of F3(x) is [A12,A13], and the output data range is [B12,B13];

[0155] The input data range of F4(x) is [A13,A14], and the output data range is [B13,B14];

[0156] The input data range of F5(x) is [A14,A15], and the output data range is [B14,B15];

[0157] The input data range of F6(x) is [A15,A2], and the output data range is [B15,B2];

[0158] The first address query process finds that the first address data is located in [A1, A11], F1(x) is the query node, and F1(x) is not a leaf node, so the child nodes of F1(x) are queried.

[0159] The input data range [A1, A11] and the output data range [B1, B11] of F1(x) are split to obtain the child nodes of F1(x), and the data ranges are as follows:

[0160] F 11 The input data range of F2(x) is [A1, C1], and the output data range is [B1, D1];

[0161] F 12 The input data range of F2(x) is [A1, C1], and the output data range is [B1, D1];

[0162] The second address query process finds that the first address data is located in [A1, C1], F2(x) is the query node, and F2(x) is not a leaf node, so the child nodes of F2(x) are queried. 11 11 (x) is not a leaf node, so the child nodes of F 11 (x) are queried.

[0163] The input data range [A1, C1] and the output data range [B1, D1] of F2(x) are split to obtain the child nodes of F2(x), and the data ranges are as follows: 11 11 The input data range of F3(x) is [A1, C11], and the output data range is [B1, D11];

[0164] F 111 The input data range of F3(x) is [A1, C11], and the output data range is [B1, D11];

[0165] F 112 The input data range of F3(x) is [A1, C11], and the output data range is [B1, D11];

[0166] The third address query process finds that the first address data is located in [A1, C11], F3(x) is the query node, and F3(x) is a leaf node, so F3(x) is taken as the target function. 111 111 (x) is a leaf node, so F 111 (x) is taken as the target function.

[0167] Then the first address data x is input into F 111 (x) to obtain an output value y', and among the multiple address prediction values of F 111 (x), the address prediction value y closest to the output value y' is selected as the predicted page table item address.

[0168] ​​​From the above steps, the first address information is predicted by the address index model to obtain the predicted page table item address.

[0169] Step S140: performing address calculation according to the page global directory address, the page upper directory address, the page middle directory address and the predicted page table item address to obtain the second address information.

[0170] Step S150: performing address offset based on the second address information and the offset to obtain the physical address of the page table virtual address.

[0171] In an embodiment, in combination with Figure 2a The page global directory address, the page upper directory address, the page middle directory address and the predicted page table item address are combined to obtain the second address information in the PTE page, and then the final physical address is located according to the 12-bit offset.

[0172] The page table virtual address conversion method based on the address index model can bypass the search of all levels except the last level in the multi-level page table, effectively accelerate the virtual address conversion in the operating system, and replace the page table search with the address index model, thereby greatly reducing the search delay of the page. For programs requiring large memory capacity, the running speed can be effectively accelerated.

[0173] In an embodiment, considering that the prediction may have errors, the predicted page table address needs to be verified for validity before the address conversion is performed by using the predicted page table item address, referring to Figure 13 , and the specific verification process includes the following steps:

[0174] Step S1310: obtaining the flag bit of the predicted page table item address.

[0175] Step S1310: performing validity verification on the predicted page table item address by using the flag bit, and if the flag bit indicates that the predicted page table item address exists in the physical memory, the validity verification is passed.

[0176] In an embodiment, the process of validity verification is performed by the operating system kernel, and some flag bits exist in each page table item information, which indicate whether the virtual page exists in the physical memory. If the page table item flag indicates that the virtual page is invalid, the operating system will report a page error, and if the flag bit indicates that the virtual page exists, the validity verification is passed, and the predicted page table item address can be used for the conversion between the virtual address and the physical address. At the same time, the operating system will perform address verification on the final physical address to check whether the physical address is valid and legal, so as to ensure that the physical page is accessible and the operating system has the permission to access the page. If the physical address is invalid or invalid, the operating system will report an access error.

[0177] In the above embodiments, the operating system checks whether the page table index is valid, whether the page table entry is valid, and whether the physical address is valid and legal. These steps help the operating system to ensure correct access to virtual pages and protect the system from illegal access and errors, and also bring robustness to the address index model-based page table virtual address translation method for memory management optimization of the embodiments of the application.

[0178] The technical solution provided by the embodiments of the application is that a page table virtual address is obtained, wherein the page table virtual address includes first address information and an offset, the first address information is input into an address index model to perform an address query process, a regression function is selected as a target function from a tree structure, a predicted page table entry address of the first address information is calculated according to the target function, second address information is calculated according to the first address information and the predicted page table entry address, and a physical address of the page table virtual address is obtained by performing address offset based on the second address information and the offset. The embodiments of the application use the address index model to predict the page table entry address corresponding to the first address information, do not need to search the page table entry address level by level, can reduce the delay of searching the page table entry address, and accelerate the conversion efficiency of the virtual address to the physical address.

[0179] The embodiments of the application also provide a page table virtual address conversion device, which can implement the above page table virtual address conversion method, and is applied to an address index model. Figure 14 The address index model is a tree structure, and the tree structure includes at least one original node, and the original node is a regression function. The device includes:

[0180] The page table virtual address acquisition module 1410 is configured to acquire a page table virtual address, wherein the page table virtual address includes first address information and an offset, and the first address information includes a page global directory address, a page upper directory address, and a page intermediate directory address.

[0181] The target function selection module 1420 is configured to perform address query processing on the first address information through the address index model to obtain a query result, and select a target function from the regression functions according to the query result.

[0182] The prediction module 1430 is configured to perform address acquisition on the first address information according to the target function to obtain a predicted page table entry address.

[0183] The second address calculation module 1440 is configured to perform address calculation on the page global directory address, the page upper directory address, the page intermediate directory address, and the predicted page table entry address to obtain second address information.

[0184] The physical address calculation module 1450 is configured to perform address offset based on the second address information and the offset to obtain a physical address of the page table virtual address.

[0185] The specific implementation of the page table virtual address conversion device of the embodiment is basically the same as the specific implementation of the page table virtual address conversion method, and will not be repeated here.

[0186] The embodiment of the application also provides an electronic device, comprising:

[0187] at least one memory;

[0188] at least one processor;

[0189] at least one program;

[0190] The program is stored in the memory, and the processor executes the at least one program to implement the page table virtual address conversion method of the embodiment of the application. The electronic device can be any intelligent terminal including a mobile phone, a tablet computer, a personal digital assistant (PDA), a vehicle-mounted computer, etc.

[0191] Please refer to Figure 15 , Figure 15 The hardware structure of the electronic device of another embodiment is illustrated, and the electronic device comprises:

[0192] The processor 1501 can be implemented in the form of a general-purpose CPU (Central Processing Unit), a microprocessor, an ASIC (Application Specific Integrated Circuit), or one or more integrated circuits, etc., and is used to execute related programs to implement the technical solutions provided by the embodiments of the application;

[0193] The memory 1502 can be implemented in the form of a ROM (ReadOnly Memory), a static storage device, a dynamic storage device, or a RAM (Random Access Memory). The memory 1502 can store an operating system and other application programs. When the technical solutions provided by the embodiments of the application are implemented by software or firmware, the related program codes are saved in the memory 1502 and are called and executed by the processor 1501 to implement the page table virtual address conversion method of the embodiment of the application;

[0194] The input / output interface 1503 is used to realize information input and output;

[0195] The communication interface 1504 is configured to realize the communication interaction between the device and other devices, and can realize the communication through a wired manner (for example, a USB, a network cable, or the like) or a wireless manner (for example, a mobile network, WIFI, Bluetooth, or the like).

[0196] The bus 1505 is configured to transmit information between various components (for example, the processor 1501, the memory 1502, the input / output interface 1503, and the communication interface 1504) of the device.

[0197] The processor 1501, the memory 1502, the input / output interface 1503, and the communication interface 1504 are connected to each other through the bus 1505 to realize the communication connection between the device.

[0198] The storage medium is a computer readable storage medium, and the storage medium stores a computer program. The computer program is executed by the processor to realize the page table virtual address conversion method.

[0199] The memory is a non-transitory computer readable storage medium, and can be used to store a non-transitory software program and a non-transitory computer executable program. In addition, the memory can include a high-speed random access memory, and can also include a non-transitory memory, for example, at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state memory device. In some embodiments, the memory can optionally include a memory remotely arranged relative to the processor, and the remote memory can be connected to the processor through a network. Examples of the network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0200] The page table virtual address conversion method, the page table virtual address conversion device, the electronic device, and the storage medium provided by the embodiments of the present application have the technical solutions and beneficial effects.

[0201] The embodiments described in the embodiments of the present application are used to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. It can be understood by those skilled in the art that, with the evolution of technology and the appearance of new application scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.

[0202] Those skilled in the art can understand that the technical solutions shown in the drawings do not constitute a limitation on the embodiments of the present application, and can include more or fewer steps than the drawings, or combine certain steps or different steps.

[0203] The apparatus embodiments described above are merely exemplary, and the units described as separate units can or can not be physically separate, i.e., can be located in one place, or can be distributed over multiple network units. Part or all of the modules can be selected according to actual needs to achieve the purpose of the embodiment.

[0204] Those skilled in the art can understand that all or some of the steps in the method disclosed above, the functional modules / units in the system and the device can be implemented as software, firmware, hardware and appropriate combinations thereof.

[0205] The terms "first", "second", "third", "fourth" and the like in the description of the application and in the claims of the foregoing drawings, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the use of the terms so construed can be interchanged, such that, for example, without departing from the scope of the application, the embodiments described herein can be carried out in a different order than the one illustrated or described herein. In addition, the terms "comprising", "having" and any variations thereof are intended to cover a non-exclusive inclusion, for example, a process, method, system, product or apparatus that comprises a list of steps or units not necessarily limited to those explicitly listed, but can include other not expressly listed or inherent to such processes, methods, products or apparatus.

[0206] It should be understood that in this application, "at least one" means one or more, and "multiple" means two or more. "And / or" is used to describe the relationship between the associated objects, which means that there can be three relationships, for example, "A and / or B" can mean that there are three cases: only A, only B, and A and B at the same time, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects. "At least one of the following" or similar expressions means any combination of these items, including any combination of single or multiple items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0207] In several embodiments provided in the present application, it should be understood that the disclosed apparatus and method can be implemented by other manners. For example, the apparatus embodiments described above are merely illustrative, for example, the division of the above units is merely a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units or components shown or discussed can be indirect coupling or communication connection through some interfaces, apparatuses or units, and can be electrical, mechanical or other forms.

[0208] The units described above as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., they can be located in one place or distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0209] In addition, the functional units in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0210] If the integrated unit is realized in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the part of the prior art that makes a contribution or the whole or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, including a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method of each embodiment of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various program storage media.

[0211] The preferred embodiments of the embodiments of the present application are described above with reference to the accompanying drawings, but this does not limit the scope of the embodiments of the present application. Any modification, equivalent replacement and improvement made by those skilled in the art without departing from the scope and essence of the embodiments of the present application shall be within the scope of the embodiments of the present application.

Claims

1. A method of page table virtual address translation, the method comprising: The method is applied to an address index model, the address index model is a tree structure, the address index model comprises at least one original node, and the original node is a regression function; the method comprises the following steps: Obtaining a page table virtual address, the page table virtual address comprising first address information and an offset, the first address information comprising a page global directory address, a page upper directory address and a page intermediate directory address; Performing address query processing on the first address information through the address index model to obtain a query result, and screening a target function from the regression function according to the query result; Performing address acquisition on the first address information according to the target function to obtain a predicted page table item address; Performing address calculation on the page global directory address, the page upper directory address, the page intermediate directory address and the predicted page table item address to obtain second address information; Performing address offset based on the second address information and the offset to obtain a physical address of the page table virtual address; Before the address query processing on the first address information through the address index model, the method further comprises the following steps: constructing a plurality of training address information, the training address information being generated according to a page global directory address, a page upper directory address and a page intermediate directory address; performing address sorting on the training address information to obtain a first address value and a second address value, and generating a first input range according to the first address value and the second address value, and performing address sorting on a target page table item address to obtain a first page table item address and a second page table item address, and generating a first output range according to the first page table item address and the second page table item address; and performing an original node differentiation step to construct the address index model; The original node differentiation step comprises the following steps: generating an input data range and an output data range of a training parent node, and fitting and generating a regression function of the training parent node according to the input data range and the output data range; an initial value of the training parent node is a root node; the input data range of the root node comprises the first input range, and the output data range of the root node comprises the first output range; dividing the input data range of the training parent node into a plurality of sub-input ranges according to a number of training child nodes, and dividing the output data range into sub-output ranges corresponding to the sub-input ranges, the number of training child nodes being a first number; the first number is an integer greater than or equal to 1; fitting and generating regression functions of the training child nodes according to the sub-input ranges and the sub-output ranges; the sub-input range of the training child node constitutes the input data range of the training parent node, and the sub-output range of the training child node constitutes the output data range of the training parent node; taking the training child node as the next training parent node, repeating the original node differentiation step until each training address information corresponds to a leaf node as a target training node, and obtaining the address index model.

2. The method of claim 1, wherein, The original node includes a parent node and a child node, the parent node includes a root node, and the child node includes a leaf node; the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a target function is screened out from the regression function according to the query result, and the address query processing of the first address information through the address index model obtains a query result, and a ​ ​ ​ ​ 3. The method of claim 2, wherein, ​ ​ ​ 4. The method of claim 2, wherein, ​ ​ ​ ​ ​ 5. The method of claim 1, wherein, ​ ​ ​ ​ 6. The page table virtual address translation method according to any one of claims 1 to 5, wherein, ​ ​ ​ 7. A page table virtual address translation apparatus, characterized by: ​ ​ ​ ​ The target function selection module is configured to perform address query processing on the first address information by using the address index model to obtain a query result, and to select a target function from the regression functions according to the query result; The prediction module is configured to perform address acquisition on the first address information according to the target function to obtain a predicted page table item address; The second address calculation module is configured to perform address calculation according to the page global directory address, the page upper directory address, the page intermediate directory address, and the predicted page table item address to obtain second address information; The physical address calculation module is configured to perform address offset based on the second address information and the offset to obtain a physical address of the page table virtual address. Before the address query processing on the first address information by using the address index model, the device further includes: constructing a plurality of training address information, the training address information being generated according to a page global directory address, a page upper directory address, and a page intermediate directory address; performing address sorting on the training address information to obtain a first address value and a second address value, and generating a first input range according to the first address value and the second address value, and performing address sorting on a target page table item address to obtain a first page table item address and a second page table item address, and generating a first output range according to the first page table item address and the second page table item address; and performing an original node differentiation step to construct the address index model. The original node differentiation step includes: generating an input data range and an output data range of a training parent node, and fitting and generating a regression function of the training parent node according to the input data range and the output data range; an initial value of the training parent node is a root node; the input data range of the root node includes the first input range, and the output data range of the root node includes the first output range; dividing the input data range of the training parent node into a plurality of sub-input ranges according to a number of training child nodes, and dividing the output data range into sub-output ranges corresponding to the sub-input ranges, the number of training child nodes being a first number; the first number is an integer greater than or equal to 1; fitting and generating regression functions of the training child nodes according to the sub-input ranges and the sub-output ranges; the sub-input ranges of the training child nodes constitute the input data range of the training parent node, and the sub-output ranges of the training child nodes constitute the output data range of the training parent node; taking the training child nodes as the next training parent node, repeating the original node differentiation step until each training address information corresponds to a leaf node as a target training node, and obtaining the address index model.

8. An electronic device, comprising: The electronic device includes a memory and a processor, the memory stores a computer program, and the processor implements the page table virtual address conversion method of any one of claims 1 to 6 when executing the computer program.

9. A computer readable storage medium, the storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the page table virtual address conversion method of any one of claims 1 to 6.

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