Signal transmission method and apparatus

Abstract

Embodiments of the present application provide a signal transmission method and device, wherein the method comprises: receiving a first signal from a processor chip; transmitting the first signal to a processor substrate, wherein a resistance on the processor substrate can identify voltages of different devices to distinguish signal information of the first signal; receiving a second signal from the processor substrate, wherein the second signal is a signal obtained by processing the first signal according to the signal information by the processor substrate; and transmitting the second signal to an application end. Through the present application, the problem of low signal transmission efficiency is solved, and the effect of improving the signal transmission efficiency is achieved.

Description

Technical Field

[0001] This application relates to the field of computers, and more specifically, to a signal transmission method and apparatus. Background Technology

[0002] In signal transmission scenarios, high-speed signals from chips such as processors are typically transmitted to high-speed connectors via high-speed links on the PCB board, and then transmitted to the application end via cables. However, this is limited by the significant losses (LOSS) of the PCB material, resulting in low signal transmission efficiency. Therefore, the problem of low signal transmission efficiency exists.

[0003] There is currently no effective solution to the above problems. Summary of the Invention

[0004] This application provides a signal transmission method and apparatus to at least solve the problem of low signal transmission efficiency in related technologies.

[0005] According to one embodiment of this application, a signal transmission method is provided, comprising: receiving a first signal from a processor chip; transmitting the first signal to a processor substrate, wherein a resistor on the processor substrate is capable of identifying the voltage of different devices to distinguish the signal information of the first signal; receiving a second signal from the processor substrate, wherein the second signal is a signal obtained by the processor substrate after processing the first signal according to the signal information; and transmitting the second signal to an application.

[0006] According to another embodiment of this application, a signal transmission device is provided, comprising: a first receiving unit for receiving a first signal from a processor chip; a first transmitting unit for transmitting the first signal to a processor substrate, wherein a resistor on the processor substrate is capable of identifying the voltage of different devices to distinguish the signal information of the first signal; a second receiving unit for receiving a second signal from the processor substrate, wherein the second signal is a signal obtained by the processor substrate after processing the first signal according to the signal information; and a second transmitting unit for transmitting the second signal to an application terminal.

[0007] In an exemplary embodiment, the processor chip contacts a second pin on an adaptive connector via a protruding first pin. The first receiving unit includes a first receiving module for receiving the first signal via the adaptive connector through the electrical connection formed by the contact between the first pin and the second pin.

[0008] In an exemplary embodiment, the first transmission unit includes a first transmission module for transmitting the first signal to the processor substrate via the adaptive connector through the electrical connection, wherein the processor substrate is located on a processor base, and the processor base is used to accommodate the processor chip.

[0009] In an exemplary embodiment, the second PIN pin is connected to the application terminal via a first cable, and the second transmission unit includes a second transmission module for transmitting the second signal to the application terminal via the first cable and the adaptive connector.

[0010] In one exemplary embodiment, the second receiving unit includes at least one of the following: a second receiving module for receiving a low-speed signal from the processor substrate; a third receiving module for receiving a high-speed signal from the processor substrate; and a fourth receiving module for receiving a mixed signal from the processor substrate, wherein the mixed signal is a signal obtained by mixing the low-speed signal and the high-speed signal.

[0011] In one exemplary embodiment, the second receiving module includes: a first receiving submodule for receiving the low-speed signal via a first number of third pins on the multilayer PIN structure of the adaptive connector; and the third receiving module includes: a second receiving submodule for receiving the high-speed signal via a second number of fourth pins on the multilayer PIN structure, wherein the first number is less than the second number.

[0012] In one exemplary embodiment, the above-described apparatus further includes: a power supply module, used to supply power to the processor chip through the bottom PIN structure when the power supply pins inside the processor chip are connected to the bottom PIN structure on the multi-layer PIN structure, by transmitting power from the power board through the second cable.

[0013] In one exemplary embodiment, the apparatus further includes at least one of the following: a first enhancement unit, configured to enhance the intensity of the first signal using an amplifier after the first signal is transmitted to the processor substrate; a first processing unit, configured to preprocess the first signal after the first signal is transmitted to the processor substrate to improve the purity of the first signal; a first calibration unit, configured to perform real-time calibration and adjustment of the first signal based on real-time monitored signal quality parameters after the first signal is transmitted to the processor substrate; and a first inspection unit, configured to perform an integrity check on the first signal after the first signal is transmitted to the processor substrate, and if an abnormality or fault is found in the first signal, automatically switch to a backup transmission path or initiate a fault detection. The device further includes at least one of the following: a second enhancement unit, configured to enhance the intensity of the second signal using an amplifier after receiving the second signal from the processor substrate; a second processing unit, configured to preprocess the second signal after receiving the second signal from the processor substrate to improve the purity of the first signal; a second calibration unit, configured to calibrate and adjust the second signal in real time according to real-time monitored signal quality parameters after receiving the second signal from the processor substrate; and a second inspection unit, configured to perform an integrity check on the second signal after receiving the second signal from the processor substrate, and automatically switch to a backup transmission path or initiate a fault recovery procedure if an abnormality or fault is found in the second signal.

[0014] The second receiving unit includes: a first adjustment module for adjusting the PIN structure of the adaptive connector according to the signal information; and a second adjustment module for receiving the second signal through the adjusted PIN structure of the adaptive connector.

[0015] According to yet another embodiment of this application, a computer-readable storage medium is also provided, wherein a computer program is stored in the computer-readable storage medium, and the computer program is configured to perform the steps in any of the above method embodiments when it is run.

[0016] According to yet another embodiment of this application, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0017] This application employs a novel signal processing method. The method first receives a first signal from a processor chip to ensure the quality of the signal source. Subsequently, the first signal is transmitted to a processor substrate, where resistors can identify the voltage of different devices, thereby accurately identifying the signal information of the first signal. Because this design utilizes the voltage recognition function of resistors, the accuracy of signal identification is significantly enhanced.

[0018] Subsequently, this application receives a second signal from the processor substrate. This second signal is obtained by the processor substrate after precisely processing the first signal based on the previously identified signal information. This processing effectively improves signal quality, reduces noise and distortion, and provides a solid foundation for subsequent efficient transmission.

[0019] Finally, the optimized second signal is transmitted to the application. Because this signal has been precisely processed by the processor substrate, its quality is significantly improved. Therefore, when passing through PCB boards and cables that may have high losses, it can maintain higher signal integrity and transmission efficiency, solving the problem of low signal transmission efficiency and thus achieving the technical effect of improving signal transmission efficiency. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the application environment of the signal transmission method according to an embodiment of this application;

[0021] Figure 2 This is a flowchart of a signal transmission method according to an embodiment of this application;

[0022] Figure 3 This is a schematic diagram of a signal transmission method according to an embodiment of this application;

[0023] Figure 4 This is a schematic diagram of a signal transmission method according to an embodiment of this application;

[0024] Figure 5 This is a schematic diagram of a signal transmission method according to an embodiment of this application;

[0025] Figure 6 This is a schematic diagram of a signal transmission method according to an embodiment of this application;

[0026] Figure 7 This is a structural block diagram of a signal transmission device according to an embodiment of this application. Detailed Implementation

[0027] The embodiments of this application will be described in detail below with reference to the accompanying drawings and examples.

[0028] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0029] The methods and embodiments provided in this application can be executed on a server device or a similar computing device. Taking running on a server device as an example, Figure 1 This is a hardware structure block diagram of a server device for a signal transmission method according to an embodiment of this application. For example... Figure 1 As shown, the server device may include one or more ( Figure 1 Only one is shown in the diagram. A processor 102 (which may include, but is not limited to, a microprocessor MCU or a programmable logic device FPGA, etc.) and a memory 104 for storing data are also shown. The server device may further include a transmission device 106 for communication functions and an input / output device 108. Those skilled in the art will understand that... Figure 1 The structure shown is for illustrative purposes only and does not limit the structure of the server equipment described above. For example, the server equipment may also include components that are more... Figure 1 The more or fewer components shown, or having the same Figure 1 The different configurations shown.

[0030] The memory 104 can be used to store computer programs, such as application software programs and modules, like the computer program corresponding to the signal transmission method in this embodiment. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, thus implementing the above-described method. The memory 104 may include high-speed random access memory and non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to server devices via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0031] The transmission device 106 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider for the server device. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module used for wireless communication with the Internet.

[0032] This embodiment provides a signal transmission method. Figure 2 This is a flowchart of a signal transmission method according to an embodiment of this application, such as... Figure 2 As shown, the process includes the following steps:

[0033] Step S202: Receive the first signal from the processor chip;

[0034] Step S204: The first signal is transmitted to the processor substrate, wherein the resistor on the processor substrate can identify the voltage of different devices in order to distinguish the signal information of the first signal.

[0035] Step S206: Receive a second signal from the processor substrate, wherein the second signal is a signal obtained by the processor substrate after processing the first signal according to the signal information;

[0036] Step S208: Transmit the second signal to the application.

[0037] By following the steps above, the problem of low signal transmission efficiency can be solved, thereby achieving the technical goal of fully utilizing the multi-core processor and parallel computing capabilities of the server, and thus improving the technical effect of signal transmission efficiency.

[0038] The entity performing the above steps can be an adaptive connector, but is not limited to this.

[0039] In one exemplary embodiment, the first signal refers to the raw electrical signal directly emitted from the processor (such as CPU) chip, which contains the information that the processor needs to transmit.

[0040] In one exemplary embodiment, the processor substrate is a specially designed circuit board for receiving, processing, and forwarding electrical signals from the processor chip. It includes the circuitry and components required for signal processing, such as resistors.

[0041] In one exemplary embodiment, a resistor is an electronic component on a processor substrate that functions to identify the voltage of different devices, thereby helping to identify and interpret the information contained in the first signal.

[0042] In one exemplary embodiment, the second signal is a signal processed by the processor substrate. This signal is converted and optimized based on the information in the first signal to better suit subsequent transmission and application requirements.

[0043] It should be noted that this embodiment illustrates the process by which a signal originates from a processor chip, undergoes processing and conversion, and finally reaches the application. This process includes several key steps: signal reception, transmission, processing, and retransmission, with the aim of ensuring that the signal can be efficiently and accurately transmitted from the source to the destination.

[0044] To illustrate further, an optional processor chip can be viewed as a digital signal source, generating a first signal representing a specific binary data sequence. These data sequences are similar to undecoded bitstreams and require further processing and transmission through a specific interface.

[0045] Within this framework, the processor substrate acts as a digital signal processing unit. When the first signal is transmitted to the processor substrate, the electronic components such as resistors and capacitors on the substrate work together to perform operations such as decoding, buffering, and level conversion on the original binary data sequence. These components are like precise logic gates and circuit switches, accurately processing the data stream according to preset rules.

[0046] The processed signal is called the second signal, and its electrical characteristics and data format are better suited to the requirements of subsequent transmission lines. This process is similar to signal modulation and demodulation in digital communication systems, designed to adapt to different transmission media and distances.

[0047] Finally, the second signal is transmitted to the application end, i.e., the target device or system. At the application end, the optimized signal can be received and parsed more efficiently, thereby ensuring accurate data transmission and stable system operation.

[0048] Optionally, in this embodiment, the processor chip is the source of signal generation, and the first signal it emits contains detailed data information. These signals undergo internal processing before being transmitted to the processor substrate, thus ensuring signal stability and accuracy. Components such as resistors on the processor substrate can accurately capture and interpret the information in these signals by identifying changes in the voltage of different devices.

[0049] Optionally, in this embodiment, the processor substrate is not only a signal transmission hub, but more importantly, it serves as the signal processing center. Here, the first signal undergoes a series of rigorous conversion and optimization processes, including but not limited to signal amplification, filtering, and shaping, aimed at ensuring that the signal maintains excellent electrical characteristics during subsequent transmission. The processed second signal exhibits significant improvements in both signal quality and anti-interference capability.

[0050] Optionally, in this embodiment, ensuring reliable and efficient signal transmission is crucial throughout the entire signal transmission link. By employing a carefully designed processor substrate and efficient processing algorithms, this embodiment can minimize signal attenuation and distortion during transmission, while significantly improving signal transmission rate and stability.

[0051] Optionally, in this embodiment, to achieve efficient signal transmission, not only is meticulous hardware design required, but also close integration with the software. Signal transmission and processing between the processor chip, processor substrate, and application terminal all rely on specific hardware interfaces and software protocols. Through deep co-design of hardware and software, the entire system is ensured to exhibit superior performance in signal transmission.

[0052] Optionally, in this embodiment, modular design plays a crucial role in modern electronic systems. This embodiment divides signal transmission and processing functions into multiple independent modules, thereby facilitating flexible system expansion and maintenance. For example, the processor board can be designed and manufactured as an independent module, and can be freely combined and connected with other modules according to actual needs.

[0053] Optionally, in this embodiment, the signal transmission efficiency between the processor chip and various components is particularly critical in high-performance computing and data processing applications. By finely optimizing the signal transmission link, this embodiment can significantly improve the overall computing performance and data processing capabilities of the system.

[0054] Optionally, in this embodiment, accurate signal transmission and real-time response are crucial in the field of communication and network technology. This embodiment can employ cutting-edge signal processing technology and efficient transmission schemes to ensure stable and rapid signal transmission in complex network environments.

[0055] This application employs a novel signal processing method. The method first receives a first signal from a processor chip to ensure the quality of the signal source. Subsequently, the first signal is transmitted to a processor substrate, where resistors can identify the voltage of different devices, thereby accurately identifying the signal information of the first signal. Because this design utilizes the voltage recognition function of resistors, the accuracy of signal identification is significantly enhanced.

[0056] Subsequently, this application receives a second signal from the processor substrate. This second signal is obtained by the processor substrate after precisely processing the first signal based on the previously identified signal information. This processing effectively improves signal quality, reduces noise and distortion, and provides a solid foundation for subsequent efficient transmission.

[0057] Finally, the optimized second signal is transmitted to the application. Because this signal has been precisely processed by the processor substrate, its quality is significantly improved. Therefore, when passing through PCB boards and cables that may have high losses, it can maintain higher signal integrity and transmission efficiency, solving the problem of low signal transmission efficiency and thus achieving the technical effect of improving signal transmission efficiency.

[0058] As an alternative, the processor chip receives a first signal from the processor chip by contacting a second pin on the adaptive connector via a protruding first pin, including:

[0059] The first signal is received by the adaptive connector through the electrical connection formed when the first PIN and the second PIN are in contact.

[0060] In an optional embodiment, the first PIN pin refers to a metal pin extending from the processor chip, used to make physical contact with the second PIN pin on the adaptive connector, thereby establishing an electrical connection.

[0061] In an optional embodiment, the second PIN pin refers to the metal pin on the adaptive connector that corresponds to the first PIN pin, and is used to receive the first signal from the processor chip.

[0062] In an alternative embodiment, an adaptive connector is a connector capable of automatically adapting to and connecting to different devices or components, primarily used to receive and transmit electrical signals from a processor chip.

[0063] It should be noted that this embodiment illustrates how the processor chip transmits its generated first signal through physical contact (i.e., contact between pins). Specifically, the first pin on the processor chip contacts the second pin on the adaptive connector, thereby forming an electrical connection that allows the first signal to be received by the adaptive connector from this connection.

[0064] To further illustrate, the connection process between the optional processor chip and the adaptive connector can be compared to the interaction between a circuit board and a connecting cable in an electronic device. Specifically, the processor chip is analogous to a circuit board with a specific interface, and the first pin is equivalent to the interface pin on the circuit board. The adaptive connector is like a connecting cable with a corresponding connector, and its second pin is the metal connector on the connecting cable. When the connecting cable (adaptive connector) is connected to the circuit board (processor chip), the metal connector (second pin) will fit tightly against the interface pin (first pin), thereby establishing a path for electrical signal transmission and ensuring that the current (first signal) on the circuit board can be smoothly transmitted through the connecting cable.

[0065] Optionally, the design of the first and second pins needs to consider various factors, such as electrical performance, mechanical strength, abrasion resistance, corrosion resistance, and connection stability. Furthermore, to ensure the reliability and stability of signal transmission, additional circuit components, such as resistors, capacitors, or inductors, may need to be added inside the connector for signal conditioning or filtering.

[0066] Through precise contact between the first and second pins, the processor chip can reliably transmit the first signal to the adaptive connector. This physical connection method is simple and effective, ensuring the continuity and consistency of the signal during transmission. At the same time, the adaptive connector design allows the system to flexibly adapt to different hardware configurations and connection requirements, thereby improving the scalability and compatibility of the entire system.

[0067] As an optional approach, transmitting the first signal to the processor substrate includes:

[0068] The first signal is transmitted to the processor substrate via an adaptive connector through an electrical connection, wherein the processor substrate is located on the processor base, which is used to house the processor chip.

[0069] In an optional embodiment, the processor socket is a hardware structure specifically designed to house and support the processor chip, typically serving as a bridge between the processor chip and the motherboard, providing stable mechanical support and an electrical connection environment.

[0070] In an optional embodiment, the processor substrate is a circuit board located on the processor base that has the ability to process electrical signals, including identifying the voltage of different devices to parse signal information and processing the received first signal accordingly based on this information.

[0071] It should be noted that this embodiment illustrates how the first signal is transmitted from the processor chip to the processor substrate via the adaptive connector. Specifically, after the first pin on the processor chip contacts the second pin on the adaptive connector to form an electrical connection, the adaptive connector takes on the task of transmitting the received first signal to the processor substrate located on the processor socket. The processor socket, as a housing structure, supports and fixes the processor chip, while also providing a stable mounting position for the processor substrate.

[0072] To further illustrate, consider an optional information transmission system where the processor chip acts as the information source, generating raw data (the first signal). The adaptive connector is analogous to a data transmission line, responsible for transferring the raw data from the information source to the processing center. In this analogy, the processor socket and the processor substrate together constitute the processing center. The processor socket provides the infrastructure of the processing center, while the processor substrate is the core component that actually performs the data processing tasks. When the data transmission line (adaptive connector) transmits the raw data (the first signal) to the processing center, this data is received by the processor substrate and further processed.

[0073] Optionally, the design of the processor socket and processor base plate needs to fully consider factors such as electrical performance, heat dissipation, and mechanical stability. Furthermore, to ensure the accuracy and efficiency of signal transmission, auxiliary circuit components, such as filters and amplifiers, may need to be added to the transmission path to optimize signal transmission quality. Simultaneously, the connection method between the processor socket and processor base plate also needs to be precisely designed to ensure a stable connection during high-speed data transmission.

[0074] Through precise electrical connections and stable mechanical support, the adaptive connector reliably transmits the initial signal from the processor chip to the processor substrate located on the processor socket. This design ensures the integrity and accuracy of the signal during transmission, providing a solid foundation for subsequent signal processing and applications. Simultaneously, the synergy between the processor socket and the processor substrate provides efficient heat dissipation and a stable operating environment for the entire system, thereby ensuring that the processor chip's performance is fully realized.

[0075] As an optional solution, the second PIN pin is connected to the application end via the first cable to transmit the second signal to the application end, including:

[0076] The second signal is transmitted to the application via the first cable and the adaptive connector.

[0077] In an optional embodiment, the first cable is a wire or cable assembly for transmitting electrical signals, which connects the adaptive connector and the application end, and is responsible for transmitting the second signal received by the adaptive connector to the application end.

[0078] In an optional embodiment, the application end: in an electronic system, refers to a device or module that receives and processes electrical signals from a processor board or other components to perform a specific function or task.

[0079] It should be noted that the description in this embodiment relates to the process of transmitting the second signal from the processor substrate to the application. Specifically, after receiving the second signal from the processor substrate, the adaptive connector transmits this processed signal to the application via a first cable connected to it. This first cable acts as a bridge, connecting the adaptive connector and the application, ensuring smooth signal transmission.

[0080] To further illustrate, consider an optional audio playback system where the processor board acts as an audio processor, responsible for processing the raw audio signal (first signal) and outputting a processed, high-quality audio signal (second signal). The adaptive connector is analogous to an audio output interface, while the first cable is equivalent to the audio cable connecting the speaker equipment. When the audio processor outputs the processed audio signal, this signal is transmitted to the speaker equipment (application end) through the audio output interface and the audio cable, ultimately being converted into audible sound.

[0081] Optionally, the selection and design of the first cable need to consider various factors, including signal transmission distance, transmission speed, and anti-interference capability. To ensure the stability and reliability of signal transmission, it may be necessary to use cable materials with excellent electrical properties and equip both ends of the cable with suitable connector interfaces. In addition, for long-distance or high-speed signal transmission, it may also be necessary to consider signal attenuation and distortion issues and take corresponding compensation measures.

[0082] Through a reliable connection of the first cable, the adaptive connector efficiently transmits the second signal from the processor board to the application. This design ensures that the processed signal arrives accurately at the application, where it can be further processed or utilized. The stability and efficiency of the entire transmission process provide crucial assurance for the normal operation of the electronic system and also provide a solid foundation for the application to implement various complex functions.

[0083] As an optional approach, receiving a second signal from the processor substrate includes at least one of the following:

[0084] Receives low-speed signals from the processor substrate;

[0085] Receives high-speed signals from the processor substrate;

[0086] Receive a mixed signal from the processor substrate, wherein the mixed signal is a signal obtained by mixing a low-speed signal and a high-speed signal.

[0087] In an optional embodiment, low-speed signal: refers to an electrical frequency signal with a relatively low transmission rate, which is typically used for data transmission or the transmission of control commands where high transmission speed is not required.

[0088] In an optional embodiment, high-speed signal refers to an electrical frequency signal with a high transmission rate, used in scenarios requiring fast and large-volume data transmission, such as high-definition video streaming and big data processing.

[0089] In an optional embodiment, a mixed signal refers to a signal obtained by mixing a low-speed signal with a high-speed signal. This signal contains both low-speed and high-speed data and may be used in complex systems that require simultaneous processing of multiple data transmission needs.

[0090] It should be noted that this embodiment illustrates three possible scenarios for the adaptive connector receiving the second signal from the processor substrate. Specifically, the adaptive connector can receive low-speed signals, high-speed signals, or a mixed signal obtained by combining low-speed and high-speed signals from the processor substrate. These three signal types represent different data transmission rates and processing requirements, and the adaptive connector needs to be able to flexibly receive and process these different types of signals.

[0091] Optionally, the adaptive connector's ability to receive different types of signals is crucial to the overall system performance and flexibility. To meet evolving data transmission requirements, the adaptive connector may need to be able to dynamically adjust its signal reception mode to match the different signal types output by the processor board.

[0092] Through the embodiments of this application, the adaptive connector can flexibly receive and process low-speed signals, high-speed signals, and mixed signals from the processor substrate, ensuring that the system maintains efficient and stable operation under different data transmission requirements. This design not only improves the system's compatibility and scalability but also provides strong support for future technology upgrades and diversified applications.

[0093] As an alternative approach, receiving low-speed signals from the processor substrate includes: receiving low-speed signals by the adaptive connector via a first number of third pins on the multilayer PIN structure of the adaptive connector.

[0094] Receiving high-speed signals from the processor substrate includes: receiving high-speed signals via an adaptive connector through a second number of fourth pins on a multilayer PIN structure, wherein the first number is less than the second number.

[0095] In an optional embodiment, a multi-layer PIN structure refers to a PIN pin structure with multiple layers or arrangements designed on an adaptive connector to meet the reception requirements of different types of signals.

[0096] In an optional embodiment, the third PIN pin is a PIN pin specifically designed to receive low-speed signals in a multi-layer PIN structure.

[0097] In an optional embodiment, the fourth PIN pin is a PIN pin specifically designed for receiving high-speed signals in a multi-layer PIN structure.

[0098] In an optional embodiment, the first quantity is the number of third PIN pins used to receive low-speed signals.

[0099] In an optional embodiment, the second quantity is the number of fourth PIN pins used to receive high-speed signals.

[0100] It should be noted that this embodiment illustrates how the adaptive connector receives low-speed and high-speed signals from the processor substrate. Specifically, the adaptive connector receives different types of signals through different numbers of pins on its multi-layered pin structure. For low-speed signals, the adaptive connector uses a first number of third pins for reception; while for high-speed signals, it uses a second number of fourth pins for reception. It is also specifically pointed out that the number of pins used to receive low-speed signals (the first number) is less than the number of pins used to receive high-speed signals (the second number).

[0101] Optionally, low-speed and high-speed signals have different transmission requirements, thus necessitating the use of different numbers of pins to ensure stable signal transmission. Low-speed signals, due to their lower transmission rate and less demanding bandwidth requirements, can be transmitted using fewer pins. High-speed signals, on the other hand, require more pins to provide greater bandwidth and stability to meet the demands of high-speed data transmission. Furthermore, the multi-layer pin structure design enhances the flexibility and scalability of the adaptive connector, enabling it to adapt to a wider range of signal transmission needs.

[0102] By employing varying numbers of third and fourth pins on a multi-layered pin structure, the adaptive connector can flexibly receive both low-speed and high-speed signals from the processor substrate. This design ensures the stability and efficiency of different signal types during transmission, providing crucial support for the normal operation of the entire system. Furthermore, the design where the first pin number is less than the second pin number reflects the emphasis on and optimization for high-speed signal transmission requirements.

[0103] As an alternative solution, when the power supply pins inside the processor chip are already connected to the bottom pin structure of a multi-layered pin structure, the method also includes:

[0104] The power from the power board is transmitted through the second cable, and then the power is supplied to the processor chip through the underlying PIN structure.

[0105] In an optional embodiment, a power pin is a pin on the processor chip specifically designed to receive power.

[0106] In an optional embodiment, the underlying PIN structure is a layer in the multilayer PIN structure of the adaptive connector, specifically designed to connect the power pins of the processor chip to supply power to the processor chip.

[0107] In an optional embodiment, the second cable is a cable for transmitting power from the power board to the adaptive connector.

[0108] It should be noted that the description in this embodiment relates to the power supply process of the processor chip. With the processor chip's power pins already connected to the bottom PIN structure of the multi-layer PIN structure of the adaptive connector, the power supplied by the power board is transmitted through the second cable and passes through this bottom PIN structure to power the processor chip.

[0109] Optionally, ensuring a stable and reliable power supply is crucial for the normal operation of the processor chip. Therefore, the design and material selection of the underlying PIN structure must take into account factors such as conductivity, heat resistance, and stability. Furthermore, the quality and connection method of the second cable also affect the power transmission efficiency and stability.

[0110] Through the embodiments of this application, with the processor chip's power pins connected to the underlying PIN structure of the adaptive connector, power from the power board is transmitted to the adaptive connector via a second cable, and then a stable and reliable power supply is provided to the processor chip through the underlying PIN structure. This design ensures that the processor chip can operate normally and perform to its full potential. At the same time, this power supply method also offers flexibility and scalability, adapting to different models and specifications of processor chips.

[0111] As an alternative approach, after transmitting the first signal to the processor substrate, the method further includes at least one of the following:

[0112] Use an amplifier to enhance the strength of the first signal;

[0113] The first signal is preprocessed to improve its purity;

[0114] The first signal is calibrated and adjusted in real time based on the signal quality parameters monitored in real time.

[0115] Perform an integrity check on the first signal. If an abnormality or fault is found in the first signal, automatically switch to the backup transmission path or start the fault recovery procedure.

[0116] After receiving the second signal from the processor substrate, the method further includes at least one of the following:

[0117] Use an amplifier to enhance the strength of the second signal;

[0118] The second signal is preprocessed to improve the purity of the first signal;

[0119] The second signal is calibrated and adjusted in real time based on the signal quality parameters monitored in real time.

[0120] The second signal is checked for integrity. If an abnormality or fault is found in the second signal, the system automatically switches to the backup transmission path or starts the fault recovery procedure.

[0121] In an optional embodiment, the amplifier is a device for enhancing the strength of electrical frequency signals to ensure that the signal does not attenuate excessively during transmission.

[0122] In an optional embodiment, preprocessing is performed on the electrical frequency signal to remove noise and interference and improve the purity of the signal.

[0123] In an optional embodiment, real-time monitoring and calibration: By continuously monitoring signal quality parameters and adjusting the signal in real time based on these parameters, the signal is kept in its optimal state.

[0124] In an optional embodiment, integrity check: verifying whether the electrical frequency signal is intact and undamaged, ensuring that the signal does not contain erroneous or missing information.

[0125] In an optional embodiment, a backup transmission path is an alternative path that can be automatically switched to when the primary transmission path fails, in order to ensure the continuity of signal transmission.

[0126] In an optional embodiment, a fault recovery procedure is a procedure that is automatically started when a signal anomaly or fault is detected, designed to quickly restore normal signal transmission.

[0127] It should be noted that this embodiment supplements a series of operations that may be performed during the transmission of the first and second signals to ensure stable signal transmission and high-quality processing. These operations include enhancing signal strength, preprocessing to improve purity, real-time calibration and adjustment of the signal, and performing integrity checks and handling anomalies or faults.

[0128] Optionally, in environments with high-speed, high-volume data transmission, even minor signal interference or loss can lead to serious data errors. Therefore, by enhancing the signal, preprocessing, real-time monitoring and calibration, and integrity checks, the efficiency and accuracy of data transmission can be greatly improved.

[0129] Through the embodiments of this application, it can be ensured that the first and second signals maintain high strength, high purity, and high stability during transmission. Simultaneously, real-time monitoring and calibration mechanisms can quickly respond to changes in signal quality, while integrity checks and backup transmission paths provide additional security, ensuring rapid restoration of normal transmission in the event of signal anomalies or failures. These measures work together to provide robust stability and reliability for the entire data transmission system.

[0130] As an optional embodiment, receiving the second signal from the processor substrate includes:

[0131] Adjust the PIN structure of the adaptive connector based on the signal information;

[0132] The second signal is received through the PIN structure adjusted by the adaptive connector.

[0133] It should be noted that this embodiment can adjust the PIN structure of the adaptive connector based on the signal information (such as voltage, current, resistance, etc.) of the first signal previously received from the processor chip and processed by the processor substrate. Here, "adaptive connector" can be understood as a connection device capable of automatically adjusting its interface configuration according to different signal requirements, while "PIN structure" refers to the pin layout or configuration in the connector used for data transmission. Furthermore, through this PIN structure adjusted according to the signal information, this embodiment can accurately receive the second signal from the processor substrate.

[0134] By utilizing the embodiments of this application and adjusting the PIN structure of an adaptive connector to receive a second signal, the accuracy and efficiency of signal transmission can be improved. Since the adaptive connector can adjust its interface configuration in real time according to signal information, it ensures optimal connection with the processor substrate under all circumstances, thereby avoiding data transmission errors caused by interface mismatch or signal interference.

[0135] As an alternative solution, with the emergence and rapid development of AI (Artificial Intelligence), including robotics, speech recognition, image recognition, natural language processing, expert systems, machine learning, and computer vision, the demands on data transmission and processing are increasing. Especially with chip manufacturers upgrading and iterating their chips, signal transmission rates are rapidly increasing to meet these demands. However, achieving signal transmission rates of 100Gbps on current PCB boards is quite difficult, which limits the development and rapid application of AI technology. Therefore, to address the limitation of high-speed signal transmission in servers due to board material constraints, this embodiment applies the aforementioned signal transmission method to an adaptive high-speed link application scenario to solve the problem.

[0136] Specifically, the technical solution adopted in this embodiment is as follows: Figure 3 As shown, by designing an adaptive connector for the processor, the adaptive connector and the application device are connected by a cable. When the cable is inserted into the adaptive connector, the electrical frequency signal transmitted through the cable automatically contacts the corresponding pins of the processor, thereby achieving the effect that the signal varies with different application signals and the different signals matched with the processor.

[0137] To further illustrate, one option is the design of an adaptive connector, which can be achieved by dividing the entire adaptive connector into a three-part design framework:

[0138] 1. The adaptive dock design utilizes a method where the signal pins of the processor chip on the processor substrate extend to contact the connector pins on the adaptive connector. This design connects the processor's signals to the processor substrate on the dock. The processor substrate is located on the dock, and its extended pins contact the connector pins of the adaptive connector. The dock's substrate itself uses its own resistors to automatically distinguish the voltage of different devices, identifying the upper and lower eight bits of the signal based on voltage levels. This allows for the connection of different devices to obtain the resources required by each device. Specifically... Figure 4 As shown.

[0139] 2. By connecting all the power pins inside the processor to the bottom layer of the 3-pin adaptive connector, the power board converts the power through the power module and supplies power to the processor via a cable plugged into the adaptive connector.

[0140] 3. Connect all high-speed signals, such as CLK, PCIE, UPI, DDR, etc., coming from the base plate to the innermost PIN of the adaptive connector. There are three layers in total. The outermost black PIN is the power PIN, the middle blue and gray PIN is the low-speed PIN, and the innermost white and blue PIN is the high-speed PIN (80% high-speed and 20% low-speed). Then, simply insert the corresponding cables directly into the corresponding PIN holes.

[0141] Furthermore, this embodiment can automatically adjust the connection state of the adaptive connector based on the received signal information after the adaptive connector receives the signal transmitted from the processor substrate, so as to maintain a good signal connection.

[0142] Specifically, to ensure stable signal transmission under different voltage conditions, the adaptive connector can automatically adjust the position of its pins according to the received signal voltage. For example, under high voltage conditions, the pins can automatically move downwards to ensure close contact with the processor's pins; while under low voltage conditions, the pins can automatically move upwards to adapt to different voltage environments.

[0143] To further illustrate, the optional adaptive connector adjustment methods can be mechanical adjustment, electronic control, or material properties. Specifically, the connector may contain tiny mechanical structures, such as springs or sliders, which physically move under voltage. When the internal voltage changes, these mechanical structures adjust the position of the pins accordingly, bringing them into contact with the corresponding pins on the processor. Alternatively, the connector may integrate a miniature electronic control system, such as micro-motors, sensors, and controllers. When an internal voltage change is detected, the electronic control system drives the micro-motors and other devices to precisely adjust the pin positions. Or, in some advanced adaptive connectors, the properties of special materials (such as shape memory alloys) are utilized to achieve automatic adjustment. These materials deform when voltage or temperature changes, thereby altering the connector's contact state.

[0144] Optionally, such as Figure 5 As shown, a cable connection system integrating adaptive connector functionality is described. The processor plug end of the cable is responsible for connecting to the processor and is the starting point for signal or power transmission. The external connector terminal of the cable, serving as the other end of the cable, is used to connect to an external application device (application end). The adaptive connector automatically adjusts its connection state and uses this connection state to connect the signals from the application end and the processor end.

[0145] In optional embodiments, such as Figure 6 As shown, the external connector of the cable uses an integrated terminal, integrating all signals through the cable onto the terminal. The integrated connector, combined with the connector on the application side, ensures correct signal transmission. The cable processor's terminal design adopts a flat, single-ended design, inserting each signal from the cable end into the processor's adaptive transceiver connector using a separate terminal. Furthermore, the capacitors on the adaptive connector's base plate beneath the processor automatically identify the signal based on voltage levels. This greatly simplifies production and subsequent maintenance, eliminating concerns about incorrect cable insertion.

[0146] The embodiments of this application effectively reduce signal attenuation caused by excessive PCB material loss, ensuring that signal transmission meets link requirements. Simultaneously, the application of adaptive connectors significantly improves signal transmission rates, thereby increasing production line efficiency. This not only enhances overall economic benefits but also further reduces cable development costs by reducing cable types and increasing cable versatility.

[0147] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods of the various embodiments of this application.

[0148] This embodiment also provides a signal transmission device for implementing the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0149] Figure 4 This is a structural block diagram of a signal transmission device according to an embodiment of this application, such as... Figure 7 As shown, the device includes:

[0150] The first receiving unit 702 is used to receive a first signal from the processor chip;

[0151] The first transmission unit 704 is used to transmit the first signal to the processor substrate, wherein the resistor on the processor substrate can identify the voltage of different devices in order to distinguish the signal information of the first signal.

[0152] The second receiving unit 706 is used to receive a second signal from the processor substrate, wherein the second signal is a signal obtained by the processor substrate after processing the first signal according to the signal information;

[0153] The second transmission unit 708 is used to transmit the second signal to the application end.

[0154] For specific implementation examples, please refer to the examples shown in the above signal transmission method; these examples will not be repeated here.

[0155] As an alternative, the processor chip contacts the second pin on the adaptive connector via a protruding first pin. The first receiving unit 702 includes:

[0156] The first receiving module is used to receive the first signal by the adaptive connector through the electrical connection formed by the contact between the first PIN and the second PIN.

[0157] For specific implementation examples, please refer to the examples shown in the above signal transmission method; these examples will not be repeated here.

[0158] As an optional solution, the first transmission unit 704 includes:

[0159] The first transmission module is used to transmit a first signal to the processor substrate via an adaptive connector through an electrical connection, wherein the processor substrate is located on the processor base, and the processor base is used to house the processor chip.

[0160] For specific implementation examples, please refer to the examples shown in the above signal transmission method; these examples will not be repeated here.

[0161] As an optional solution, the second PIN pin is connected to the application end via the first cable. The second transmission unit 708 includes:

[0162] The second transmission module is used to transmit the second signal to the application end via the first cable and an adaptive connector.

[0163] For specific implementation examples, please refer to the examples shown in the above signal transmission method; these examples will not be repeated here.

[0164] As an optional embodiment, the second receiving unit 706 includes at least one of the following:

[0165] The second receiving module is used to receive low-speed signals from the processor substrate;

[0166] The third receiving module is used to receive high-speed signals from the processor substrate;

[0167] The fourth receiving module is used to receive a mixed signal from the processor substrate, wherein the mixed signal is a signal obtained by mixing a low-speed signal and a high-speed signal.

[0168] For specific implementation examples, please refer to the examples shown in the above signal transmission method; these examples will not be repeated here.

[0169] As an optional solution, the second receiving module includes: a first receiving submodule for receiving low-speed signals via a first number of third pins on the multi-layer PIN structure of the adaptive connector;

[0170] The third receiving module includes: a second receiving submodule for receiving high-speed signals from an adaptive connector via a second number of fourth pins on a multi-layer PIN structure, wherein the first number is less than the second number.

[0171] For specific implementation examples, please refer to the examples shown in the above signal transmission method; these examples will not be repeated here.

[0172] As an optional solution, the device also includes:

[0173] The power supply module is used to supply power to the processor chip through the bottom pin structure when the power pins inside the processor chip are connected to the bottom pin structure of the multi-layer PIN structure.

[0174] For specific implementation examples, please refer to the examples shown in the above signal transmission method; these examples will not be repeated here.

[0175] As an optional solution, the device may also include at least one of the following:

[0176] The first enhancement unit is used to enhance the strength of the first signal by using an amplifier after the first signal has been transmitted to the processor substrate;

[0177] The first processing unit is used to preprocess the first signal after transmitting it to the processor substrate in order to improve the purity of the first signal.

[0178] The first calibration unit is used to calibrate and adjust the first signal in real time based on the signal quality parameters monitored in real time after the first signal is transmitted to the processor substrate.

[0179] The first inspection unit is used to perform an integrity check on the first signal after it is transmitted to the processor substrate. If an abnormality or fault is found in the first signal, it automatically switches to the backup transmission path or starts the fault recovery program.

[0180] The device also includes at least one of the following:

[0181] The second enhancement unit is used to enhance the strength of the second signal by using an amplifier after receiving the second signal from the processor substrate;

[0182] The second processing unit is used to preprocess the second signal after receiving the second signal from the processor substrate in order to improve the purity of the first signal.

[0183] The second calibration unit is used to calibrate and adjust the second signal in real time based on the signal quality parameters monitored in real time after receiving the second signal from the processor substrate.

[0184] The second inspection unit is used to perform an integrity check on the second signal after receiving the second signal from the processor substrate. If an abnormality or fault is found in the second signal, it automatically switches to the backup transmission path or starts the fault recovery program.

[0185] For specific implementation examples, please refer to the examples shown in the above signal transmission method; these examples will not be repeated here.

[0186] As an optional solution, the second receiving unit 706 includes:

[0187] The first adjustment module is used to adjust the PIN structure of the adaptive connector according to the signal information;

[0188] The second adjustment module is used to receive the second signal through the adjusted PIN structure via the adaptive connector.

[0189] For specific implementation examples, please refer to the examples shown in the above signal transmission method; these examples will not be repeated here.

[0190] It should be noted that the aforementioned virtual devices (modules, units, sub-modules, sub-units, components, etc.) can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to these: all the aforementioned virtual devices are located in the same processor; or, the aforementioned virtual devices are located in different processors in any combination.

[0191] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above method embodiments when run.

[0192] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0193] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0194] In one exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0195] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0196] Obviously, those skilled in the art should understand that the virtual devices or steps described above in this application can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented here, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, this application is not limited to any particular combination of hardware and software.

[0197] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this application should be included within the protection scope of this application.

Claims

1. A signal transmission method, characterized in that, include: Receive the first signal from the processor chip; The first signal is transmitted to the processor substrate, wherein the resistor on the processor substrate can identify the voltage of different devices in order to distinguish the signal information of the first signal; Receive a second signal from the processor substrate, wherein the second signal is a signal obtained by the processor substrate after processing the first signal according to the signal information; The second signal is transmitted to the application. The receipt of the second signal from the processor substrate includes at least one of the following: The low-speed signal from the processor substrate is received by the adaptive connector through the first number of third pins on the multi-layer PIN structure of the adaptive connector. The adaptive connector receives high-speed signals from the processor substrate through a second number of fourth pins on the multilayer PIN structure, wherein the first number is less than the second number; Receive a mixed signal from the processor substrate, wherein the mixed signal is a signal obtained by mixing the low-speed signal and the high-speed signal; The adaptive connector automatically adjusts the position of the pins on the multi-layer PIN structure according to the received signal voltage. Under high voltage conditions, the distance between the pins on the multi-layer PIN structure and the PINs of the processor decreases, while under low voltage conditions, the distance between the pins on the multi-layer PIN structure and the PINs of the processor increases.

2. The method according to claim 1, characterized in that, The processor chip contacts a second pin on an adaptive connector via a protruding first pin, and receiving a first signal from the processor chip includes: The first signal is received by the adaptive connector through the electrical connection formed when the first PIN pin contacts the second PIN pin.

3. The method according to claim 2, characterized in that, The step of transmitting the first signal to the processor substrate includes: The first signal is transmitted to the processor substrate via the adaptive connector through the electrical connection, wherein the processor substrate is located on the processor base, and the processor base is used to house the processor chip.

4. The method according to claim 2, characterized in that, The second PIN pin is connected to the application terminal via the first cable, and transmitting the second signal to the application terminal includes: The second signal is transmitted to the application end via the first cable and the adaptive connector.

5. The method according to any one of claims 1 to 4, characterized in that, The receiving of the second signal from the processor substrate includes: Adjust the PIN structure of the adaptive connector based on the signal information; The second signal is received through the PIN structure adjusted by the adaptive connector.

6. The method according to any one of claims 1 to 4, characterized in that, After transmitting the first signal to the processor substrate, the method further includes at least one of the following: An amplifier is used to amplify the strength of the first signal; The first signal is preprocessed to improve its purity; Based on the real-time monitored signal quality parameters, the first signal is calibrated and adjusted in real time. The integrity of the first signal is checked. If an abnormality or fault is found in the first signal, the system automatically switches to the backup transmission path or starts the fault recovery procedure. After receiving the second signal from the processor substrate, the method further includes at least one of the following: An amplifier is used to enhance the strength of the second signal; The second signal is preprocessed to improve the purity of the first signal; The second signal is calibrated and adjusted in real time based on the signal quality parameters monitored in real time. The integrity of the second signal is checked. If an abnormality or fault is found in the second signal, the system automatically switches to the backup transmission path or starts the fault recovery procedure.

7. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method described in any one of claims 1 to 6.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method described in any one of claims 1 to 6.

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