Electrode Cascade Fault Detection Method and Device Based on Deterministic Network Load Allocation
By building a load distribution model of the power system under deterministic network conditions, and monitoring current changes and load distribution in real time, the data delay and safety hazards of power system fault detection in non-deterministic network conditions are solved, fast and accurate fault identification and early warning are achieved, and the stability and safety of the power system are improved.
Patent Information
- Application Number
- CN202411530222.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-30
- Publication Date
- 2025-08-05
- Estimated Expiration
- 2044-10-30
AI Technical Summary
In the non-deterministic network state, power system fault detection faces problems such as data transmission delay, information loss, time synchronization difficulties, reduced response speed and increased safety hazards, resulting in a decrease in detection efficiency and accuracy, affecting the stability and safety of the power system.
The electrical cascade fault detection method based on deterministic network load distribution is adopted. By determining the objective function, cascade fault expression and candidate attack expression of the power system under deterministic network conditions, the load allocation situation and current changes are monitored in real time, and potential cascade faults and attack behaviors are identified and warned.
It realizes rapid and accurate identification and response to potential faults and attacks under deterministic network conditions, reduces detection errors, ensures the stability and information security of the power system, and prevents the occurrence of large-scale cascading faults.
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Figure CN119627925B_ABST
Abstract
Description
Technical Field
[0001] This specification relates to the field of power system fault detection technology, and in particular to a method and device for detecting electrical cascade faults based on deterministic network load distribution. Background Art
[0002] The stability of power systems is crucial to the functioning of modern society. As power grids grow in size and complexity, the risk of cascading failures increases. These failures can rapidly escalate into large-scale power outages, significantly impacting socioeconomic activities and public safety. Therefore, developing efficient and reliable fault detection methods is crucial.
[0003] In power systems, deterministic networking refers to a network architecture that ensures the timing and reliability of data communication, which is particularly important for real-time systems. This type of network is designed to ensure that data is transmitted accurately and within strict time constraints. Deterministic networking is achieved through strict time synchronization and data transmission mechanisms. This ensures that data exchange between all devices is synchronized, preventing untimely or erroneous system responses due to data delays or loss.
[0004] However, existing technologies fail to consider whether the power system is operating in a deterministic network state. In a non-deterministic network, power system fault detection faces numerous challenges, including data transmission delays, information loss and inaccuracy, time synchronization difficulties, reduced response speeds, and increased safety risks. These factors can reduce fault detection efficiency and accuracy, impacting the stable operation and safety of the power system. Summary of the Invention
[0005] To address the existing issues of data transmission delay and increased safety risks in power system fault detection under non-deterministic network conditions, the embodiments of this specification provide a method and apparatus for detecting cascade faults based on deterministic network load distribution.
[0006] An embodiment of the present specification provides an electrical cascading fault detection method based on deterministic network load distribution, the method comprising: determining an objective function of a load distribution attack on a power system under deterministic network conditions based on a predicted current value of the line before the load distribution attack and the actual load current of the line; determining a cascading fault expression based on the number of trips of all sub-lines, the current value of each sub-line before tripping, and the load change after a local power outage; determining a candidate attack expression based on the current disturbance conditions of all sub-lines and the objective function; determining whether the load distribution attack on the power system under current deterministic network conditions satisfies the candidate attack expression; if so, determining whether the load distribution attack satisfies the cascading fault expression; if so, determining that a cascading fault has occurred and issuing an early warning.
[0007] According to one aspect of an embodiment of this specification, determining an objective function of a load distribution attack on a power system under deterministic network conditions based on a predicted current value of the line before the load distribution attack and the actual load current of the line includes: determining the objective function using the following formula: Among them, F l represents the calculated value of the objective function of bus l, represents the predicted current value of line i before the line is attacked, D i Indicates the actual load current on line i, PT l,i represents the current transfer distribution coefficient matrix of bus 1, and N represents the number of sub-lines connected to bus 1.
[0008] According to one aspect of an embodiment of this specification, determining a cascading fault expression for a power system includes: determining a first fault calculation formula based on the number of tripped sub-lines and whether each sub-line tripped: Where w1 represents the number of tripped sub-lines on bus 1, Indicates whether the i-th sub-line in bus 1 trips; according to the current value of each sub-line before tripping, the second fault calculation formula is determined: Among them, w2 represents the absolute current of the bus at the moment of tripping, represents the current value of the i-th sub-line in bus 1 before tripping; according to the number of islands and the calculated value of island load, the third fault calculation formula is determined as follows: in, represents the total load size of island j formed on bus l, represents the load size generated in the island j formed on the bus l, w3 represents the calculated value of the island load, and m represents the number of islands; according to the first fault calculation formula, the second fault calculation formula and the third fault calculation formula, the cascade fault expression is determined.
[0009] According to one aspect of the embodiment of this specification, according to the first fault calculation formula, the second fault calculation formula and the third fault calculation formula, determining the cascade fault expression includes: Ω min ≤ξ*w1+ψ*w2+ζ*w3≤Ω max ; Among them, ξ, ψ, ζ represent different weight coefficients, Ω min ,Ω max are the lower and upper limits of the cascade fault calculation value. w1 represents the first fault calculation formula, w2 represents the second fault calculation formula, and w3 represents the third fault calculation formula.
[0010] According to one aspect of an embodiment of this specification, determining a candidate attack expression according to the current disturbance conditions of all sub-lines and the objective function includes:
[0011] Candidate attack expressions are determined as follows:
[0012] in, represents the disturbance current value of sub-line i in bus l, which is used to characterize the impact of load distribution attack. l represents the objective function of bus I, β,κ represent different weight coefficients, ln represents the natural function, e represents the error calculation deviation constant term, represents the current value of the ith sub-line in bus l before tripping, T fix Represents the disturbance current comparison value, Γ min ,Γ max Indicates the lower and upper bound values for candidate attack selection.
[0013] According to one aspect of an embodiment of this specification, the objective function has corresponding constraints: Where ΔQ i It represents the load change value on sub-line i in a short period of time, and α represents the constant coefficient.
[0014] According to one aspect of an embodiment of this specification, a first warning is issued after the current load distribution attack satisfies the candidate attack expression.
[0015] The embodiments of this specification also provide an electrical cascade fault detection device based on deterministic network load distribution, the device comprising: an objective function determination unit, for determining the objective function of the load distribution attack of the power system under deterministic network conditions based on the predicted current value of the line before the load distribution attack and the actual load current of the line; a cascading fault expression determination unit, for determining the cascading fault expression based on the number of tripping of all sub-lines, the current value of each sub-line before tripping, and the load change after the local power outage; a candidate attack expression determination unit, for determining the candidate attack expression based on the current disturbance conditions of all sub-lines and the objective function; a first judgment unit, for judging whether the load distribution attack of the power system under the current deterministic network conditions satisfies the candidate attack expression; a second judgment unit, for, if so, judging whether the load distribution attack satisfies the cascading fault expression; and an early warning unit, for, if so, determining that a cascade fault has occurred and issuing an early warning.
[0016] The embodiments of this specification further provide a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the electrical cascade fault detection method based on deterministic network load distribution is implemented.
[0017] This manual uses real-time monitoring of load distribution and current changes to quickly and accurately identify and respond to potential faults and attacks, accurately identifying and predicting cascading failures caused by uneven load distribution. It takes into account the predictability of data transmission and the determinism of system inputs, reducing detection errors caused by randomness. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the embodiments of this specification or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0019] Figure 1 Shown is a flow chart of an electrical cascade fault detection method based on deterministic network load distribution according to an embodiment of this specification;
[0020] Figure 2 The figure shows a flow chart of a method for determining a cascading fault expression of a power system according to an embodiment of the present specification;
[0021] Figure 3 The figure shows a schematic structural diagram of an electrical cascade fault detection device based on deterministic network load distribution according to an embodiment of this specification;
[0022] Figure 4 It is a schematic diagram of the specific structure of the electrical cascade fault detection device based on deterministic network load distribution according to the embodiment of this specification;
[0023] Figure 5 Shown is a schematic diagram of a computer device provided in an embodiment of this specification.
[0024] Description of the accompanying symbols:
[0025] 301. Target function determination unit;
[0026] 302. Cascading fault expression determination unit;
[0027] 303. Candidate attack expression determination unit;
[0028] 3031, current disturbance statistics module;
[0029] 3032, calculation module;
[0030] 304, first judgment unit;
[0031] 305, second judgment unit;
[0032] 306, early warning unit;
[0033] 502. Computer equipment;
[0034] 504, processor;
[0035] 506. Memory;
[0036] 508, driving mechanism;
[0037] 510, input / output module;
[0038] 512. Input devices;
[0039] 514. Output device;
[0040] 516. Presentation equipment;
[0041] 518. Graphical User Interface;
[0042] 520, network interface;
[0043] 522, communication link;
[0044] 524. Communication bus. DETAILED DESCRIPTION
[0045] To help those skilled in the art better understand the technical solutions in this specification, the following will provide a clear and complete description of the technical solutions in the embodiments of this specification, in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of this specification, not all of them. All other embodiments obtained by those skilled in the art based on the embodiments in this specification without creative work are within the scope of protection of this specification.
[0046] It should be noted that the terms "first," "second," and the like in the description and claims of this specification and the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate so that the embodiments of this specification described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, apparatus, product, or device comprising a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to these processes, methods, products, or devices.
[0047] This specification provides method operation steps as described in the embodiments or flowcharts, but more or fewer operation steps may be included based on routine or non-creative work. The order of steps listed in the embodiments is only one way of executing the steps among many, and does not represent the only execution order. When a system or device product is actually executed, the method can be executed in the order shown in the embodiments or the drawings, or in parallel.
[0048] It should be noted that the electrical cascade fault detection method and device based on deterministic network load distribution in this specification can be used in the field of power system fault detection technology, and can also be used in other fields. This specification does not limit the application field of the electrical cascade fault detection method and device based on deterministic network load distribution.
[0049] This solution builds an attack model for load distribution in a deterministic network, as well as a model for the cascading failures in the power system that may be caused by such attacks. It also constructs a discriminant to determine in real time whether the power system is subject to a load distribution attack when operating in a deterministic network, and further determines whether it will cause cascading failures in the power system, thereby ensuring the information security of the power system.
[0050] Figure 1 The flowchart of the method for detecting cascading faults based on deterministic network load distribution according to an embodiment of this specification is shown, which specifically includes the following steps:
[0051] Step 101 : determining an objective function of a load distribution attack on a power system under deterministic network conditions based on a predicted current value of the line before the load distribution attack and the actual load current of the line.
[0052] In the embodiments of this specification, under deterministic network conditions, data transmission in the power system is predictable. The power system's inputs, including but not limited to known and deterministic parameters such as power generation, load demand, and equipment performance, are known and deterministic. In other words, the power system's input data does not involve randomness.
[0053] In this step, a load distribution attack refers to a scenario in which a sub-line in the power system is attacked during the process of distributing load from a bus to a sub-line. Attacks on sub-lines include, but are not limited to, power supply instability or power outages. In the embodiments of this specification, manipulation of the power system's load distribution calculations causes power instability or power outages on a bus or sub-line in the power system. A load distribution attack involves altering the power system's short-term load forecast to influence future power distribution data, thereby causing cascading failures in the power system.
[0054] In the embodiment of this specification, the objective function is determined by the following formula:
[0055] Among them, Fl represents the calculated value of the objective function of bus l, represents the predicted current value of line i before the line is attacked, D i Indicates the actual load current on line i, PT l,i represents the current transfer distribution coefficient matrix for bus 1, and N represents the number of sub-lines connected to bus 1. The objective function's structure indicates that it represents the change in load current on the lines within the bus. If the power system is attacked during load distribution, the load current on the lines will change. Furthermore, the greater the load current change, the greater the value of the objective function; the more lines attacked, the greater the value of the objective function.
[0056] In the embodiment of this specification, the objective function also has corresponding constraints, and the constraint formula is:
[0057] Where ΔQ i Represents the load change value on sub-line i in the short term, and α represents a constant coefficient. Among them, formula a) in the constraint formula represents the net load on bus l, and the constraint of formula a) belongs to the attack attribute of the load distribution attack. Among them, the net load refers to the difference between the actual electric energy consumed by the power system in a certain time period and the electric energy provided by the power plant in the time period. During the operation of the power system, the net load should remain unchanged to avoid frequency problems. In this manual, formula a) in the constraint formula is used to ensure that the power system will not have frequency problems due to the attack it suffers, and the role of formula b) in the constraint formula is the intensity and impact range of the load distribution attack, which is used to limit the load deviation.
[0058] Step 102: Determine a cascading fault expression based on the number of trips of all sub-lines, the current value of each sub-line before tripping, and the load change after the local power outage.
[0059] In the embodiments of this specification, cascading failure means that when a certain line (or a certain node) in the power system is attacked, the attacked line may affect other areas or other nodes in the power system, causing a larger range of failures. The attacks suffered by a certain line include but are not limited to: causing the line or node to trip, local power outages in the power system to form islands, etc. Therefore, it is necessary to count the tripping conditions of all sub-lines in the bus and the load changes after the local power outage in the power system in this step. Specifically, the number of trips of all sub-lines in the power system, the current value of each sub-line before tripping, and the load changes of the power system after the local power outage are obtained. Further based on the above factors, the cascading failure expression of the power system is determined.
[0060] In the embodiments of this specification, the cascading fault expression is related to the current changes and load changes of each sub-line in the power system. Therefore, the embodiments of this specification can monitor the load distribution of the bus in the power system and the current changes of each sub-line in real time through the cascading fault expression, and quickly and accurately identify and respond to potential faults and attacks.
[0061] In this step, the cascading failure expression of the power system is detailed in Figure 2 The embodiment of this specification monitors the load distribution and current changes in real time to quickly and accurately identify and respond to potential faults and attack behaviors.
[0062] Step 103: Determine candidate attack expressions based on the current perturbations of all sub-lines and the objective function. In this step, the candidate attack expressions are related to the current perturbations of each sub-line in the bus. If a sub-line is subject to a significant attack, the current perturbation value on that sub-line is significant; if a sub-line is subject to a minor attack, the current perturbation value on that sub-line is also significant. The current perturbation on a sub-line indicates whether or not a sub-line is subject to a load distribution attack. It also indicates the severity of the load distribution attack on that sub-line.
[0063] Step 104 determines whether the load distribution attack on the power system under the current deterministic network conditions satisfies the candidate attack expression. In this step, the candidate attack expression constructed in step 103 can be used to determine whether the load distribution attack on the power system under the current deterministic network conditions qualifies as a candidate attack, thereby enabling attack detection. Therefore, this step uses the candidate attack expression to determine whether the power system is subject to a load distribution attack when operating in a deterministic network.
[0064] Step 105: If yes, determine whether the load distribution attack satisfies the cascading failure expression.
[0065] In this step, if the load distribution attack of the power system under the current deterministic network condition satisfies the candidate attack expression, it means that the power system is subject to the load distribution candidate attack when operating under the deterministic network.
[0066] Therefore, it is necessary to further determine whether the load distribution candidate attack brings cascading failures to the power system in order to determine the type of candidate attack or the cause of the candidate attack.
[0067] By constructing an objective function for load distribution attacks under deterministic network conditions, we can accurately identify and predict cascading failures caused by uneven load distribution. This approach takes into account the predictability of data transmission and the determinism of system inputs, reducing detection errors caused by randomness.
[0068] If so, step 106 determines that a cascading failure has occurred and issues a warning. In this specification, cascading failures have a significant impact and pose a high security risk. Therefore, when a cascading failure is determined to have occurred, it is necessary to issue a warning to help power system managers take timely countermeasures, safeguard power system information security, reduce the risk of power outages caused by cascading failures, and improve the overall stability of the power system.
[0069] This manual can effectively prevent large-scale cascading failures in the power system and ensure the continuity and stability of power system operation by timely detecting and handling load distribution anomalies.
[0070] Operations in a deterministic network environment enhance the predictability and reliability of data transmission and reduce security issues caused by data errors or delays.
[0071] Figure 2 The flowchart of a method for determining a cascading fault expression of a power system according to an embodiment of this specification is shown, which specifically includes the following steps:
[0072] Step 201: Determine a first fault calculation formula based on the number of tripped sub-lines and whether each sub-line has tripped. The first fault calculation formula is as follows:
[0073] Where w1 represents the number of tripped sub-lines on bus 1, Indicates whether the ith sub-line in bus l is tripped. When tripped, The value is 1, otherwise the value is 0.
[0074] For example, if bus 1 has 10 sub-lines, and the first, third, and fourth sub-lines of the 10 sub-lines are tripped, while the remaining seven sub-lines are normal, then the number of tripped sub-lines in bus 1 can be calculated as 3 using the first fault calculation formula.
[0075] Step 202: Determine a second fault calculation formula based on the current value of each sub-line before tripping. The second fault calculation formula is as follows:
[0076] Among them, w2 represents the absolute current of the bus at the moment of tripping, It represents the current value of the ith sub-line in bus l before tripping, which can be obtained through monitoring measurement. Indicates whether the ith sub-line in bus l is tripped, and N represents the total number of sub-lines. According to the above, when a trip occurs, The value is 1, otherwise the value is 0.
[0077] For example, suppose bus 1 has 10 sub-lines. Sub-lines 1, 3, and 4 of these 10 sub-lines trip, and the current values of these 10 sub-lines before the trip are collected. Using the second fault calculation formula, the absolute current of bus 1 immediately after the trip is calculated as the sum of the products of the current values of the seven healthy sub-lines multiplied by their pre-trip current values.
[0078] Step 203: Determine a third fault calculation formula based on the number of islands and the calculated island load value. The third fault calculation formula is as follows:
[0079] Wherein, w3 represents the calculated value of island load, and m represents the number of islands. Indicates the total load size of the island j formed on bus l, which represents the load of the sub-line corresponding to the island. It represents the load size generated in the island j formed on bus l. It represents the load generated internally in the island through other means after the island is formed. Such load is not obtained from the power grid but is generated internally in the island.
[0080] In this step, when a localized power outage occurs in the power system, multiple nodes or sub-lines are prone to forming islands. Generally, islands are more likely to cause large-scale cascading failures. Therefore, it is necessary to construct a third fault calculation formula to determine the load change caused by the islands.
[0081] Step 204: Determine a cascading fault expression based on the first fault calculation formula, the second fault calculation formula, and the third fault calculation formula. Specifically, the cascading fault expression is as follows:
[0082] Ω min ≤ξ*w1+ψ*w2+ζ*w3≤Ω max ; Wherein, ξ, ψ, ζ represent the weight coefficients corresponding to the first fault calculation formula, the second fault calculation formula and the third fault calculation formula respectively, Ω min ,Ω max w1 represents the first fault calculation formula, w2 represents the second fault calculation formula, and w3 represents the third fault calculation formula.
[0083] In the embodiment of this specification, according to the current disturbance conditions of all sub-lines and the objective function, determining the candidate attack expressions includes:
[0084] Candidate attack expressions are determined as follows:
[0085] in, represents the disturbance current value of sub-line a in bus l, which is used to characterize the impact of load distribution attack. l represents the objective function of bus I, β,κ represent different weight coefficients, ln represents the natural function, e represents the error calculation deviation constant term, represents the current value of the ith sub-line in bus l before tripping, T fix Indicates the disturbance current comparison value, which is a preset value. The disturbance current comparison value is related to the scale of the power system. Generally, the larger the scale of the power system, the larger the disturbance current comparison value. Γ min ,Γ max They represent the upper and lower limits of candidate attack selection respectively.
[0086] In the embodiment of this specification, the current load distribution attack in the power system is calculated. After the disturbance current value of line a is calculated according to formula (1) in the candidate attack expression, the disturbance current value is substituted into formula (2) in the candidate attack expression to determine whether the ratio of the disturbance current value to the disturbance current comparison value exceeds the upper limit or lower limit selected for the candidate attack. If the ratio of the disturbance current value to the disturbance current comparison value exceeds the upper limit or lower limit selected for the candidate attack, it indicates that the power system has experienced abnormal operating conditions of some sub-lines under the current load distribution attack. The attack on the line is a candidate attack, and an early warning needs to be issued.
[0087] In some other embodiments of this specification, after the current load distribution attack satisfies the candidate attack expression, a first warning is issued to the management end of the power system. Further, it is determined whether a cascading failure occurs in the current load distribution attack based on the cascading failure expression. If the cascading failure expression is satisfied, it is determined that a cascading failure occurs, and a second warning is issued to the management end of the power system; otherwise, no cascading failure occurs. In the embodiments of this specification, the first warning can be understood as a warning with a lower risk level, and the urgency of the first warning is not as high as that of the second warning. Corresponding to the large impact range and high risk level of the cascading failure, the second warning is a warning with a higher risk level. Therefore, this specification can control the issuance of a first warning with a lower risk level to the management end of the power system when the load distribution attack satisfies the candidate attack expression; and control the issuance of a second warning with a higher risk level to the management end of the power system when the current load distribution satisfies the cascading failure expression, so that the management end of the power system can take countermeasures according to the different warning types or warning levels.
[0088] This invention uses real-time discriminant monitoring to determine whether the power system is vulnerable to load distribution attacks and predict potential cascading failures, thereby issuing early warnings. This helps power system managers take timely countermeasures, safeguarding the power system's information security, reducing the risk of power outages caused by cascading failures, and improving the overall stability of the power system.
[0089] Figure 3 This is a schematic diagram of the structure of an electrical cascade fault detection device based on deterministic network load distribution according to an embodiment of this specification. This figure describes the basic structure of the electrical cascade fault detection device based on deterministic network load distribution. The functional units and modules therein can be implemented in software, or general-purpose chips or specific chips can be used to implement electrical cascade fault detection based on deterministic network load distribution. The device specifically includes:
[0090] An objective function determination unit 301 is configured to determine an objective function of a load distribution attack on a power system under deterministic network conditions based on a predicted current value of the line before the load distribution attack and an actual load current of the line;
[0091] The cascading fault expression determination unit 302 is configured to determine the cascading fault expression based on the number of trips of all sub-lines, the current value of each sub-line before the trip, and the load change after the local power outage;
[0092] A candidate attack expression determination unit 303 is configured to determine a candidate attack expression according to the current disturbance conditions of all sub-lines and the objective function;
[0093] A first judging unit 304 is configured to judge whether the load distribution attack of the power system under the current deterministic network condition satisfies the candidate attack expression;
[0094] The second judging unit 305 is configured to, if yes, judge whether the load distribution attack satisfies a cascading failure expression;
[0095] The early warning unit 306 is configured to, if yes, determine that a cascading failure has occurred and issue an early warning.
[0096] This document uses real-time monitoring of load distribution and current fluctuations to quickly and accurately identify and respond to potential failures and attacks. By constructing a load distribution attack model for deterministic networks, it accurately identifies and predicts cascading failures caused by uneven load distribution. This approach considers the predictability of data transmission and the determinism of system inputs, mitigating detection errors caused by randomness.
[0097] As an example of this specification, you can also refer to Figure 4 FIG. 1 is a schematic diagram showing the specific structure of the electrical cascade fault detection device based on deterministic network load distribution according to this embodiment.
[0098] As an embodiment of this invention, the candidate attack expression determination unit 303 further includes:
[0099] The current disturbance statistics module 3031 is used to determine the current disturbance conditions of all sub-lines;
[0100] The calculation module 3032 is used to calculate the disturbance current value and the disturbance current comparison value.
[0101] like Figure 5 The figure shows a schematic diagram of a computer device provided in an embodiment of this specification. The electrical cascading fault detection method based on deterministic network load distribution described in this application can be applied to the computer device. The computer device 502 may include one or more processors 504, such as one or more central processing units (CPUs), each of which may implement one or more hardware threads. The computer device 502 may also include any memory 506 for storing any type of information, such as code, settings, data, etc. For example, without limitation, the memory 506 may include any one or more combinations of the following: any type of RAM, any type of ROM, a flash memory device, a hard disk, an optical disk, etc. More generally, any memory may use any technology to store information. Furthermore, any memory may provide volatile or non-volatile retention of information. Furthermore, any memory may represent a fixed or removable component of the computer device 502. In one embodiment, when the processor 504 executes associated instructions stored in any memory or combination of memories, the computer device 502 may perform any operation of the associated instructions. The computer device 502 also includes one or more drive mechanisms 508 for interacting with any storage, such as a hard disk drive mechanism, an optical disk drive mechanism, and the like.
[0102] The computer device 502 may also include an input / output module 510 (I / O) for receiving various inputs (via input devices 512) and for providing various outputs (via output devices 514). A specific output mechanism may include a presentation device 516 and an associated graphical user interface (GUI) 518. In other embodiments, the input / output module 510 (I / O), input devices 512, and output devices 514 may not be included, and the computer device 502 may simply be a computer device in a network. The computer device 502 may also include one or more network interfaces 520 for exchanging data with other devices via one or more communication links 522. One or more communication buses 524 couple the components described above together.
[0103] The communication link 522 may be implemented in any manner, for example, via a local area network, a wide area network (e.g., the Internet), a point-to-point connection, etc., or any combination thereof. The communication link 522 may include any combination of hardwired links, wireless links, routers, gateway functions, name servers, etc., governed by any protocol or combination of protocols.
[0104] Corresponding to Figures 1 to 2The method in this specification also provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the steps of the above method are executed.
[0105] The embodiment of this specification also provides a computer-readable instruction, wherein when the processor executes the instruction, the program therein causes the processor to execute the following Figures 1 to 2 The method shown.
[0106] It should be understood that in the various embodiments of this specification, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this specification.
[0107] It should also be understood that in the embodiments of this specification, the term "and / or" is merely a description of the relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone. Furthermore, the character " / " in this specification generally indicates that the associated objects are in an "or" relationship.
[0108] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed in this specification can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the composition and steps of each example according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this specification.
[0109] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0110] In the several embodiments provided in this specification, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, or can be an electrical, mechanical or other form of connection.
[0111] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiments of this specification.
[0112] In addition, the functional units in the various embodiments of this specification may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.
[0113] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this specification is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of this specification. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.
[0114] Specific embodiments are used in this specification to illustrate the principles and implementation methods of this specification. The description of the above embodiments is only used to help understand the methods and core ideas of this specification. At the same time, for those skilled in the art, based on the ideas of this specification, there will be changes in the specific implementation methods and application scope. In summary, the contents of this specification should not be understood as limiting this specification.
Claims
1. A method for detecting electrical cascade failures based on deterministic network load distribution, characterized in that: The method comprises: According to the predicted current value of the line before the load distribution attack and the actual load current of the line, the objective function of the load distribution attack of the power system under deterministic network conditions is determined; Based on the number of trips on all sub-lines, the current value of each sub-line before tripping, and the load change after the local power outage, a cascading fault expression is determined, which includes: determining the first fault calculation formula based on the number of sub-lines that have tripped and whether each sub-line has tripped: Where w1 represents the number of tripped sub-lines on bus 1, Indicates whether the ith sub-line in bus l is tripped; N represents the total number of sub-lines; According to the current value of each sub-line before tripping, the second fault calculation formula is determined: Where, w2 represents the absolute current of the bus at the moment of tripping, f l i represents the current value of the ith sub-line in bus l before tripping; According to the number of islands and the calculated value of island load, the third fault calculation formula is determined: in, represents the total load size of island j formed on bus l, represents the load generated in the island j formed on bus l, w3 represents the calculated value of the island load, and m represents the number of islands; Determine a cascading fault expression according to the first fault calculation formula, the second fault calculation formula, and the third fault calculation formula; Determining a candidate attack expression according to the current disturbance conditions of all sub-lines and the objective function includes: determining the candidate attack expression by: in, represents the disturbance current value of sub-line i in bus l, which is used to characterize the impact of load distribution attack. l represents the objective function of bus I, β,κ represent different weight coefficients, ln represents the natural function, e represents the error calculation deviation constant term, f l i represents the current value of the ith sub-line in bus l before tripping, T fix Represents the disturbance current comparison value, Γ min ,Γ max Indicates the lower and upper bound values for candidate attack selection; Determining whether a load distribution attack on the power system under current deterministic network conditions satisfies the candidate attack expression; If so, determining whether the load distribution attack satisfies a cascading failure expression; If so, a cascading failure is determined to have occurred and an early warning is issued.
2. The method according to claim 1, characterized in that Based on the predicted current value of the line before the load distribution attack and the actual load current of the line, the objective function of the load distribution attack of the power system under deterministic network conditions is determined as follows: The objective function is determined by the following formula: Among them, F l represents the calculated value of the objective function of bus l, represents the predicted current value of line i before the line is attacked, D i Indicates the actual load current on line i, PT l,i represents the current transfer distribution coefficient matrix of bus 1, and N represents the number of sub-lines connected to bus 1.
3. The method according to claim 1, characterized in that Determining a cascading fault expression according to the first fault calculation formula, the second fault calculation formula, and the third fault calculation formula includes: Ω min ≤ξ*w1+ψ*w2+ζ*w3≤Ω max ; Among them, ξ, ψ, ζ represent different weight coefficients, Ω min ,Ω max are the lower and upper limits of the cascade fault calculation value; w1 represents the first fault calculation formula, w2 represents the second fault calculation formula, and w3 represents the third fault calculation formula.
4. The method according to claim 1, wherein The objective function has corresponding constraints as follows: Among them, a and b represent two constraints, ΔQ i It represents the load change value on sub-line i in a short period of time, and α represents the constant coefficient.
5. The method according to claim 1, characterized in that After the current load distribution attack satisfies the candidate attack expression, a first warning is issued.
6. An electrical cascade fault detection device based on deterministic network load distribution, characterized in that: The device comprises: An objective function determination unit is used to determine an objective function of the load distribution attack of the power system under deterministic network conditions based on a predicted current value of the line before the load distribution attack and an actual load current of the line; The cascading fault expression determination unit is used to determine the cascading fault expression based on the number of trips of all sub-lines, the current value of each sub-line before tripping, and the load change after the local power outage. The cascading fault expression includes: determining the first fault calculation formula based on the number of sub-line trips and whether each sub-line trips: Where w1 represents the number of tripped sub-lines on bus 1, Indicates whether the ith sub-line in bus l is tripped; N represents the total number of sub-lines; According to the current value of each sub-line before tripping, the second fault calculation formula is determined: Where, w2 represents the absolute current of the bus at the moment of tripping, f l i represents the current value of the ith sub-line in bus l before tripping; According to the number of islands and the calculated value of island load, the third fault calculation formula is determined: in, represents the total load size of island j formed on bus l, represents the load generated in the island j formed on bus l, w3 represents the calculated value of the island load, and m represents the number of islands; Determine a cascading fault expression according to the first fault calculation formula, the second fault calculation formula, and the third fault calculation formula; The candidate attack expression determination unit is used to determine the candidate attack expression according to the current disturbance conditions of all sub-lines and the objective function, which includes: determining the candidate attack expression by the following method: in, represents the disturbance current value of sub-line i in bus l, which is used to characterize the impact of load distribution attack. l represents the objective function of bus I, β,κ represent different weight coefficients, ln represents the natural function, e represents the error calculation deviation constant term, f l i represents the current value of the ith sub-line in bus l before tripping, T fix Represents the disturbance current comparison value, Γ min ,Γ max Indicates the lower and upper bound values for candidate attack selection; A first judgment unit is configured to judge whether a load distribution attack on the power system under current deterministic network conditions satisfies the candidate attack expression; a second judging unit, configured to, if yes, judge whether the load distribution attack satisfies a cascading failure expression; The early warning unit is used to determine that a cascading failure occurs and issue an early warning.
7. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the method according to any one of claims 1 to 5 is implemented.
8. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 5 is implemented.
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