Method for self-checking of a car-grade chip transceiver circuit and related device
By incorporating built-in RFLB and I FLB detection mechanisms, the reliance on external testing equipment in traditional testing methods is eliminated, ensuring the performance of automotive-grade chips in RF and IF signal processing, improving production efficiency and reducing costs, and meeting the automotive industry's demand for high-performance, high-reliability radar chips.
Patent Information
- Application Number
- CN202411681530.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-22
- Publication Date
- 2025-12-12
- Estimated Expiration
- 2044-11-22
AI Technical Summary
Traditional testing methods rely on external equipment, resulting in low production efficiency, high cost, and cumbersome testing processes for automotive-grade radar chips.
By employing built-in RFLB and I FLB detection mechanisms, frequency and amplitude information in the loop on and off states are acquired and compared after the chip is powered on to verify the RFLB and I FLB functions, activate the loop and acquire signal information to determine the working state, ensure signal quality, and reduce dependence on external testing equipment.
This has improved the production efficiency of radar chips, reduced testing costs, and met the automotive industry's demand for high-performance, high-reliability radar chips, while also providing strong protection for the functional safety of automotive chips.
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Figure CN119628762B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] Embodiments of the present application relate to the technical field of radar chip, and particularly to a self-checking method of a vehicle-grade chip transceiver circuit and related equipment. BACKGROUND
[0002] With the rapid development of the automotive industry, the safety and reliability requirements of vehicle-grade radar chips, as one of the core components of advanced driver assistance systems for vehicles, are constantly improving. Vehicle-grade radar chips not only need to work stably in various extreme environments, but also need to meet strict functional safety standards. In addition, they need to integrate complex digital and analog circuits to be able to handle high-speed data transmission and high-precision signal processing tasks.
[0003] However, in the design and production process of vehicle-grade radar chips, it is necessary to ensure that the performance of the transceiver circuit in the processing of radio frequency and intermediate frequency signals meets the predetermined requirements through a test method. The traditional test method mainly relies on external test equipment, which requires additional hardware costs, and the test process is complicated and time-consuming, affecting the production efficiency and production cost of vehicle-grade chips. SUMMARY
[0004] Embodiments of the present application provide a self-checking method of a vehicle-grade chip transceiver circuit and related equipment, which can ensure that the performance of the transceiver circuit in the processing of radio frequency and intermediate frequency signals meets the predetermined requirements through the built-in RFLB and IFLB detection mechanisms, thereby reducing the dependence on external test equipment, and improving the production efficiency and reducing the production cost of vehicle-grade chips while improving the overall performance and reliability of radar chips.
[0005] To achieve the above-mentioned purpose, a first aspect of embodiments of the present application provides a self-checking method of a vehicle-grade chip transceiver circuit, which is applied to a vehicle-grade chip, the vehicle-grade chip comprising an RFLB loop and an IFLB loop, the method comprising: after the vehicle-grade chip is powered on, acquiring and comparing the frequency and amplitude information corresponding to the RFLB loop in the open and closed states to verify the RFLB function; acquiring and comparing the frequency and amplitude information corresponding to the IFLB loop in the open and closed states to verify the IFLB function; after the RFLB function and the IFLB function are verified, activating the RFLB loop and the IFLB loop, acquiring the radio frequency signal information corresponding to the RFLB loop, and determining the working state of the RFLB loop according to the radio frequency signal information, acquiring the intermediate frequency signal information corresponding to the IFLB loop, and determining the working state of the IFLB loop according to the intermediate frequency signal information; in the case that the RFLB loop and the IFLB loop are both in a normal running working state, performing data frame sending based on the RFLB loop and the IFLB loop.
[0006] In some embodiments, the acquiring and comparing the frequency and amplitude information corresponding to the RFLB loop open and closed states to verify the RFLB function comprises: in the RFLB loop open state, collecting data of a corresponding analog-to-digital converter and performing fast Fourier transform to obtain first frequency and amplitude information; in the RFLB loop closed state, collecting data of the analog-to-digital converter again and performing fast Fourier transform to obtain second frequency and amplitude information; if the first frequency and amplitude information and the second frequency and amplitude information both meet corresponding preset ranges, determining that the RFLB function verification is completed, and if not, controlling the automotive-grade chip to perform an interrupt action.
[0007] In some embodiments, if the first frequency and amplitude information and the second frequency and amplitude information both meet corresponding preset ranges, determining that the RFLB function verification is completed comprises: in the case that a first frequency in the first frequency and amplitude information meets a first frequency range, a first amplitude in the first frequency and amplitude information is greater than a first amplitude threshold, and a second amplitude in the second frequency and amplitude information is less than a second amplitude threshold, determining that the RFLB function verification is completed.
[0008] In some embodiments, the acquiring and comparing the frequency and amplitude information corresponding to the IFLB loop open and closed states to verify the IFLB function comprises: in the IFLB loop open state, collecting data of a corresponding analog-to-digital converter and performing fast Fourier transform to obtain third frequency and amplitude information; in the IFLB loop closed state, collecting data of the analog-to-digital converter again and performing fast Fourier transform to obtain fourth frequency and amplitude information; if the third frequency and amplitude information and the fourth frequency and amplitude information both meet corresponding preset ranges, determining that the IFLB function verification is completed, and if not, controlling the automotive-grade chip to perform an interrupt action.
[0009] In some embodiments, if the third frequency and amplitude information and the fourth frequency and amplitude information both meet corresponding preset ranges, determining that the IFLB function verification is completed comprises: in the case that a third frequency in the third frequency and amplitude information meets a second frequency range, a third amplitude in the third frequency and amplitude information is greater than a third amplitude threshold, and a fourth amplitude in the fourth frequency and amplitude information is less than a fourth amplitude threshold, determining that the IFLB function verification is completed.
[0010] In some embodiments, the acquiring radio frequency signal information corresponding to the RFLB loop and determining the working state of the RFLB loop according to the radio frequency signal information, and acquiring intermediate frequency signal information corresponding to the IFLB loop and determining the working state of the IFLB loop according to the intermediate frequency signal information, comprises: collecting data of an analog-to-digital converter corresponding to the RFLB loop and performing fast Fourier transform to obtain radio frequency information of a radio frequency signal; comparing the radio frequency information with a preset first standard value, and if the difference is within a first target range, determining that the RFLB loop is in a normal running working state; collecting data of an analog-to-digital converter corresponding to the IFLB loop and performing fast Fourier transform to obtain intermediate frequency information of an intermediate frequency signal; comparing the intermediate frequency information with a preset second standard value, and if the difference is within a second target range, determining that the IFLB loop is in a normal running working state.
[0011] In some embodiments, the data frame transmission based on the RFLB loop and the IFLB loop comprises: acquiring a target transmission requirement input by a user; transmitting a plurality of data frames according to the target transmission requirement; or, determining the working state of the RFLB loop and the IFLB loop again according to the target transmission requirement, and transmitting a next data frame.
[0012] To achieve the above object, a second aspect of the embodiment of the present application provides a self-checking device of a car-grade chip transceiver circuit. The device is applied to a car-grade chip, the car-grade chip comprising an RFLB loop and an IFLB loop. The device comprises: a power-on detection module, configured to acquire and compare frequency and amplitude information corresponding to the RFLB loop in an open state and a closed state after the car-grade chip is powered on, to verify RFLB function; acquire and compare frequency and amplitude information corresponding to the IFLB loop in an open state and a closed state, to verify IFLB function; an activation detection module, configured to activate the RFLB loop and the IFLB loop after the RFLB function and the IFLB function are verified, acquire radio frequency signal information corresponding to the RFLB loop, and determine the working state of the RFLB loop according to the radio frequency signal information, acquire intermediate frequency signal information corresponding to the IFLB loop, and determine the working state of the IFLB loop according to the intermediate frequency signal information; and a data transmission module, configured to transmit data frames based on the RFLB loop and the IFLB loop when the RFLB loop and the IFLB loop are both in a normal running working state.
[0013] To achieve the above object, a third aspect of the embodiments of the present application provides an electronic device, comprising: at least one processor; at least one memory for storing at least one program; and when the at least one program is executed by the at least one processor, the self-checking method of the automotive-grade chip transceiver circuit is implemented as any one of the first aspect.
[0014] To achieve the above object, a fourth aspect of the embodiments of the present application provides a computer-readable storage medium storing computer-executable instructions for executing the self-checking method of the automotive-grade chip transceiver circuit as any one of the fourth aspect.
[0015] The embodiments of the present application provide a self-checking method of an automotive-grade chip transceiver circuit and related equipment, which can be applied to an automotive-grade chip including an RFLB loop and an IFLB loop. The method comprises: after the automotive-grade chip is powered on, acquiring and comparing the frequency and amplitude information corresponding to the on and off states of the RFLB loop to verify the RFLB function; acquiring and comparing the frequency and amplitude information corresponding to the on and off states of the IFLB loop to verify the IFLB function; after the RFLB function and the IFLB function are verified, activating the RFLB loop and the IFLB loop, acquiring the radio frequency signal information corresponding to the RFLB loop, and determining the working state of the RFLB loop according to the radio frequency signal information, acquiring the intermediate frequency signal information corresponding to the IFLB loop, and determining the working state of the IFLB loop according to the intermediate frequency signal information; and in the case that the RFLB loop and the IFLB loop are both in a normal running working state, performing data frame sending based on the RFLB loop and the IFLB loop. It can be understood that the present application verifies the functions of the RFLB and the IFLB before signal detection through the built-in RFLB and IFLB detection mechanism, ensures the effectiveness and accuracy of the self-checking process, ensures the high standard of signal quality, thereby improving the overall performance and reliability of the radar chip, reduces the dependence on external test equipment, reduces the test cost, and the method of the present application allows rapid self-checking after the chip is powered on, shortens the test time, improves the production efficiency, and thus can meet the demand of the automotive industry for high-performance and high-reliability radar chips, and provides a strong guarantee for the functional safety of automotive chips. In addition, based on the above steps, the method of the present application also allows independent start of the safety mechanism of the RFLB and the IFLB, and flexible selection of the data frame sending type, which can adjust the execution of the safety mechanism according to the actual demand, and improves the adaptability and flexibility of the system. BRIEF DESCRIPTION OF DRAWINGS
[0016] Figure 1 The flowchart of the self-checking method of the automotive-grade chip transceiver circuit provided by an embodiment of the present application;
[0017] Figure 2 A schematic diagram of an RFLB loop provided for an embodiment of the present application;
[0018] Figure 3 A schematic diagram of an IFLB loop provided for an embodiment of the present application;
[0019] Figure 4 A flowchart of verifying RFLB function in a self-checking method of a car-grade chip transceiver circuit provided for an embodiment of the present application;
[0020] Figure 5 Another flowchart of verifying IFLB function in a self-checking method of a car-grade chip transceiver circuit provided for an embodiment of the present application;
[0021] Figure 6 A flowchart of verifying IFLB function in a self-checking method of a car-grade chip transceiver circuit provided for an embodiment of the present application;
[0022] Figure 7 Another flowchart of verifying IFLB function in a self-checking method of a car-grade chip transceiver circuit provided for an embodiment of the present application;
[0023] Figure 8 A flowchart of determining working state in a self-checking method of a car-grade chip transceiver circuit provided for an embodiment of the present application;
[0024] Figure 9 A specific flowchart of a self-checking method of a car-grade chip transceiver circuit provided for an embodiment of the present application;
[0025] Figure 10 A structural schematic diagram of an electronic device provided for an embodiment of the present application. DETAILED DESCRIPTION
[0026] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application.
[0027] In some embodiments, although the functional modules are divided in the system schematic diagram, and the logical order is shown in the flowchart, in some cases, the steps shown or described can be performed in a manner different from the module division in the system, or the order in the flowchart. The terms first, second, etc. in the specification and claims and the above-described drawings are used to distinguish similar objects, and do not necessarily describe a specific order or sequence.
[0028] In addition, unless specifically stated and limited otherwise, the term "connect / connected" should be construed broadly, for example, can be fixed connection or movable connection, can be detachable connection or non-detachable connection, or integral connection; can be mechanical connection, or electrical connection or can communicate with each other; can be directly connected, or indirectly connected through an intermediate medium.
[0029] In the description of the embodiments of the present application, the description of the terms "one embodiment / implementation", "another embodiment / implementation" or "some embodiments / implementation", "in the above embodiment / implementation" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiments or examples are included in at least two embodiments or implementations of the present application. In the present application, the illustrative description of the above terms does not necessarily refer to the same embodiment or implementation. It should be noted that although the logical order is shown in the flow chart, in some cases, the steps shown or described can be performed in an order different from that in the flow chart.
[0030] With the rapid development of the automotive industry, the safety and reliability requirements of automotive-grade radar chips, as one of the core components of advanced driver assistance systems, are also increasing. Automotive-grade radar chips not only need to work stably in various extreme environments, but also need to meet strict functional safety standards, and need to integrate complex digital and analog circuits to be able to process high-speed data transmission and high-precision signal processing tasks. However, in the design and production process of automotive-grade radar chips, it is necessary to ensure that the performance of the transceiver circuit in the radio frequency and intermediate frequency signal processing meets the predetermined requirements through a test method. The traditional test method mainly relies on external test equipment, which needs to increase additional hardware costs, and the test process is cumbersome and time-consuming, which affects the production efficiency and production cost of automotive-grade chips.
[0031] Based on this, the embodiments of the present application provide a self-checking method for automotive-grade chip transceiver circuit and related equipment, which can ensure that the performance of the transceiver circuit in the radio frequency and intermediate frequency signal processing meets the predetermined requirements through the built-in RFLB and IFLB detection mechanism, reduces the dependence on external test equipment, and thus can improve the overall performance and reliability of the radar chip while improving the production efficiency of the automotive-grade chip and reducing its production cost.
[0032] The scheme of the present application will be further described below with reference to the accompanying drawings.
[0033] Reference Figure 1 , Figure 1A flowchart of a self-checking method of a vehicle-grade chip transceiver circuit provided by an embodiment of the present application; the first aspect of the embodiment of the present application provides a self-checking method of a vehicle-grade chip transceiver circuit, the method is applied to a vehicle-grade chip, the vehicle-grade chip includes an RFLB loop and an IFLB loop, and the method includes:
[0034] Step S110, after the vehicle-grade chip is powered on, the corresponding frequency and amplitude information in the on and off states of the RFLB loop are acquired and compared to verify the RFLB function;
[0035] Step S120, the corresponding frequency and amplitude information in the on and off states of the IFLB loop are acquired and compared to verify the IFLB function;
[0036] Step S130, after the RFLB function and the IFLB function are verified, the RFLB loop and the IFLB loop are activated, the corresponding radio frequency signal information of the RFLB loop is acquired, and the working state of the RFLB loop is determined according to the radio frequency signal information, the corresponding intermediate frequency signal information of the IFLB loop is acquired, and the working state of the IFLB loop is determined according to the intermediate frequency signal information;
[0037] Step S140, in the case that the RFLB loop and the IFLB loop are in normal running working states, data frames are sent based on the RFLB loop and the IFLB loop.
[0038] It can be understood that, by the built-in RFLB and IFLB detection mechanism, the present application verifies the functions of the RFLB and the IFLB before signal detection, ensures the effectiveness and accuracy of the self-checking process, ensures the high standard of signal quality, thereby improves the overall performance and reliability of the radar chip, reduces the dependence on external test equipment, reduces the test cost, and the method of the present application allows rapid self-checking after the chip is powered on, shortens the test time, improves the production efficiency, and thus can meet the demand of the automobile industry for high-performance and high-reliability radar chips, and provides a strong guarantee for the functional safety of automobile chips. In addition, based on the above steps, the method of the present application also allows independent start of the safety mechanism of the RFLB and the IFLB, and flexible selection of the data frame sending type, which can adjust the execution of the safety mechanism according to the actual demand, improves the adaptability and flexibility of the system.
[0039] In some embodiments, the RFLB loop is a radio frequency loop test loop for testing the integrity and performance of the radio frequency signal path. When the chip is powered on and starts working, it collects data through an analog-to-digital converter (ADC) and performs a fast Fourier transform (FFT) to analyze the frequency and amplitude of the signal. By comparing the frequency and amplitude information collected when the RFLB loop is on and off, it can be ensured that it is within a predetermined range, thereby verifying the normality of the RFLB function.
[0040] In some embodiments, the IFLB loop is an intermediate frequency loop test loop for testing the integrity and performance of the intermediate frequency signal path. It collects data through an analog-to-digital converter and performs a fast Fourier transform to analyze the frequency and amplitude of the signal. By comparing the frequency and amplitude information collected when the IFLB loop is on and off, it can be ensured that it is within a predetermined range, thereby verifying the normality of the IFLB function.
[0041] In some embodiments, after verifying the normality of the RFLB and IFLB functions, the two loops are activated, data is collected through an analog-to-digital converter, and a fast Fourier transform is performed to analyze the frequency and amplitude of the radio frequency signal and the intermediate frequency signal. The acquired frequency and amplitude information is compared with the preset standard value to determine the working state of the loop. In the case where the RFLB loop and the IFLB loop are in normal operation state, data frames are sent based on the RFLB loop and the IFLB loop. The normal operation state represents that the working state of the RFLB loop and the IFLB loop is normal, and then data frames can be sent based on the verified normal RFLB loop and IFLB loop. Through the above steps, the application can provide an efficient and reliable self-checking method for the transceiver circuit of the automotive-grade chip, ensuring the stability and reliability of the radar chip in various environments.
[0042] Reference Figure 2 and Figure 3 , Figure 2 The schematic diagram of the RFLB loop provided by an embodiment of the application, Figure 3 The schematic diagram of the IFLB loop provided by an embodiment of the application; wherein, Figure 2 and Figure 3 respectively show the basic architecture of the RFLB loop and the IFLB loop, which includes the process from signal reception, amplification, mixing to the final analog-to-digital conversion and analysis. The RFLB loop is mainly responsible for the processing of radio frequency signals, while the IFLB loop focuses on the processing of intermediate frequency signals. Through these loops, the performance of the radar chip can be effectively monitored and evaluated to ensure its stable operation in complex environments.
[0043] Figure 2Components of the RFLB loop and signal descriptions are as follows:
[0044] RX_IN: Received input signal;
[0045] LNA: Low Noise Amplifier, amplifies the weak received signal;
[0046] Mixer: Mixer, converts high frequency signal to intermediate frequency signal;
[0047] I FBlock: Intermediate Frequency module, contains filters and other intermediate frequency processing circuits;
[0048] ADC: Analog-to-digital converter, converts analog signal to digital signal;
[0049] FFT: Fast Fourier Transform, used to analyze the frequency components of the signal;
[0050] TX_OUT: Transmit output signal;
[0051] Combiner: Combiner, combines signals from different paths;
[0052] PA: Power amplifier, amplifies the transmitted signal;
[0053] VCO: Voltage Controlled Oscillator, generates a tunable high frequency signal;
[0054] X6: Frequency multiplier, increases the frequency of the signal generated by VCO by six times;
[0055] PLL: Phase Locked Loop, used to stabilize and adjust the frequency of VCO;
[0056] Phase_ctr l: Phase control signal, used to adjust the phase of VCO.
[0057] Figure 3 Components of the I FLB loop and signal descriptions are as follows:
[0058] DDS: Direct Digital Synthesizer, used to generate accurate sine wave signals;
[0059] DAC: Digital-to-Analog Converter, converts digital signals to analog signals;
[0060] TP_I F: Positive polarity intermediate frequency signal;
[0061] TN_I F: Negative polarity intermediate frequency signal;
[0062] I FBlock: Intermediate Frequency module, contains filters and other intermediate frequency processing circuits;
[0063] I FOP_I F1: Positive polarity output signal of the I F block;
[0064] IFON_IF1: Negative polarity output signal of the IF block;
[0065] ADC: Analog-to-Digital Converter, which converts analog signals into digital signals;
[0066] FFT: Fast Fourier Transform, used to analyze the frequency components of a signal.
[0067] In some embodiments, such as Figure 2 As shown, the principle of the RFLB loop is to implement the looping of radio frequency signals inside the chip, directly feeding the signal from the transmit path to the receive path. First, the receiver (RX_IN) captures the signal and performs preliminary amplification through a low-noise amplifier (LNA). Then, the amplified signal passes through a mixer and an intermediate frequency (IF) module to provide a suitable signal for the ADC to sample. After the ADC acquires the signal, it performs FFT analysis to evaluate whether the frequency and amplitude of the signal are within a predetermined reasonable range. If an anomaly is detected, the system will send an interrupt signal to the central processing unit (CPU) to trigger the corresponding processing flow. In addition, this safety mechanism also includes a phase adjustment circuit, which adjusts the phase of the signal to ensure that the phase characteristics of the signal in the RFLB loop meet specific test requirements. To enhance the signal strength and ensure effective testing, a power amplifier (PA) is used to amplify the signal.
[0068] In some embodiments, such as Figure 3 As shown, the principle of the I FLB loop is to first generate a digital frequency signal using Direct Digital Synthesis (DDS) technology. This signal can be selected as a sine wave, square wave, triangle wave, etc., to meet different test requirements. The digital signal generated by DDS is converted into an analog signal by a digital-to-analog converter (DAC). This analog signal is then identified and processed by the intermediate frequency (IF) module. The processed signal is sent to the ADC for acquisition, and the acquired digital signal is then processed by the digital part for FFT. The subsequent judgment process is similar to that of RFLB testing. By calculating the frequency and amplitude of the signal and comparing them with a preset reasonable range, it is determined whether the signal meets the expected performance standard. Based on this judgment, the system will decide whether to send an interrupt request to the CPU, thereby triggering the corresponding exception handling process.
[0069] Understandably, based on the above Figure 2 and Figure 3In the middle loop, the application can implement the scheme process in steps S110 to S160. After the chip is powered on, the safety mechanism of RFLB and IFLB is started first to ensure the correctness of its function. If the frequency and amplitude calculated by FFT are not within the range during the process, the safety mechanism will actively generate an interrupt to the CPU to terminate the operation. If normal, the next flow can be executed. This detection only needs to be performed once after power-on. Next, RFLB and IFLB will be activated, and the system will continue to evaluate the frequency and amplitude of the signal to determine whether to trigger an interrupt. If the safety mechanism is running normally, it can start sending data frames. After the data frame is sent, the system will decide whether to stop or continue to send the next frame according to the user's selection. In addition, the user can also freely select the sending type of the next frame, whether it is a data frame with RFLB and IFLB or a data frame without these safety mechanisms. This flexibility allows the system to balance the safety and efficiency of the data frame according to actual needs.
[0070] Reference Figure 4 , Figure 4 In the self-checking method of the car-grade chip transceiver circuit provided by an embodiment of the application, a flowchart for verifying the RFLB function is provided. In some embodiments, the corresponding frequency and amplitude information in the RFLB loop open and closed states is acquired and compared to verify the RFLB function, including:
[0071] Step S410: In the RFLB loop open state, the data of the analog-to-digital converter is collected and fast Fourier transform is performed to obtain first frequency and amplitude information.
[0072] Step S420: In the RFLB loop closed state, the data of the analog-to-digital converter is collected again and fast Fourier transform is performed to obtain second frequency and amplitude information.
[0073] Step S430: If the first frequency and amplitude information and the second frequency and amplitude information both meet the corresponding preset range, it is determined that the RFLB function verification is completed, and if not, the car-grade chip is controlled to perform an interrupt action.
[0074] In some embodiments, the application can activate the RFLB loop to form a closed loop between the transmitting end and the receiving end of the radio frequency signal, and the corresponding Figure 2 The analog-to-digital converter is used to convert an analog signal into a digital signal, and the fast Fourier transform is used to analyze the frequency and amplitude of the signal. The first frequency and amplitude information is the frequency and amplitude information obtained after the collected data in the RFLB loop open state is processed by FFT. Correspondingly, the RFLB loop is disconnected, so that the radio frequency signal no longer forms a closed loop between the transmitting end and the receiving end. The second frequency and amplitude information is the frequency and amplitude information obtained after the collected data in the RFLB loop closed state is processed by FFT.
[0075] In some embodiments, if the first frequency and amplitude information and the second frequency and amplitude information both meet the corresponding preset range, it is determined that the RFLB function verification is completed, and if not, the vehicle-grade chip is controlled to perform an interrupt action, wherein the preset range is a reasonable range of frequency and amplitude preset in advance, and the interrupt action is that when an abnormality is detected, an interrupt signal is sent to a central processing unit (CPU) inside the vehicle-grade chip to trigger a corresponding processing flow.
[0076] It can be understood that the above steps ensure that the first set and the second set of frequency and amplitude information are both within the preset range by comparing them. If the frequency in the first set of frequency and amplitude information meets the first frequency range, the amplitude is greater than the first amplitude threshold, and the amplitude in the second set of frequency and amplitude information is less than the second amplitude threshold, it is determined that the RFLB function verification is completed, and if not, the vehicle-grade chip is controlled to perform an interrupt action to send an interrupt signal to a central processing unit (CPU) to trigger a further diagnosis and processing flow.
[0077] Reference Figure 5 , Figure 5 In the self-checking method of the vehicle-grade chip transceiver circuit provided by an embodiment of the present application, another flowchart for verifying the IFLB function is provided. In some embodiments, if the first frequency and amplitude information and the second frequency and amplitude information both meet the corresponding preset range, it is determined that the RFLB function verification is completed, including:
[0078] In step S510, in the case that the first frequency in the first frequency and amplitude information meets the first frequency range, the first amplitude in the first frequency and amplitude information is greater than the first amplitude threshold, and the second amplitude in the second frequency and amplitude information is less than the second amplitude threshold, it is determined that the RFLB function verification is completed.
[0079] It can be understood that the first frequency range is a reasonable range of the first set of frequencies preset in advance; the first amplitude threshold is the lowest threshold of the first set of amplitudes preset in advance; and the second amplitude threshold is the highest threshold of the second set of amplitudes preset in advance. In the RFLB loop open state, the data of the analog-to-digital converter is collected and fast Fourier transform is performed to obtain the first set of frequency and amplitude information, and in the RFLB loop closed state, the data of the ADC is collected again and FFT is performed to obtain the second set of frequency and amplitude information. The first set and the second set of frequency and amplitude information are compared to ensure that they are both within the predetermined range to verify the RFLB function. If the frequency in the first set of frequency and amplitude information meets the first frequency range, the amplitude is greater than the first amplitude threshold, and the amplitude in the second set of frequency and amplitude information is less than the second amplitude threshold, it is determined that the RFLB function verification is completed, and if not, the vehicle-grade chip is controlled to perform an interrupt action.
[0080] In some embodiments, corresponding to steps S410-S430, the present application can test the correctness of the RFLB security mechanism function through the following specific steps: first, connect the corresponding transceiving channels, detect the working state of the RFLB by monitoring the signal loop from the sending end to the receiving end, and then configure all modules related to the sending end and the receiving end to work in the mode. Then, the system will periodically traverse the phase control word, perform multiple phase switching at a selected clock frequency, and after the circuit is stable for a certain period of time, start ADC sampling for a period of time, and perform FFT on the sampling results. By analyzing the FFT results, the frequency domain BIN with the largest amplitude (reducing error, not calculating the 5 BINs adjacent to the direct current) is extracted, and the frequency and amplitude information is obtained. If the measured frequency is within the first frequency range and the amplitude is greater than the first amplitude threshold, it is determined that the RFLB is working normally. Then, the error injection verification is performed. By turning off the first stage of the power amplifier (PA) of the sending end, the RFLB loop will be disconnected. After the circuit is re-stabilized, the phase control word is continued to be periodically traversed, and ADC sampling and FFT data processing are performed in the new stable state. Again, the frequency domain BIN with the largest amplitude is extracted, and its amplitude information is obtained. In this step, the frequency is not compared, but if the amplitude is less than the second amplitude threshold, it is also considered that the RFLB is working normally. If it is not working normally, the security mechanism system will generate an interrupt action to the CPU to prompt the chip to be in an abnormal state, thereby triggering further diagnosis and processing procedures.
[0081] Reference Figure 6 , Figure 6 In the self-checking method of the vehicle-grade chip transceiver circuit provided by an embodiment of the present application, a flowchart for verifying the IFLB function; in some embodiments, the corresponding frequency and amplitude information in the IFLB loop open and closed states are obtained and compared to verify the IFLB function, comprising:
[0082] Step S610, in the IFLB loop open state, collecting data of the corresponding analog-to-digital converter and performing fast Fourier transform to obtain third frequency and amplitude information;
[0083] Step S620, in the IFLB loop closed state, collecting data of the analog-to-digital converter again and performing fast Fourier transform to obtain fourth frequency and amplitude information;
[0084] Step S630, if the third frequency and amplitude information and the fourth frequency and amplitude information both meet the corresponding preset range, it is determined that the IFLB function verification is completed, and if not, the vehicle-grade chip is controlled to perform an interrupt action.
[0085] In some embodiments, the present application can activate the IFLB loop to form a closed loop for the intermediate frequency signal inside, corresponding Figure 3, the analog-to-digital converter is used to convert the analog signal into a digital signal, the fast Fourier transform is used to analyze the frequency and amplitude of the signal, and the third frequency and amplitude information is the frequency and amplitude information obtained after the data collected in the IFLB loop opening state is processed by the FFT; on the contrary, the IFLB loop is disconnected, so that the intermediate frequency signal is no longer in the internal closed loop, and the fourth frequency and amplitude information is the frequency and amplitude information obtained after the data collected in the IFLB loop closing state is processed by the FFT.
[0086] In some embodiments, if the third frequency and amplitude information and the fourth frequency and amplitude information both meet the corresponding preset range, it is determined that the IFLB function verification is completed, and if not, the vehicle-grade chip is controlled to perform an interrupt action; it can be understood that the present application can compare the third group and the fourth group of frequency and amplitude information to ensure that they are both within the preset range. If the frequency in the third group of frequency and amplitude information meets the second frequency range, the amplitude is greater than the third amplitude threshold, and the amplitude in the fourth group of frequency and amplitude information is less than the fourth amplitude threshold, it is determined that the IFLB function verification is completed. If not, the vehicle-grade chip is controlled to perform an interrupt action, an interrupt signal is sent to the central processing unit (CPU), and a further diagnosis and processing process is triggered.
[0087] Reference Figure 7 , Figure 7 In the self-checking method of the vehicle-grade chip transceiver circuit provided by an embodiment of the present application, another flowchart for verifying the IFLB function; in some embodiments, if the third frequency and amplitude information and the fourth frequency and amplitude information both meet the corresponding preset range, it is determined that the IFLB function verification is completed, including:
[0088] Step S710, in the case that the third frequency in the third frequency and amplitude information meets the second frequency range, the third amplitude in the third frequency and amplitude information is greater than the third amplitude threshold, and the fourth amplitude in the fourth frequency and amplitude information is less than the fourth amplitude threshold, it is determined that the IFLB function verification is completed.
[0089] It can be understood that the second frequency range is a reasonable range of a third set of frequencies preset; the third amplitude threshold is a lowest threshold of a third set of amplitudes preset; the fourth amplitude threshold is a highest threshold of a fourth set of amplitudes preset; in the IFLB loop open state, the data of the analog-to-digital converter is collected and the fast Fourier transform is performed to obtain the third set of frequency and amplitude information, in the IFLB loop closed state, the data of the ADC is collected again and the FFT is performed to obtain the fourth set of frequency and amplitude information, the third set and the fourth set of frequency and amplitude information are compared to ensure that they are within the predetermined range, to verify the IFLB function, if the frequency in the third set of frequency and amplitude information meets the second frequency range, the amplitude is greater than the third amplitude threshold, and the amplitude in the fourth set of frequency and amplitude information is less than the fourth amplitude threshold, it is determined that the IFLB function verification is completed, and if it does not meet, the vehicle-grade chip is controlled to perform an interrupt action.
[0090] In some embodiments, corresponding to steps S610 to S630, the present application can test the correctness of the IFLB safety mechanism function through the following specific steps. Enable IFLB and ensure that it is in working condition, and at the same time activate DAC to work, and the DDS of the digital circuit provides a digital frequency signal. At this stage, interrupt the I F signal, so that the I F module stops working, so that no signal is sent to the ADC. Therefore, the data output by the ADC should only contain noise after FFT processing. At this time, the amplitude of the frequency domain BIN with the largest amplitude (reduce error, do not calculate the 5 BINs adjacent to the direct current) should be less than the fourth amplitude threshold. Then, the IF module is turned on, at this time the ADC can collect a single tone signal, the FFT processing is performed on the signal, the frequency domain BIN with the largest amplitude is extracted, and the frequency and amplitude information thereof are obtained, if the measured frequency is within the second frequency range and the amplitude is greater than the third amplitude threshold, it is considered that the system is working normally. The normality in the above two modes indicates that the IFLB safety mechanism is working normally. If it does not work normally, the safety mechanism system will generate an interrupt behavior to the CPU to prompt that the chip is in an abnormal state.
[0091] Reference Figure 8 , Figure 8 In the self-checking method of the vehicle-grade chip transceiver circuit provided by an embodiment of the present application, a flowchart for determining the working state; in some embodiments, the radio frequency signal information corresponding to the RFLB loop is obtained, and the working state of the RFLB loop is determined according to the radio frequency signal information; the intermediate frequency signal information corresponding to the IFLB loop is obtained, and the working state of the IFLB loop is determined according to the intermediate frequency signal information, comprising:
[0092] Step S810, collecting the data of the analog-to-digital converter corresponding to the RFLB loop and performing fast Fourier transform to obtain the radio frequency frequency information of the radio frequency signal;
[0093] Step S820, compare the radio frequency information with the preset first standard value, if the difference is within the first target range, determine that the RFLB loop is in normal operation state;
[0094] Step S830, collect the data of the analog-to-digital converter corresponding to the IFLB loop and perform fast Fourier transform to obtain the intermediate frequency frequency information of the intermediate frequency signal;
[0095] Step S840, compare the intermediate frequency frequency information with the preset second standard value, if the difference is within the second target range, determine that the IFLB loop is in normal operation state.
[0096] It can be understood that the application activates the RFLB loop, collects the data of the ADC and performs FFT to obtain the frequency information of the radio frequency signal, compares the radio frequency information with the preset first standard value, if the difference is within the first target range, determines that the RFLB loop is in normal operation state; activates the IFLB loop, collects the data of the ADC and performs FFT to obtain the frequency information of the intermediate frequency signal, compares the intermediate frequency frequency information with the preset second standard value, if the difference is within the second target range, determines that the IFLB loop is in normal operation state.
[0097] In some embodiments, specifically, corresponding to steps S810 to S820, the RFLB safety mechanism is activated. First, the receive channel and the transmit channel are powered down to ensure the safety and stability of the system. Then, the transceiver channel is powered on again to start the RFLB safety mechanism. After activation, the system will operate the phase control word and perform multiple phase switches according to the selected clock frequency. After completing the phase switching, the system will wait for a period of time to ensure the stability of the radio frequency signal. After stabilization, the ADC starts to collect signal data within a period of time and performs FFT processing on the collected data. Finally, by accurately judging the frequency components in the FFT analysis result and comparing them with the theoretical value obtained by dividing the predetermined clock frequency by the number of phase switches, the working state of the RFLB is determined. If the frequencies match, it is considered that the RFLB is working normally; if they do not match, it is considered to be abnormal. When an abnormality occurs, the safety mechanism system will send an interrupt to the CPU.
[0098] In some embodiments, specifically, corresponding to steps S830 to S840, the IFLB safety mechanism is activated. The DAC and IFLB are enabled in sequence, and in view of the fact that the intermediate frequency signal needs a certain stabilization time, the system will start the data sampling work of the ADC after the IFLB is enabled and is fully stabilized. During the sampling process, the system will perform FFT analysis on the data collected by the ADC. By comparing the signal frequency obtained by the FFT analysis with the set frequency of the input DAC, the working state of the IFLB can be evaluated. If the two frequencies are consistent, it is determined that the IFLB is working normally; if they are not consistent, it is considered that the IFLB is working abnormally. When the behavior is abnormal, an interrupt will be sent to the CPU.
[0099] In some embodiments, data frame transmission is performed based on the RFLB loop and the IFLB loop, including: obtaining a target transmission requirement input by a user; performing transmission of a plurality of data frames according to the target transmission requirement; or, according to the target transmission requirement, determining the working state of the RFLB loop and the IFLB loop again, and performing transmission of a next data frame.
[0100] It can be understood that, according to the target transmission requirement input by the user, the format and quantity of the data frame can be configured, and before each data frame is transmitted, steps S810 to S840 are re-executed to determine the working state of the RFLB loop and the IFLB loop again. If both loops are in a normal running working state, the next data frame is continued to be transmitted, and if any loop is not in a normal running working state, an interrupt action is performed on the automotive-grade chip to send an interrupt signal to a central processing unit (CPU) to trigger a further diagnosis and processing process.
[0101] In some embodiments, after the detection of all safety mechanisms is completed, the data frame can be started to be transmitted. After this step is executed, this step can be selected to be executed in a loop to start transmission of a plurality of data frames. To further ensure the safety of the system, steps three and four can also be selected to be re-executed before each data frame is started. This will ensure that the safety mechanisms of the RFLB and the IFLB are verified again, so as to confirm the stability and reliability of the system before each data frame is transmitted.
[0102] Reference Figure 9 , Figure 9The specific flowchart of the self-checking method of the vehicle-grade chip transceiver circuit provided by an embodiment of the present application; in some embodiments, the present application scheme includes verifying the functions of the RFLB and the IFLB before enabling the RFLB and the IFLB to perform signal detection; for the RFLB, first collect analog-to-digital converter (ADC) data in the loop connection state and perform fast Fourier transform, then disconnect the RFLB loop, collect ADC data again and perform FFT. By comparing the results of the two FFTs, including frequency and amplitude, it is ensured that they are within a predetermined reasonable range, thereby verifying whether the function of the RFLB is normal; for the IFLB, similar steps are taken, first turn on the IFLB, then turn off the IFLB, and calculate and compare the frequency and amplitude information respectively. After detecting the RFLB and the IFLB, if the safety mechanism function itself has no influence, the RFLB and the IFLB safety mechanism can be normally activated; start the RFLB and the IFLB respectively, collect ADC data for FFT, calculate the respective frequency and amplitude, and judge the reasonable range, thereby ensuring the stability of the radio frequency and intermediate frequency signals; after completing the check of the safety mechanism, the chip can start to perform data frame transmission. In order to improve the convenience of enabling and self-checking, the present application allows independent start of the safety mechanism of the RFLB and the IFLB, independent start of data frame transmission with or without the RFLB and the IFLB, thereby helping to simplify the chip test process and supporting regular self-checking after the product is put on the market, while providing options for flexible selection of safety mechanism execution.
[0103] It can be understood that through the above embodiments, the present application method allows rapid self-checking after the chip is powered on, improves production efficiency, supports regular self-checking after the product is put on the market, ensures long-term stable operation of the chip, and can independently start the safety mechanism of the RFLB and the IFLB, and flexibly select the type of data frame transmission, providing higher operation flexibility, allowing adjustment of the execution of the safety mechanism according to actual needs. In addition, when an exception occurs, the system can send an interrupt signal to the CPU in time, quickly respond and handle potential faults, and improve the response speed and fault handling capability of the system
[0104] To achieve the above objectives, a second aspect of this application provides a self-testing device for an automotive-grade chip transceiver circuit. The device is applied to an automotive-grade chip, which includes an RFLB loop and an I FLB loop. The device includes: a power-on detection module, used to acquire and compare the frequency and amplitude information corresponding to the RFLB loop's on and off states after the automotive-grade chip is powered on, to verify the RFLB function; acquire and compare the frequency and amplitude information corresponding to the I FLB loop's on and off states, to verify the I FLB function; an activation detection module, used to activate the RFLB loop and I FLB loop after the RFLB and I FLB function verifications are completed, acquire the radio frequency signal information corresponding to the RFLB loop, and determine the operating state of the RFLB loop based on the radio frequency signal information; acquire the intermediate frequency signal information corresponding to the I FLB loop, and determine the operating state of the I FLB loop based on the intermediate frequency signal information; and a data transmission module, used to transmit data frames based on the RFLB loop and I FLB loop when both the RFLB loop and I FLB loop are in normal operating condition.
[0105] Some embodiments of this application provide an electronic device. Figure 10 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, with reference to... Figure 10 The electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the self-test method for the automotive-grade chip transceiver circuit of any of the above embodiments. For example, it executes the method described above. Figure 1 Method steps S110 to S140, Figure 4 Method steps S410 to S430, Figure 5 Method step S510, Figure 6 Method steps S610 to S630, Figure 7 Method step S710, Figure 8 Method steps S810 to S840.
[0106] The electronic device 1000 of this application embodiment includes one or more processors 1010 and memory 1020. Figure 10 The example uses a processor 1010 and a memory 1020.
[0107] The processor 1010 and the memory 1020 can be connected via a bus or other means. Figure 10 Taking the example of a connection between China and Israel via a bus.
[0108] Memory 1020, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory 1020 may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory 1020 may optionally include memory 1020 remotely located relative to processor 1010. These remote memories can be connected to electronic device 1000 via a network, and examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.
[0109] In some embodiments, when the processor executes a computer program, it performs the self-test method of the automotive-grade chip transceiver circuit of any of the above embodiments at preset intervals.
[0110] Those skilled in the art will understand that Figure 10 The device structure shown does not constitute a limitation on the electronic device 1000, and may include more or fewer components than shown, or combine certain components, or have different component arrangements.
[0111] exist Figure 10 In the electronic device 1000 shown, the processor 1010 can be used to call the self-test method of the automotive-grade chip transceiver circuit stored in the memory 1020, thereby realizing the self-test method of the automotive-grade chip transceiver circuit.
[0112] Based on the hardware structure of the above-mentioned electronic device 1000, various embodiments of the self-testing device for automotive-grade chip transceiver circuits of this application are proposed. Meanwhile, the non-transient software program and instructions required to implement the self-testing method of the automotive-grade chip transceiver circuit of the above embodiments are stored in the memory. When executed by the processor, the self-testing method of the automotive-grade chip transceiver circuit of the above embodiments is executed.
[0113] This application also provides a computer-readable storage medium storing computer-executable instructions for executing the self-test method for the automotive-grade chip transceiver circuit described above. These instructions enable one or more processors to execute the self-test method for the automotive-grade chip transceiver circuit described in any of the above embodiments, for example, executing the methods described above. Figure 1 Method steps S110 to S140, Figure 4 Method steps S410 to S430, Figure 5 Method step S510, Figure 6 Method steps S610 to S630, Figure 7 Method step S710, Figure 8 Method steps S810 to S840.
[0114] This application also provides a computer program product, which includes a computer program stored in a computer-readable storage medium. A processor of a computer device reads the computer program from the computer-readable storage medium and executes the computer program, causing the computer device to perform a self-test method for an automotive-grade chip transceiver circuit implementing any of the above embodiments, for example, performing the above-described... Figure 1 Method steps S110 to S140, Figure 4 Method steps S410 to S430, Figure 5 Method step S510, Figure 6 Method steps S610 to S630, Figure 7 Method step S710, Figure 8 Method steps S810 to S840.
[0115] Those skilled in the art will understand that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer-readable storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer-readable storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer-readable storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically include computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium. The above is a detailed description of the preferred embodiments of this application, but this application is not limited to the above embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application, and these equivalent modifications or substitutions are all included within the scope defined by the claims of this application.
Claims
1. A method for self-checking of a car-grade chip transceiver circuit, characterized in that, The method is applied to a chip of automotive level, the chip of automotive level comprising an RFLB loop and an IFLB loop, and the method comprises: After the chip of automotive level is powered on, frequency and amplitude information corresponding to an open state and a closed state of the RFLB loop are acquired and compared to verify an RFLB function; frequency and amplitude information corresponding to an open state and a closed state of the IFLB loop are acquired and compared to verify an IFLB function; After the RFLB function and the IFLB function are verified, the RFLB loop and the IFLB loop are activated, radio frequency signal information corresponding to the RFLB loop is acquired, and a working state of the RFLB loop is determined according to the radio frequency signal information; intermediate frequency signal information corresponding to the IFLB loop is acquired, and a working state of the IFLB loop is determined according to the intermediate frequency signal information; In a case where the RFLB loop and the IFLB loop are both in a normal running working state, data frame sending is performed based on the RFLB loop and the IFLB loop; Wherein: The RFLB loop is a radio frequency loop test loop, which is used to test the integrity and performance of a radio frequency signal path, acquire data through an analog-to-digital converter, and perform fast Fourier transform to analyze the frequency and amplitude of the signal; The IFLB loop is an intermediate frequency loop test loop, which is used to test the integrity and performance of an intermediate frequency signal path, acquire data through an analog-to-digital converter, and perform fast Fourier transform to analyze the frequency and amplitude of the signal.
2. The method of self-test of an automotive-grade chip transceiver circuit according to claim 1, characterized in that, The acquiring and comparing of the frequency and amplitude information corresponding to the open state and the closed state of the RFLB loop to verify the RFLB function comprises: In the open state of the RFLB loop, data of a corresponding analog-to-digital converter is acquired and fast Fourier transform is performed to obtain first frequency and amplitude information; In the closed state of the RFLB loop, data of the analog-to-digital converter is again acquired and fast Fourier transform is performed to obtain second frequency and amplitude information; If the first frequency and amplitude information and the second frequency and amplitude information both conform to corresponding preset ranges, it is determined that the RFLB function verification is completed, and if not, the chip of automotive level is controlled to perform an interrupt action.
3. The method of self-test of an automotive-grade chip transceiver circuit according to claim 2, characterized in that, The determination of the RFLB function verification being completed if the first frequency and amplitude information and the second frequency and amplitude information both conform to corresponding preset ranges comprises: In a case where a first frequency in the first frequency and amplitude information conforms to a first frequency range, a first amplitude in the first frequency and amplitude information is greater than a first amplitude threshold, and a second amplitude in the second frequency and amplitude information is less than a second amplitude threshold, it is determined that the RFLB function verification is completed.
4. The method of self-test of an automotive-grade chip transceiver circuit of claim 1, wherein, The acquiring and comparing of the frequency and amplitude information corresponding to the open state and the closed state of the IFLB loop to verify the IFLB function comprises: In the open state of the IFLB loop, data of a corresponding analog-to-digital converter is acquired and fast Fourier transform is performed to obtain third frequency and amplitude information; With the IFLB loop closed, the data from the analog-to-digital converter is collected again and a fast Fourier transform is performed to obtain the fourth frequency and amplitude information; If the third frequency and amplitude information and the fourth frequency and amplitude information both conform to the corresponding preset range, then the IFLB function verification is completed; otherwise, the automotive-grade chip is controlled to perform an interrupt action.
5. The method of self-test of an automotive-grade chip transceiver circuit according to claim 4, characterized in that, If both the third frequency and amplitude information and the fourth frequency and amplitude information conform to the corresponding preset range, then the IFLB function verification is determined to be complete, including: If the third frequency in the third frequency and amplitude information conforms to the second frequency range, the third amplitude in the third frequency and amplitude information is greater than the third amplitude threshold, and the fourth amplitude in the fourth frequency and amplitude information is less than the fourth amplitude threshold, then the IFLB function verification is determined to be complete.
6. The method of self-test of an automotive-grade chip transceiver circuit of claim 1, wherein, The steps of acquiring the radio frequency signal information corresponding to the RFLB loop and determining the operating state of the RFLB loop based on the radio frequency signal information, and acquiring the intermediate frequency signal information corresponding to the IFLB loop and determining the operating state of the IFLB loop based on the intermediate frequency signal information, include: Data from the analog-to-digital converter corresponding to the RFLB loop is collected and a fast Fourier transform is performed to obtain the radio frequency information of the radio frequency signal. The radio frequency information is compared with a preset first standard value. If the difference is within the first target range, it is determined that the RFLB loop is in normal operating condition. Data from the analog-to-digital converter corresponding to the IFLB loop is collected and a fast Fourier transform is performed to obtain the intermediate frequency information of the intermediate frequency signal. The intermediate frequency information is compared with a preset second standard value. If the difference is within the second target range, it is determined that the IFLB loop is in normal operating condition.
7. The method of self-test of an automotive-grade chip transceiver circuit of claim 1, wherein, The data frame transmission based on the RFLB loop and the IFLB loop includes: Obtain the target sending requirements from user input; According to the target transmission requirements, multiple data frames are transmitted; Alternatively, based on the target transmission requirements, the operating status of the RFLB loop and the IFLB loop can be determined again before transmitting the next data frame.
8. An apparatus for self-checking of a car-grade chip transceiver circuit, characterized by The device is used in automotive-grade chips, which include RFLB loops and IFLB loops. The device includes: The power-on detection module is used to acquire and compare the frequency and amplitude information corresponding to the RFLB loop in the open and closed states after the automotive-grade chip is powered on, so as to verify the RFLB function; and to acquire and compare the frequency and amplitude information corresponding to the IFLB loop in the open and closed states, so as to verify the IFLB function. The activation detection module is used to activate the RFLB loop and the IFLB loop after the RFLB function and the IFLB function are verified, obtain the radio frequency signal information corresponding to the RFLB loop, and determine the working state of the RFLB loop based on the radio frequency signal information; obtain the intermediate frequency signal information corresponding to the IFLB loop, and determine the working state of the IFLB loop based on the intermediate frequency signal information. The data sending module is configured to send data frames based on the RF LB loop and the IF LB loop when the RF LB loop and the IF LB loop are both in a normal operation state. Wherein: The RF LB loop is a radio frequency loop test loop, configured to test the integrity and performance of a radio frequency signal path, collect data through an analog-to-digital converter, and perform a fast Fourier transform to analyze the frequency and amplitude of a signal. The IF LB loop is an intermediate frequency loop test loop, configured to test the integrity and performance of an intermediate frequency signal path, collect data through an analog-to-digital converter, and perform a fast Fourier transform to analyze the frequency and amplitude of a signal.
9. An electronic device, comprising: Comprise: At least one processor; At least one memory for storing at least one program; When at least one of the programs is executed by at least one of the processors, the self-checking method of the automotive-grade chip transceiver circuit as claimed in any one of claims 1 to 7 is implemented.
10. A computer readable storage medium storing computer executable instructions for performing the self-checking method of the automotive-grade chip transceiver circuit as claimed in any one of claims 1 to 7.
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