Wide bandgap semiconductor cellular structure and semiconductor device

Abstract

The invention relates to the field of semiconductors, and discloses a wide bandgap semiconductor cellular structure and a semiconductor device.The wide bandgap semiconductor cellular structure comprises a substrate, an epitaxial layer and a hole injection layer; the epitaxial layer comprises a heterojunction structure, a hole collection layer and a hole barrier layer which are stacked in the first direction; the hole injection layer is stacked on the epitaxial layer; the source electrode is arranged on the side, back to the substrate, of the heterojunction structure, and the substrate is arranged in a floating mode; the drain electrode is arranged on the side, back to the substrate, of the heterojunction structure. In order to solve the problems of low breakdown voltage and poor stability of a cellular structure in the prior art, a leakage current path between a drain electrode and a source electrode is prolonged in the cellular structure through floating arrangement of a substrate, so that the breakdown voltage of a semiconductor device is reduced; and through the combined action of the hole injection layer, the hole collection layer and the hole blocking layer, holes are accumulated in the hole collection layer, accumulated negative charges are shielded, the substrate effect is inhibited, and the stability of the cellular structure is improved.

Description

Technical Field

[0001] The present application belongs to the field of semiconductors, and in particular to a wide bandgap semiconductor cell structure and a semiconductor device. Background Art

[0002] Wide bandgap semiconductor devices are electronic devices made based on wide bandgap semiconductor materials. Wide bandgap semiconductor materials mainly include silicon carbide (SiC), gallium nitride (GaN), diamond (C), etc., and are also called third-generation semiconductor materials.

[0003] Taking gallium nitride (GaN) as an example, epitaxial growth of GaN on Si substrate is a low-cost method for growing GaN single crystals. However, the breakdown voltage of the GaN cell structure manufactured on the GaN-on-Si epitaxial platform is limited by the vertical breakdown of the Si substrate, and its application voltage range is therefore limited. Therefore, the breakdown voltage and stability of the cell structure are technical issues that need to be solved. Summary of the invention

[0004] The embodiments of the present application provide a wide bandgap semiconductor cell structure and a semiconductor device, which can increase the length of the source-drain leakage current path, thereby increasing the breakdown voltage of the cell structure, and improve the stability of the cell structure through a hole transport system formed by a hole injection layer, a hole collection layer, and a hole blocking layer.

[0005] On the one hand, the embodiment of the present application provides a wide bandgap semiconductor cell structure, comprising: a substrate; an epitaxial layer, stacked on the substrate along a first direction, the epitaxial layer comprising a heterojunction structure, a hole collection layer and a hole blocking layer stacked along the first direction, the hole collection layer being arranged on a side of the hole blocking layer facing away from the substrate, and the heterojunction structure being arranged on a side of the hole collection layer facing away from the hole blocking layer; a hole injection layer, stacked on a side of the epitaxial layer facing away from the substrate along the first direction; a source electrode, stacked on the heterojunction structure along the first direction; The heterojunction structure is on the side facing away from the substrate and is arranged on the side of the hole injection layer along the second direction. The source electrode is floating with the substrate, and the source electrode is used to connect to the first electrode of the power supply. There is an angle between the first direction and the second direction. The drain electrode is arranged on the side of the heterojunction structure facing away from the substrate along the first direction, and is arranged on the side of the hole injection layer relative to the source electrode along the second direction, and the drain electrode is used to connect to the second electrode of the power supply. The gate electrode is arranged on the side of the hole injection layer facing away from the heterojunction structure along the first direction.

[0006] According to the wide bandgap semiconductor cell structure provided in the embodiment of the present application, the heterojunction structure includes a barrier layer and a channel layer stacked along the first direction, and the barrier layer is arranged on one side of the channel layer facing away from the hole blocking layer; the valence band top of the hole blocking layer is lower than the valence band top of the hole collecting layer, and the valence band top of the hole collecting layer is higher than the valence band top of the channel layer.

[0007] According to the wide bandgap semiconductor cell structure provided in the embodiment of the present application, the hole injection layer includes a first P-type semiconductor layer and a second P-type semiconductor layer arranged along the second direction, the thickness of the first P-type semiconductor layer is greater than the thickness of the second P-type semiconductor layer, and the gate is arranged on the side of the first P-type semiconductor layer facing away from the heterojunction structure.

[0008] According to the wide bandgap semiconductor cell structure provided by the embodiment of the present application, the thickness of the second P-type semiconductor layer ranges from 10 nanometers to 25 nanometers.

[0009] According to the wide bandgap semiconductor cell structure provided by the embodiment of the present application, the source and the gate are electrically connected.

[0010] According to the wide bandgap semiconductor cell structure provided by the embodiment of the present application, the epitaxial layer further includes a buffer layer and a transition layer stacked along the first direction, and the buffer layer is arranged on a side of the transition layer facing away from the substrate.

[0011] On the other hand, an embodiment of the present application further provides a semiconductor device, comprising the above-mentioned wide bandgap semiconductor cell structure.

[0012] The semiconductor device provided according to an embodiment of the present application further includes an isolation layer, which is arranged between adjacent wide bandgap semiconductor cell structures.

[0013] The wide bandgap semiconductor cell structure and semiconductor device of the embodiments of the present application are configured such that the source is not connected to the substrate, that is, the substrate is floating, the source is connected to the first electrode of the power supply, and the drain is connected to the second electrode of the power supply, so that the leakage current path between the drain and the source is extended in the cell structure, thereby reducing the breakdown voltage of the semiconductor device; and through the action of the hole transport system formed by the hole injection layer, the hole collection layer, and the hole blocking layer, holes are accumulated in the hole collection layer, and the accumulated negative charges are shielded, thereby suppressing the substrate effect and improving the stability of the cell structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0015] Figure 1 A three-dimensional diagram of a wide bandgap semiconductor cell structure provided by some embodiments of the present application is shown;

[0016] Figure 2 A schematic cross-sectional view of a wide bandgap semiconductor cell structure provided by some embodiments of the present application is shown;

[0017] Figure 3 A schematic cross-sectional view of a wide bandgap semiconductor cell structure provided by other embodiments of the present application is shown;

[0018] Figure 4 A schematic cross-sectional view of a wide bandgap semiconductor cell structure of a diode provided in some embodiments of the present application is shown;

[0019] Figure 5 A schematic cross-sectional view of a wide bandgap semiconductor cell structure of a diode provided in some other embodiments of the present application is shown;

[0020] Figure 6 A cross-sectional view of a semiconductor device provided by some embodiments of the present application is shown.

[0021] Reference numerals:

[0022] 100: substrate; 200: epitaxial layer; 210: heterojunction structure; 220: hole blocking layer; 260: hole collecting layer; 300: hole injection layer; 310: source; 330: drain; 320: gate; 230: buffer layer; 240: transition layer; 211: barrier layer; 212: channel layer; 301: first P-type semiconductor layer; 302: second P-type semiconductor layer; 340: passivation layer; 250: isolation layer. DETAILED DESCRIPTION

[0023] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0024] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0025] The semiconductor device may include a heterojunction bipolar transistor (HBT), a heterojunction field effect transistor (HFET), a modulation doped FET (MODFET), and the like.

[0026] Taking gallium nitride (GaN) semiconductor devices as an example, according to the device structure type: it can be divided into two structures: lateral and vertical. Lateral GaN power devices are suitable for high-frequency and medium-power applications, while vertical GaN power devices can be used for high-power modules. According to the device working mode: it can be divided into two modes: normally open (depletion mode) and normally closed (enhancement mode). In the lateral structure, the GaN heterojunction field effect transistor (HFET) composed of AlGaN / GaN heterojunction includes a layer of high-mobility electrons: two-dimensional electron gas (2DEG), which forms a channel between the drain and source of the power device. Normally open (depletion mode): When the gate-source voltage is zero, a 2DEG channel already exists between the drain and source, and the device is turned on. When the gate-source voltage is less than zero, the drain-source 2DEG channel is disconnected and the device is turned off. Normally closed (enhancement mode): When the gate-source voltage is greater than zero, a 2DEG channel is formed between the drain and source, and the device is turned on. Normally open (depletion mode) devices may overshoot or lose power control during startup, so they are not suitable for applications such as power converters. Normally-off (enhancement-mode) devices are widely used in power electronics through simple gate drive control.

[0027] In order to ensure the working stability of the existing wide bandgap semiconductor cell structure, the source is electrically connected to the substrate. The source is arranged on the side of the epitaxial layer facing away from the substrate. When the source is electrically connected to the substrate, a vertical leakage current path is formed between the drain and the substrate, so that the breakdown voltage of the semiconductor device formed by the wide bandgap semiconductor cell structure is limited by the vertical leakage current path, making the semiconductor device unable to be used under high voltage conditions.

[0028] At present, a technology for improving the vertical withstand voltage capability of the device by increasing the thickness of the buffer layer in the epitaxial layer has been proposed (S. Kumar, K. Geens, A. Vohra, D. Wellekens, D. Cingu, E. Fabris, T. Cosnier, H. Hahn, B. Bakeroot, N. Posthuma, R. Langer, and S. Decoutere, "1.2kV Enhancement-Mode p-GaNGate HEMTs on 200mm Engineered Substrates," IEEE Electron Device Lett., vol. 45, no. 4, pp. 657-660, Apr. 2024, DOI: 10.1109 / LED.2024.3361164.). Due to the mismatch between the lattice constant and thermal expansion coefficient between GaN and Si substrates, growing a thick buffer layer on a silicon substrate will result in a greater wafer curvature, which is not conducive to device manufacturing. At the same time, growing a thicker buffer layer will also result in a longer production time.

[0029] A technology for partially or completely removing the silicon substrate to increase the withstand voltage of the device has been proposed (N. Herbecq, I. Roch-Jeune, A. Linge, M. Zegaoui, P. Jeannin, N. Rouger, and F. Medjdoub, "Above 2000V breakdown voltage at 600K GaN-on-silicon high electron mobility transistors," Physica status solidi. A, Applications and materials science, vol. 213, no. 4, pp. 873-877, Dec. 2016, DOI: 10.1002 / pssa.201532572.). This technology requires an additional process flow for removing the substrate, which increases the complexity of the process. In addition, removing the substrate will make the device's heat dissipation ability worse, resulting in an increase in the self-heating effect and a decrease in the device's operating current. Removing the substrate will also increase the number of traps in the epitaxial layer, causing the dynamic characteristics of the device to degrade.

[0030] In order to solve the problems in the prior art, the embodiments of the present application provide a wide bandgap semiconductor cell structure and a semiconductor device. The wide bandgap semiconductor cell structure provided by the embodiments of the present application is first introduced below.

[0031] Figure 1 A three-dimensional diagram of a wide bandgap semiconductor cell structure provided by some embodiments of the present application is shown; Figure 2 A cross-sectional schematic diagram of a wide bandgap semiconductor cell structure provided by some embodiments of the present application is shown.

[0032] like Figure 1 and Figure 2 As shown, an embodiment of the present application provides a wide bandgap semiconductor cell structure, including: a substrate 100, the substrate 100 is arranged in a floating manner; an epitaxial layer 200 is stacked on the substrate 100 along a first direction, the epitaxial layer 200 includes a heterojunction structure 210, a hole collection layer 260 and a hole blocking layer 220 stacked along the first direction, the hole collection layer 260 is arranged on the side of the hole blocking layer 220 facing away from the substrate 100, and the heterojunction structure 210 is arranged on the side of the hole collection layer 260 facing away from the hole blocking layer 220; a hole injection layer 300 is stacked on the epitaxial layer 200 along the first direction and facing away from the substrate 10 0; a source electrode 310 is arranged along the first direction on the side of the heterojunction structure 210 that is away from the substrate 100, and is arranged along the second direction on the side of the hole injection layer 300, the source electrode 310 is used to be connected to the first electrode of the power supply, and there is an angle between the first direction and the second direction; a drain electrode 330 is arranged along the first direction on the side of the heterojunction structure 210 that is away from the substrate 100, and is arranged along the second direction on the side of the hole injection layer 300 relative to the source electrode 310, the drain electrode 330 is used to be connected to the second electrode of the power supply; a gate electrode 320 is arranged along the first direction on the side of the hole injection layer 300 that is away from the heterojunction structure 210.

[0033] Specifically, the substrate 100 is the basis for manufacturing semiconductor devices. For wide bandgap semiconductors, commonly used substrate 100 materials include silicon (Si), silicon carbide (SiC) and sapphire (Al 2 O 3 ), etc., and has high thermal conductivity, high breakdown electric field strength and high saturated electron drift velocity. The substrate 100 not only provides a growth basis for the epitaxial layer 200, but also provides mechanical, thermal and electrical support for the entire device.

[0034] The epitaxial layer 200 is a new single crystal layer grown on the substrate 100 by epitaxial technology. The epitaxial layer 200 includes a heterojunction structure 210 and a hole blocking layer 220 stacked along a first direction. The heterojunction structure 210 is a junction formed by two semiconductor materials with different bandgap widths, achieving a higher breakdown voltage and a lower on-resistance. At the heterojunction interface, due to the different band structures of the two materials, the energy band will bend near the interface. The band bending will cause electrons to accumulate near the interface, forming a high electron concentration area. At the same time, the quantum confinement effect will further enhance the accumulation of electrons near the interface. When the depth of the "notch" potential well is large enough, the electrons therein can only move in all directions of the plane in the potential well (i.e., move close to the heterojunction interface), forming two-dimensional moving electrons, i.e., two-dimensional electron gas.

[0035] The hole injection layer 300 is stacked along the first direction on the side of the epitaxial layer 200 facing away from the substrate 100. The hole injection layer 300 may be made of a P-type doped semiconductor, such as gallium nitride, aluminum gallium nitride, aluminum nitride, indium nitride, etc. The hole injection layer 300 is used to inject holes into the heterojunction structure 210, thereby adjusting the conductive properties of the semiconductor device. By adjusting the material and thickness of the hole injection layer 300, the performance parameters of the device such as the switching speed and on-resistance can be optimized.

[0036] The source 310 and the drain 330 are prepared on the side of the epitaxial layer 200 facing away from the substrate 100 through ohmic contact. The source 310, as a source of carriers, is usually arranged on one side of the hole injection layer 300 to provide electrons to the device. The drain 330 is arranged on the other side to collect electrons (or holes in some cases) injected and transmitted from the source 310. In addition, when the substrate 100 is set in a floating manner, there is no electrical connection between the source 310 and the substrate 100, and a U-shaped leakage current path is formed between the source 310 and the drain 330 through the substrate 100, thereby improving the vertical breakdown voltage of the semiconductor device and having a higher withstand voltage capability. The source 310 and the drain 330 are arranged on both sides of the hole injection layer 300, which effectively lengthens the leakage current path between the source 310 and the drain 330. Compared with the conventional semiconductor cell structure in which the substrate 100 and the source 310 are short-circuited, the leakage current path length is doubled, which effectively reduces the vertical leakage current of the semiconductor device. In the conventional semiconductor cell structure, when the substrate 100 and the source 310 are short-circuited, the maximum breakdown voltage thereof is about 1300V; in the embodiment of the present application, when the substrate 100 is floatingly arranged, the maximum breakdown voltage of the semiconductor cell structure is about 2300V.

[0037] In the embodiment of the present application, the leakage current path includes a first current segment, a second current segment, and a third current segment that are arranged in sequence, the first current segment runs through the epitaxial layer 200 from the drain 330 to the substrate 100 along the first direction, the second current segment extends in the substrate 100 along the second direction to connect the first current segment and the third current segment, and the third current segment runs through the epitaxial layer 200 from the substrate 100 to the source 310 along the first direction. For example, the first direction may be the thickness direction of the cell structure, and the second direction may be the width direction of the cell structure.

[0038] The hole collection layer 260 may be formed of at least one or more of aluminum nitride, aluminum gallium nitride, indium nitride, indium gallium nitride and aluminum indium gallium nitride, and the valence band bottom of the hole collection layer 260 is higher than that of the channel layer. Holes injected from the hole injection layer 300 may enter the hole collection layer 260 .

[0039] In order to compensate for the problem of reduced stability of the semiconductor device caused by the floating setting of the substrate 100, a hole blocking layer 220 is set between the heterojunction structure 210 and the substrate 100 to isolate the charges in the substrate 100, the charges in the buffer layer 230 and the carriers in 212 to prevent mutual interference between them. The hole transport system composed of the hole injection layer 300, the hole blocking layer 220 and the hole collection layer 260 can compensate for the problem of reduced stability of the semiconductor device caused by the floating setting of the substrate 100. The hole blocking layer 220 can be at least one or more of aluminum nitride, aluminum gallium nitride, indium nitride, indium gallium nitride and aluminum indium gallium nitride, and can be prepared by MOCVD (metal organic chemical vapor deposition) in epitaxial growth. The hole blocking layer 220 has a higher energy band gap. The hole blocking layer 220 makes the semiconductor device more stable while increasing the breakdown voltage.

[0040] In an optional embodiment of the present application, the hole blocking layer 220 has a thickness ranging from 5 nanometers to 2 micrometers.

[0041] Specifically, when a forward bias is applied between the gate 320 and the source 310 or when certain conditions are met, the hole injection layer 300 will inject holes into the epitaxial layer 200 to the hole collection layer 260, and the further diffusion of the holes along the first direction will be blocked by the hole blocking layer 220, so that the holes will diffuse in the hole collection layer 260 along the second direction, thereby forming a hole conductive layer at the interface between the hole collection layer 260 and the hole blocking layer 220, and the hole conductive layer can shield the negative charge on the side of the hole blocking layer 220 facing away from the hole injection layer 300. In addition, the hole conductive layer can also shield the modulation effect of the substrate 100 voltage on the two-dimensional electron gas, thereby achieving the suppression effect on the substrate 100 effect. In a semiconductor device with a two-dimensional electron gas (2DEG), changes in the substrate 100 voltage will modulate the concentration and distribution of the 2DEG, thereby affecting the performance of the semiconductor device. However, after the hole conductive layer is formed, it can act as an effective electric field shielding layer to reduce the direct modulation effect of the voltage change of the substrate 100 on the 2DEG. This is because the hole conductive layer adjusts and weakens the penetration and influence of the electric field of the substrate 100 on the 2DEG region through its conductivity and charge distribution, thereby achieving the suppression of the substrate 100 effect and improving the stability of the semiconductor device.

[0042] In addition, in the embodiment of the present application, the epitaxial layer 200 further includes a buffer layer 230 and a transition layer 240 stacked along the first direction, and the buffer layer 230 is disposed on a side of the transition layer 240 facing away from the substrate 100 .

[0043] The transition layer 240 is used to balance the lattice and stress mismatch of the epitaxial layer 200, and can be made of aluminum nitride, gallium nitride, or a mixture of the two. During the growth of semiconductor materials, due to the difference in lattice constants between different materials, lattice mismatch and stress accumulation often occur, which in turn affects the performance of the device. The transition layer 240 can be made of a suitable material (such as aluminum nitride, gallium nitride, or a mixture of the two) to gradually transition its lattice constant, thereby effectively alleviating the lattice mismatch and stress problems and improving the quality of the epitaxial layer 200.

[0044] The buffer layer 230 is used to reduce the off-state leakage current of the device and increase the breakdown voltage of the device. The off-state leakage current is a small current that still exists in the device when it is turned off, which affects the power consumption and stability of the device. The breakdown voltage is the maximum voltage that the device can withstand, which determines the device's withstand voltage and operating range. The buffer layer 230 is a high-resistance layer, using aluminum nitride, gallium nitride or a mixture of the two, and using carbon or iron doping, which can significantly increase the resistivity of the device, thereby reducing the off-state leakage current and enhancing the breakdown voltage of the device.

[0045] Furthermore, in a specific embodiment of the present application, the heterojunction structure 210 includes a barrier layer 211 and a channel layer 212 stacked along a first direction, and the barrier layer 211 is arranged on one side of the channel layer 212 facing away from the hole blocking layer 220; the valence band top of the hole blocking layer 220 is lower than the valence band top of the hole collecting layer 260, and the valence band top of the hole collecting layer 260 is higher than the valence band top of the channel layer 212.

[0046] The barrier layer 211 may be at least one or more of aluminum nitride, aluminum gallium nitride, indium nitride, indium gallium nitride and aluminum indium gallium nitride, and may provide a two-dimensional electron gas through a polarization effect. The channel layer 212 provides a conductive channel for the two-dimensional electron gas, and the channel layer 212 may be gallium nitride, aluminum gallium nitride, indium nitride and aluminum indium gallium nitride, etc.

[0047] From the perspective of energy band, the valence band top of the hole blocking layer 220 is lower than the valence band top of the hole collecting layer 260. Due to the valence band difference between the hole collecting layer 260 and the hole blocking layer 220, the holes entering the hole collecting layer 260 will not enter the buffer layer 230, and thus accumulate in the hole collecting layer 260. Exemplarily, the material combination of the hole collecting layer 260 and the hole blocking layer 220 can be the following combination: the hole collecting layer 260 is gallium nitride and the hole blocking layer 220 is aluminum gallium nitride; or the hole collecting layer 260 is indium gallium nitride and the hole blocking layer 220 is gallium nitride; or the hole collecting layer 260 is indium gallium nitride and the hole blocking layer 220 is aluminum gallium nitride.

[0048] Specifically, in other embodiments of the present application, the valence band difference between the hole blocking layer 220 and the hole collecting layer 260 is equal to the valence band difference between the barrier layer 211 and the channel layer 212. The symmetrical valence band difference structure can form a more stable electric field distribution in the channel layer 212 and the hole collecting layer 260. On the one hand, the movement of carriers in the channel layer 212 and the hole collecting layer 260 is more uniformly hindered, reducing the carrier scattering caused by the uneven electric field, thereby improving the carrier mobility and further improving the conductivity of the semiconductor device. On the other hand, a stable electric field helps electrons to be transmitted in the channel layer 212 in a more orderly manner, reducing the energy loss in the electron transmission process and improving the electron transport efficiency.

[0049] The symmetrical valence band difference structure can reduce the internal stress caused by asymmetry. During the operation of semiconductor devices, internal stress may cause deformation, cracks and other problems of the material, thereby affecting the performance and life of the device. The equal valence band difference makes the force of the hole blocking layer 220 and the barrier layer 211 on the channel layer 212 and the hole collection layer 260 more balanced, reducing the generation of internal stress and enhancing the mechanical stability of the device.

[0050] This structure can also improve the device's resistance to external environmental changes. For example, when the temperature changes or is subjected to external mechanical stress, the symmetrical hole blocking layer 220 and barrier layer 211 can better maintain the stability of the carrier structure of the channel layer 212 and the hole collection layer 260, reduce performance fluctuations caused by environmental factors, and improve the reliability and stability of the device.

[0051] Figure 3 A schematic cross-sectional view of a wide bandgap semiconductor cell structure provided by some other embodiments of the present application is shown.

[0052] like Figure 3 As shown, in another embodiment of the present application, the hole injection layer 300 includes a first P-type semiconductor layer 301 and a second P-type semiconductor layer 302 arranged along a second direction, the thickness of the first P-type semiconductor layer 301 is greater than the thickness of the second P-type semiconductor layer 302, and a gate 320 is arranged on the side of the first P-type semiconductor layer 301 facing away from the heterojunction structure 210.

[0053] The thickness of the second P-type semiconductor layer 302 protruding from the epitaxial layer 200 cannot be greater than the first P-type semiconductor layer 301, so that when the semiconductor device is in the off state, the second P-type semiconductor layer 302 can be depleted to ensure the withstand voltage of the semiconductor device. In other words, the thinner second P-type semiconductor layer 302 is more easily depleted under reverse voltage, thereby helping to prevent current leakage and improve the withstand voltage performance of the device.

[0054] The second P-type semiconductor layer 302 cannot be too thin to ensure sufficient conductivity and provide movable holes. In other words, sufficient thickness can ensure that the second P-type semiconductor layer 302 can provide sufficient movable holes when the device is turned on, maintain normal current conduction, and shield the influence of surface trapped charges on the concentration of the two-dimensional electron gas. In some embodiments of the present application, the thickness of the second P-type semiconductor layer 302 ranges from 10 nanometers to 25 nanometers.

[0055] In an optional embodiment of the present application, the hole injection layer 300 only includes the first P-type semiconductor layer 301. In order to increase the injection area of ​​holes injected into the hole collection layer 260 when the wide bandgap semiconductor cell structure is turned on, the second P-type semiconductor layer 302 is continuously arranged along the second direction on the first P-type semiconductor layer 301, thereby improving the ability of the wide bandgap semiconductor cell structure to suppress the repulsive effect of the negative charge of the buffer layer 230 on the two-dimensional electron gas. At the same time, when the semiconductor device is turned on, the movable holes in the second P-type semiconductor layer 302 will shield the influence of the negative charge captured by the surface traps on the concentration of the two-dimensional electron gas, suppress the current collapse effect caused by the surface traps, and thus realize a more stable semiconductor device.

[0056] In addition, in the embodiment of the present application, there is a passivation layer 340 between the source 310 and the gate 320 and the hole injection layer 300, and there is a passivation layer 340 between the hole injection layer 300 and the drain 330. Of course, based on the different semiconductor devices where the wide bandgap semiconductor cell structure is located, a plate field and other structures can also be provided. The passivation layer 340 can be at least one of dielectric materials such as aluminum oxide (Al2O3), silicon dioxide (SiO2), silicon nitride (SiN), aluminum nitride (AlN), and hafnium oxide (HfO2).

[0057] Figure 4 A schematic cross-sectional view of a wide bandgap semiconductor cell structure of a diode provided in some embodiments of the present application is shown; Figure 5 A schematic cross-sectional view of a wide bandgap semiconductor cell structure of a diode provided in some other embodiments of the present application is shown.

[0058] like Figure 4 and Figure 5 As shown, in an optional embodiment of the present application, the source 310 and the gate 320 are electrically connected.

[0059] The gate 320 and the source 310 are connected by interconnecting metal or other means to form a wide bandgap semiconductor cell structure of a diode with a unidirectional conduction function. The interconnecting metal can be any conductive metal. Connecting the gate 320 and the source 310 to form a diode can reduce the use of external diodes, thereby simplifying the circuit layout. In some miniaturized and integrated electronic devices, the space is limited, and reducing the number of components can improve the integration and compactness of the circuit. It can reduce the connection points and parasitic parameters in the circuit, reduce the complexity and noise interference of the circuit, and improve the performance and reliability of the circuit.

[0060] Figure 6 A cross-sectional view of a semiconductor device provided by some embodiments of the present application is shown.

[0061] like Figure 6 As shown, an embodiment of the present application further provides a semiconductor device, comprising one or more wide bandgap semiconductor cell structures of the above embodiments.

[0062] Furthermore, in a specific embodiment of the present application, the semiconductor device also includes an isolation layer 250, which is disposed between adjacent wide bandgap semiconductor cell structures. Different cell structures may be in different working states. Without the isolation layer 250, problems such as leakage and crosstalk may occur, affecting the performance and stability of the device. The isolation layer 250 can provide a high-resistance insulating barrier to ensure that each cell works independently without interfering with each other. To enhance the voltage resistance of the device, the isolation layer 250 can withstand higher voltages and prevent voltage breakdown between adjacent cells, thereby improving the voltage resistance level of the entire semiconductor device, enabling it to operate reliably in a higher voltage working environment.

[0063] The isolation layer 250 can be one of etching isolation and injection isolation or a mixture thereof, and the injection isolation can be made of elements such as fluorine, nitrogen, and boron. The isolation layer 250 mainly blocks the current communication between devices and suppresses the crosstalk effect between the wide bandgap semiconductor cell structures through the substrate 100; combined with the blocking effect of the hole blocking layer 220, the depth of the isolation layer 250 of the present application extends from the surface of the epitaxial layer 200 facing away from the substrate 100 to a certain depth of the buffer layer 230 to ensure that the hole transmission on the upper surface of the hole blocking layer 220 is isolated.

[0064] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of this application.

Claims

1. A wide bandgap semiconductor cell structure, characterized in that: include: Substrate, floating setting; An epitaxial layer is stacked on the substrate along a first direction, the epitaxial layer comprises a heterojunction structure, a hole collection layer and a hole blocking layer stacked along the first direction, the hole collection layer is arranged on a side of the hole blocking layer facing away from the substrate, and the heterojunction structure is arranged on a side of the hole collection layer facing away from the hole blocking layer; a hole injection layer, stacked along the first direction on a side of the epitaxial layer facing away from the substrate; A source electrode, arranged on a side of the heterojunction structure facing away from the substrate along the first direction, and arranged on a side of the hole injection layer along the second direction, the source electrode being used to be connected to a first electrode of a power source, and an angle being formed between the first direction and the second direction; a drain electrode, arranged on a side of the heterojunction structure facing away from the substrate along the first direction, and arranged on a side of the hole injection layer opposite to the source electrode along the second direction, the drain electrode being used to be connected to a second electrode of the power source; A gate is arranged along the first direction on a side of the hole injection layer facing away from the heterojunction structure.

2. The wide bandgap semiconductor cell structure according to claim 1, characterized in that: The heterojunction structure comprises a barrier layer and a channel layer stacked along the first direction, wherein the barrier layer is arranged on one side of the channel layer facing away from the hole blocking layer; The valence band top of the hole blocking layer is lower than the valence band top of the hole collecting layer, and the valence band top of the hole collecting layer is higher than the valence band top of the channel layer.

3. The wide bandgap semiconductor cell structure according to claim 1, characterized in that: The hole injection layer includes a first P-type semiconductor layer and a second P-type semiconductor layer arranged along the second direction, the thickness of the first P-type semiconductor layer is greater than the thickness of the second P-type semiconductor layer, and the gate is arranged on the side of the first P-type semiconductor layer facing away from the heterojunction structure.

4. The wide bandgap semiconductor cell structure according to claim 3, characterized in that: The thickness of the second P-type semiconductor layer is in a range of 10 nanometers to 25 nanometers.

5. The wide bandgap semiconductor cell structure according to claim 1 or 3, characterized in that: The source and the gate are electrically connected.

6. The wide bandgap semiconductor cell structure according to claim 2, characterized in that: The epitaxial layer further includes a buffer layer and a transition layer stacked along the first direction, and the buffer layer is arranged on a side of the transition layer facing away from the substrate.

7. A semiconductor device, characterized in that: A wide bandgap semiconductor cell structure comprising any one of claims 1 to 6.

8. The semiconductor device according to claim 7, characterized in that It also includes an isolation layer, which is arranged between adjacent wide bandgap semiconductor cell structures.

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