Hall effect sensor and manufacturing method thereof
By stacking Hall effect materials vertically from integrated circuits and isolating them with passivation materials, the measurement error and material oxidation problems of traditional Hall sensors in harsh environments are solved, achieving higher anti-interference ability and reliability.
Patent Information
- Application Number
- CN202411944500.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-27
- Publication Date
- 2025-03-18
AI Technical Summary
Traditional Hall sensors have large measurement errors in harsh electromagnetic interference environments, and the material is prone to oxidation failure in high temperature and high humidity environments, resulting in unstability of the sensor.
By stacking Hall effect materials perpendicularly with integrated circuits, the lead length is minimized to improve resistance to electromagnetic interference, and the use of passivation materials to isolate the two from the air environment, improving the reliability of the sensor.
It effectively reduces the internal error of the sensor, improves the anti-electromagnetic interference capability, reduces the package area and cost, and improves the reliability of the sensor in high temperature and high humidity environments.
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Figure CN119654055A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of sensors, and in particular relates to a Hall effect sensor and a manufacturing method thereof. Background Art
[0002] Hall effect detectors and sensors have many important applications in industrial equipment and consumer electronics, and can meet basic sensing needs such as magnetic switches, proximity sensors, and speed measurements. They mainly use the magnetoelectric effect of the Hall effect, that is, when current passes through a conductor in a magnetic field, the magnetic field will produce a deflection force on the charges in the conductor, causing the charges to gather on one side of the conductor, generating a potential difference. This phenomenon is called the Hall effect. The potential difference generated is called the Hall voltage, which can be used to measure the strength of the magnetic field, detect the direction of the magnetic field, etc.
[0003] Traditional Hall effect sensors connect Hall effect detectors to data processing circuits in two main ways: through wiring harnesses or circuit board leads, and through leads inside the package. This existing structure and preparation method has the following defects in actual use: First, since Hall applications are usually based on the measurement of Hall voltage, harsh electromagnetic interference may add a time-varying voltage at both ends of the wiring harness or circuit board leads, causing errors in the Hall voltage measurement.
[0004] Second, the materials used in Hall sensors are often susceptible to oxidation and deterioration in high temperature and high humidity environments. Although hermetic packaging can alleviate this problem, the cost is too high. Summary of the invention
[0005] The purpose of the present invention is to provide a Hall effect sensor and a manufacturing method thereof, which can vertically stack the Hall effect material and the integrated circuit, minimize the internal lead length of the sensor to improve the sensor's anti-electromagnetic interference capability, reduce the package area and reduce costs, and use passivation materials to isolate the two from the air environment to improve the reliability of the sensor.
[0006] The technical solution adopted by the present invention is as follows: A Hall effect sensor and a method for manufacturing the same include an integrated circuit, the integrated circuit including an integrated circuit body and a wiring layer formed on a surface of the integrated circuit body; A bonding layer, a Hall effect material layer and a passivation layer are vertically stacked in sequence on the wiring layer; Wherein, the passivation layer covers the outer surface of the Hall effect material layer and is stacked together with the bonding layer.
[0007] As a preferred solution, a metal hole column is formed between the bonding layer and the Hall effect material layer, one side of the passivation layer is provided with a through hole connected to the metal hole column, and the through hole is filled with a metal plug connected to the metal hole column.
[0008] As a preferred solution, the passivation layer covers the metal hole column, and the metal plug extends to the outer surface of the passivation layer and is connected to an external electrode.
[0009] As a preferred solution, the bonding layer is formed by combining two layers of the same or different materials.
[0010] As a preferred embodiment, the Hall effect material layer is made of semiconductor material, and the semiconductor material includes any one of silicon, germanium, gallium arsenide, indium phosphide, gallium phosphide, indium arsenide, indium antimonide or gallium antimonide materials, or a mixture or stacked material thereof.
[0011] As a preferred solution, the semiconductor material is a material prepared using the material as a substrate by any one of metal organic vapor phase epitaxy, molecular beam epitaxy, sputtering deposition, electron beam evaporation deposition or thermal evaporation deposition processes.
[0012] As a preferred solution, the passivation layer is made of any one of styrene-cyclobutene polymer, polyimide or SU-8 formula polymer material.
[0013] A method for manufacturing a Hall effect sensor, used to manufacture the above-mentioned Hall effect sensor, comprises the following steps: S1. Pre-treating the surface of the substrate material of the Hall effect material layer by an ion implantation process or a metal organic vapor phase epitaxy process, and depositing a material layer using two layers of the same or different materials between the pre-treated surface and the wiring layer surface, and bonding the two material layers together to form a bonding layer by a semiconductor chip process; S2, removing the substrate material of the epitaxial part by physical or chemical process to form a Hall effect material layer; S3. Using a semiconductor process, the excess substrate material is removed from the Hall effect material layer to form a first-order through hole, and then a second-order through hole connected to the first-order through hole is formed by a reactive ion etching process until the wiring layer on the surface of the integrated circuit body; S4. Using a semiconductor process, depositing a metal column between the first-order through hole and the second-order through hole to form a metal hole column, thereby forming an electrical connection between the Hall effect material layer and the wiring layer on the surface of the integrated circuit body; S5, coating a passivation material precursor on the surface of the Hall effect material layer and curing it to form a passivation layer; S6. A through hole communicating with the metal hole column is opened on one side of the passivation layer by reactive ion etching, and the through hole is filled with metal by semiconductor process to form a metal plug and an external electrode connected thereto, so as to realize electrical connection between the integrated circuit and the outside world.
[0014] As a preferred solution, the semiconductor chip process in S1 includes any one of temporary bonding, room temperature bonding, cationic bonding, and thermal compression bonding processes.
[0015] As a preferred solution, the semiconductor processes in S3, S4 and S6 include any one of etching, deposition and electroplating processes.
[0016] The technical effects achieved by the present invention are: The present invention stacks the Hall effect material and the integrated circuit vertically and isolates the two from the environment with a passivation material, thereby minimizing the lead length to improve the sensor's ability to resist electromagnetic interference, reduce the package area, and reduce costs; at the same time, by utilizing the passivation material's non-conductive and good sealing properties, the Hall effect material layer, integrated circuit, bonding layer, through hole, metal column and other parts that are prone to failure in a high temperature and high humidity environment can be covered, and the latter can be isolated from the air in the sensor's working environment, thereby improving the reliability of the sensor. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 is a schematic diagram of the structure of a Hall effect sensor in an embodiment of the present invention; Figure 2 is a cross-sectional schematic diagram of a Hall effect sensor according to an embodiment of the present invention; Figure 3 is a manufacturing flow chart of the Hall effect sensor in the first embodiment of the present invention; Figure 4 This is a manufacturing flow chart of the Hall effect sensor in the second embodiment of the present invention.
[0018] In the accompanying drawings, the components represented by the reference numerals are listed as follows: 100. Integrated circuits; 101, integrated circuit body; 102, wiring layer; 103, bonding layer; 104, Hall effect material layer; 105, metal hole column; 106, metal plug; 107, passivation layer; 108, external electrode; 301, indium antimonide substrate; 302, damaged layer; 303, upper silicon dioxide material layer 1; 304, lower silicon dioxide material layer 1; 305, wiring layer 1; 306, integrated circuit body 1; 307, bonding layer 1; 308, indium antimonide substrate lower surface layer; 309, indium antimonide material upper surface layer; 310, indium antimonide material layer; 311, indium antimonide through hole; 312, silicon dioxide through hole 1; 313, metal pillar 1; 314, passivation layer 1; 315, through hole 1; 316, metal plug 1; 317, external electrode 1; 401. Gallium arsenide substrate; 402. Stop layer; 403. Gallium arsenide layer; 404. Integrated circuit body II; 405. Wiring layer II; 406. Upper silicon dioxide material layer II; 407. Lower silicon dioxide material layer II; 408. Bonding layer II; 409. Gallium arsenide through hole; 410. Silicon dioxide through hole II; 411. Metal pillar II; 412. Passivation layer II; 413. Through hole II; 414. Metal plug II; 415. External electrode II. DETAILED DESCRIPTION
[0019] In order to make the purpose and advantages of the present invention more clearly understood, the present invention is specifically described below in conjunction with embodiments. It should be understood that the following text is only used to describe one or several specific embodiments of the present invention, and does not strictly limit the scope of protection of the specific claims of the present invention.
[0020] Embodiment 1: like Figure 1-Figure 2 As shown, a Hall effect sensor includes an integrated circuit 100, wherein the integrated circuit 100 includes an integrated circuit body 101 and a wiring layer 102 formed on the surface of the integrated circuit body 101; and a bonding layer 103, a Hall effect material layer 104 and a passivation layer 107 are vertically stacked in sequence on the wiring layer 102; the bonding layer 103 is used to form a mechanical connection, and the passivation layer 107 is used to isolate the Hall effect material layer 104 from the environment, and the air is isolated to improve the reliability of the sensor. At the same time, the vertical stacking installation method can minimize the lead length to improve the sensor's anti-electromagnetic interference capability, reduce the package area, and reduce costs.
[0021] Secondly, through holes and metal columns for forming electrical connections with metal electrodes on the wiring layer 102 are formed between the bonding layer 103 and the Hall effect material layer 104, and the two constitute a metal hole column 105, and an electrical connection is formed using the metal hole column 105. A through hole connected to the metal hole column 105 is provided on one side of the passivation layer 107, and the through hole is filled with a metal plug 106 connected to the metal hole column 105. The metal plug 106 extends to the outer surface of the passivation layer 107 and is connected to an external electrode 108, and the external electrode 108 is used to realize the electrical connection between the integrated circuit 100 and the outside world.
[0022] It should be noted that the passivation layer 107 completely covers the metal hole column 105 and covers the outer surface of the Hall effect material layer 104, and is stacked together with the bonding layer 103. The Hall effect material layer 104, the integrated circuit 100, the bonding layer 103, the metal hole column 105 and the metal plug 106 except the external electrode 108 are all covered with the passivation material to form isolation from the external environment. Isolating the air improves the reliability of the sensor, thereby improving the sensor's ability to resist electromagnetic interference.
[0023] In some embodiments, the bonding layer 103 is formed by bonding two layers of the same or different materials, and the bonding of the two layers is achieved through a semiconductor chip process rather than a packaging process such as soldering, ball grid array (BGA) or flip-chip.
[0024] It should be noted that the semiconductor chip process is a temporary bonding, room temperature bonding, cationic bonding or hot pressing bonding process. The size and alignment accuracy of the semiconductor process is higher than that of the packaging process, so that a smaller, thinner and more compact bonding can be achieved, thereby improving the firmness of the bonding layer 103 and ensuring the stability of the sensor when in use.
[0025] In this embodiment, the material layer of the bonding layer 103 is formed by combining two identical silicon dioxide material layers, and the two layers are combined using a cationic bonding process; of course, in other embodiments, other semiconductor materials (such as silicon nitride, etc.) can be selected as needed, and other semiconductor processes mentioned above can also be selected to bond the material layers.
[0026] In some embodiments, the Hall effect material layer 104 is made of semiconductor materials, mainly including silicon (Si), germanium (Ge), gallium arsenide (GaAs), indium phosphide (InP), gallium phosphide (GaP), indium arsenide (InAs), indium antimonide (InSb) or gallium antimonide (GaSb) and the like; or a material prepared by metal organic vapor phase epitaxy, molecular beam epitaxy, sputtering deposition, electron beam evaporation deposition or thermal evaporation deposition using the material as a substrate.
[0027] In this embodiment, the Hall effect material layer 104 is made of indium antimonide material.
[0028] In some embodiments, the passivation layer 107 can be made of materials such as styrene cyclobutene polymer, polyimide or SU-8 formula polymer. These materials are non-conductive and have good sealing properties. They can cover the Hall effect material layer 104, integrated circuit 100, bonding layer 103, through holes and metal columns, which are prone to failure in high temperature and high humidity environments, and isolate the latter from the air in the sensor working environment, thereby improving the reliability of the sensor.
[0029] In this embodiment, the passivation layer 107 is made of polyimide material.
[0030] In this embodiment, the integrated circuit 100 converts the Hall effect voltage into an analog or digital, current or voltage signal by applying a voltage to the Hall effect material layer 104. When in use, when the sensor is connected to a power source, when the magnetic induction flux in the Hall effect material is 0, a current is formed in the Hall effect material through the metal column. When the magnetic field has a component that is not parallel to the direction of the current, the direction of the current will be changed, and a potential difference will be generated in a specific direction. A metal column is set in this specific direction, and the voltage is sampled and converted into an analog or digital signal through the integrated circuit 100, and the magnetic induction flux passing through the Hall effect material can be calculated. The resistance of the Hall effect material is sensitive to temperature, and the sensor can correct the Hall effect measurement result through the built-in temperature measurement subcircuit of the integrated circuit 100 to ensure the accuracy of the sensor.
[0031] like Figure 1-Figure 3 As shown, a method for manufacturing a Hall effect sensor is used to manufacture the Hall effect sensor in this embodiment; wherein the integrated circuit 100 is manufactured using a mature standard logic circuit process, the integrated circuit wafer size is 6 inches, and the Hall effect material is a single-sided polished 6-inch indium antimonide substrate sheet 301.
[0032] The specific steps include the following (see also attached Figure 3 Serial number in ): Step 1: S101, forming a damaged layer 302 in the indium antimonide substrate 301 by ion implantation. Figure 3 (1)] S102, depositing an upper silicon dioxide material layer 303 with a thickness of 500 nm on the surface of the indium antimonide substrate 301, and depositing a lower silicon dioxide material layer 304 with a thickness of 500 nm on the surface of the wiring layer 305 on the integrated circuit body 306. [Refer to Attachment Figure 3 (2)] S103, using a chemical-mechanical polishing process to reduce the roughness and unevenness of the surface of the upper silicon dioxide material layer 303 and the lower silicon dioxide material layer 304; bonding the integrated circuit wafer and the indium antimonide substrate 301 together by a cationic bonding process, using the upper silicon dioxide material layer 303 and the lower silicon dioxide material layer 304 to form a bonding layer 307. [Refer to Attached Figure 3 (3)] Step 2: S201, further increase the strength of the bonding layer 1 307 through a heating annealing process, and at the same time utilize the stress caused by the difference in thermal expansion coefficients between the integrated circuit wafer and the indium antimonide substrate 301 to separate the indium antimonide substrate 301 into two parts at the damaged layer 302. [Refer to Attachment Figure 3 (4)] S202, the lower surface layer 308 of the indium antimonide substrate is smoothed by chemical-mechanical grinding, and can be recycled as a material for the next production; and the upper surface layer 309 of the indium antimonide material is smoothed by the same method to form an indium antimonide material layer 310 of a certain thickness. [Refer to Attachment Figure 3 (5)] Step 3: S301, by inductively coupled plasma etching process, the excess indium antimonide material layer 310 is etched away, and an indium antimonide through hole 311 is formed. Figure 3 (6)] S302, forming a silicon dioxide through hole 312 on the bonding layer 307 through a reactive ion etching process, until the metal electrode module on the wiring layer 305. [Refer to Attached Figure 3 (7)] Step 4: S401, by means of a sputtering deposition process and an electroplating process, a metal column 313 is deposited at the indium antimonide through hole 311 and the silicon dioxide through hole 312, so as to form an electrical connection between the indium antimonide material layer 310 and the metal electrode module in the wiring layer 305. [Refer to Attached Figure 3 (8)] Step 5: S501, coating a polyimide precursor on the surface of the indium antimonide material layer 310 and curing it to form a passivation layer 314. [Refer to Attached Figure 3 (9)] Step 6: S601, a through hole 315 is formed on the passivation layer 314 by reactive ion etching. Figure 3 (10)] S602, fill the through hole 315 with metal by sputtering deposition to form a metal plug 316 and an external electrode 317 connected thereto, thereby realizing electrical connection between the integrated circuit 100 and the outside world. Figure 3 (11)] Embodiment 2: like Figure 1-Figure 2 As shown, a Hall effect sensor, the structure of this embodiment is basically the same as that of the first embodiment, except that: In this embodiment, the Hall effect material layer 104 is made of gallium arsenide material.
[0033] In this embodiment, the passivation layer 107 is made of styrene-cyclobutene polymer material.
[0034] like Figure 1-Figure 2 as well as Figure 4 As shown, a method for manufacturing a Hall effect sensor is used to manufacture the Hall effect sensor in this embodiment; wherein the integrated circuit 100 is manufactured using a mature standard logic circuit process, the integrated circuit wafer size is 6 inches, and the Hall effect material is a single-sided polished 6-inch gallium arsenide substrate 401.
[0035] The specific steps include the following (see also attached Figure 4 Serial number in ): Step 1: SS101, through the metal organic vapor phase epitaxy process, the gallium arsenide indium phosphide etching stop layer 402 and the gallium arsenide layer 403 for Hall effect detection are sequentially deposited on the surface of the gallium arsenide substrate 401. [Refer to the attached Figure 4 (1)] SS102, deposit a 300nm thick lower silicon dioxide material layer 407 on the surface of the gallium arsenide layer 403, and deposit a 300nm thick upper silicon dioxide material layer 406 on the surface of the wiring layer 405 on the integrated circuit body 404. [Refer to Attachment Figure 4 (2)] SS103, using chemical-mechanical polishing process, reduce the roughness and unevenness of the surface of the upper silicon dioxide material layer 406 and the lower silicon dioxide material layer 407; using the cationic bonding process, the integrated circuit wafer and the gallium arsenide substrate 401 are bonded together by bonding the upper silicon dioxide material layer 406 and the lower silicon dioxide material layer 407 to form a bonding layer 408. [Refer to Attachment Figure 4 (3)] In some embodiments, the cationic bonding process in step SS103 can be replaced by a semiconductor chip process such as temporary bonding, room temperature bonding or thermal compression bonding.
[0036] Step 2: SS201, remove the excess part of the original gallium arsenide substrate 401 by grinding and wet chemical etching. Figure 4 (4)] SS202, through the wet etching process, the epitaxial growth stop layer 402 is removed to expose the gallium arsenide layer 403. [Refer to the attached Figure 4 (5)] Step 3: SS301, through the inductively coupled plasma etching process, the excess gallium arsenide layer 403 is etched away, and a gallium arsenide through hole 409 is formed. [Refer to the attached Figure 4 (6)] SS302, through the reactive ion etching process, a silicon dioxide through hole 410 is formed on the bonding layer 408, until the metal electrode module of the wiring layer 405. [Refer to the attached Figure 4 (7)] In some embodiments, the inductively coupled plasma etching process and reactive ion etching process in step SS301 and step SS302 can be replaced by other semiconductor processes such as etching, deposition or electroplating as needed.
[0037] Step 4: SS401, through the sputtering deposition process and the electroplating process, the metal pillar 411 is deposited at the gallium arsenide through hole 409 and the silicon dioxide through hole 410, and an electrical connection is formed between the gallium arsenide layer 403 and the metal electrode module in the wiring layer 405. [Refer to the attached Figure 4 (8)] In some embodiments, the sputtering deposition process and the electroplating process in step SS401 can be replaced by other semiconductor processes such as etching, deposition or electroplating as needed.
[0038] Step 5: SS501, coating the styrene cyclobutene polymer precursor on the wafer surface and curing it to form a passivation layer 412. [Refer to Attachment Figure 4 (9)] Step 6: SS601, through hole 413 is formed on passivation layer 412 by reactive ion etching. Figure 4 (10)] SS602, fill the through hole 413 with metal by sputtering deposition, form a metal plug 414 and an external electrode 415 connected to the integrated circuit 100, and realize the electrical connection between the integrated circuit 100 and the outside world. Figure 4 (11)] In some embodiments, the sputtering deposition process in step SS602 can be replaced by other semiconductor processes such as etching, deposition or electroplating as needed.
[0039] The above is only a preferred embodiment of the present invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principles of the present invention, and these improvements and modifications should also be considered as the protection scope of the present invention. The structures, devices and operating methods not specifically described and explained in the present invention shall be implemented according to the conventional means in the art unless otherwise specified and limited.
Claims
1. A Hall effect sensor, characterized in that ,include: Integrated Circuits (100) The integrated circuit (100) comprises an integrated circuit body (101) and a wiring layer (102) formed on a surface of the integrated circuit body (101); A bonding layer (103), a Hall effect material layer (104) and a passivation layer (107) are vertically stacked in sequence on the wiring layer (102); The passivation layer (107) covers the outer surface of the Hall effect material layer (104) and is stacked together with the bonding layer (103).
2. A Hall effect sensor according to claim 1, characterized in that: A metal hole column (105) is formed between the bonding layer (103) and the Hall effect material layer (104); A through hole connected to the metal hole column (105) is provided on one side of the passivation layer (107), and the through hole is filled with a metal plug (106) connected to the metal hole column (105).
3. A Hall effect sensor according to claim 2, characterized in that: The passivation layer (107) covers the metal hole column (105), and the metal plug (106) extends to the outer surface of the passivation layer (107) and is connected to an external electrode (108).
4. A Hall effect sensor according to claim 1, characterized in that: The bonding layer (103) is formed by combining two layers of the same or different materials.
5. A Hall effect sensor according to claim 1, characterized in that: The Hall effect material layer (104) is made of semiconductor material, which includes any one of silicon, germanium, gallium arsenide, indium phosphide, gallium phosphide, indium arsenide, indium antimonide or gallium antimonide materials, or a mixture or stacked material thereof.
6. A Hall effect sensor according to claim 5, characterized in that: The semiconductor material is a material prepared by using the material as a substrate and by any one of metal organic vapor phase epitaxy, molecular beam epitaxy, sputtering deposition, electron beam evaporation deposition or thermal evaporation deposition processes.
7. A Hall effect sensor according to claim 1, characterized in that: The passivation layer (107) is made of any one of styrene-cyclobutene polymer, polyimide or SU-8 formula polymer material.
8. A method for manufacturing a Hall effect sensor, used for manufacturing the Hall effect sensor according to any one of claims 1 to 7, characterized in that: The following steps are involved: S1. Pre-treating the surface of the substrate material of the Hall effect material layer (104) by an ion implantation process or a metal organic vapor phase epitaxy process, depositing a material layer using two layers of the same or different materials between the pre-treated surface and the surface of the wiring layer (102), and bonding the two material layers together by a semiconductor chip process to form a bonding layer (103); S2, removing the substrate material of the epitaxial portion by a physical or chemical process to form a Hall effect material layer (104); S3, using a semiconductor process to remove excess substrate material on the Hall effect material layer (104) to form a first-order through hole, and then using a reactive ion etching process to form a second-order through hole connected to the first-order through hole, until the wiring layer (102) on the surface of the integrated circuit body (101); S4, using a semiconductor process to deposit a metal column between the first-order through hole and the second-order through hole to form a metal hole column (105), thereby forming an electrical connection between the Hall effect material layer (104) and the wiring layer (102) on the surface of the integrated circuit body (101); S5, coating a passivation material precursor on the surface of the Hall effect material layer (104) and curing the precursor to form a passivation layer (107); S6. A through hole communicating with the metal hole column (105) is opened on one side of the passivation layer (107) by reactive ion etching, and the through hole is filled with metal by semiconductor process to form a metal plug (106) and an external electrode (108) connected thereto, thereby realizing electrical connection between the integrated circuit (100) and the outside world.
9. A method for manufacturing a Hall effect sensor according to claim 8, characterized in that: The semiconductor chip process in S1 includes any one of temporary bonding, room temperature bonding, cationic bonding, and thermal compression bonding processes.
10. A method for manufacturing a Hall effect sensor according to claim 8, characterized in that: The semiconductor process in S3, S4 and S6 includes any one of etching, deposition and electroplating processes.