Method and apparatus for measuring background carrier concentration of high electron mobility transistor

Abstract

The embodiment of the present disclosure provides a kind of measurement method and device for the background carrier concentration of high electron mobility transistor, belong to semiconductor technical field.The measurement method includes: obtaining unit area reference capacitance and the first measured gate-source capacitance of HEMT, unit area reference capacitance is the capacitance of unit area laminated structure, and the film layer stack structure of laminated structure is identical with the film layer stack structure of HEMT;According to unit area reference capacitance and the first measured gate-source capacitance, determine the equivalent gate-source capacitance area of HEMT;According to the first measured gate-source capacitance and equivalent gate-source capacitance area, determine the unit area calibration capacitance of HEMT;According to unit area calibration capacitance and the channel depth of HEMT, determine the background carrier concentration of HEMT.The embodiment of the present disclosure can effectively improve the accuracy of the background carrier concentration of HEMT measured.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of semiconductor technology, and particularly relates to a method and device for measuring background carrier concentration of a high electron mobility transistor. BACKGROUND

[0002] A high electron mobility transistor (HEMT) is a kind of heterojunction field effect transistor, which is widely used in various electrical appliances. The background carrier concentration of the HEMT is a key indicator for characterizing the performance of the HEMT, and can be used to judge the HEMT structure design and process level.

[0003] In the related art, the method for measuring the background carrier concentration of the HEMT includes: obtaining a measured gate-source capacitance of the HEMT and a gate-source capacitance area, determining an area capacitance of the HEMT according to the measured gate-source capacitance and the gate-source capacitance area, and determining the background carrier concentration of the HEMT according to the area capacitance and a channel depth.

[0004] However, due to the complexity of the actual film layer pattern of the HEMT, and due to the different preparation processes of the HEMT, there may be problems such as gate metal area deviation. This will cause a large error in the obtained gate-source capacitance area of the HEMT, thereby affecting the accuracy of the measured background carrier concentration of the HEMT. SUMMARY

[0005] The embodiments of the present disclosure provide a method and device for measuring the background carrier concentration of a high electron mobility transistor, which can effectively improve the accuracy of the measured background carrier concentration of the HEMT. The technical solution is as follows:

[0006] In one aspect, a method for measuring the background carrier concentration of a high electron mobility transistor is provided, including: obtaining a unit area reference capacitance and a first measured gate-source capacitance of the HEMT, the unit area reference capacitance being the capacitance of a unit area of a stacked structure, the film layer stacking structure of the stacked structure being the same as the film layer stacking structure of the HEMT; determining an equivalent gate-source capacitance area of the HEMT according to the unit area reference capacitance and the first measured gate-source capacitance; determining a unit area calibration capacitance of the HEMT according to the first measured gate-source capacitance and the equivalent gate-source capacitance area; and determining the background carrier concentration of the HEMT according to the unit area calibration capacitance and a channel depth of the HEMT.

[0007] Optionally, the determining the equivalent gate-source capacitance area of the HEMT according to the unit-area reference capacitance and the first measured gate-source capacitance comprises: obtaining a first correspondence relationship between a two-dimensional electron gas concentration in a channel of the HEMT and a gate-source capacitance area calibration parameter; determining a target gate-source capacitance area calibration parameter according to a target two-dimensional electron gas concentration and the first correspondence relationship, the target two-dimensional electron gas concentration being a weighted average of the two-dimensional electron gas concentration in the channel of the HEMT with respect to the gate-source capacitance area calibration parameter, or the target two-dimensional electron gas concentration being obtained by Hall testing on the two-dimensional electron gas concentration in the channel of the HEMT; and determining the equivalent gate-source capacitance area according to the unit-area reference capacitance, the first measured gate-source capacitance and the target gate-source capacitance area calibration parameter.

[0008] Optionally, the first correspondence relationship is represented by the following formula:

[0009] Cgs norm1 = Cgs norm0 × (1 + p)

[0010]

[0011]

[0012] wherein Cgs norm0 is the unit-area reference capacitance, Cgs norm1 is a unit-area capacitance of the HEMT, p is the gate-source capacitance area calibration parameter, Ncv is a carrier concentration of the HEMT, q is an electric charge, ε0 is a vacuum permittivity, ε eff is a relative permittivity, V is a voltage, C is a capacitance, ns is the two-dimensional electron gas concentration, and z is a channel depth.

[0013] Optionally, the determining the target gate-source capacitance area calibration parameter according to the target two-dimensional electron gas concentration and the first correspondence relationship comprises: in the first correspondence relationship, determining a gate-source capacitance area calibration parameter corresponding to the target two-dimensional electron gas concentration with the smallest absolute value as the target gate-source capacitance area calibration parameter.

[0014] Optionally, the determining the equivalent gate-source capacitance area according to the unit-area reference capacitance, the first measured gate-source capacitance and the target gate-source capacitance area calibration parameter comprises: determining the equivalent gate-source capacitance area according to the following formula:

[0015]

[0016] wherein Area1 is the equivalent gate-source capacitance area, Cgs1 is the first measured gate-source capacitance, Cgsnorm0 is the unit area reference capacitance, p0 is the target gate-source capacitance area calibration parameter.

[0017] Optionally, the target gate-source capacitance area calibration parameter is -0.99 to 1.

[0018] Optionally, the HEMT is made by a first epitaxial wafer, the first epitaxial wafer has a Process Control Monitor (PCM) test area, and the stack structure is located in the PCM test area. The obtaining of the unit area reference capacitance comprises: obtaining a second measured gate-source capacitance of the stack structure and a measured gate-source capacitance area; and determining the unit area reference capacitance according to the second measured gate-source capacitance and the measured gate-source capacitance area.

[0019] Optionally, the HEMT is made by a first epitaxial wafer, the first epitaxial wafer has a Process Control Monitor (PCM) test area, and the stack structure is located in the PCM test area. The obtaining of the unit area reference capacitance comprises: obtaining a second measured gate-source capacitance of the stack structure and a measured gate-source capacitance area; and determining the unit area reference capacitance according to the second measured gate-source capacitance and the measured gate-source capacitance area.

[0020]

[0021] wherein Cgs norm0 is the unit area reference capacitance, ε0 is the vacuum dielectric constant, ε n is the relative dielectric constant of each film layer on the channel of the stack structure, d n is the thickness of each film layer on the channel of the stack structure.

[0022] In another aspect, a device for measuring the background carrier concentration of a HEMT is provided, comprising: an obtaining module configured to obtain a unit area reference capacitance and a first measured gate-source capacitance of a HEMT, the unit area reference capacitance being the capacitance of a stack structure per unit area, the film layer stack structure of the stack structure being the same as the film layer stack structure of the HEMT; a first determining module configured to determine an equivalent gate-source capacitance area of the HEMT according to the unit area reference capacitance and the first measured gate-source capacitance; a second determining module configured to determine a unit area calibration capacitance of the HEMT according to the first measured gate-source capacitance and the equivalent gate-source capacitance area; and a third determining module configured to determine the background carrier concentration of the HEMT according to the unit area calibration capacitance and the channel depth of the HEMT.

[0023] In yet another aspect, a device for measuring the background carrier concentration of a HEMT is provided, comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to execute the aforementioned method for measuring the background carrier concentration of a HEMT.

[0024] The technical scheme provided by the embodiments of the present disclosure has the beneficial effects that:

[0025] In the embodiments of the present disclosure, the first measured gate-source capacitance of the HMET and the unit area reference capacitance are obtained first, the unit area reference capacitance is the capacitance of the unit area of the laminated structure, the film layer stacking structure of the laminated structure is the same as that of the HMET, and then the equivalent gate-source capacitance area of the HMET is determined according to the unit area reference capacitance and the first measured gate-source capacitance. Since the film layer stacking structure of the laminated structure is the same as that of the HMET, the gate-source capacitance area of the HMET can be calibrated according to the unit area reference capacitance, the measurement error caused by the actual film layer pattern complexity of the HMET and the gate metal area deviation and the like is reduced, and the equivalent gate-source capacitance area is closer to the actual gate-source capacitance area of the HMET. Then, the unit area calibration capacitance of the HMET is determined according to the first measured gate-source capacitance and the equivalent gate-source capacitance area, and the background carrier concentration of the HMET is determined according to the unit area calibration capacitance and the channel depth of the HMET. In this way, the accuracy of the measured background carrier concentration of the HMET can be effectively improved. BRIEF DESCRIPTION OF DRAWINGS

[0026] In order to more clearly illustrate the technical scheme in the embodiments of the present disclosure, the drawings needed in the embodiment description will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and other drawings can also be obtained by those skilled in the art without creative labor.

[0027] Figure 1 is a flow chart of a method for measuring the background carrier concentration of a HMET provided by an embodiment of the present disclosure;

[0028] Figure 2 is a flow chart of another method for measuring the background carrier concentration of a HMET provided by an embodiment of the present disclosure;

[0029] Figure 3 is a structure diagram of a laminated structure in a PCM test area of a first epitaxial wafer provided by an embodiment of the present disclosure;

[0030] Figure 4 is a corresponding relationship curve diagram between the unit area capacitance of a laminated structure and the gate-source voltage provided by an embodiment of the present disclosure;

[0031] Figure 5 is a diagram of a first corresponding relationship curve between the two-dimensional electron gas concentration in the channel of a HMET and the gate-source capacitance area calibration parameter provided by an embodiment of the present disclosure;

[0032] Figure 6 is a corresponding relationship curve between the unit area capacitance of a HEMT and the gate-source voltage provided by an embodiment of the present disclosure;

[0033] Figure 7 is a second corresponding relationship curve between the carrier concentration and the channel depth of a HEMT provided by an embodiment of the present disclosure;

[0034] Figure 8 is a structure block diagram of a measuring device of the background carrier concentration of a HEMT provided by an embodiment of the present disclosure;

[0035] Figure 9 is a structure block diagram of a first determining module provided by an embodiment of the present disclosure;

[0036] Figure 10 is a structure block diagram of a measuring device of the background carrier concentration of a HEMT provided by an embodiment of the present disclosure.

[0037] Reference signs:

[0038] 10: channel layer; 20: barrier layer; 30: cap layer; 40: passivation layer; 50: metal electrode layer; 51: first test electrode; 52: second test electrode; 100: obtaining module; 200: first determining module; 201: first obtaining unit; 202: first determining unit; 203: second determining unit; 300: second determining module; 400: third determining module; 500: processor; 600: memory; 1000: measuring device; 2000: measuring device. DETAILED DESCRIPTION

[0039] In order to make the purpose, technical scheme and advantages of the present disclosure clearer, the embodiments of the present disclosure will be further described in detail below with reference to the drawings.

[0040] Unless otherwise defined, technical terms or scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first", "second", "third", and the like, as used in the description and the claims of this disclosure do not have any specific meaning, and are merely used to distinguish one component from another. Similarly, the terms "one", "another", and the like, do not limit the quantity of the mentioned objects to one, but rather means at least one. The terms "comprise", "comprising", "include", "including", and the like, mean encompassing, and do not exclude other elements or materials. The terms "connected", "coupled", and the like, do not limit the physical or mechanical connection or coupling to be direct and to exclude other possible intervening or

[0041] To facilitate understanding of the embodiments of the present disclosure, the structure of an epitaxial wafer for making a HEMT will first be briefly introduced. The epitaxial wafer for making a HEMT includes a channel layer, a barrier layer, a cap layer, a passivation layer, and a metal electrode layer, which are stacked in sequence. The epitaxial wafer has a functional region, which is used for patterning the film layers to form various functional structures required by the HEMT, thereby obtaining the HEMT. The background carrier concentration of the HEMT corresponds to the carrier concentration of the channel layer of the HEMT away from the surface of the barrier layer.

[0042] Figure 1 is a flowchart of a method for measuring the background carrier concentration of a HEMT according to an embodiment of the present disclosure. As shown in Figure 1 the method includes:

[0043] In step S1001, a unit area reference capacitance and a first actually measured gate-source capacitance of the HEMT are obtained.

[0044] The unit area reference capacitance is the capacitance of a unit area of a stacked structure, and the film layer stacking structure of the stacked structure is the same as that of the HEMT.

[0045] In step S1002, an equivalent gate-source capacitance area of the HEMT is determined according to the unit area reference capacitance and the first actually measured gate-source capacitance.

[0046] In step S1003, a unit area calibration capacitance of the HEMT is determined according to the first actually measured gate-source capacitance and the equivalent gate-source capacitance area.

[0047] In step S1004, the background carrier concentration of the HEMT is determined according to the unit area calibration capacitance and the channel depth of the HEMT.

[0048] In the embodiment of the present disclosure, the first measured gate-source capacitance of the unit area reference capacitance and the HMET is obtained first, the unit area reference capacitance is the capacitance of the unit area of the laminated structure, the film layer stacking structure of the laminated structure is the same as the film layer stacking structure of the HMET, and then the equivalent gate-source capacitance area of the HMET is determined according to the unit area reference capacitance and the first measured gate-source capacitance. Since the film layer stacking structure of the laminated structure is the same as the film layer stacking structure of the HMET, the gate-source capacitance area of the HMET can be calibrated according to the unit area reference capacitance, the measurement error caused by the actual film layer pattern complexity of the HMET and the gate metal area deviation and the like is reduced, and the equivalent gate-source capacitance area is closer to the actual gate-source capacitance area of the HMET. Then, the unit area calibration capacitance of the HMET is determined according to the first measured gate-source capacitance and the equivalent gate-source capacitance area, and then the background carrier concentration of the HMET is determined according to the unit area calibration capacitance and the channel depth of the HMET. In this way, the accuracy of the measured background carrier concentration of the HMET can be effectively improved.

[0049] In the embodiment of the present disclosure, the HMET can be an enhancement-mode HMET. The working principle of the HMET is that: by using the piezoelectric effect and polarization effect of the channel layer and the barrier layer, a high-mobility two-dimensional electron gas can be generated at the interface of the channel layer and the barrier layer, and by controlling the gate-source voltage, the concentration of the two-dimensional electron gas can be controlled to realize the conduction or turn-off of the HMET. When the gate-source voltage is less than or equal to the threshold voltage, the enhancement-mode HMET is in an off state, and when the gate-source voltage is greater than the threshold voltage, the enhancement-mode HMET is in an on state.

[0050] Figure 2 is another flow chart of a method for measuring the background carrier concentration of an HMET provided by the embodiment of the present disclosure. As shown in Figure 2 , the measurement method comprises:

[0051] In step S2001, the unit area reference capacitance and the first measured gate-source capacitance of the HMET are obtained.

[0052] Optionally, the HEMT is prepared by a first epitaxial wafer, and the first epitaxial wafer has a PCM test region and a functional region. The functional region is used to form the HEMT, and the PCM test region is used to form a stack structure, and the PCM test region is not used to form the HEMT. The film layer stack structure of the stack structure is the same as the film layer stack structure of the HEMT, and the film layer pattern of the stack structure is different from the film layer pattern of the HEMT. That is, the materials, layering order and thickness of the film layers of the stack structure and the HEMT in the vertical direction are the same, for example, the stack structure and the HEMT both include a channel layer, a barrier layer, a cap layer, a passivation layer and a metal electrode layer which are sequentially stacked in the vertical direction. The film layer pattern of the stack structure is substantially the same as the shape of the PCM test region and has a large area, and the film layer pattern of each film layer of the HEMT is complex and has a small area, for example, the metal electrode layer of the HEMT includes a gate, a source and a drain, and the film layer pattern of the gate, the source and the drain is complex and has a small area. The stack structure in the PCM test region of the first epitaxial wafer is described below with reference to the accompanying drawings.

[0053] Figure 3 FIG. 1 is a structural schematic diagram of a stack structure in a PCM test region of a first epitaxial wafer according to an embodiment of the present disclosure. Figure 3 (a) of FIG. 1 is a top view of the stack structure in the PCM test region of the first epitaxial wafer, Figure 3 (b) of FIG. 1 is a sectional structural schematic diagram of the stack structure in the PCM test region of the first epitaxial wafer. As shown in Figure 3 The stack structure is located in the PCM test region, and the stack structure includes a channel layer 10, a barrier layer 20, a cap layer 30, a passivation layer 40 and a metal electrode layer 50 which are sequentially stacked.

[0054] Optionally, the PCM test region is a circular region or a rectangular region.

[0055] In the embodiment of the present disclosure, the PCM test region is a circular region. The outer contours of the normal projections of the channel layer 10, the barrier layer 20, the cap layer 30, the passivation layer 40 and the metal electrode layer 50 on the bearing surface are all circular.

[0056] Exemplarily, the metal electrode layer 50 includes a first test electrode 51 and a second test electrode 52, the second test electrode 52 is located at the periphery of the first test electrode 51 and is spaced apart from the first test electrode 51, the second test electrode 52 penetrates through the passivation layer 40, the cap layer 30 and the barrier layer 20, and the second test electrode 52 is connected with the channel layer 10.

[0057] Exemplarily, the first test electrode 51 is a cylindrical structure, and the second test electrode 52 is a circular ring structure.

[0058] Exemplarily, the diameter of the PCM test region is 100-1000 μm.

[0059] Optionally, the channel layer 10 can be a GaN channel layer.

[0060] Exemplarily, the thickness of the channel layer 10 is 200-500 nm.

[0061] Optionally, the barrier layer 20 can be an AlGaN barrier layer.

[0062] Exemplarily, the thickness of the barrier layer 20 is 20-30 nm.

[0063] Optionally, the cap layer 30 can be a GaN layer.

[0064] Exemplarily, the thickness of the cap layer 30 is 1-5 nm.

[0065] Optionally, the passivation layer 40 can be a SiN layer.

[0066] Exemplarily, the thickness of the passivation layer 40 is 10-100 nm.

[0067] Optionally, the thickness of the first test electrode 51 is 400-600 nm.

[0068] Exemplarily, the thickness of the first test electrode 51 can be 400 nm, 500 nm, 600 nm, etc.

[0069] Optionally, the step of obtaining the reference capacitance per unit area in the step S2001 can include the following steps:

[0070] First, the second measured gate-source capacitance and the measured gate-source capacitance area of the stack structure are obtained.

[0071] Exemplarily, the first test electrode 51 and the second test electrode 52 of the stack structure can be connected by a capacitance test device, and the second measured gate-source capacitance in the voltage range of -25 V to 25 V of the gate-source voltage is obtained, and the measured gate-source capacitance area of the stack structure is calculated according to the diameter of the PCM test region. Here, the second measured gate-source capacitance changes with the gate-source voltage, and the measured gate-source capacitance area is a fixed value.

[0072] Since the film layer pattern of the stack structure in the PCM test region of the first epitaxial wafer is simple, the influence of the preparation process on the stack structure is small, and the area of the PCM test region is large, so the measured gate-source capacitance area of the stack structure can be calculated more accurately.

[0073] Exemplarily, the frequency of the test signal of the capacitance testing device can be 1 kHz to 5 MHz. The frequency of the test signal can be in the range, and the capacitance testing device can more accurately obtain the second measured gate-source capacitance.

[0074] In the second step, the unit area reference capacitance is determined according to the second measured gate-source capacitance and the measured gate-source capacitance area.

[0075] Exemplarily, the corresponding relationship curve between the unit area capacitance of the laminated structure and the gate-source voltage can be determined according to the corresponding relationship between the second measured gate-source capacitance and the gate-source voltage and the measured gate-source capacitance area. Then, the unit area reference capacitance is determined according to the corresponding relationship curve between the unit area capacitance of the laminated structure and the gate-source voltage.

[0076] Exemplarily, the unit area capacitance of the laminated structure can be calculated by the following formula (1):

[0077]

[0078] Wherein, Cgs norm is the unit area capacitance of the laminated structure, Area0 is the measured gate-source capacitance area, and Cgs2 is the second measured gate-source capacitance.

[0079] Figure 4 is a schematic diagram of a corresponding relationship curve between the unit area capacitance of the laminated structure and the gate-source voltage provided by the embodiment of the present disclosure. As shown in Figure 4 , with the gradual increase of the gate-source voltage Vgs, the unit area capacitance Cgs norm of the laminated structure gradually increases, and then tends to be saturated at the back end, that is, with the further increase of the gate-source voltage Vgs at the back end, the size of Cgs norm no longer changes. Since the HEMT is an enhancement mode HEMT, the characteristics of the laminated structure are the same as those of the enhancement mode HEMT. In the process of gradually increasing the gate-source voltage, the change of the curve corresponds to the change of the HEMT from the off state to the on state.

[0080] Exemplarily, in the corresponding relationship curve between the unit area capacitance of the laminated structure and the gate-source voltage, the end saturation value of Cgs norm can be determined as the unit area reference capacitance Cgs norm0 . The end saturation value of Cgs norm is the unit area capacitance corresponding to the on state of the laminated structure, so that the unit area reference capacitance in the normal on state can be more accurately determined.

[0081] Since the functional region for forming the HEMT and the PCM test region for forming the stack structure are different regions of the first epitaxial wafer, the same film layers of the HEMT and the stack structure are formed under the same growth conditions, and thus the unit area reference capacitance obtained by the second measured gate-source capacitance and the measured gate-source capacitance area of the stack structure is more consistent with the actual preparation process, which is beneficial to reduce errors.

[0082] According to the above first step to the second step, the unit area reference capacitance can be obtained.

[0083] In another possible implementation, the theoretical unit area capacitance of the stack structure in the PCM test region of the first epitaxial wafer can also be calculated, and the calculated theoretical unit area capacitance is taken as the unit area reference capacitance.

[0084] Exemplarily, the unit area reference capacitance can be determined according to the following formula (2).

[0085]

[0086] Wherein, Cgs norm0 is the unit area reference capacitance, ε0 is the vacuum dielectric constant, ε n is the relative dielectric constant of each film layer on the channel of the stack structure, d n is the thickness of each film layer on the channel of the stack structure.

[0087] For example, Figure 3 In the stack structure shown, the barrier layer 20 can be an AlGaN barrier layer, ε1 is the relative dielectric constant of AlGaN, d1 is the thickness of the barrier layer; the cap layer 30 can be a GaN layer, ε2 is the relative dielectric constant of GaN, d2 is the thickness of the cap layer; the passivation layer 40 can be a SiN layer, ε3 is the relative dielectric constant of SiN, d3 is the thickness of the passivation layer; ε4 is the relative dielectric constant of the first test electrode 51 in the metal electrode layer 50, d4 is the thickness of the first test electrode 51 in the metal electrode layer.

[0088] In this way, the unit area reference capacitance can also be obtained, and testing by the capacitance test device is not required, which can simplify the steps.

[0089] It should be noted that in the above formula (2), only the other film layers on the channel layer 10 are calculated, and the channel layer itself is not involved in the calculation.

[0090] Exemplarily, the first measured gate-source capacitance of the HEMT can be measured by connecting the gate and the source in the metal electrode layer of the HEMT by the capacitance test device in the same way as the second measured gate-source capacitance. Similarly, the first measured gate-source capacitance changes with the gate-source voltage of the HEMT.

[0091] In step S2002, a first correspondence relationship between the two-dimensional electron gas concentration in the channel of the HEMT and the gate-source capacitance area calibration parameter is acquired.

[0092] Since the actual film layer pattern of the HEMT is different from the film layer pattern of the stack structure, the actual film layer pattern of the HEMT is more complex than the film layer pattern of the stack structure, and therefore the gate-source capacitance area calibration parameter is set to calibrate the gate-source capacitance area of the HEMT.

[0093] Optionally, the first correspondence relationship can be represented by the following formulas (3) to (5):

[0094] Cgs norm1 = Cgs norm0 × (1 + p) (3)

[0095]

[0096]

[0097] wherein Cgs norm0 is the unit area reference capacitance, Cgs norm1 is the unit area capacitance of the HEMT, p is the gate-source capacitance area calibration parameter, Ncv is the carrier concentration of the HEMT, q is the charge quantity, ε0 is the vacuum dielectric constant, ε eff is the relative dielectric constant, V is the voltage, C is the capacitance, ns is the two-dimensional electron gas concentration, and z is the channel depth.

[0098] Here, the gate-source capacitance area calibration parameter p is a pre-set interval range. Formula (3) reflects the correspondence relationship between the unit area capacitance Cgs norm1 of the HEMT and the gate-source capacitance area calibration parameter p, formula (4) reflects the correspondence relationship between the carrier concentration Ncv of the HEMT and the unit area capacitance Cgs norm1 , and formula (5) reflects the correspondence relationship between the two-dimensional electron gas concentration and the carrier concentration Ncv. By combining formula (3), formula (4) and formula (5), the first correspondence relationship between the two-dimensional electron gas concentration ns and the gate-source capacitance area calibration parameter p can be acquired.

[0099] Exemplarily, the relative dielectric constant can be obtained according to the following formula (6):

[0100]

[0101] wherein ε eff is the relative dielectric constant, ε0 is the vacuum dielectric constant, Cgs norm1 is the unit area capacitance of the HEMT, d mThe thickness of each film layer on the channel of the HEMT.

[0102] In step S2003, the target two-dimensional electron gas concentration is determined according to the target two-dimensional electron gas concentration and the first correspondence relationship.

[0103] In a possible implementation, the target two-dimensional electron gas concentration is a weighted average of the two-dimensional electron gas concentrations in the channel of the HEMT with respect to the gate-source capacitance area calibration parameter.

[0104] Exemplarily, the weighted average of the two-dimensional electron gas concentrations in the channel of the HEMT with respect to the gate-source capacitance area calibration parameter can be determined according to the following formula (7):

[0105]

[0106] wherein ns ave is the weighted average of the two-dimensional electron gas concentrations in the channel of the HEMT with respect to the gate-source capacitance area calibration parameter, ns is the two-dimensional electron gas concentration, p1 is the lower limit value of the gate-source capacitance area calibration parameter, p2 is the upper limit value of the gate-source capacitance area calibration parameter, and p is the gate-source capacitance area calibration parameter.

[0107] In this way, the weighted average of the two-dimensional electron gas concentrations in the channel of the HEMT with respect to the gate-source capacitance area calibration parameter ns ave The target two-dimensional electron gas concentration is determined, which can make the target two-dimensional electron gas concentration calculated after the gate-source capacitance area calibration parameter p is set closer to the actual value of the two-dimensional electron gas concentration in the channel of the HEMT, and the two-dimensional electron gas concentration can be tested without using other additional test equipment, so that the steps can be simplified.

[0108] Exemplarily, the interval range of the gate-source capacitance area calibration parameter p can be set as -0.99 to 1, that is, the lower limit value p1 of the gate-source capacitance area calibration parameter can be -0.99, and the upper limit value p2 of the gate-source capacitance area calibration parameter can be 1. By substituting p1 and p2 into formula (7), the target two-dimensional electron gas concentration, that is, the weighted average of the two-dimensional electron gas concentrations in the channel of the HEMT with respect to the gate-source capacitance area calibration parameter ns ave .

[0109] In another possible implementation, the target two-dimensional electron gas concentration is obtained by Hall testing on the two-dimensional electron gas concentration in the channel of the HEMT. The method of Hall testing can be referred to the related art, which will not be described herein. The target two-dimensional electron gas concentration obtained by Hall testing on the two-dimensional electron gas concentration in the channel of the HEMT is closer to the actual value of the two-dimensional electron gas concentration in the channel of the HEMT.

[0110] Optionally, the step S2003 can include: determining, in the first corresponding relationship, the gate-source capacitance area calibration parameter corresponding to the target two-dimensional electron gas concentration with the minimum absolute value as the target gate-source capacitance area calibration parameter. In this way, the calibration range of the target gate-source capacitance area calibration parameter on the gate-source capacitance area of the HEMT can be small, thereby facilitating the subsequent determination of the equivalent gate-source capacitance area to be closer to the actual gate-source capacitance area of the HEMT.

[0111] Exemplarily, the first corresponding relationship curve can be determined according to the first corresponding relationship, and then the target gate-source capacitance area calibration parameter can be determined in the first corresponding relationship curve according to the target two-dimensional electron gas concentration.

[0112] Figure 5 is a schematic diagram of a first corresponding relationship curve between the two-dimensional electron gas concentration in the channel of the HEMT and the gate-source capacitance area calibration parameter provided by the embodiment of the present disclosure. Figure 5 In the figure, the abscissa is the gate-source capacitance area calibration parameter p, and the ordinate is the two-dimensional electron gas concentration ns. Here, Figure 5 Only the first corresponding relationship curve with the interval range of the gate-source capacitance area calibration parameter p being-0.5 to 0.5 is shown.

[0113] Exemplarily, the target gate-source capacitance area calibration parameter p0 can be determined according to the target two-dimensional electron gas concentration ns ave The value of the target gate-source capacitance area calibration parameter p0 can be determined according to the target two-dimensional electron gas concentration ns Figure 5 In the figure, a straight line parallel to the abscissa is drawn according to the value of the target two-dimensional electron gas concentration ns, and the abscissa corresponding to the intersection point with the minimum absolute value in the intersection point of the straight line and the first corresponding relationship curve is determined as the target gate-source capacitance area calibration parameter p0.

[0114] In other embodiments, ns=ns ave may be substituted into the first corresponding relationship determined by the above formula (3), formula (4) and formula (5) to calculate, and the gate-source capacitance area calibration parameter with the minimum absolute value obtained by the calculation is determined as the target gate-source capacitance area calibration parameter p0.

[0115] Optionally, the target gate-source capacitance area calibration parameter is-0.99 to 1. In this way, the equivalent gate-source capacitance area obtained subsequently can be closer to the actual gate-source capacitance area of the HEMT, thereby improving the accuracy of the background carrier concentration of the HEMT measured.

[0116] Exemplarily, the target gate-source capacitance area calibration parameter can be-0.5 to 0.5.

[0117] In step S2004, the equivalent gate-source capacitance area is determined according to the unit area reference capacitance, the first measured gate-source capacitance and the target gate-source capacitance area calibration parameter.

[0118] Alternatively, the equivalent gate-source capacitance area can be determined according to the following formula (8):

[0119]

[0120] Where Area1 is the equivalent gate-source capacitance area, Cgs1 is the first measured gate-source capacitance, and Cgs norm0 p0 is the reference capacitance per unit area, and p0 is the target gate-source capacitance area calibration parameter.

[0121] By using the steps S2002 to S2004 above, the equivalent gate-source capacitance area of ​​the HEMT can be determined based on the reference capacitance per unit area and the first measured gate-source capacitance.

[0122] In step S2005, the calibration capacitance per unit area of ​​the HEMT is determined based on the first measured gate-source capacitance and the equivalent gate-source capacitance area.

[0123] For example, the correspondence curve between the unit area capacitance and the gate-source voltage of the HEMT can be determined based on the first measured gate-source capacitance and the gate-source voltage and the equivalent gate-source capacitance area. Then, the unit area calibration capacitance of the HEMT can be determined based on the correspondence curve between the unit area capacitance and the gate-source voltage of the HEMT.

[0124] For example, the capacitance per unit area of ​​a HEMT can be calculated using the following formula (9):

[0125]

[0126] Among them, Cgs norm1 Let be the capacitance per unit area of ​​HEMT, Area1 be the equivalent gate-source capacitance area, and Cgs1 be the first measured gate-source capacitance.

[0127] Figure 6 This is a schematic diagram showing the relationship between the capacitance per unit area and the gate-source voltage of a HEMT provided in an embodiment of this disclosure. Figure 6 As shown, as the gate-source voltage Vgs gradually increases, the capacitance Cgs per unit area of ​​the HEMT increases. norm1 It first increases gradually, then approaches saturation at the rear end; that is, at the rear end, as the gate-source voltage Vgs further increases, Cgs... norm1 The value of no longer changes. As the gate-source voltage gradually increases, the change in this curve corresponds to the HEMT changing from the off state to the on state.

[0128] For example, Cgs can be plotted in the curve showing the relationship between the capacitance per unit area and the gate-source voltage of a HEMT. norm1The terminal saturation value was determined as the calibration capacitance per unit area of ​​the HEMT, Cgs. norm2 Cgs norm1 The terminal saturation value is also the capacitance per unit area of ​​the HEMT in the on state, which allows for a more accurate determination of the calibration capacitance per unit area in the normal on state.

[0129] In step S2006, the background carrier concentration of the HEMT is determined based on the calibration capacitor per unit area and the channel depth of the HEMT.

[0130] Optionally, step S2006 may include the following steps:

[0131] The first step is to determine the capacitance per unit area of ​​the HEMT at different channel depths based on the calibration capacitance per unit area and the channel depth of the HEMT.

[0132] For example, the capacitance per unit area of ​​a HEMT at different channel depths can be determined according to the following formula (10):

[0133]

[0134] Among them, Cgs normz Cgs represents the capacitance per unit area of ​​a HEMT at different channel depths. norm2 The calibration capacitance per unit area, ε0 is the vacuum permittivity, ε GaN is the relative permittivity of the GaN channel layer, and z is the channel depth.

[0135] The second step is to determine the second correspondence between the carrier concentration and the channel depth of the HEMT based on the capacitance per unit area of ​​the HEMT at different channel depths.

[0136] For example, Cgs norm1 =Cgs normz Substituting into the above formulas (4) and (6), the second correspondence between the carrier concentration Ncv and the channel depth of HEMT is calculated.

[0137] The third step is to determine the background carrier concentration of HEMT based on the second correspondence.

[0138] Figure 7 This is a schematic diagram of the second correspondence between carrier concentration and channel depth in a HEMT provided by an embodiment of this disclosure. Figure 7 As shown, the horizontal axis of the second correspondence curve represents the channel depth z, and the vertical axis represents the carrier concentration Ncv.

[0139] Exemplarily, the second corresponding relationship curve can be determined according to the second corresponding relationship first. The background carrier concentration corresponds to the carrier concentration of the channel layer of the HEMT away from the surface of the barrier layer, and therefore the thickness of the channel layer of the HEMT can be determined as the channel depth, and the carrier concentration corresponding to the channel depth in the second corresponding relationship curve can be determined as the background carrier concentration of the HEMT.

[0140] Figure 8 is a structural block diagram of a measurement device for a background carrier concentration of a HEMT provided by an embodiment of the present disclosure. As shown in Figure 8 the measurement device 1000 includes an acquisition module 100, a first determination module 200, a second determination module 300, and a third determination module 400. The acquisition module 100 is configured to acquire a unit area reference capacitance and a first measured gate-source capacitance of the HEMT. The unit area reference capacitance is the capacitance of a unit area of a laminated structure, and the film layer stacking structure of the laminated structure is the same as the film layer stacking structure of the HEMT. The first determination module 200 is configured to determine an equivalent gate-source capacitance area of the HEMT according to the unit area reference capacitance and the first measured gate-source capacitance. The second determination module 300 is configured to determine a unit area calibration capacitance of the HEMT according to the first measured gate-source capacitance and the equivalent gate-source capacitance area. The third determination module 400 is configured to determine the background carrier concentration of the HEMT according to the unit area calibration capacitance and the channel depth of the HEMT.

[0141] Figure 9 is a structural block diagram of a first determination module provided by an embodiment of the present disclosure. As shown in Figure 9 the first determination module 200 includes a first acquisition unit 201, a first determination unit 202, and a second determination unit 203. The first acquisition unit 201 is configured to acquire a first corresponding relationship between a two-dimensional electron gas concentration in a channel of the HEMT and a gate-source capacitance area calibration parameter. The first determination unit 202 is configured to determine a target gate-source capacitance area calibration parameter according to a target two-dimensional electron gas concentration and the first corresponding relationship. The target two-dimensional electron gas concentration is a weighted average of the two-dimensional electron gas concentration in the channel of the HEMT with respect to the gate-source capacitance area calibration parameter, or the target two-dimensional electron gas concentration is obtained by Hall testing on the two-dimensional electron gas concentration in the channel of the HEMT. The second determination unit 203 is configured to determine the equivalent gate-source capacitance area according to the unit area reference capacitance, the first measured gate-source capacitance, and the target gate-source capacitance area calibration parameter.

[0142] Optionally, the first determination unit 202 is configured to determine, in the first corresponding relationship, the gate-source capacitance area calibration parameter corresponding to the target two-dimensional electron gas concentration with the smallest absolute value as the target gate-source capacitance area calibration parameter.

[0143] Optionally, the second determining unit 203 is configured to determine the equivalent gate-source capacitance area according to the formula (8) in the above.

[0144] It should be noted that the device for measuring the background carrier concentration of the HEMT provided in the above embodiments is only used as an example to illustrate the division of the above functional modules and functional units when measuring the background carrier concentration of the HEMT. In actual applications, the above functions can be completed by different functional modules and functional units according to needs, that is, the internal structure of the device is divided into different functional modules and functional units to complete all or part of the above described functions. In addition, the device for measuring the background carrier concentration of the HEMT provided in the above embodiments and the method for measuring the background carrier concentration of the HEMT belong to the same concept, and the specific implementation process is described in the method embodiments, which will not be repeated here.

[0145] Figure 10 is a structural block diagram of a device for measuring the background carrier concentration of a HEMT provided by the embodiments of the present disclosure. As shown in Figure 10 The measuring device 2000 includes a processor 500 and a memory 600. The measuring device 2000 can be a computer device or other types of devices.

[0146] The processor 500 can include one or more processing cores, such as a 5-core processor, an 8-core processor, etc. The processor 500 can be implemented in at least one of a hardware form of a digital signal processing (DSP), a field-programmable gate array (FPGA), a programmable logic array (PLA). The processor 500 can also include a main processor and a coprocessor. The main processor is a processor for processing data in an awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in a standby state. In some embodiments, the processor 500 can be integrated with a graphics processor (GPU), which is used to render and draw the content required to be displayed on the display screen. In some embodiments, the processor 500 can also include an artificial intelligence (AI) processor, which is used to process machine learning related computing operations.

[0147] The memory 600 can include one or more computer-readable storage media that can be non-transitory. The memory 600 can also include high-speed random access memory and nonvolatile, computer-readable storage media such as one or more magnetic disk storage devices, flash memory devices. In some embodiments, the non-transitory computer-readable storage media in the memory 600 is used to store at least one instruction for being executed by the processor 500 to implement the method for measuring the background carrier concentration of the HEMT provided in the embodiments of the present disclosure.

[0148] Those skilled in the art can understand that the structure shown in the above embodiments does not constitute a limitation on the measuring device for the background carrier concentration of the HEMT, and can include more or fewer components than those shown, or combine certain components, or use different component arrangements. Figure 10 The measuring device for the background carrier concentration of the HEMT shown in the above embodiments does not constitute a limitation on the measuring device for the background carrier concentration of the HEMT, and can include more or fewer components than those shown, or combine certain components, or use different component arrangements.

[0149] Exemplarily, a non-transitory computer-readable storage medium including instructions is also provided, for example, the memory 600 including instructions, which can be executed by the processor 500 of the measuring device for the background carrier concentration of the HEMT 2000 to implement the method for measuring the background carrier concentration of the HEMT. For example, the non-transitory computer-readable storage medium can be a read-only memory, a random access memory, an optical disc, a magnetic tape, a floppy disc, an optical data storage device, and the like.

[0150] Exemplarily, a computer program product is also provided, including computer programs / instructions, which, when executed by a processor, implement the method for measuring the background carrier concentration of the HEMT provided in the embodiments of the present disclosure.

[0151] The above description is not intended to limit the present disclosure in any form, although the present disclosure has been disclosed as above through the embodiments. However, any skilled person in the art can make some minor changes or modifications to the above-mentioned disclosed technical content without departing from the scope of the technical solutions of the present disclosure, to obtain equivalent embodiments with equivalent changes, as long as the changes or modifications do not depart from the technical solutions of the present disclosure. Any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present disclosure are still within the scope of the technical solutions of the present disclosure.

Claims

1. A method for measuring the background carrier concentration of a high electron mobility transistor, characterized in that, include: Obtain the reference capacitance per unit area and the first measured gate-source capacitance of the high electron mobility transistor. The reference capacitance per unit area is a capacitor of a stacked structure per unit area, and the film stacking structure of the stacked structure is the same as the film stacking structure of the high electron mobility transistor. Obtain the first correspondence between the two-dimensional electron gas concentration in the channel of the high electron mobility transistor and the gate-source capacitance area calibration parameter; Based on the target two-dimensional electron gas concentration and the first correspondence, the target gate-source capacitance area calibration parameter is determined. In the first correspondence, the gate-source capacitance area calibration parameter with the smallest absolute value corresponding to the target two-dimensional electron gas concentration is determined as the target gate-source capacitance area calibration parameter. The target two-dimensional electron gas concentration is the weighted average of the two-dimensional electron gas concentration in the channel of the high electron mobility transistor with respect to the gate-source capacitance area calibration parameter, or the target two-dimensional electron gas concentration is obtained by Hall effect testing of the two-dimensional electron gas concentration in the channel of the high electron mobility transistor. The equivalent gate-source capacitance area is determined based on the unit area reference capacitance, the first measured gate-source capacitance, and the target gate-source capacitance area calibration parameters. Based on the first measured gate-source capacitance and the equivalent gate-source capacitance area, the unit area calibration capacitance of the high electron mobility transistor is determined. The background carrier concentration of the high electron mobility transistor is determined based on the unit area calibration capacitance and the channel depth of the high electron mobility transistor. The first correspondence is represented by the following formula: ； ； ； Among them, Cgs norm0 Cgs is the reference capacitance per unit area. norm1 ρ is the capacitance per unit area of ​​the high electron mobility transistor, p is the gate-source capacitance area calibration parameter, Ncv is the carrier concentration of the high electron mobility transistor, q is the charge quantity, ε0 ​​is the vacuum dielectric constant, and ε eff Where is the relative permittivity, V is the voltage, C is the capacitance, ns is the concentration of the two-dimensional electron gas, and z is the channel depth; The equivalent gate-source capacitance area is determined according to the following formula: ； Where Area1 is the equivalent gate-source capacitance area, Cgs1 is the first measured gate-source capacitance, and Cgs norm0 p0 is the reference capacitance per unit area, and p0 is the target gate-source capacitance area calibration parameter.

2. The measurement method according to claim 1, characterized in that, The target gate-source capacitance area calibration parameter is -0.99 to 1.

3. The measurement method according to claim 1, characterized in that, The high electron mobility transistor is fabricated using a first epitaxial wafer, which has a process control monitor (PCM) test area, and the stacked structure is located within the PCM test area. The process of obtaining the reference capacitance per unit area includes: Obtain the second measured gate-source capacitance and the measured gate-source capacitance area of ​​the stacked structure; The reference capacitance per unit area is determined based on the second measured gate-source capacitance and the area of ​​the measured gate-source capacitance.

4. The measurement method according to claim 1, characterized in that, The high electron mobility transistor is fabricated using a first epitaxial wafer, which has a process control monitor (PCM) test area, and the stacked structure is located within the PCM test area. The process of obtaining the reference capacitance per unit area includes: The reference capacitance per unit area is determined according to the following formula: ； Among them, Cgs norm0 The reference capacitance per unit area is ε0, where ε is the vacuum permittivity. n d represents the relative permittivity of each film layer on the channel of the stacked structure. n The thickness of each membrane layer on the channel of the stacked structure.

5. A device for measuring the background carrier concentration of a high electron mobility transistor, characterized in that, include: The acquisition module is used to acquire the reference capacitance per unit area and the first measured gate-source capacitance of the high electron mobility transistor. The reference capacitance per unit area is a capacitor of a stacked structure per unit area, and the film stacking structure of the stacked structure is the same as the film stacking structure of the high electron mobility transistor. The first determining module acquires a first correspondence between the two-dimensional electron gas concentration in the channel of the high electron mobility transistor and the gate-source capacitance area calibration parameter; determines the target gate-source capacitance area calibration parameter based on the target two-dimensional electron gas concentration and the first correspondence, wherein the gate-source capacitance area calibration parameter with the smallest absolute value corresponding to the target two-dimensional electron gas concentration in the first correspondence is determined as the target gate-source capacitance area calibration parameter, and the target two-dimensional electron gas concentration is the weighted average of the two-dimensional electron gas concentration in the channel of the high electron mobility transistor with respect to the gate-source capacitance area calibration parameter, or the target two-dimensional electron gas concentration is obtained by Hall effect testing of the two-dimensional electron gas concentration in the channel of the high electron mobility transistor; and determines the equivalent gate-source capacitance area based on the unit area reference capacitance, the first measured gate-source capacitance, and the target gate-source capacitance area calibration parameter. The second determining module is used to determine the unit area calibration capacitance of the high electron mobility transistor based on the first measured gate-source capacitance and the equivalent gate-source capacitance area. The third determining module is used to determine the background carrier concentration of the high electron mobility transistor based on the unit area calibration capacitor and the channel depth of the high electron mobility transistor. The first correspondence is represented by the following formula: ； ； ； Among them, Cgs norm0 Cgs is the reference capacitance per unit area. norm1 ρ is the capacitance per unit area of ​​the high electron mobility transistor, p is the gate-source capacitance area calibration parameter, Ncv is the carrier concentration of the high electron mobility transistor, q is the charge quantity, ε0 ​​is the vacuum dielectric constant, and ε eff Where is the relative permittivity, V is the voltage, C is the capacitance, ns is the concentration of the two-dimensional electron gas, and z is the channel depth; The equivalent gate-source capacitance area is determined according to the following formula: ； Where Area1 is the equivalent gate-source capacitance area, Cgs1 is the first measured gate-source capacitance, and Cgs norm0 p0 is the reference capacitance per unit area, and p0 is the target gate-source capacitance area calibration parameter.

6. A device for measuring the background carrier concentration of a high electron mobility transistor, characterized in that, include: processor; Memory used to store processor-executable instructions; The processor is configured to perform a method for measuring the background carrier concentration of a high electron mobility transistor according to any one of claims 1 to 4.

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