A power consumption adjustment method and device, and a PCIe system

Abstract

The application provides a power consumption adjustment method, device and PCIe system. The method comprises the following steps: monitoring data flow and power consumption state of a target port of a PCIe device; determining an activity coefficient of the target port based on the data flow and the power consumption state; adjusting delay time of the target port in different power consumption states and / or adjusting the number of open physical channels of the target port based on the activity coefficient and the power consumption state. The technical scheme of the application improves the result of using power consumption to deduce a low-power-consumption activity coefficient. The finally obtained activity coefficient is positively correlated with power consumption, which can most accurately and intuitively count the power consumption state of the current link, so as to specify a low-power-consumption strategy in the next time slice.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of chips, and particularly relates to a power consumption adjustment method and device and a PCIe system. BACKGROUND

[0002] With the increasing requirements of modern computer systems on performance and power consumption, PCIe, as a high-bandwidth and low-latency interface standard, is widely used in various computer systems. The power consumption problem of a chip not only affects its performance, but also seriously affects its service life, especially in high-performance computing and data-intensive applications, power consumption control is crucial. SUMMARY

[0003] The application aims to provide a power consumption adjustment method and device and a PCIe system, and aims to solve the technical problem that the adjustment range of the prior art for the power consumption of a PCIe system is relatively single, and the system performance and energy efficiency cannot be optimized by dynamically adjusting the power consumption of the PCIe system.

[0004] According to a first aspect of the application, a power consumption adjustment method is provided, comprising:

[0005] monitoring the data flow and power consumption state of a target port of a PCIe device;

[0006] determining the activity coefficient of the target port based on the data flow and power consumption state;

[0007] adjusting the delay time of the target port in different power consumption states and / or adjusting the number of open physical channels of the target port based on the activity coefficient and power consumption state.

[0008] In an optional embodiment, determining the activity coefficient of the target port based on the data flow and power consumption state comprises:

[0009] dividing a preset time period into a plurality of time slices;

[0010] obtaining a low-power consumption coefficient in the power consumption state corresponding to the time slice, wherein the low-power consumption coefficient is determined in advance based on the actual power consumption of the target port in different power consumption states;

[0011] determining the activity coefficient of the target port in the preset time period based on the data flow corresponding to the time slice and the low-power consumption coefficient.

[0012] In an optional embodiment, adjusting the delay time of the target port in different power consumption states and / or adjusting the number of open physical channels of the target port based on the activity coefficient and power consumption state comprises:

[0013] determining a threshold interval in which the activity coefficient is located; wherein the threshold interval comprises a low threshold interval, a high threshold interval, and an intermediate threshold interval between the low threshold interval and the high threshold interval;

[0014] if the activity coefficient is in the intermediate threshold interval, adjusting a delay time of the target port in a low power consumption state;

[0015] if the activity coefficient is in the low threshold interval, reducing a transmission rate of the target port, and / or reducing a number of open physical lanes of the target port;

[0016] if the activity coefficient is in the high threshold interval, restoring the transmission rate of the target port to an original rate, and / or restoring the number of open physical lanes of the target port to an original number.

[0017] In an optional embodiment, adjusting the delay time of the target port in the low power consumption state comprises:

[0018] adjusting the delay time in the low power consumption state to a set time corresponding to the activity coefficient; wherein the set time corresponding to the activity coefficient of different gears is predetermined.

[0019] In an optional embodiment, the low power consumption state comprises a first low power consumption state and a second low power consumption state; the power consumption of the first low power consumption state is lower than the power consumption of the second low power consumption state; adjusting the delay time in the low power consumption state to the set time corresponding to the activity coefficient comprises:

[0020] if the target port has entered the first low power consumption state, adjusting the delay time of the target port in the first low power consumption state to the set time corresponding to the gear of the current activity coefficient corresponding to the first low power consumption state;

[0021] if the target port has not entered the first low power consumption state, adjusting the delay time of the target port in the second low power consumption state to the set time corresponding to the gear of the current activity coefficient corresponding to the second low power consumption state.

[0022] According to a second aspect of the present application, a power consumption adjustment device is provided, comprising:

[0023] a flow and power consumption detection module configured to monitor data flow and power consumption state of a target port of a PCIe device;

[0024] an activity coefficient determination module configured to determine an activity coefficient of the target port based on the data flow and power consumption state;

[0025] an adjusting module configured to adjust a delay time of the target port in different power consumption states and / or adjust an open physical channel number of the target port based on the activity coefficient and the power consumption state.

[0026] In an optional implementation, the activity coefficient determining module comprises:

[0027] a dividing sub-module configured to divide a preset time period into a plurality of time slices;

[0028] an obtaining sub-module configured to obtain a low power consumption coefficient in a power consumption state corresponding to the time slice; wherein the low power consumption coefficient is determined in advance based on actual power consumption of the target port in different power consumption states;

[0029] a first determining sub-module configured to determine the activity coefficient of the target port in the preset time period based on data traffic corresponding to the time slice and the low power consumption coefficient.

[0030] In an optional implementation, the adjusting module comprises:

[0031] a second determining sub-module configured to determine a threshold interval in which the activity coefficient is located; wherein the threshold interval comprises a low threshold interval, a high threshold interval and an intermediate threshold interval between the low threshold interval and the high threshold interval;

[0032] a first adjusting sub-module configured to adjust a delay time of the target port in a low power consumption state if the activity coefficient is in the intermediate threshold interval;

[0033] a second adjusting sub-module configured to reduce a transmission rate of the target port and / or reduce an open physical channel number of the target port if the activity coefficient is in the low threshold interval;

[0034] a third adjusting sub-module configured to restore the transmission rate of the target port to an original rate and / or restore the open physical channel number of the target port to an original number if the activity coefficient is in the high threshold interval.

[0035] In an optional implementation, the first adjusting sub-module comprises:

[0036] a fourth adjusting sub-module configured to adjust the delay time in the low power consumption state to a set time corresponding to the activity coefficient; wherein the set time corresponding to the activity coefficient of different gears is determined in advance.

[0037] In an optional implementation, the low-power state includes a first low-power state and a second low-power state; the power consumption of the first low-power state is lower than the power consumption of the second low-power state; the fourth adjusting sub-module includes:

[0038] The fifth adjusting sub-module is configured to, if the target port has entered the first low-power state, adjust the delay time of the target port in the first low-power state to the set time corresponding to the gear in which the current activity coefficient is located;

[0039] The sixth adjusting sub-module is configured to, if the target port has not entered the first low-power state, adjust the delay time of the target port in the second low-power state to the set time corresponding to the gear in which the current activity coefficient is located.

[0040] According to a third aspect of the present application, a PCIe system is provided, including the power consumption adjusting apparatus according to the second aspect.

[0041] Compared with the related art, the technical solution of the present application has the following advantages:

[0042] The embodiments of the present application directly use the result of power consumption to deduce the low-power activity coefficient, and the finally obtained activity coefficient is positively correlated with the power consumption, so that the power consumption state of the current link can be most accurately and most intuitively counted, and the low-power strategy in the next time slice can be specified.

[0043] The present application proposes a method of dynamically controlling the power consumption of each Port by monitoring the data traffic transmitted by each independent Port in a unit time and the time in the low-power state in a unit time, solving the problem that in the PCIe system power consumption, the data transmission states of each Port are different, but the initialization of the low-power time is uniformly set to a fixed value, the bandwidth of the link and the initialization of the link rate are set to fixed values, and the method of saving power consumption by individually adjusting according to the state of each Port is not considered.

[0044] The present application proposes a complete set of methods of setting the activity of a single Port and the corresponding high threshold and low threshold to dynamically adjust the power consumption of the Port, including speed reduction and Lane reduction operations on the inactive Port, dynamic adjustment of the low-power state time control, so as to dynamically adjust the power consumption of the PCIe system without affecting the normal data service transmission.

[0045] The present application proposes a method of configuring the time gradient in the PCIe system power consumption, which can dynamically configure the time unit according to different application scenarios, so as to more effectively optimize the system power consumption for different landing scenarios, and adapt to the diversified business scenario requirements.

[0046] Other features and advantages of the present application will be set forth in the following description, and in part will be apparent from the description, or can be learned by practice of the application. The objects and other advantages of the present application will be realized and attained by the structure and processes particularly pointed out in the description and claims hereof. BRIEF DESCRIPTION OF DRAWINGS

[0047] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related art, the following will briefly introduce the drawings needed to be used in the embodiments or the related art description. Obviously, the drawings described below are some embodiments of the present application, and the ordinary skilled in the art can obtain other drawings according to these drawings without any creative effort.

[0048] Figure 1 is a structural block diagram of a PCIe system according to the related art.

[0049] Figure 2 is a flowchart of a power consumption adjustment method according to an exemplary embodiment of the present application.

[0050] Figure 3 is a structural block diagram of a PCIe system according to an exemplary embodiment of the present application.

[0051] Figure 4 is an effect diagram of different processing modes of different activity coefficients of target ports according to an exemplary embodiment of the present application.

[0052] Figure 5 is a flowchart of an implementation of a power consumption adjustment method according to an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0053] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the following will combine the drawings in the embodiments of the present application to clearly and completely explain the technical solutions in the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by the ordinary skilled in the art without any creative effort are within the protection scope of the present application.

[0054] PCIe (Peripheral Component Interconnect Express) systems have multiple power management states, ASPM (Active State Power Management), to optimize device performance under different workloads. ASPM mainly reduces overall power consumption by automatically adjusting the power state of the link when it is idle. The power management method in related technologies mainly relies on fixed time thresholds to determine when to switch the link to a low-power state, such as L0s or L1. Specifically, when the link detects a certain period of inactivity, the system automatically switches it to the L0s or L1 state, thereby reducing power consumption.

[0055] L0s state: L0s state is one of the low-power states of PCIe link, which allows the link to enter low-power mode for a short time to reduce power consumption. In this state, part of the link's functionality is turned off, but the system can quickly recover to full-speed transmission mode.

[0056] L1 state: L1 state is a deeper low-power state, with lower power consumption than L0s state, but it takes longer to recover to normal operating state. In L1 state, more functions of the link are turned off to achieve greater power reduction.

[0057] PCIe link bandwidth refers to the amount of data that a PCIe port can transmit per unit time, which depends on the number of lanes and the transmission rate of each lane. PCIe link is composed of one or more lanes, each providing a certain data transmission rate in a single direction. Different versions of PCIe standard define different per-lane bandwidth, so the total bandwidth increases with the upgrade of PCIe version.

[0058] PCIe link rate is a core indicator of data transmission performance, which, together with link width (i.e., the number of lanes), determines the total bandwidth of the PCIe interface. With the continuous evolution of PCIe standards, link rate is also continuously improving to meet the growing performance demands. From PCIe 1.0 to PCIe 6.0, each version has significantly enhanced data transmission capabilities, supporting higher bandwidth devices and applications.

[0059] Figure 1is a structural diagram of a PCIe system according to the related art, which contains 8 ports, Port_0 to Port_7, each group of ports works independently and does not affect each other, under the system, the data flow transmitted by each port is different due to the different states of the output transmission, the initialization time of the multi-port entering the low-power state according to the related art is a fixed value, and the rate width of the link is also a fixed value.

[0060] Although the ASPM method of the related art effectively reduces power consumption, there are still some deficiencies. The main problem is that the methods are usually based on fixed time thresholds, and lack of adaptive adjustment for each port (Port) and link state. The same problem exists for the rate and bandwidth of the link, which are configured as a fixed value at the beginning of the link transmission, and do not change the rate and width of the link with the power consumption state of the link. This fixed strategy can lead to low power consumption management efficiency, thereby increasing additional power consumption and affecting the energy consumption and reliability of the system.

[0061] As described above, the related art allows the device to request the link channel to enter the low-power state (L0s, L1) after the link is idle for a period of time, using a static idle time. When the PCIe link reaches the idle time of LOs, the link initiates to enter the L0s low-power state, and when the link reaches the idle time of L1, the link initiates to enter the L1 low-power state. When the device needs to send data, it initiates a request to exit from the LOs or L1 state, thereby achieving the purpose of reducing power consumption. In the fixed time threshold strategy, if the time for the link to enter the low-power state is too short, the system may frequently switch states, thereby causing unnecessary resource waste and performance degradation. If the time for the link to enter the low-power state is too long, the overly conservative power consumption management strategy can cause the link to consume more power, thereby failing to fully utilize the power consumption optimization effect brought by the low-power state.

[0062] There is a related art that adjusts the time threshold by predicting the historical data of the link in PCIe ASPM, thereby adjusting the time of entering and exiting the low-power state. This scheme adjusts the time threshold and optimizes the fixed time strategy of ASPM, but the related art still has the following two problems:

[0063] (1) The data type extracted by the prediction model in the method is single: the data type includes the number of data packets, the average value of the time interval of adjacent data packets, and other parameters. These parameters can only quantitatively analyze the data of the link, and the throughput of the link data transmission is not counted, and the time of the link in different time slices in different low-power states has a strong correlation with the actual power consumption of the link. The two kinds of data can more truly reflect the actual transmission of the link and the model prediction of the current power consumption of the link;

[0064] (2) The adjustment range of the power consumption of the entire PCIe system is single: since PCIe is a systematic solution, it is often divided into multiple ports during link transmission application. The rate and width of each port have a great influence on the power consumption of the system. Only adjusting the time of each port entering the low-power LoS / L1 state is limited for power consumption optimization of the system. The width of the entire system port and the rate and time of each port entering the low-power state need to be combined to dynamically control the low power consumption of the PCIe system from the system, so as to significantly reduce the effect of low power consumption management of the system.

[0065] Based on the above analysis, the application exemplarily proposes a power consumption adjustment method, device and PCIe system. Unlike the global power consumption management of the related art, the application emphasizes independent power consumption management of each PCIe port (Port). Each Port can be individually adjusted according to its actual data flow and power consumption state. This independent management method can more accurately control the power consumption of each Port, thereby improving the overall energy efficiency.

[0066] Referring to Figure 2 The application exemplarily proposes a power consumption adjustment method, including the following steps:

[0067] In step S201, the data flow and power consumption state of the target port of the PCIe device are monitored.

[0068] In step S202, the activity coefficient of the target port is determined based on the data flow and power consumption state.

[0069] In step S203, the delay time of the target port in different power consumption states is adjusted, and / or the number of open physical channels of the target port is adjusted based on the activity coefficient and the power consumption state.

[0070] Exemplarily, the target port can be any port (Port) in a PCIe system. The data flow of the target port can be understood as the throughput of the target port in a preset time period. The power consumption state can include a low power consumption state, a high power consumption state, etc. The present application can be based on the power consumption state modes in the prior art, such as the power consumption states in the prior art including LOs, ASPM L1.0 / L1.1 / L1.2, PCI-PM L1, L2 and L3, a total of 7 kinds, and ASPM L1.0 and PCI-PM L1 are only different in the way of entering L1, but the optimization of power consumption after entering L1 is the same, so the present application can combine them, and finally there are L0s, L1, L1.1, L1.2, L2, L3, a total of 6 kinds of power consumption states.

[0071] Exemplarily, the present application can sample the low power consumption state configuration of ASPM, that is, according to the activity of each Port, the entering time of entering the low power consumption state of ASPM is dynamically adjusted. For example, when the Port is in an idle state for a period of time, the delay time for entering the low power consumption mode of ASPM can be configured to be low, so that the low power consumption state can be entered faster; when the Port needs to process a large amount of data, it is restored to the normal working state, and the delay time for entering the low power consumption mode of ASPM is configured to be high, so that more time for data transmission can be allowed.

[0072] Exemplarily, the activity coefficient is calculated for a single Port, and the activity coefficient Actice_value is a key indicator for measuring the data processing capacity and power consumption demand of the Port. The activity coefficient Actice_value of a single Port can be understood as the data flow of the Port in a unit of time and the proportion of time that the Port is in a power consumption state, and these two factors jointly determine the power consumption management strategy of the Port.

[0073] Exemplarily, the present application solves the problems of the related art, such as the single data type, and extracts the data type including the throughput of the current link transmission, that is, the data flow, the number of times of entering and exiting the low power consumption state in a period of time, and the time of the current time period in the low power consumption state. These data can better reflect the actual transmission situation of the link, so as to dynamically adjust the entering time of the low power consumption state according to the activity of the current link.

[0074] Exemplarily, such as the problem of single adjustment range of the power consumption of the entire PCIe system, the present application combines the bandwidth of the Port of the entire system and the rate of each Port with the time management of entering the low power consumption state according to the activity coefficient Actice_value of the link, thereby increasing the function of dynamically adjusting the bandwidth and rate of the link according to the activity of the current link.

[0075] Exemplarily, the application sets different weights for different low-power states according to the data traffic transmitted by each Port in a unit time slice and the different low-power states in the unit time slice, and calculates the activity coefficient Active_value of each Port _ value, sets a dynamic range according to the activity coefficient, and dynamically adjusts the link in the following aspects under the premise of ensuring the integrity of data service transmission:

[0076] Rising and falling speed configuration: dynamically adjusts the transmission rate of the PCIe link according to the change of the activity coefficient Active_value. For example, when the data traffic is low, the speed of the link can be reduced to reduce power consumption; when the data traffic increases, the speed of the link is increased to meet the performance requirements. -

[0077] Rising and falling Lane configuration: optimize power consumption by adjusting the number of Lanes (physical channels) of the link. For example, in the case of low activity coefficient, the number of Lanes turned on can be reduced to reduce power consumption; in the case of high activity coefficient Active_value, the number of Lanes turned on is increased to increase the bandwidth and performance. The number of Lanes turned on (i.e. the number of physical channels turned on) can be understood as the number of physical channels configured for the link that can transmit signals. The number of physical channels configured for the link that can transmit signals can be dynamically adjusted based on the power consumption state and the activity coefficient.

[0078] When the activity of the link recovers after a period of time, the above link state recovery is performed on the link again, so as to achieve the method of adaptively adjusting the dynamic power consumption of the system.

[0079] In some optional implementations, the step S202, i.e. the step of determining the activity coefficient of the target Port based on the data traffic and the power consumption state, comprises:

[0080] dividing a preset time period into a plurality of time slices;

[0081] obtaining the low-power coefficient in the power consumption state corresponding to the time slice; wherein the low-power coefficient is determined in advance based on the actual power consumption of the target Port in different power consumption states;

[0082] determining the activity coefficient of the target Port in the preset time period based on the data traffic corresponding to the time slice and the low-power coefficient.

[0083] Exemplarily, Figure 3 is a structural block diagram of a PCIe system according to the application, in which Figure 1 ​On the basis of the original system, power consumption adjustment device is added to monitor the data flow transmitted by each independent Port in unit time, the time in low power consumption state in unit time and the number of entering and exiting low power consumption state.

[0084] The data flow transmitted by single Port in unit time is Throughput, the greater the value of T, the more active the Port. In addition to the statistics of single Port data flow Throughput, the time of single Port in low power consumption state is also counted, that is, the time of L0, L1, L1.1, L1.2, L2 and L3, a total of 6 low power consumption states. According to the power consumption statistics results of simulation data of different mode low power consumption state power consumption under 2Gbps rate, the low power consumption coefficient k of each low power consumption state is determined according to the percentage of real-time power consumption consumption of each low power consumption state to L0 state, as shown in the following table 1:

[0085] Table 1

[0086]

[0087]

[0088] In table 1, the power consumption of each link is shown, and the low power consumption coefficient k is the coefficient obtained by normalizing the power consumption of each link in low power consumption state. For example, the coefficient corresponding to 950 power consumption in LO state is 1, and the coefficients corresponding to the power consumption in other power consumption states are less than 1.

[0089] According to the low power consumption state of the above link in unit time, the time can be divided into 1 to n equal time slices. The final judgment of the activity coefficient Active v alue of single link is:

[0090]

[0091] In the above formula, n represents the number of time slices into which the preset time period is divided. For example, if the preset time period is 1 hour, and it is cut into 10 minutes, then n is 6; k represents the low power consumption coefficient in different low power consumption states, and the corresponding relationship between specific low power consumption state and low power consumption coefficient is shown in table 1, which comes from the actual monitoring results in PCIe system; T represents the data amount transmitted by each Port in the current time slice, which is also the actual monitoring result; according to the above formula, the activity coefficient Active_value of each Port can be obtained, so that subsequent systematic processing can be carried out according to the activity coefficient; the higher the activity coefficient Active_value, the greater the power consumption of the link should be.

[0092] As shown in the following table 2, the data flow transmitted by Port _0 are in L0 state, assume 1Mb data is transmitted in each time slice, so Port _ 0 the low power active factor in this time period is 6; finally all the ports will generate a time slice based active factor based on their own data traffic:

[0093] Table 2

[0094]

[0095]

[0096] In some optional implementations, the step S203, i.e. the step of adjusting the delay time of the target port in different power consumption states and / or adjusting the number of open physical channels of the target port based on the active factor and the power consumption state, comprises:

[0097] determining a threshold interval in which the active factor is located; wherein the threshold interval comprises a low threshold interval, a high threshold interval and an intermediate threshold interval between the low threshold interval and the high threshold interval;

[0098] if the active factor is in the intermediate threshold interval, adjusting the delay time of the target port in the low power consumption state;

[0099] if the active factor is in the low threshold interval, reducing the transmission rate of the target port and / or reducing the number of open physical channels of the target port;

[0100] if the active factor is in the high threshold interval, restoring the transmission rate of the target port to the original rate and / or restoring the number of open physical channels of the target port to the original number.

[0101] Exemplarily, the present application further sets high threshold and low threshold standards, thereby dividing the high threshold interval, the low threshold interval and the intermediate threshold interval between the low threshold interval and the high threshold interval of the active factor based on the high threshold and the low threshold; the threshold intervals are used to indicate the working state of the port and the basis for adjusting the power consumption strategy.

[0102] First, the calculated active factors Actice _ value of each port are normalized, and the range of the active factor of a single port is defined as 0 to 1, wherein 0 represents that the port is completely inactive (i.e. the data traffic is extremely low and the port is in the low power consumption state for a long time), and 1 represents that the data traffic of the port in a unit time reaches the maximum value. Exemplarily, see Figure 4As shown, the high threshold value and the low threshold value are set to 0.7 and 0.3 respectively, and the two threshold values are used to define the high load state and the low load state of the Port respectively. Among them, less than 0.3 represents the low threshold value interval, greater than 0.7 represents the high threshold value interval, and 0.3 to 0.7 is the intermediate threshold value interval.

[0103] For example, referring to Figure 5 As shown, when the activity of the Port is between the low threshold value and the high threshold value, that is, in the intermediate threshold value interval ① in Figure 4 , the delay time for the Port to enter the low power state can be adjusted according to the actual activity coefficient. For example, when the activity coefficient is close to the low threshold value, the activity state of the Port is low, and the delay time for entering the low power state can be reduced to reduce power consumption.

[0104] On the other hand, when the activity of the Port is lower than the low threshold value, that is, in the low threshold value interval, it means that the data display throughput of the Port is low, and the Port is in the low power state for a long time. At this time, in order to further reduce the power consumption of the Port, speed reduction and Lane reduction operations can be taken. The speed reduction operation refers to reducing the transmission rate of the PCIe link, such as sequentially reducing from 32 Gb of gen 5 to 16 Gb, 8 Gb, 5 Gb, 2.5 Gb, thereby reducing power consumption; and the Lane reduction operation refers to reducing the number of lanes of the link, such as sequentially reducing from X8 mode to X4, X2, X1 to further reduce power consumption, that is, the low threshold value interval ② in Figure 4 . With the recovery of data transmission, the activity will gradually increase, and the system will dynamically adjust the delay time for entering the low power state according to the new activity coefficient, thereby returning to the intermediate threshold value interval ①. It can be understood that before the speed reduction or Lane reduction operation, it can be judged whether the target port has started the speed reduction or Lane reduction, and if it has started, the speed reduction or Lane reduction operation can not be performed.

[0105] Correspondingly, when the activity of the Port is higher than the high threshold value, that is, in the high threshold value interval, it means that the data display throughput of the Port is high, and it has not entered the low power state for a long time. In this case, for example, the system can increase the rate of the link to 32 Gb of gen 5 (32 Gb of gen 5 is the transmission rate of the link in the normal state, that is, the original rate, and the transmission rate before the increase is the rate after the speed reduction of the link after entering the low threshold value interval), and increase the number of lanes of the link to X8 mode (the number of physical channels in X8 mode is 8, which is the number of physical channels in the normal state of the link, that is, the original number, and the number of physical channels before the increase is the number of physical channels after the Lane reduction of the link after entering the low threshold value interval), to ensure the efficiency of data transmission, to meet the needs of high load data transmission, that is, Figure 4high threshold interval ③. Increasing the link rate and the number of lanes can improve data transmission performance, but after data transmission is completed, the activity level will decrease, and the system will dynamically adjust the time to enter the low-power state again according to the current activity level, i.e. Figure 4 the middle threshold interval ①. In this way, the system ensures sufficient bandwidth in high-load situations and optimizes power consumption configuration again after the load decreases.

[0106] In summary, by defining and managing the activity level of a single Port in detail, combined with high and low threshold standards, precise power consumption control can be achieved. This method not only improves the energy efficiency of the system, but also ensures the stability and reliability of data transmission. In practical applications, the system will dynamically adjust the power consumption state of the Port according to its real-time activity level to optimize performance and power consumption effects, thus meeting the dual demands of high efficiency and low power consumption of modern computer systems.

[0107] In some optional implementations, the step of adjusting the delay time of the target port in the low-power state includes:

[0108] adjusting the delay time in the low-power state to a set time corresponding to the activity level coefficient; wherein the set time corresponding to the activity level coefficient of different gears is predetermined.

[0109] For example, for the middle threshold interval, the activity level coefficient of different gears can be pre-set to correspond to different set times, so that when dynamically adjusting power consumption, if the activity level coefficient is in the middle threshold interval, the delay time for the Port to enter the low-power state can be set to the corresponding set time predetermined based on the gear of the activity level coefficient.

[0110] In some optional implementations, the low-power state includes a first low-power state and a second low-power state; the power consumption of the first low-power state is lower than that of the second low-power state; the step of adjusting the delay time in the low-power state to the set time corresponding to the activity level coefficient includes:

[0111] if the target port has entered the first low-power state, adjusting the delay time of the target port in the first low-power state to the set time corresponding to the first low-power state under the current gear of the activity level coefficient;

[0112] if the target port has not entered the first low-power state, adjusting the delay time of the target port in the second low-power state to the set time corresponding to the second low-power state under the current gear of the activity level coefficient.

[0113] Exemplarily, since the PCIE protocol stipulates that the hardware will automatically enter the L0s or L1 state after being idle for a period of time in the L0 state, the first low-power state can be the L1 state, and the second low-power state can be the L0s state. Figure 4 The activity coefficient Active _ value and the parameter setting of the latency time for entering L0s and L1 are shown in Table 3, where L0s_latency is the latency time of the L0s state, and L1s_latency is the latency time of the L1 state.

[0114] Table 3

[0115] Active_value L0s_latency L1_latency 0～0.3 1us 1us 0.3～0.4 2us 4us 0.4～0.5 4us 8us 0.5～0.6 5us 16us 0.6～0.7 6us 32us 0.7～1.0 7us 64us

[0116] Since the PCIe system is arranged in a large amount in a core network such as a data center, and the data center has a strong periodicity when processing data, a large amount of data transmission is often performed during the day, and less data transmission is performed at night, so the time slice can be divided by 12 hours (half a day) as a gradient, and the periodicity of data transmission can be dynamically adjusted in the later period.

[0117] It can be seen that the power consumption adjustment method proposed in the present application has the following advantages compared with the related art:

[0118] The present application directly uses the result of power consumption to deduce the low-power activity coefficient, and the finally obtained activity coefficient is positively correlated with the power consumption, so that the power consumption state of the current link can be most accurately and most intuitively counted, thereby specifying the low-power strategy in the next time slice.

[0119] The present application proposes a method of dynamically controlling the power consumption of each Port by monitoring the data traffic transmitted by each independent Port in a unit time and the time spent in the low-power state in a unit time, which solves the problem that in the PCIe system power consumption, the data transmission states of each Port are different, but the initialization of the low-power time is uniformly set to a fixed value, the bandwidth of the link and the initialization of the link rate are set to fixed values, and the method of saving power by individually adjusting each Port state is not considered.

[0120] The present application proposes a complete set of methods for dynamically adjusting the power consumption of a Port by setting a corresponding high threshold and a low threshold, including speed reduction and Lane reduction operations on an inactive Port, dynamic adjustment of the low-power state time control, so as to dynamically adjust the power consumption of the PCIe system without affecting the normal data service transmission.

[0121] The application provides a method for configuring a time gradient in PCIe system power consumption, which can dynamically configure a time unit according to different application scenarios, thereby optimizing system power consumption more effectively for different landing scenarios, and adapting to diversified business scenario requirements.

[0122] Simulation verification shows that the working frequency of a single-lane PCIe system is reduced from 32G to 2.5G, and the system power consumption is reduced by 30%; after a single-lane PCIe system enters an L1 mode from a normal mode, the system power consumption is reduced by 90%, and the scheme can significantly reduce power consumption.

[0123] Correspondingly, the application provides, in a second aspect, a power consumption adjustment device, which comprises:

[0124] a traffic and power consumption detection module configured to monitor data traffic and power consumption status of a target port of a PCIe device;

[0125] an activity coefficient determination module configured to determine an activity coefficient of the target port based on the data traffic and power consumption status;

[0126] an adjustment module configured to adjust a delay time of the target port in different power consumption states and / or adjust an open physical channel number of the target port based on the activity coefficient and power consumption status.

[0127] In some optional implementation manners, the activity coefficient determination module comprises:

[0128] a division sub-module configured to divide a preset time period into a plurality of time slices;

[0129] an acquisition sub-module configured to acquire a low-power consumption coefficient in a power consumption state corresponding to the time slice; wherein the low-power consumption coefficient is determined in advance based on actual power consumption of the target port in different power consumption states;

[0130] a first determination sub-module configured to determine an activity coefficient of the target port in the preset time period based on data traffic corresponding to the time slice and the low-power consumption coefficient.

[0131] In some optional implementation manners, the adjustment module comprises:

[0132] a second determination sub-module configured to determine a threshold interval in which the activity coefficient is located; wherein the threshold interval comprises a low threshold interval, a high threshold interval and an intermediate threshold interval located between the low threshold interval and the high threshold interval;

[0133] a first adjustment sub-module configured to adjust a delay time of the target port in a low-power consumption state if the activity coefficient is located in the intermediate threshold interval.

[0134] a second adjusting sub-module, configured to reduce the transmission rate of the target port and / or reduce the number of open physical channels of the target port if the activity coefficient is in the low threshold interval;

[0135] a third adjusting sub-module, configured to restore the transmission rate of the target port to the original rate and / or restore the number of open physical channels of the target port to the original number if the activity coefficient is in the high threshold interval.

[0136] In some optional implementation manners, the first adjusting sub-module comprises:

[0137] a fourth adjusting sub-module, configured to adjust the delay time in the low power consumption state to a set time corresponding to the activity coefficient; wherein the set time corresponding to the activity coefficient of different gears is predetermined.

[0138] In some optional implementation manners, the low power consumption state comprises a first low power consumption state and a second low power consumption state; the power consumption of the first low power consumption state is lower than that of the second low power consumption state; and the fourth adjusting sub-module comprises:

[0139] a fifth adjusting sub-module, configured to, if the target port has entered the first low power consumption state, adjust the delay time of the target port in the first low power consumption state to the set time corresponding to the gear of the current activity coefficient corresponding to the first low power consumption state.

[0140] a sixth adjusting sub-module, configured to, if the target port has not entered the first low power consumption state, adjust the delay time of the target port in the second low power consumption state to the set time corresponding to the gear of the current activity coefficient corresponding to the second low power consumption state.

[0141] The power consumption adjustment method provided by the above embodiment is realized by the power consumption adjustment device, and the specific details of the power consumption adjustment device can be referred to the description of the power consumption adjustment method in the above embodiment, which will not be described here.

[0142] It can be understood that the power consumption adjustment device can be realized by hardware or software. Considering the efficiency and other aspects, the power consumption adjustment device can be realized by hardware. It can be understood that the modules or sub-modules included in the power consumption adjustment device in the above embodiment do not necessarily be realized as separate modules, and the above modules and / or sub-modules can be realized as one hardware module on hardware. Of course, the above modules or sub-modules can also be realized as one hardware module or multiple hardware modules on hardware, and the specific implementation can be determined according to actual implementation, which is not limited in the present application.

[0143] Accordingly, the present application provides, in a third aspect, a PCIe system comprising the power consumption adjustment apparatus as provided in the above embodiments. It can be understood that in the PCIe system, the power consumption adjustment apparatus can be implemented by hardware.

[0144] It can be understood that the circuit structures, names and parameters described in the above embodiments are only examples. Those skilled in the art can also make easy combinations and adjustments of the structural features of the above multiple embodiments according to the use needs, and the concept of the present application should not be limited to the specific details of the above examples.

[0145] Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can make modifications to the technical solutions recorded in the foregoing embodiments, or make equivalent replacements to part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A power consumption adjustment method, characterized by, The method comprises: monitoring data traffic of a target port of a PCIe device and actual power consumption of the target port in different power consumption states; determining an activity coefficient of the target port based on the data traffic, the actual power consumption, and a predetermined low-power consumption coefficient, wherein the low-power consumption coefficient is obtained by normalizing the actual power consumption of the target port in different power consumption states, and the activity coefficient is positively correlated with the actual power consumption of the target port; adjusting a delay time of the target port in different power consumption states and an open physical channel number of the target port based on a threshold interval in which the activity coefficient is located and the power consumption state, wherein the threshold interval comprises a low threshold interval, a high threshold interval, and an intermediate threshold interval between the low threshold interval and the high threshold interval; if the activity coefficient is in the intermediate threshold interval, adjusting the delay time of the target port in a low-power consumption state; if the activity coefficient is in the low threshold interval, reducing a transmission rate of the target port and / or reducing the open physical channel number of the target port; if the activity coefficient is in the high threshold interval, restoring the transmission rate of the target port to an original rate and / or restoring the open physical channel number of the target port to an original number; wherein adjusting the delay time of the target port in the low-power consumption state comprises: adjusting the delay time in the low-power consumption state to a set time corresponding to the activity coefficient, wherein the set time corresponding to the activity coefficient in different gears is predetermined.

2. The power consumption adjustment method according to claim 1, wherein The low-power consumption state comprises a first low-power consumption state and a second low-power consumption state, and the power consumption of the first low-power consumption state is lower than that of the second low-power consumption state. Adjusting the delay time in the low-power consumption state to the set time corresponding to the activity coefficient comprises: if the target port has entered the first low-power consumption state, adjusting the delay time of the target port in the first low-power consumption state to the set time corresponding to the activity coefficient in the gear in which the current activity coefficient is located; if the target port has not entered the first low-power consumption state, adjusting the delay time of the target port in the second low-power consumption state to the set time corresponding to the activity coefficient in the gear in which the current activity coefficient is located.

3. A power consumption adjustment apparatus characterized by comprising: The method comprises: a traffic and power consumption detection module configured to monitor data traffic of a target port of a PCIe device and actual power consumption of the target port in different power consumption states; an activity coefficient determination module configured to determine an activity coefficient of the target port based on the data traffic, the actual power consumption, and a predetermined low-power consumption coefficient, wherein the low-power consumption coefficient is obtained by normalizing the actual power consumption of the target port in different power consumption states, and the activity coefficient is positively correlated with the actual power consumption of the target port; adjusting a delay time of the target port in a low power consumption state and a number of open physical channels of the target port based on a threshold interval in which the activity coefficient is located and the power consumption state, wherein the threshold interval comprises a low threshold interval, a high threshold interval and an intermediate threshold interval between the low threshold interval and the high threshold interval; if the activity coefficient is located in the intermediate threshold interval, adjusting the delay time of the target port in the low power consumption state; if the activity coefficient is located in the low threshold interval, reducing a transmission rate of the target port and / or reducing the number of open physical channels of the target port; if the activity coefficient is located in the high threshold interval, restoring the transmission rate of the target port to an original rate and / or restoring the number of open physical channels of the target port to an original number; wherein the adjusting the delay time of the target port in the low power consumption state is implemented as: adjusting the delay time in the low power consumption state to a set time corresponding to the activity coefficient; wherein the set time corresponding to the activity coefficient of different gears is predetermined.

4. The power consumption adjustment apparatus according to claim 3, wherein the low power consumption state comprises a first low power consumption state and a second low power consumption state; the power consumption of the first low power consumption state is lower than that of the second low power consumption state; the adjusting the delay time in the low power consumption state to the set time corresponding to the activity coefficient is implemented as: if the target port has entered the first low power consumption state, adjusting the delay time of the target port in the first low power consumption state to the set time corresponding to the activity coefficient in the gear in which the current activity coefficient is located; if the target port has not entered the first low power consumption state, adjusting the delay time of the target port in the second low power consumption state to the set time corresponding to the activity coefficient in the gear in which the current activity coefficient is located.

5. A PCIe system, characterized by, comprise: the power consumption adjusting apparatus according to any one of claims 3-4.

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