Method of determining gate voltage of display device

Abstract

A method of determining a gate voltage of a display device is disclosed. The method includes determining a gamma reference voltage including a black data voltage by performing a plurality of programming operations on the display device; providing copy blackspot mode data to the display device; obtaining a brightness curve of the gate voltage by measuring brightness of the display device while gradually changing the gate voltage; determining a peak grid voltage corresponding to a peak point of the brightness curve; and determining a final gate voltage based on the black data voltage and the peak gate voltage.

Description

Technical Field

[0001] Embodiments of the present invention relate to a display device, and more particularly, to a method of determining a gate voltage of a display device. Background Art

[0002] The display device may include a display panel including a plurality of pixels, a data driver providing a data voltage to the plurality of pixels, and a gate driver providing a gate signal to the plurality of pixels. Each pixel in the selected pixel row may receive a data voltage in response to a gate signal having an effective gate voltage (e.g., a low gate voltage), and may emit light based on the data voltage. In addition, each pixel in an unselected pixel row may receive a gate signal having an ineffective gate voltage (e.g., a high gate voltage), and may not receive a data voltage for a pixel in the selected pixel row based on the gate signal having an ineffective gate voltage. Summary of the invention

[0003] In a display device, if a non-effective gate voltage (e.g., a high gate voltage) of a gate signal is not sufficiently higher than a data voltage, or if a threshold voltage of a transistor of a pixel in an unselected pixel row is offset, the data voltage may be undesirably applied to the pixels in the unselected pixel row, and a mura defect may occur in which an image for a selected pixel row is displayed in the unselected pixel row.

[0004] Some embodiments provide a method of determining a gate voltage capable of preventing a replica spot defect.

[0005] Some embodiments provide a display device capable of preventing a replication mark defect.

[0006] According to an embodiment, a method for determining a gate voltage of a display device includes: determining a gamma reference voltage including a black data voltage by performing a multiple programming (MTP) operation on the display device; providing replica streak pattern data to the display device; obtaining a brightness curve of the gate voltage by measuring the brightness of the display device while gradually changing the gate voltage; determining a peak gate voltage corresponding to a peak point of the brightness curve; and determining a final gate voltage based on the black data voltage and the peak gate voltage.

[0007] In an embodiment, the replica mark pattern data may be image data causing a replica mark defect to occur in the display device when the gate voltage is lower than the peak gate voltage.

[0008] In an embodiment, the replica stain pattern data may include black image data and image data, wherein the black image data represents a gray level of 0 relative to at least one of an upper area and a lower area of ​​a display panel selected from the display device, and the image data represents a gray level higher than the 0 gray level relative to a middle area of ​​the display panel.

[0009] In an embodiment, the brightness curve of the gate voltage may be obtained by measuring the brightness of the display device while gradually decreasing the gate voltage at constant voltage intervals from a highest gate voltage.

[0010] In an embodiment, the brightness curve of the gate voltage may be obtained by measuring the brightness of the display device while gradually increasing the gate voltage at constant voltage intervals from a lowest gate voltage.

[0011] In an embodiment, the brightness curve of the gate voltage may be obtained by using a brightness measurement device, the brightness measurement device being used to perform the MTP operation.

[0012] In an embodiment, the peak gate voltage and the black data voltage may be compared.

[0013] In an embodiment, determining the final gate voltage may include: when the peak gate voltage is less than or equal to the black data voltage, determining the final gate voltage as a default gate voltage; and when the peak gate voltage is greater than the black data voltage, determining the final gate voltage based on the default gate voltage and the difference between the peak gate voltage and the black data voltage.

[0014] In an embodiment, the default gate voltage may correspond to a sum of the black data voltage and a default voltage margin.

[0015] In an embodiment, when the peak gate voltage is greater than the black data voltage, the final gate voltage may be determined by adding the difference between the peak gate voltage and the black data voltage to the default gate voltage.

[0016] According to an embodiment, a display device includes: a display panel including a plurality of pixels; a gamma reference voltage generator configured to generate a gamma reference voltage including a black data voltage; a data driver configured to provide a data voltage to the plurality of pixels based on the gamma reference voltage; and a gate driver configured to provide a gate signal having a final gate voltage to the plurality of pixels. In such an embodiment, the gamma reference voltage is determined by performing a multiple programming (MTP) operation on the display device. In such an embodiment, replicated streak pattern data is provided to the display device, the brightness of the display device is measured while gradually changing the gate voltage, and a brightness curve of the gate voltage is obtained. In such an embodiment, the final gate voltage is determined based on the black data voltage and a peak gate voltage corresponding to a peak point of the brightness curve.

[0017] In an embodiment, the replica mark pattern data may be image data causing a replica mark defect to occur in the display device when the gate voltage is lower than the peak gate voltage.

[0018] In an embodiment, the replica stain pattern data may include black image data representing a grayscale of 0 relative to at least one of an upper area and a lower area of ​​a display panel selected from the display device, and image data representing a grayscale higher than the grayscale of 0 relative to a middle area of ​​the display panel.

[0019] In an embodiment, the brightness curve of the gate voltage may be obtained by measuring the brightness of the display device while gradually decreasing the gate voltage at constant voltage intervals from a highest gate voltage.

[0020] In an embodiment, the brightness curve of the gate voltage may be obtained by measuring the brightness of the display device while gradually increasing the gate voltage at constant voltage intervals from a lowest gate voltage.

[0021] In an embodiment, the brightness curve of the gate voltage may be obtained by using a brightness measurement device, the brightness measurement device being used to perform the MTP operation.

[0022] In an embodiment, the final gate voltage may be determined by comparing the peak gate voltage and the black data voltage.

[0023] In an embodiment, when the peak gate voltage is less than or equal to the black data voltage, the final gate voltage can be determined as a default gate voltage, and when the peak gate voltage is greater than the black data voltage, the final gate voltage can be determined based on the default gate voltage and the difference between the peak gate voltage and the black data voltage.

[0024] In an embodiment, the default gate voltage may correspond to a sum of the black data voltage and a default voltage margin.

[0025] In an embodiment, when the peak gate voltage is greater than the black data voltage, the final gate voltage may be determined by adding the difference between the peak gate voltage and the black data voltage to the default gate voltage.

[0026] As described above, in the method for determining the gate voltage and the display device according to the embodiment, the replica mark pattern data can be provided to the display device, the brightness curve of the gate voltage can be obtained by measuring the brightness of the display device while gradually changing the gate voltage, and the final gate voltage can be determined based on the black data voltage and the peak gate voltage corresponding to the peak point of the brightness curve. Therefore, in the display device operated based on the final gate voltage, the replica mark defect can be effectively prevented. In addition, the optimal final gate voltage can be determined for each of the individual display devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0028] Figure 1 is a flowchart illustrating a method of determining a gate voltage of a display device according to an embodiment.

[0029] Figure 2 is a block diagram illustrating a system for determining a gate voltage of a display device according to an embodiment.

[0030] Figure 3 : is a diagram showing an example of copying stain pattern data.

[0031] Figure 4 is a diagram for describing an example of a gate voltage that is gradually changed to obtain a brightness curve.

[0032] Figure 5 is a graph showing an example of a brightness curve of a gate voltage.

[0033] Figure 6 is a graph showing another example of a brightness curve of a gate voltage.

[0034] Figure 7 is a block diagram showing a display device according to an embodiment.

[0035] Figure 8 is a block diagram illustrating an electronic device including a display device according to an embodiment. DETAILED DESCRIPTION

[0036] The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which various embodiments are shown. However, the present invention may be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be exhaustive and complete and will fully convey the scope of the invention to those skilled in the art. The same reference numerals always refer to the same elements.

[0037] It will be understood that when an element is referred to as being "on" another element, the element can be directly on the other element or intervening elements may be present between the element and the other element. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements.

[0038] It will be understood that, although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings herein, the "first element", "component", "region", "layer" or "part" discussed below may be referred to as a second element, component, region, layer or part.

[0039] The terms used herein are only for the purpose of describing specific embodiments, and are not intended to be restrictive. Unless the context clearly indicates otherwise, as used herein, "one", "one (kind / person)", "described (the)" and "at least one (kind / person)" do not represent the limitation to quantity, and are intended to include both singular and plural forms. Therefore, the reference to "one (kind / person)" element in the claim of the reference to "described" element includes one element and multiple elements. For example, unless the context clearly indicates otherwise, "an element" has the same meaning as "at least one element". "At least one (kind / person)" should not be interpreted as being limited to "one" or "one (kind / person)". "Or" means "and / or". As used herein, the term "and / or" includes any combination and all combinations of one or more related listed items. It will be further understood that when used in this specification, the terms “include” and / or “comprise” or “have” and / or “contain” indicate the presence of stated features, regions, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components and / or groups thereof.

[0040] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another element as shown in the accompanying drawings. It will be understood that relative terms are intended to cover different orientations of the device in addition to the orientations depicted in the accompanying drawings. For example, if the device is turned over in one drawing, the element described as being on the "lower" side of the other elements will then be positioned as being on the "upper" side of the other elements. Therefore, depending on the specific orientation of the drawings, the term "lower" can cover both "lower" and "upper" orientations. Similarly, if the device is turned over in one drawing, the element described as being "below" or "under" the other elements will then be positioned as being "above" the other elements. Therefore, the term "below..." or "under..." can cover both upper and lower orientations.

[0041] As used herein, "about" or "approximately" includes the stated value and means within an acceptable range of deviation of the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.

[0042] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will be further understood that, unless explicitly defined as such herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their context in the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formalized sense.

[0043] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0044] Figure 1 is a flowchart showing a method for determining a gate voltage of a display device according to an embodiment, Figure 2 is a block diagram showing a system for determining a gate voltage of a display device according to an embodiment, Figure 3 is a diagram showing an example of copy mura pattern data, Figure 4 is a diagram for describing an example of a gate voltage that is gradually changed to obtain a brightness curve, Figure 5 is a graph showing an example of a brightness curve of a gate voltage, and Figure 6 is a graph showing another example of a brightness curve of a gate voltage.

[0045] refer to Figure 1 and Figure 2In the method of determining the gate voltage of the display device 200 according to the embodiment, the gamma reference voltage at the reference gray level may be determined by performing a multiple programming (MTP) operation (S110, S120, S130, and S140) on the display device 200. The reference gray level may include a 0 gray level, and the gamma reference voltage may include a black data voltage as a gamma reference voltage at a 0 gray level (or a desired data voltage at a 0 gray level). In an embodiment, for example, the reference gray level may include a 0 gray level, a 1 gray level, a 11 gray level, a 23 gray level, a 35 gray level, a 51 gray level, a 87 gray level, a 151 gray level, a 203 gray level, and a 255 gray level, but is not limited thereto.

[0046] In some embodiments, in order to perform the MTP operation, the display device 200 may be driven to display an image at each of the reference gray levels (S110), and the brightness and / or color coordinates of the display device 200 may be measured (S120), and it may be determined whether the measured brightness and / or the measured color coordinates are within a desired target range (S130). In an embodiment, for example, Figure 2 As shown in , the test device 250 may provide the test image data representing the reference gray level to the display device 200, the display device 200 may apply the predicted gamma reference voltage at the reference gray level as the data voltage to each pixel based on the test image data, and the test device 250 may measure the brightness of the display device 200 at the measurement point 240 by using the brightness measurement device 270. In some embodiments, the brightness measurement device 270 may be a brightness meter or a camera. If the measured brightness is outside the target range (S130: No), the display device 200 may be driven again by changing the predicted gamma reference voltage (S110), and the brightness of the display device 200 corresponding to the changed gamma reference voltage may be measured again (S120). If the measured brightness is within the target range (S130: Yes), gamma data indicating the value of the predicted gamma reference voltage may be generated, and the gamma data may be stored in the display device 200 (S140). These operations may be repeated until all gamma reference voltages at the reference gray level are determined.

[0047] After determining the gamma reference voltage including the black data voltage, the test device 250 may provide the replica streak pattern data to the display device 200 (S150). In some embodiments, the replica streak pattern data may be image data that causes a replica streak defect to occur at the measurement point 240 of the display device 200 when the gate voltage does not have an expected voltage level (or when the gate voltage is lower than the peak gate voltage).

[0048] For example, Figure 3As shown in , the replica streak pattern data CMPD may include black image data indicating a 0 gray level 0G for at least one of the upper area 210 and the lower area 220 selected from the display panel of the display device 200. In addition, the replica streak pattern data CMPD may include image data indicating a gray level higher than the 0 gray level (e.g., 127 gray level 127G) for the middle area 230 of the display panel of the display device 200. In the case where the gate voltage does not have a desired voltage level when the display device 200 displays an image based on the replica streak pattern data CMPD, the data voltage of the upper area 210 and / or the lower area 220 may be applied or leaked to the pixels in the middle area 230 including the measurement point 240, and a replica streak defect may occur in which the image in the upper area 210 and / or the lower area 220 is also displayed in the middle area 230 including the measurement point 240.

[0049] When the display device 200 displays an image based on the replica stain pattern data CMPD, a brightness curve of the gate voltage (i.e., a curve or graph showing brightness versus gate voltage) can be obtained by measuring the brightness of the display device 200 while gradually changing the gate voltage (S160). In some embodiments, each pixel of the display device 200 may include a P-type metal oxide semiconductor (PMOS) transistor, and the gate voltage may be a high gate voltage for turning off the PMOS transistor. In addition, in some embodiments, a brightness curve of the gate voltage can be obtained by measuring the brightness of the display device 200 while gradually reducing the gate voltage at constant voltage intervals from a predetermined highest gate voltage. For example, Figure 4 As shown in , the brightness of the display device 200 can be measured when the gate voltage VGH is a maximum gate voltage HVGH of about 6.9 volts (V), and the brightness of the display device 200 can be repeatedly measured while the gate voltage VGH is reduced at a voltage interval of about 0.1 V. This reduction of the gate voltage VGH and the measurement of the brightness of the display device 200 can be repeated until the gate voltage VGH reaches a minimum gate voltage LVGH of about 4.5 V. Although Figure 4 An embodiment in which the highest gate voltage HVGH is about 6.9V, the voltage interval is about 0.1V, and the lowest gate voltage LVGH is about 4.5V is shown, but the highest gate voltage HVGH, the voltage interval, and the lowest gate voltage LVGH according to the embodiment are not limited to Figure 4The highest gate voltage HVGH, the voltage interval, and the lowest gate voltage LVGH of the display device 200 are measured. Alternatively, in other embodiments, the brightness curve of the gate voltage can be obtained by measuring the brightness of the display device 200 while gradually increasing the gate voltage VGH from the lowest gate voltage LVGH at a constant voltage interval. In addition, in some embodiments, the brightness curve of the gate voltage VGH can be obtained by the brightness measurement device 270 for performing the MTP operation. That is, the brightness measurement device 270 for performing the MTP operation can measure the brightness of the display device 200 to obtain the brightness curve of the gate voltage VGH.

[0050] In an embodiment, a brightness curve is obtained so that a peak gate voltage corresponding to a peak point of the brightness curve can be determined (S170). In some embodiments, when the gate voltage VGH is gradually reduced from the highest gate voltage HVGH, the voltage of the gate electrode of the driving transistor can also be gradually reduced by capacitive coupling between the line for transmitting the gate signal with the gate voltage VGH and the gate electrode of the driving transistor of each pixel, and thus the brightness of the display device 200 can be gradually increased. However, if the gate voltage VGH is reduced too much, for example, if the gate voltage VGH reaches the peak gate voltage, a copy spot defect may occur in the middle area 230 including the measurement point 240, and the brightness of the middle area 230 including the measurement point 240 may be reduced. Therefore, as the gate voltage VGH is gradually reduced from the highest gate voltage HVGH to the peak gate voltage, the brightness of the display device 200 at the measurement point 240 can be gradually increased, and as the gate voltage VGH is gradually reduced from the peak gate voltage to the lowest gate voltage LVGH, the brightness of the display device 200 at the measurement point 240 can be gradually reduced.

[0051] For example, Figure 5 As shown in , as the gate voltage VGH gradually decreases from the highest gate voltage HVGH to the peak gate voltage PVGH, the brightness curve 310 may gradually increase. In addition, as the gate voltage VGH gradually decreases from the peak gate voltage PVGH to the lowest gate voltage LVGH, the brightness curve 310 may gradually decrease. The test device 250 may detect the peak point PP of the brightness curve 310, and may determine the peak gate voltage PVGH that causes the brightness curve 310 to have the peak point PP or the peak gate voltage PVGH corresponding to the peak point PP.

[0052] In the method of determining the gate voltage according to the embodiment, the final gate voltage FVGH can be determined based on the black data voltage VBLACK and the peak gate voltage PVGH (S180, S190 and S195). Here, the black data voltage VBLACK can be one of the gamma reference voltages determined by the MTP operation and can be a data voltage at 0 gray level.

[0053] In some embodiments, the peak gate voltage PVGH corresponding to the peak point PP and the black data voltage VBLACK determined by the MTP operation may be compared (S180). If the peak gate voltage PVGH is less than or equal to the black data voltage VBLACK (S180: No), the final gate voltage FVGH may be determined as the default gate voltage DVGH (S190). In some embodiments, the default gate voltage DVGH may be calculated by adding the default voltage margin DVM to the black data voltage VBLACK. That is, the default gate voltage DVGH may correspond to the sum of the black data voltage VBLACK and the default voltage margin DVM.

[0054] For example, Figure 5 As shown in , when the black data voltage VBLACK is determined to be approximately 5.5V through the MTP operation and the peak gate voltage PVGH corresponding to the peak point PP of the brightness curve 310 is approximately 5.3V, since the peak gate voltage PVGH of approximately 5.3V is less than or equal to the black data voltage VBLACK of approximately 5.5V, the final gate voltage FVGH can be determined as the default gate voltage DVGH of approximately 5.7V calculated by adding the default voltage margin DVM of approximately 0.2V to the black data voltage VBLACK of approximately 5.5V.

[0055] If the peak gate voltage PVGH is greater than the black data voltage VBLACK (S180: Yes), the final gate voltage FVGH (S195) may be determined based on the default gate voltage DVGH and the difference between the peak gate voltage PVGH and the black data voltage VBLACK. In some embodiments, the final gate voltage FVGH (S195) may be determined by adding the difference between the peak gate voltage PVGH and the black data voltage VBLACK to the default gate voltage DVGH.

[0056] For example, Figure 6As shown in , when the black data voltage VBLACK is determined to be about 5.5V by the MTP operation and the peak gate voltage PVGH corresponding to the peak point PP of the brightness curve 330 is about 5.9V, the peak gate voltage PVGH may be higher than the black data voltage VBLACK by a difference ΔV of about 0.4V. If the peak gate voltage PVGH is higher than the black data voltage VBLACK, the final gate voltage FVGH may be determined to be about 6.1V by adding the difference ΔV of about 0.4V between the peak gate voltage PVGH and the black data voltage VBLACK to the default gate voltage DVGH of about 5.7V.

[0057] If the gate voltage VGH is determined as a default gate voltage DVGH lower than the peak gate voltage PVGH, a copy mark defect may occur in the display device 200. However, in the method of determining the gate voltage VGH of the display device 200 according to the embodiment, the gate voltage VGH can be determined as a final gate voltage FVGH higher than the peak gate voltage PVGH, and the copy mark defect can be effectively prevented or substantially reduced in the display device 200 according to the embodiment.

[0058] Furthermore, this method of determining the gate voltage VGH may be performed for each of the respective display devices. Therefore, an optimal final gate voltage FVGH may be determined with respect to each of the respective display devices.

[0059] Figure 7 is a block diagram showing a display device according to an embodiment.

[0060] refer to Figure 7 According to an embodiment, a display device 400 may include a display panel 410 including a plurality of pixels PX, a gamma reference voltage generator 420 generating a gamma reference voltage GRV, a data driver 430 providing a data voltage DV to the plurality of pixels PX based on the gamma reference voltage GRV, a gate driver 440 providing a gate signal GS having a final gate voltage FVGH, and a controller 450 controlling the operation of the display device 400.

[0061] The display panel 410 may include a plurality of pixels PX that display an image. In some embodiments, each pixel PX may include at least one transistor, at least one capacitor, and a light-emitting element. In an embodiment, for example, each pixel PX may include an organic light-emitting diode (OLED) as a light-emitting element, and the display panel 410 may be an OLED display panel. In other examples, the light-emitting element may be a nano light-emitting diode (NED), a quantum dot (QD) light-emitting diode, an inorganic light-emitting diode, or any other suitable light-emitting element. In other embodiments, the display panel 410 may be a liquid crystal display (LCD) panel or any other suitable display panel.

[0062] The gamma reference voltage generator 420 may provide a gamma reference voltage GRV at a reference gray level to the data driver 430 based on the gamma data. In some embodiments, the gamma data may be Figure 1 , and the gamma reference voltage generator 420 may generate a gamma reference voltage GRV having a value indicated by the gamma data. In addition, in some embodiments, the reference gray level may include a 0 gray level, and the gamma reference voltage GRV may include a black data voltage as a data voltage DV at a 0 gray level. In some embodiments, the gamma reference voltage generator 420 may be included in the data driver 430 or the controller 450. In other embodiments, the gamma reference voltage generator 420 may be implemented as a separate integrated circuit.

[0063] The data driver 430 may receive the output image data ODAT and the data control signal DCTRL from the controller 450, may receive the gamma reference voltage GRV from the gamma reference voltage generator 420, and may provide the data voltage DV to a plurality of pixels PX based on the output image data ODAT, the data control signal DCTRL, and the gamma reference voltage GRV. In some embodiments, the data control signal DCTRL may include, but is not limited to, an output data enable signal, a horizontal start signal, and a load signal. The data driver 430 may divide the gamma reference voltage GRV at the reference gray level to generate gray voltages at all gray levels, and may provide the gray voltage at the gray level indicated by the output image data ODAT as the data voltage DV to each pixel PX. In some embodiments, the data driver 430 and the controller 450 may be implemented as a single integrated circuit, and the single integrated circuit may be referred to as a timing controller embedded data driver (TED). In other embodiments, the data driver 430 and the controller 450 may be implemented as separate integrated circuits.

[0064] The gate driver 440 may generate a gate signal GS based on a gate control signal GCTRL received from the controller 450, and may sequentially provide the gate signal GS to a plurality of pixels PX on a row-by-row basis. In some embodiments, the gate control signal GCTRL may include, but is not limited to, a scan start signal, a scan clock signal, etc. In some embodiments, the gate signal GS may have a low gate voltage as a gate voltage of a transistor for turning on the pixel PX, and may have a gate voltage of 100V. Figure 1 The final gate voltage FVGH determined by the method shown in is used as the gate voltage of the transistor for turning off the pixel PX. In some embodiments, as described above with reference to Figures 1 to 6 As described, the replica spot pattern data can be provided to the display device 400, and the brightness curve of the gate voltage can be obtained by measuring the brightness of the display device 400 while gradually changing the gate voltage (e.g., high gate voltage) of the gate signal GS. The final gate voltage FVGH of the gate signal GS can be determined based on the black data voltage and the peak gate voltage corresponding to the peak point of the brightness curve. In an embodiment, if the peak gate voltage is less than or equal to the black data voltage, the final gate voltage FVGH can be determined as a default gate voltage corresponding to the sum of the black data voltage and the default voltage margin. In such an embodiment, if the peak gate voltage is greater than the black data voltage, the final gate voltage FVGH can be determined by adding the difference between the peak gate voltage and the black data voltage to the default gate voltage. In some embodiments, the gate driver 440 can be integrated or formed in the display panel 410. In other embodiments, the gate driver 440 can be implemented as one or more integrated circuits.

[0065] The controller 450 (e.g., a timing controller) may receive input image data IDAT and a control signal CTRL from an external host processor (e.g., a graphics processing unit (GPU), an application processor (AP), or a graphics card). In some embodiments, the input image data IDAT may be, but is not limited to, RGB image data including red image data, green image data, and blue image data. In addition, in some embodiments, the control signal CTRL may include, but is not limited to, a vertical synchronization signal, a horizontal synchronization signal, an input data enable signal, and a main clock signal. The controller 450 may generate output image data ODAT, a gamma control signal GMACTRL, a data control signal DCTRL, and a gate control signal GCTRL based on the input image data IDAT and the control signal CTRL. The controller 450 may control the gamma reference voltage generator 420 by providing the gamma control signal GMACTRL to the gamma reference voltage generator 420, may control the data driver 430 by providing the output image data ODAT and the data control signal DCTRL to the data driver 430, and may control the gate driver 440 by providing the gate control signal GCTRL to the gate driver 440.

[0066] As described above, in the display device 400 according to the embodiment, the replica mark pattern data can be provided to the display device 400, the brightness curve of the gate voltage can be obtained by measuring the brightness of the display device 400 while gradually changing the gate voltage (e.g., high gate voltage), and the final gate voltage FVGH can be determined based on the black data voltage and the peak gate voltage corresponding to the peak point of the brightness curve. Therefore, in the display device 400 driven based on the final gate voltage FVGH, the replica mark defect can be prevented. In addition, the optimal final gate voltage FVGH can be determined with respect to each display device.

[0067] Figure 8 is a block diagram illustrating an electronic device including a display device according to an embodiment.

[0068] refer to Figure 8 , an embodiment of the electronic device 1100 may include a processor 1110, a memory device 1120, a storage device 1130, an input / output (I / O) device 1140, a power supply 1150, and a display device 1160. The electronic device 1100 may also include a plurality of ports for communicating with a video card, a sound card, a memory card, a universal serial bus (USB) device, other electronic devices, and the like.

[0069] The processor 1110 may perform various computing functions or tasks. The processor 1110 may be an application processor (AP), a microprocessor, a central processing unit (CPU), etc. The processor 1110 may be coupled to other components via an address bus, a control bus, a data bus, etc. In addition, in some embodiments, the processor 1110 may also be coupled to an expansion bus, such as a peripheral component interconnect (PCI) bus.

[0070] The memory device 1120 may store data used for the operation of the electronic device 1100. For example, the memory device 1120 may include at least one nonvolatile memory device such as an erasable programmable read-only memory (EPROM) device, an electrically erasable programmable read-only memory (EEPROM) device, a flash memory device, a phase change random access memory (PRAM) device, a resistive random access memory (RRAM) device, a nano-floating gate memory (NFGM) device, a polymer random access memory (PoRAM) device, a magnetic random access memory (MRAM) device, a ferroelectric random access memory (FRAM) device, etc. and / or at least one volatile memory device such as a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, a mobile dynamic random access memory (mobile DRAM) device, etc.

[0071] The storage device 1130 may be a solid state drive (SSD) device, a hard disk drive (HDD) device, a CD-ROM device, etc. The I / O device 1140 may be an input device such as a keyboard, a keypad, a mouse, a touch screen, etc. and an output device such as a printer, a speaker, etc. The power supply 1150 may supply power for the operation of the electronic device 1100. The display device 1160 may be coupled to other components through a bus or other communication links.

[0072] In the display device 1160, as described above with reference to Figures 1 to 6 As described, the replica mark pattern data can be provided to the display device 1160, the brightness curve of the gate voltage can be obtained by measuring the brightness of the display device 1160 while gradually changing the gate voltage (e.g., high gate voltage), and the final gate voltage can be determined based on the black data voltage and the peak gate voltage corresponding to the peak point of the brightness curve. Therefore, in the display device 1160 driven based on the final gate voltage, the replica mark defect can be effectively prevented. In addition, the optimal final gate voltage can be determined with respect to each display device.

[0073] Embodiments of the present invention can be applied to any display device 1160 and any electronic device 1100 including the display device 1160, such as a television (TV) (e.g., digital TV, 3D TV, etc.), a smart phone, a wearable electronic device, a mobile phone, a personal computer (PC) (e.g., a tablet computer, a laptop computer), a home appliance, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital camera, a music player, a portable game console, a navigation device, etc.

[0074] The present invention should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the present invention to those skilled in the art.

[0075] While the invention has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit or scope of the invention as defined by the following claims.

Claims

1. A method for determining a gate voltage of a display device, wherein: The method comprises: determining a gamma reference voltage including a black data voltage by performing a plurality of programming operations on the display device; providing the replica stain pattern data to the display device; obtaining a brightness curve of the gate voltage by measuring the brightness of the display device while gradually changing the gate voltage; determining a peak gate voltage corresponding to a peak point of the brightness curve; and A final gate voltage is determined based on the black data voltage and the peak gate voltage.

2. The method according to claim 1, wherein: The replica mark pattern data is image data causing a replica mark defect to appear in the display device when the gate voltage is lower than the peak gate voltage.

3. The method according to claim 1, wherein: The replica mark pattern data includes black image data and image data, wherein the black image data represents a gray level of 0 relative to at least one of an upper area and a lower area of ​​a display panel selected from the display device, and the image data represents a gray level higher than the 0 gray level relative to a middle area of ​​the display panel.

4. The method according to claim 1, wherein: The brightness curve of the gate voltage is obtained by measuring the brightness of the display device while gradually decreasing the gate voltage at constant voltage intervals from a highest gate voltage.

5. The method according to claim 1, wherein: The brightness curve of the gate voltage is obtained by measuring the brightness of the display device while gradually increasing the gate voltage at constant voltage intervals from a lowest gate voltage.

6. The method according to claim 1, wherein: The brightness curve of the gate voltage is obtained by using a brightness measuring device, which is used to perform the plurality of programming operations.

7. The method according to claim 1, wherein: The method further comprises: The peak gate voltage and the black data voltage are compared.

8. The method according to claim 7, wherein: The determining the final gate voltage comprises: When the peak gate voltage is less than or equal to the black data voltage, determining the final gate voltage as a default gate voltage; and When the peak gate voltage is greater than the black data voltage, the final gate voltage is determined based on the default gate voltage and a difference between the peak gate voltage and the black data voltage.

9. The method according to claim 8, wherein: The default gate voltage corresponds to a sum of the black data voltage and a default voltage margin.

10. The method according to claim 8, wherein: When the peak gate voltage is greater than the black data voltage, the final gate voltage is determined by adding the difference between the peak gate voltage and the black data voltage to the default gate voltage.

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