A high-side MOS driving circuit

Abstract

This invention belongs to the field of electronic technology and discloses a MOS high-side drive circuit, including a bootstrap circuit, a switch control circuit, a low-impedance circuit, and a MOS field-effect transistor (MOSFET). The bootstrap circuit provides input voltage to the low-impedance circuit. The switch control circuit includes an on-control circuit and a off-control circuit. The switch control circuit converts received externally transmitted logic signals into electrical signals that directly act on the low-impedance circuit and sends control signals to the low-impedance circuit. The low-impedance circuit responds quickly after the MOS MOSFET receives an on or off signal, thereby achieving efficient circuit control. The MOS MOSFET is used as a switch; by applying different control signals through the switch control circuit, the MOS MOSFET switches between on and off states, thereby realizing the switching function of the logic gate. This invention, by designing low-impedance on- and off-circuit loops, determines the switching time of the MOS MOSFET by the driving resistor. The required switching time can be obtained by the resistance value of the driving resistor, thereby reducing the switching time of the MOS MOSFET, ensuring the high-frequency switching characteristics of the MOS, and providing a prerequisite for PWM control and protection functions.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and in particular to a high-side MOS driving circuit. Background Technology

[0002] Currently, the turn-on and turn-off times of high-side drive circuits are relatively long, resulting in the loss of MOS high-frequency switching characteristics. They can only be used for ON / OFF control and cannot meet the requirements of PWM control applications, which also limits the application range of high-side switches. In addition, the loss of short-circuit and overcurrent protection functions, as well as the extended protection response time due to the longer switching time, lead to excessive electrical stress and damage.

[0003] The invention patent CN202411031525.1, entitled "A High-Side Driving Circuit and a High-Side Driving Chip," discloses a high-side driving circuit comprising: a detection module, an auxiliary module, a switching module, and a protection module. The detection module is connected to the auxiliary module, the switching module, and a power supply. The auxiliary module is connected to the protection module and the switching module. The switching module is connected to the power supply, the protection module, and a load. This prior art protects the circuit by absorbing and discharging current through the protection module, but it does not solve the problem of long turn-on and turn-off times in high-side driving circuits. Summary of the Invention

[0004] The purpose of this invention is to provide a high-side MOS driving circuit that, in addition to solving the bootstrap voltage required by the driving circuit, reduces the switching time by designing low-impedance MOS turn-on and turn-off circuits, thus ensuring the high-frequency switching characteristics of the MOS.

[0005] The present invention adopts the following technical solution:

[0006] A high-side MOS driving circuit includes a bootstrap circuit, a switch control circuit, a low-impedance circuit, and a MOS field-effect transistor; wherein,

[0007] The bootstrap circuit is used to provide an input voltage to the low impedance circuit by superimposing the discharge voltage of the capacitor in the bootstrap circuit and the input voltage. The output terminal of the bootstrap circuit is connected to the first input terminal of the low impedance circuit.

[0008] A switch control circuit is used to convert received externally transmitted logic signals into electrical signals that directly act on the low-impedance circuit and send control signals to the low-impedance circuit. The switch control circuit includes an on control circuit and an off control circuit, and the output terminals of the on control circuit and the off control circuit are respectively connected to the second input terminal and the third input terminal of the low-impedance circuit.

[0009] The low-impedance circuit is used to respond quickly after the MOS field-effect transistor receives an on or off signal, thereby achieving efficient circuit control; the output terminal of the low-impedance circuit is connected to the gate of the MOS field-effect transistor, and the fourth input terminal of the low-impedance circuit is connected to the source of the MOS field-effect transistor.

[0010] MOSFETs are used as switching transistors. By applying different control signals through a switching control circuit, MOSFETs switch between on and off states, thereby realizing the switching function of logic gates.

[0011] Preferably, the switch control circuit and the low impedance circuit adopt a MOS driver integrated chip, including pins 1 to 8. Pin 1 is a power supply pin connected to the power supply, pin 4 is a ground pin, and pin 5 is connected to the input terminal of the bootstrap circuit. Pin 2 of the upper bridge part inside the MOS driver chip serves as the input terminal of the turn-on control circuit for inputting the turn-on signal, and pin 3 of the lower bridge part inside the MOS driver chip serves as the input terminal of the turn-off control circuit for inputting the turn-off signal.

[0012] Preferably, the low-impedance circuit is integrated in the MOS driver chip. Pin 6 is connected to the output of the bootstrap circuit as the first input terminal of the low-impedance circuit. Pin 7 is connected to the gate of the first N-channel MOS transistor through the second resistor as the output terminal of the low-impedance circuit. Pin 8 is connected to the source of the first N-channel MOS transistor as the fourth input terminal of the low-impedance circuit.

[0013] Preferably, the bootstrap circuit includes a first diode, a second diode, a first capacitor, and a first resistor. The cathode of the second diode and the anode of the first diode are connected by a wire. The wire between the cathode of the second diode and the anode of the first diode is also connected to one end of the first capacitor through a second branch. The cathode of the first diode is connected to one end of the first resistor, and the other end of the first resistor is connected to pin 8.

[0014] Preferably, the method further includes an additional first Zener diode, the anode of which is connected to pin 6 of the MOS driver chip, and the cathode of which is connected to pin 8.

[0015] Preferably, the turn-on control circuit includes a third resistor, a fourth resistor, a fifth resistor, a seventh resistor, an eighth resistor, a first PNP transistor, and a second NPN transistor. The turn-on signal is input to the turn-on control circuit through one end of the seventh resistor. A branch between the other end of the seventh resistor and the base of the second NPN transistor is connected to one end of the eighth resistor. The other end of the eighth resistor is connected to the emitter of the second NPN transistor. The emitter of the second NPN transistor is also grounded. The collector of the second NPN transistor is connected to the base of the first PNP transistor. The collector of the second NPN transistor is connected in series with the base of the first PNP transistor, and a fourth resistor is connected in series between them. The emitter of the first PNP transistor is connected to one end of a third resistor, and the other end of the third resistor is connected to the base of the first PNP transistor. The collector of the first PNP transistor is connected to the base of the first NPN transistor in the low-impedance circuit through a fifth resistor. The emitter of the first PNP transistor is also connected to the collector of the first NPN transistor. The collector of the first NPN transistor serves as the output terminal of the turn-on control circuit.

[0016] Preferably, the shutdown control circuit includes a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a third PNP transistor, and a third NPN transistor. The shutdown signal is input to the shutdown control circuit through one end of the ninth resistor. The other end of the ninth resistor is connected to the base of the third NPN transistor. A branch between the ninth resistor and the base of the third NPN transistor is connected to one end of the tenth resistor. The other end of the tenth resistor is connected to the emitter of the third NPN transistor. The emitter of the third NPN transistor is also grounded. The emitter of the N-type transistor is grounded. The collector of the third NPN transistor is connected to the base of the third PNP transistor. An eleventh resistor is connected in series between the collector of the third NPN transistor and the base of the third PNP transistor. The base of the third PNP transistor is connected to one end of the twelfth resistor, and the other end of the twelfth resistor is connected to the emitter of the third PNP transistor. The emitter of the third PNP transistor serves as the first output terminal of the shutdown control circuit, and the collector of the third PNP transistor serves as the second output terminal of the shutdown control circuit.

[0017] Preferably, the low-impedance circuit includes a first NPN transistor, a second PNP transistor, and a sixth resistor; the low-impedance circuit includes a turn-on circuit and a turn-off circuit; a branch between the emitter of the first NPN transistor and the emitter of the second PNP transistor is connected to one end of the sixth resistor, and the other end of the sixth resistor is connected to the gate of the second N-channel MOSFET; the collector and emitter of the first NPN transistor and the sixth resistor, which serves as a driving resistor, constitute the turn-on circuit, and the emitter and collector of the second PNP transistor and the sixth resistor, which serves as a driving resistor, constitute the turn-off circuit. The circuit is broken; the collector of the first NPN transistor is connected to the output of the bootstrap circuit as the first input of the low impedance circuit, the base of the first NPN transistor is connected to the output of the turn-on control circuit as the second input of the low impedance circuit, the base of the second PNP transistor is connected to the first output of the turn-off control circuit as the third input of the low impedance circuit, the collector of the second PNP transistor is connected to the second output of the turn-off control circuit as the fourth input of the low impedance circuit, and the output of the low impedance circuit is connected to the gate of the second N-channel MOSFET through the sixth resistor.

[0018] Preferably, the bootstrap circuit includes a square wave generator, a third capacitor, a fourth capacitor, a fourth diode, and a fifth diode; the voltage input terminal of the bootstrap circuit is connected to the anode of the fifth diode, the fifth diode and the fourth diode are connected in series in the same direction, a branch between the fifth diode and the fourth diode is connected to the square wave generator through the third capacitor, the fourth capacitor is connected in parallel across the fourth diode and the fifth diode, and the cathode of the fourth diode serves as the output terminal of the bootstrap circuit.

[0019] Preferably, it also includes a second Zener diode, wherein the collector of the third PNP transistor is connected to the anode of the second Zener diode, and the cathode of the second Zener diode is connected to the emitter of the third PNP transistor.

[0020] This invention, in addition to addressing the bootstrap voltage required for the drive circuit, reduces the MOS switching time by designing low-impedance turn-on and turn-off circuits, ensuring the high-frequency switching characteristics of the MOS and providing a prerequisite for PWM control and protection functions. The use of discrete components to build the circuit increases its reliability and stability. Each component can be designed and optimized independently, avoiding potential internal interference and faults that may exist in integrated circuits. Attached Figure Description

[0021] Figure 1 This is a block diagram of the high-side MOS driving circuit in this invention;

[0022] Figure 2 This is a circuit diagram illustrating the implementation of a low-impedance circuit and control circuit utilizing the functions of an integrated chip in this invention.

[0023] Figure 3 This is a circuit diagram illustrating a low-impedance circuit and control circuit built using discrete components in this invention. Detailed Implementation

[0024] The present invention will now be described in detail with reference to the accompanying drawings and embodiments:

[0025] As attached Figure 1 As shown, the high-side MOS driving circuit of the present invention includes a bootstrap circuit, a switch control circuit, a low-impedance circuit, and a MOS field-effect transistor; wherein,

[0026] The bootstrap circuit is used to superimpose the external input voltage and the discharge voltage of the capacitor in the bootstrap circuit to generate a superimposed voltage, which is then used as the input voltage of the low impedance circuit; the output terminal of the bootstrap circuit is connected to the first input terminal of the low impedance circuit.

[0027] A switch control circuit is used to convert received externally transmitted logic signals into electrical signals that directly act on the low-impedance circuit and send control signals to the low-impedance circuit. The switch control circuit includes an on control circuit and an off control circuit, and the output terminals of the on control circuit and the off control circuit are respectively connected to the second input terminal and the third input terminal of the low-impedance circuit.

[0028] The low-impedance circuit is used to respond to the turn-on or turn-off signal received by the MOS field-effect transistor, thereby achieving efficient circuit control; the output terminal of the low-impedance circuit is connected to the gate of the MOS field-effect transistor, and the fourth input terminal of the low-impedance circuit is connected to the source of the MOS field-effect transistor.

[0029] MOSFETs are used as switching transistors. By applying different control signals through a switching control circuit, MOSFETs switch between on and off states, thereby realizing the switching function of logic gates.

[0030] In this invention, the drain of the MOS field-effect transistor is connected to the input voltage Vin, and the source of the MOS field-effect transistor is connected to the output voltage Vout. The switching control circuit and the low-impedance circuit can be directly constructed using a MOS driver integrated chip, or they can be built using discrete components, both achieving the same effect. In this embodiment, the MOS driver integrated chip used is model FAN7842MX.

[0031] As attached Figure 2 As shown, in Example 1,

[0032] In this embodiment, the switch control circuit is implemented using some integrated functions of the MOS driver integrated chip. The chip U1 is a MOS driver chip, including pins 1 to 8. Pin 1 (VDD) is the power supply pin, which is connected to the power supply. Pin 2 (HI) of the upper bridge part inside the MOS driver chip is used as the input terminal of the turn-on control circuit. Pin 3 (LI) of the lower bridge part inside the MOS driver chip is used as the input terminal of the turn-off control circuit. Pin 4 (VSS) is the ground pin.

[0033] In this embodiment, the low-impedance circuit is also implemented using some integrated functions of the MOS driver integrated chip. Pins 6 (HS), 7 (HO), and 8 (HB) serve as the connection terminals of the low-impedance circuit, connecting to the bootstrap circuit and the MOS transistor. The specific connections are as follows:

[0034] Pin 6 (HS) of the MOS driver chip is connected to the source of the first N-channel MOS transistor Q1 via a wire, and the wire between pin 6 (HS) and the source of the first N-channel MOS transistor Q1 is also connected to the anode of the second diode D2 via a first branch; the other end of the first capacitor C1 is connected to pin 5 (LO) of the MOS driver chip, the other end of the first resistor R1 is connected to pin 8 (HB) of the MOS driver chip, pin 6 (HS) of the MOS driver chip is connected to the anode of the first Zener diode D3, the cathode of the first Zener diode D3 is connected to pin 8 (HB) of the MOS driver chip, and the second capacitor C2 is connected in parallel across the two ends of the first Zener diode D3; a second resistor R2 is connected in series between pin 7 (HO) of the MOS driver chip and the gate of the first N-channel MOS transistor Q1.

[0035] In this embodiment, the bootstrap circuit includes a first diode D1, a second diode D2, a first capacitor C1, and a first resistor R1. The cathode of the second diode D2 and the anode of the first diode D1 are connected by a wire. The wire between the cathode of the second diode D2 and the anode of the first diode D1 is also connected to one end of the first capacitor C1 through a second branch. The cathode of the first diode D1 is connected to one end of the first resistor R1.

[0036] In this embodiment, the first Zener diode D3 is connected in parallel across pin 6 (HS) and pin 8 (HB). D3 plays a voltage stabilizing role, ensuring that the switching device is not subjected to excessive voltage surges during the turn-on and turn-off processes, thereby extending the device's lifespan.

[0037] As attached Figure 3 As shown, in Example 2,

[0038] In this embodiment, the bootstrap circuit includes a square wave generator, a third capacitor C3, a fourth capacitor C4, a fourth diode D4, and a fifth diode D5. The voltage input terminal of the bootstrap circuit is connected to the anode of the fifth diode D5. The fifth diode D5 and the fourth diode D4 are connected in series in the same direction. A branch between the fifth diode D5 and the fourth diode D4 is connected to the square wave generator through the third capacitor C3. The fourth capacitor C4 is connected in parallel across the fourth diode D4 and the fifth diode D5. The cathode of the fourth diode D4 serves as the output terminal of the bootstrap circuit.

[0039] In this embodiment, when the turn-on control circuit controls the second N-channel MOSFET Q2 to turn on, the bootstrap circuit generates a voltage higher than the input voltage and inputs it to the gate of the second N-channel MOSFET Q2 to ensure that it has a sufficiently high voltage at the moment of turn-on, thereby turning on quickly.

[0040] In this embodiment, the low-impedance circuit further includes a discrete component construction. The low-impedance circuit includes a first NPN transistor VT2, a second PNP transistor VT3, and a sixth resistor R6. The low-impedance circuit includes a turn-on circuit and a turn-off circuit. A branch between the emitter of the first NPN transistor VT2 and the emitter of the second PNP transistor VT3 is connected to one end of the sixth resistor R6, and the other end of the sixth resistor R6 is connected to the gate of the first N-channel MOSFET Q1. The collector and emitter of the first NPN transistor VT2 and the sixth resistor R6, which serves as a drive resistor, constitute the turn-on circuit. The emitter and collector of the second PNP transistor VT3... The electrodes and the sixth resistor R6, which serves as the driving resistor, constitute the turn-off circuit. The collector of the first NPN transistor VT2 is connected to the output of the bootstrap circuit as the first input of the low-impedance circuit. The base of the first NPN transistor VT2 is connected to the output of the turn-on control circuit as the second input of the low-impedance circuit. The base of the second PNP transistor VT3 is connected to the output of the turn-off control circuit as the third input of the low-impedance circuit. The collector of the second PNP transistor VT3 is connected to the second output of the turn-off control circuit as the fourth input of the low-impedance circuit. The output of the low-impedance circuit is connected to the gate of the second N-channel MOSFET Q2 through the sixth resistor R6.

[0041] In this embodiment, the low-impedance circuit design enables the switching device MOSFET to respond quickly after receiving the turn-on or turn-off signal, thereby achieving efficient circuit control.

[0042] In this embodiment, the turn-on control circuit includes a third resistor R3, a fourth resistor R4, a fifth resistor R5, a seventh resistor R7, an eighth resistor R8, a first PNP transistor VT1, and a second NPN transistor VT5. The turn-on signal is input to the turn-on control circuit through one end of the seventh resistor R7. A branch between the other end of the seventh resistor R7 and the base of the second NPN transistor VT5 is connected to one end of the eighth resistor R8. The other end of the eighth resistor R8 is connected to the emitter of the second NPN transistor VT5. The emitter of the second NPN transistor VT5 is also grounded. The collector of the second NPN transistor VT5 is connected to the first PNP transistor VT1. The base of T1 is connected, and a fourth resistor R4 is connected in series between the collector of the second NPN transistor VT5 and the base of the first PNP transistor VT1. The emitter of the first PNP transistor VT1 is connected to one end of the third resistor R3, and the other end of the third resistor R3 is connected to the base of the first PNP transistor VT1. The collector of the first PNP transistor VT1 is connected to the base of the first NPN transistor VT2 in the low-impedance circuit through the fifth resistor R5. The emitter of the first PNP transistor VT1 is also connected to the collector of the first NPN transistor VT2. The collector of the first NPN transistor VT2 serves as the output terminal of the turn-on control circuit.

[0043] In this embodiment, the shutdown control circuit includes a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a third PNP transistor VT4, and a third NPN transistor VT6. The shutdown signal is input to the shutdown control circuit through one end of the ninth resistor R9. The other end of the ninth resistor R9 is connected to the base of the third NPN transistor VT6. A branch between the ninth resistor R9 and the base of the third NPN transistor VT6 is connected to one end of the tenth resistor R10. The other end of the tenth resistor R10 is connected to the emitter of the third NPN transistor VT6. The circuit is also grounded. The emitter of the third NPN transistor VT6 is grounded, and the collector of the third NPN transistor VT6 is connected to the base of the third NPN transistor. An eleventh resistor R11 is connected in series between the collector of the third NPN transistor VT6 and the base of the third PNP transistor VT4. The base of the third PNP transistor VT4 is connected to one end of the twelfth resistor R12, and the other end of the twelfth resistor R12 is connected to the emitter of the third PNP transistor VT4. The emitter of the third PNP transistor serves as the first output terminal of the shutdown control circuit, and the collector of the third PNP transistor serves as the second output terminal of the shutdown control circuit.

[0044] In this embodiment, the collector of the third PNP transistor is connected to the anode of the second Zener diode D6, and the cathode of the second Zener diode D6 is connected to the emitter of the third PNP transistor.

[0045] In this embodiment, when the third PNP transistor VT4 is turned on, the current flows through the second Zener diode D6. D6 plays a voltage stabilizing role, ensuring that the switching device will not be subjected to excessive voltage surges during the turn-on and turn-off processes, thus extending the service life of the device.

[0046] This invention, in addition to addressing the bootstrap voltage required for the drive circuit, reduces the MOS switching time by designing low-impedance turn-on and turn-off circuits, ensuring the high-frequency switching characteristics of the MOS and providing a prerequisite for PWM control and protection functions. The use of discrete components to build the circuit increases its reliability and stability. Each component can be designed and optimized independently, avoiding potential internal interference and faults that may exist in integrated circuits.

[0047] Specific embodiments,

[0048] Example 1:

[0049] The turn-on signal is input to the turn-on control circuit of the MOS driver chip through pin 2 (HI) of the MOS driver integrated chip U1. After receiving the turn-on signal, the turn-on control circuit drives the upper bridge section inside the chip, causing pin 7 (HO) to output a high-level signal. The high-level signal of pin 7 (HO) is applied to the gate of the first N-channel MOS transistor Q1 through the second resistor R2. As the gate voltage of the first N-channel MOS transistor Q1 increases, Q1 turns on, and current begins to flow from the drain to the source. At the same time, the bootstrap circuit starts to work, the first diode D1 turns on, and the first capacitor C1 begins to charge. The charging current flows to pin 5 (LO) of the MOS driver chip to provide power for the drive of the lower bridge section. After the first N-channel MOS transistor Q1 turns on, pins 6 (HS) and 8 (HB) of the low-impedance circuit output low-impedance signals to ensure that the first N-channel MOS transistor Q1 has a stable conduction state in the high-frequency switching state.

[0050] The shutdown signal is input to the shutdown control circuit of the MOS driver chip through pin 3 (LI). After receiving the shutdown signal, the shutdown control circuit drives the lower bridge section inside the chip, causing pin 7 (HO) to output a low-level signal. The low-level signal of pin 7 (HO) is applied to the gate of the first N-channel MOS transistor Q1 through the second resistor R2. As the gate voltage of the first N-channel MOS transistor Q1 decreases, Q1 is turned off, the current stops flowing from the drain to the source, the first diode D1 in the bootstrap circuit is turned off, the first capacitor C1 stops charging, and the drive power supply of the lower bridge section is disconnected. After the first N-channel MOS transistor Q1 is turned off, pins 6 (HS) and 8 (HB) of the low-impedance circuit stop outputting, ensuring that the first N-channel MOS transistor Q1 has a stable cutoff state in the high-frequency switching state.

[0051] Example 2:

[0052] The square wave generator produces a square wave signal. The voltage generated by the square wave signal is input through one end of the third capacitor C3. The fifth diode D5 and the fourth diode D4 are connected in series in the same direction to form the basic structure of the bootstrap circuit. The fourth capacitor C4 is connected in parallel across the fourth diode D4 and the fifth diode D5 to store charge.

[0053] The turn-on signal is input to the base of the second NPN transistor VT5 through the seventh resistor R7. VT5 is saturated and turned on. The collector current of VT5 flows through the fourth resistor R4 and is input to the base of the first PNP transistor VT1, driving the first PNP transistor VT1 to turn on. VT1 is saturated and turned on. The current is input to the base of the first NPN transistor VT2 in the low impedance circuit through the fifth resistor R5. VT2 is saturated and turned on. The current path between the collector and emitter of VT2 forms a turn-on loop. The sixth resistor R6 is used as a drive resistor and is connected to the gate of the first N-channel MOSFET Q2 and the second N-channel MOSFET Q2. As the gate voltage of the second N-channel MOSFET Q2 increases, the second N-channel MOSFET Q2 turns on, and the current begins to flow from the drain to the source.

[0054] The turn-off signal is input to the base of the third NPN transistor VT6 through the ninth resistor R9. After VT6 is turned on, the collector current of VT6 flows through the eleventh resistor R11, driving the third PNP transistor VT4 to turn on. After the third PNP transistor VT4 is turned on, the current is input to the base of the second PNP transistor VT3 in the low-impedance circuit through the twelfth resistor R12. VT3 is turned on, and the current path between the emitter and collector of VT3 forms a turn-off loop. The sixth resistor R6 is used as a driving resistor and is connected to the gate of the first N-channel and second N-channel MOSFETs Q1. Since the gate voltage of the second N-channel MOSFET is reduced, the second N-channel MOSFET is turned off, and the current stops flowing from the drain to the source. The switching time is determined by the driving resistor R6. The required switching time can be obtained by adjusting the resistance value of the sixth resistor R6.

Claims

1. A high-side MOS driving circuit, characterized in that: It includes a bootstrap circuit, a switching control circuit, a low-impedance circuit, and a MOSFET; among which, The bootstrap circuit is used to provide an input voltage to the low impedance circuit by superimposing the capacitor discharge voltage in the bootstrap circuit and the input voltage. The output terminal of the bootstrap circuit is connected to the first input terminal of the low impedance circuit. A switch control circuit is used to convert received externally transmitted logic signals into electrical signals that directly act on the low-impedance circuit and send control signals to the low-impedance circuit. The switch control circuit includes an on control circuit and an off control circuit, and the output terminals of the on control circuit and the off control circuit are respectively connected to the second input terminal and the third input terminal of the low-impedance circuit. The low-impedance circuit is used to respond quickly after the MOS field-effect transistor receives an on or off signal, thereby achieving efficient circuit control; the output terminal of the low-impedance circuit is connected to the gate of the MOS field-effect transistor, and the fourth input terminal of the low-impedance circuit is connected to the source of the MOS field-effect transistor. MOS field-effect transistors are used as switching transistors. By applying different control signals through a switching control circuit, the MOS field-effect transistor switches between two states: on and off, thereby realizing the switching function of logic gates. The low-impedance circuit includes a first NPN transistor, a second PNP transistor, and a sixth resistor. The low-impedance circuit includes a turn-on circuit and a turn-off circuit. A branch between the emitter of the first NPN transistor and the emitter of the second PNP transistor is connected to one end of the sixth resistor, and the other end of the sixth resistor is connected to the gate of the second N-channel MOSFET. The collector and emitter of the first NPN transistor and the sixth resistor (which acts as a drive resistor) constitute the turn-on circuit, and the emitter and collector of the second PNP transistor and the sixth resistor (which acts as a drive resistor) constitute the turn-off circuit. The circuit consists of the following: the collector of the first NPN transistor is connected to the output of the bootstrap circuit as the first input of the low-impedance circuit; the base of the first NPN transistor is connected to the output of the turn-on control circuit as the second input of the low-impedance circuit; the base of the second PNP transistor is connected to the first output of the turn-off control circuit as the third input of the low-impedance circuit; the collector of the second PNP transistor is connected to the second output of the turn-off control circuit as the fourth input of the low-impedance circuit; and the output of the low-impedance circuit is connected to the gate of the second N-channel MOSFET through a sixth resistor.

2. The high-side MOS driving circuit according to claim 1, characterized in that: The turn-on control circuit includes a third resistor, a fourth resistor, a fifth resistor, a seventh resistor, an eighth resistor, a first PNP transistor, and a second NPN transistor. The turn-on signal is input to the turn-on control circuit through one end of the seventh resistor. A branch between the other end of the seventh resistor and the base of the second NPN transistor is connected to one end of the eighth resistor. The other end of the eighth resistor is connected to the emitter of the second NPN transistor, which is also grounded. The collector of the second NPN transistor is connected to the base of the first PNP transistor. Next, a fourth resistor is connected in series between the collector of the second NPN transistor and the base of the first PNP transistor. The emitter of the first PNP transistor is connected to one end of a third resistor, and the other end of the third resistor is connected to the base of the first PNP transistor. The collector of the first PNP transistor is connected to the base of the first NPN transistor in the low-impedance circuit through a fifth resistor. The emitter of the first PNP transistor is also connected to the collector of the first NPN transistor. The collector of the first NPN transistor serves as the output terminal of the turn-on control circuit.

3. The high-side MOS driving circuit according to claim 2, characterized in that: The shutdown control circuit includes a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a third PNP transistor, and a third NPN transistor. The shutdown signal is input to the shutdown control circuit through one end of the ninth resistor. The other end of the ninth resistor is connected to the base of the third NPN transistor. A branch between the ninth resistor and the base of the third NPN transistor is connected to one end of the tenth resistor. The other end of the tenth resistor is connected to the emitter of the third NPN transistor. The emitter of the third NPN transistor is also grounded. The emitter of the transistor is grounded. The collector of the third NPN transistor is connected to the base of the third PNP transistor. An eleventh resistor is connected in series between the collector of the third NPN transistor and the base of the third PNP transistor. The base of the third PNP transistor is connected to one end of the twelfth resistor, and the other end of the twelfth resistor is connected to the emitter of the third PNP transistor. The emitter of the third PNP transistor serves as the first output terminal of the shutdown control circuit, and the collector of the third PNP transistor serves as the second output terminal of the shutdown control circuit.

4. The high-side MOS driving circuit according to claim 3, characterized in that: The bootstrap circuit includes a square wave generator, a third capacitor, a fourth capacitor, a fourth diode, and a fifth diode. The voltage input terminal of the bootstrap circuit is connected to the anode of the fifth diode. The fifth diode and the fourth diode are connected in series in the same direction. A branch between the fifth diode and the fourth diode is connected to the square wave generator through the third capacitor. The fourth capacitor is connected in parallel across the fourth diode and the fifth diode. The cathode of the fourth diode serves as the output terminal of the bootstrap circuit.

5. A high-side MOS driving circuit according to claim 4, characterized in that: It also includes an additional second Zener diode, wherein the collector of the third PNP transistor is connected to the anode of the second Zener diode, and the cathode of the second Zener diode is connected to the emitter of the third PNP transistor.

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