Compensation circuit, operational amplifier circuit, and electronic device

Abstract

The application discloses a compensation circuit of an operational amplifier, an operational amplifier circuit and electronic equipment, and relates to the technical field of operational amplifier circuits. The compensation circuit of the operational amplifier comprises an error amplifier configured to acquire a sampling signal of an input voltage input to two input terminals of the operational amplifier, and to perform error amplification on the sampling signal to obtain an amplified signal; a rectifier circuit configured to rectify the amplified signal to obtain an enable signal; and a current extraction circuit electrically connected to an output terminal of the operational amplifier and an output terminal of the rectifier circuit, and configured to extract part of the current output by the output terminal of the operational amplifier to obtain an extracted current when the first enable signal output by the rectifier circuit is received, so as to compensate for the output voltage of the operational amplifier, and the extracted current is a current proportional to absolute temperature; and the current extraction circuit is turned off when the second enable signal output by the rectifier circuit is received, so that the full-temperature stability of the operational amplifier circuit is significantly improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, in particular to a compensation circuit, an operational amplifier circuit and an electronic device. BACKGROUND

[0002] The operational amplifier circuit (referred to as operational amplifier) is a common circuit in integrated circuit design, which is widely used in various circuits such as amplification, following, comparison, etc. The input offset voltage VOS is an important indicator of the performance of the operational amplifier, which refers to the voltage difference between the input terminals when the output terminal is 0. It is approximately considered that the input offset voltage multiplied by the gain of the operational amplifier represents the deviation of the output voltage from the ideal value. When the operational amplifier is used in a circuit with high voltage precision requirement, how to reduce the input offset voltage of the operational amplifier is particularly important.

[0003] The size of the input offset voltage is related to the circuit structure, process manufacturing and temperature of the operational amplifier. The offset caused by the first two factors can be corrected by adjusting the parameters, but the offset caused by the temperature will be different in different temperature ranges. The offset voltage will gradually increase with the increase of temperature, so it cannot be corrected by adjusting the parameters. Moreover, when the voltage offset in the high temperature range is corrected by adjusting the parameters, the low offset characteristics in the low temperature range will be destroyed, and the problem cannot be solved fundamentally, but the full temperature stability characteristics of the operational amplifier may be reduced. SUMMARY

[0004] A series of simplified concepts are introduced in the summary section, which will be further described in detail in the specific embodiment section. The summary section of the present application does not mean to try to limit the key features and necessary technical features of the claimed technical solution, nor does it mean to try to determine the protection scope of the claimed technical solution.

[0005] In order to solve the above problems, the present application provides an operational amplifier compensation circuit, comprising:

[0006] an error amplifier configured to: obtain a first sampling signal of a first input voltage input to the non-inverting input terminal of the operational amplifier, and obtain a second sampling signal of a second input voltage of the inverting input terminal of the operational amplifier, and perform error amplification on the first sampling signal and the second sampling signal to obtain an amplified signal, wherein when the difference between the first sampling signal and the second sampling signal is greater than or equal to a preset threshold, the amplified signal is a first amplified signal, and when the difference between the first sampling signal and the second sampling signal is less than the preset threshold, the amplified signal is a second amplified signal;

[0007] a rectifier circuit, an input end of which is electrically connected to an output end of the error amplifier, configured to rectify the amplified signal to obtain an enable signal, wherein a first enable signal is obtained when the rectifier circuit receives the first amplified signal, and a second enable signal is obtained when the rectifier circuit receives the second amplified signal;

[0008] a current extraction circuit, an output end of which is electrically connected to the output end of the operational amplifier, and an input end of which is electrically connected to the output end of the rectifier circuit, configured to extract part of the current output by the output end of the operational amplifier to obtain an extracted current to compensate for the output voltage of the operational amplifier when the first enable signal output by the rectifier circuit is received, the extracted current being a current proportional to absolute temperature, and the current extraction circuit being turned off when the second enable signal output by the rectifier circuit is received.

[0009] The technical scheme has the following advantages and beneficial effects: according to the scheme of the embodiment of the application, part of the current output by the output end of the operational amplifier can be extracted by the current extraction circuit to obtain an extracted current to compensate for the output voltage of the operational amplifier selectively at a high temperature range, without affecting the low offset characteristic of the operational amplifier circuit at a low temperature range, so that the full-temperature stability of the operational amplifier circuit is significantly improved.

[0010] Exemplarily, the technical scheme further comprises:

[0011] a first sampling circuit, an output end of which is connected to a first input end of the error amplifier, configured to sample a first input voltage of the non-inverting input end of the operational amplifier to obtain a first sampling signal and output the first sampling signal;

[0012] a second sampling circuit, an output end of which is connected to a second input end of the error amplifier, configured to sample a second input voltage of the inverting input end of the operational amplifier to obtain a second sampling signal and output the second sampling signal;

[0013] The first input end of the error amplifier is connected to the first sampling circuit, and the second input end of the error amplifier is connected to the second sampling circuit.

[0014] The technical scheme has the following advantages and beneficial effects:

[0015] Exemplarily, the first amplified signal is a low-level signal, and the second amplified signal is a high-level signal, and the rectifier circuit comprises a rectifier and an odd number of inverters connected in sequence, configured to rectify and invert the first amplified signal and the second amplified signal to obtain the first enable signal and the second enable signal, respectively.

[0016] The technical scheme has the following advantages and beneficial effects: rectifying the amplified signal by the rectifier makes the voltage output to the inverter more smooth and stable, and inverting the signal by the inverter can control the enable signal output to turn on or turn off the first switch tube.

[0017] Exemplarily, the current extraction circuit comprises a first switch tube, and the output end of the rectifier circuit is connected to the gate of the first switch tube, so as to control the first switch tube to be turned on when the first enable signal is output, so that the current extraction circuit extracts part of the current output by the output end of the operational amplifier to obtain an extracted current, and control the first switch tube to be turned off when the second enable signal is output, so that the current extraction circuit is turned off.

[0018] The above technical solution has the following advantages and beneficial effects: the first switch tube is controlled to be turned on and turned off based on the enable signal, so that part of the current output by the output end of the operational amplifier is selectively extracted by the current extraction circuit to obtain an extracted current to compensate the output voltage of the operational amplifier at a high temperature section, without affecting the low offset characteristic of the operational amplifier circuit at a low temperature section, so that the full-temperature stability of the operational amplifier circuit is significantly improved.

[0019] Exemplarily, the current extraction circuit further comprises:

[0020] a current generation branch connected between the power supply end and the ground end, and comprising a first switch tube, for generating a first current proportional to absolute temperature when the first switch tube is turned on;

[0021] a current mirror circuit connected to one end of the current generation branch;

[0022] a current extraction branch connected to the output end of the operational amplifier at one end and grounded at the other end, and the current extraction branch is further electrically connected to the other end of the current mirror circuit, wherein the current mirror circuit copies the first current proportional to absolute temperature generated by the current generation branch to the current extraction branch by a predetermined multiple, so that the current extraction branch extracts a second current proportional to absolute temperature from the output end of the operational amplifier, and the second current is the first current multiplied by the predetermined multiple.

[0023] The above technical solution has the following advantages and beneficial effects: the current extraction circuit extracts the current proportional to absolute temperature from the output end of the operational amplifier when the first switch tube is turned on, so that the operational amplifier is selectively compensated at a high temperature section, without affecting the low offset characteristic of the operational amplifier at a low temperature section, so that the full-temperature stability of the operational amplifier is significantly improved.

[0024] Exemplarily, the current generation branch comprises:

[0025] a first PMOS tube, with the source connected to the power supply end and the drain connected to the source of the first switch tube;

[0026] a first triode, with the collector connected to the drain of the first switch tube;

[0027] a resistor, one end of the resistor is connected to the emitter of the first triode, and the other end of the resistor is connected to the ground terminal;

[0028] a second PMOS transistor, the gate of the second PMOS transistor is connected to the drain of the first PMOS transistor, and the source of the second PMOS transistor is connected to the power terminal;

[0029] a second triode, the base of the second triode is connected to the emitter of the first triode, the collector of the second triode is connected to the base of the first triode and the drain of the second PMOS transistor, the current flowing through the first triode is the first current proportional to the absolute temperature by using the negative temperature characteristic of the second triode, and the emitter of the second triode is connected to the ground terminal.

[0030] The technical scheme has the following advantages or beneficial effects: the current flowing through the first triode is the first current proportional to the absolute temperature by using the negative temperature characteristic of the second triode, and the extraction current proportional to the temperature is extracted from the operational amplifier based on the first current, the voltage change of the operational amplifier caused by high temperature is effectively inhibited, and the stability of the entire circuit is improved.

[0031] Exemplarily, the current mirror circuit comprises:

[0032] a third PMOS transistor, the gate and the drain of the third PMOS transistor are electrically connected to the gate and the drain of the first PMOS transistor, and the source of the third PMOS transistor is connected to the power terminal;

[0033] a first NMOS transistor, the drain of the first NMOS transistor is connected to the drain of the third PMOS transistor, the gate of the first NMOS transistor is connected to the drain of the third PMOS transistor, the source of the first NMOS transistor is connected to the ground terminal, and the gate of the first NMOS transistor is connected to the current extraction branch.

[0034] The technical scheme has the following advantages or beneficial effects: by the circuit structure, the current of the first PMOS transistor is copied by the third PMOS transistor, that is, the first current proportional to the absolute temperature flowing through the first triode and the resistor is copied, and the first current is copied to the current extraction branch by the first NMOS transistor, so that the extraction current proportional to the temperature is extracted from the operational amplifier, the voltage change of the operational amplifier caused by high temperature is effectively inhibited, and the stability of the entire circuit is improved.

[0035] Exemplarily, the current extraction branch comprises:

[0036] a second NMOS transistor, the gate of the second NMOS transistor is connected to the gate of the first NMOS transistor, the drain of the second NMOS transistor is connected to the output terminal of the operational amplifier, and the source of the second NMOS transistor is connected to the ground terminal.

[0037] The second NMOS tube and the first NMOS tube constitute a current mirror, so that the current proportional to the absolute temperature is copied to the branch where the first NMOS tube is located, thereby controlling the extraction of the extraction current proportional to the temperature from the operational amplifier, effectively inhibiting the voltage change of the operational amplifier caused by high temperature, thereby improving the stability of the entire circuit.

[0038] In one aspect, the present application provides an operational amplifier circuit, comprising an operational amplifier; and the aforementioned compensation circuit, wherein the compensation circuit is electrically connected to the operational amplifier.

[0039] The aforementioned technical solution has the following advantages or beneficial effects: since the operational amplifier circuit of the present application comprises the aforementioned compensation circuit, the operational amplifier can be selectively compensated at a high temperature section, and the low offset characteristics of the operational amplifier at a low temperature section are not affected, so that the full-temperature stability of the operational amplifier is significantly improved.

[0040] In one aspect, the present application provides an electronic device comprising the aforementioned compensation circuit or operational amplifier circuit.

[0041] The aforementioned technical solution has the following advantages or beneficial effects: the aforementioned operational amplifier circuit is included in the electronic device, so it has similar advantages to the aforementioned operational amplifier circuit. BRIEF DESCRIPTION OF DRAWINGS

[0042] The following drawings of the present application are hereby incorporated into the present application as part of the present application for the purpose of understanding the present application. The embodiments of the present application and their description shown in the drawings are used to explain the devices and principles of the present application. In the drawings,

[0043] Figure 1 A temperature characteristic curve of an operational amplifier for copying a constant voltage source in the related art is shown;

[0044] Figure 2 A schematic diagram of a compensation circuit in one embodiment of the present application is shown;

[0045] Figure 3 A circuit schematic diagram of a voltage follower for copying a bandgap reference in one embodiment of the present application is shown;

[0046] Figure 4 A schematic diagram of the offset phenomenon of the bandgap reference copy is shown;

[0047] Figure 5 A circuit structure schematic diagram of an error amplifier in one embodiment of the present application is shown;

[0048] Figure 6 A schematic diagram of the enable signal control PTAT current establishment output by the rectifier circuit in one embodiment of the present application is shown;

[0049] Figure 7 A schematic diagram of a current extraction circuit in one embodiment of the present application is shown;

[0050] Figure 8 A schematic diagram showing temperature characteristic curves of bandgap reference replica voltage before and after compensation in one embodiment of the present application is shown;

[0051] Figure 9 A schematic diagram showing temperature characteristic curves of a constant pressure source before and after compensation in one embodiment of the present application is shown;

[0052] Figure 10 A schematic block diagram of an electronic device in one embodiment of the present application is shown. DETAILED DESCRIPTION

[0053] In the following description, a large number of specific details are provided to provide a more thorough understanding of the present application. However, it will be apparent to those skilled in the art that the present application can be implemented without one or more of these details. In other examples, some technical features well known in the art are not described in order to avoid confusion with the present application.

[0054] It should be understood that the present application can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to make the disclosure thorough and complete and to fully convey the scope of the present application to those skilled in the art. In the drawings, the dimensions and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals throughout represent like elements.

[0055] It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part.

[0056] Spatially relative terms, such as "below," "beneath," "beneath," "above," "upper," etc., may be used herein for convenience to describe the relationship of one element or feature to other elements or features illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientations depicted in the figures.

[0057] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0058] Embodiments of the application are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the application. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, embodiments of the application should not be construed as limited to the particular shapes of the regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. The regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a device and are not intended to limit the scope of the application.

[0059] For a thorough understanding of the application, reference is made to the following detailed description in conjunction with the accompanying drawings, in which:

[0060] An operational amplifier is a common circuit in integrated circuit design, which is widely used in various circuits such as amplification, following, comparison, etc. The input offset voltage VOS is an important indicator of the performance of the operational amplifier, which refers to the voltage difference between the input terminals when the output terminal is 0. It is approximately considered that the input offset voltage multiplied by the gain of the operational amplifier represents the deviation of the output voltage from the ideal value. When the operational amplifier is used in circuits with high voltage precision requirements, it is particularly important to reduce the input offset voltage of the operational amplifier.

[0061] The size of the input offset voltage is related to the circuit structure of the operational amplifier itself, process manufacturing, temperature and other factors. The offset caused by the former two can be corrected by adjusting parameters, but the offset caused by temperature will be different at different temperature ranges, and the offset voltage will gradually increase with the increase of temperature, so it cannot be corrected by adjusting parameters alone.

[0062] The input offset voltage changes with temperature, and its temperature coefficient is called TCVOS, which is the temperature drift of the offset voltage. For circuits with extremely high temperature stability requirements such as bandgap reference, when the operational amplifier is used to copy or amplify them, the input offset voltage of the operational amplifier caused by temperature will directly affect the performance of the circuit, and the accuracy of the latter circuit will also be affected. For example, Figure 1As shown in the figure, an op amp is used to replicate a constant voltage source, where Vref is the constant voltage source and Vref_copy is the replicated voltage generated by the op amp. Observing the temperature characteristic curves of the two, we can see that when temperatures are below 100°C, the voltage values ​​are similar, and the op amp's input offset voltage is low. When the temperature rises above 100°C, Vref_copy gradually deviates from Vref, and the input offset voltage increases. As the op amp's operating temperature continues to rise, the input offset voltage increases sharply in the high-temperature range, causing a sharp decline in circuit performance.

[0063] Improving the op amp's input offset voltage drop at high temperatures is crucial to improving its reliability. While adjusting parameters to correct the voltage offset at high temperatures can damage the original low offset characteristics at low temperatures, it doesn't fundamentally solve the problem and may even reduce the op amp's full-temperature stability.

[0064] The compensation circuit in the embodiments of the present application will be described below with reference to the accompanying drawings. The features in the various embodiments of the present application can be combined with each other without conflict.

[0065] In order to solve the above technical problems, an embodiment of the present application provides a compensation circuit 200 for an operational amplifier 100, such as Figure 2 As shown, it includes: an error amplifier 210, a rectifier circuit 220, and a current extraction circuit 230, wherein the error amplifier 210 is configured to: obtain a first sampling signal of a first input voltage input to the non-inverting input terminal of the operational amplifier 100, and obtain a second sampling signal of a second input voltage input to the inverting input terminal of the operational amplifier 100, perform error amplification on the first sampling signal and the second sampling signal to obtain an amplified signal, wherein when the difference between the first sampling signal and the second sampling signal is greater than a preset threshold, the amplified signal is a first amplified signal, and when the difference between the first sampling signal and the second sampling signal is less than the preset threshold, the amplified signal is a second amplified signal; the input terminal of the rectifier circuit 220 is electrically connected to the output terminal of the error amplifier 210, configured The amplified signal is rectified to obtain an enable signal, wherein the first enable signal is obtained when the rectifier circuit 220 receives the first amplified signal, and the second enable signal is obtained when the rectifier circuit 220 receives the second amplified signal; the current extraction circuit 230 is electrically connected to the output end of the operational amplifier 100 and the output end of the rectifier circuit 220, and is configured as follows: when the first enable signal output by the rectifier circuit 220 is received, the current extraction circuit 230 extracts part of the current output by the output end of the operational amplifier 100 to obtain an extracted current to compensate for the output voltage of the operational amplifier 100, and the extracted current is a current proportional to the absolute temperature; when the second enable signal output by the rectifier circuit 220 is received, the current extraction circuit 230 is turned off.

[0066] In the embodiment of the present application, the voltage of the two input terminals of the operational amplifier 100 is obtained by the error amplifier 210 and amplified, and then rectified by the rectifier circuit 220 to generate an enable signal, which is used to control the current extraction circuit 230 to extract a part of the current output by the output terminal of the operational amplifier 100 to obtain an extracted current or to turn off the current extraction circuit 230, so as to selectively compensate the operational amplifier at a high temperature range, without affecting the low offset characteristic of the operational amplifier at a low temperature range, thereby significantly improving the full-temperature stability of the operational amplifier.

[0067] The structure of each part of the operational amplifier 100 and the compensation circuit 200 in the embodiment of the present application will be illustrated below.

[0068] Firstly, as shown in Figure 2 The compensation circuit 200 further includes a first sampling circuit (i.e. a VP sampling circuit) and a second sampling circuit (i.e. a VN sampling circuit). The first sampling circuit is used to sample the first input voltage of the non-inverting input terminal of the operational amplifier 100 to obtain a first sampling signal (i.e. a sampling voltage VA) and output. The second sampling circuit is used to sample the second input voltage of the inverting input terminal of the operational amplifier 100 to obtain a second sampling signal (i.e. a sampling voltage VB) and output. The first input terminal of the error amplifier 210 (i.e. the non-inverting input terminal) is connected to the output terminal of the first sampling circuit to receive the sampling voltage VA. The second input terminal of the error amplifier 210 (i.e. the inverting input terminal) is connected to the output terminal of the second sampling circuit to receive the sampling voltage VB. The error amplifier 210 performs error amplification on the sampling voltages VA and VB to generate an amplified signal VEA. The amplified signal VEA is rectified by the rectifier circuit 220 (e.g. including a rectifier 221 and an inverter 222 connected in sequence) to generate an enable signal EN, which is input to the gate of the first switch P1 of the current extraction circuit 230 to control the conduction and turn-off of the first switch P1. At a low temperature range, the input offset voltage is low, and the enable signal is a second enable signal. The first switch P1 is turned off by the second enable signal, and the current extraction circuit 230 is also turned off, i.e. the current extraction circuit 230 is not connected to the output terminal VOUT of the operational amplifier 100, so as not to compensate the operational amplifier. As the temperature rises, the input offset voltage gradually rises, and the EN signal is set from "1" to "0", i.e. the enable signal is changed from a first enable signal to a second enable signal, and the first switch P1 is turned on. The current extraction circuit 230 extracts the current of the output node of the operational amplifier 100 (e.g. a first-stage operational amplifier), i.e. extracts a current proportional to absolute temperature (PTAT), which is also referred to as a PTAT current in this document, to compensate the input offset voltage at a high temperature range, thereby improving the performance of the operational amplifier at a high temperature range.

[0069] It is worth mentioning that each switch tube in the embodiments of the present application can be an NMOS tube or a PMOS tube, as long as the reasonable operation of the circuit can be ensured, some PMOS tubes can also be replaced by NMOS tubes, or some NMOS tubes can also be replaced by PMOS tubes, which are not specifically limited here.

[0070] The operational amplifier 100 of the present application can be a voltage follower, a comparator, a non-inverting amplifier, an inverting amplifier or any other possible operational amplifier circuit. In the embodiments of the present application, a voltage follower for copying a bandgap reference voltage is taken as an example to illustrate the compensation circuit 200 and the operational amplifier circuit of the embodiments of the present application, but this is not intended to constitute a limitation.

[0071] As shown in Figure 2 and Figure 3 , the operational amplifier 100, for example, a first-stage operational amplifier circuit, is used to amplify the voltage difference between the voltages VP and VN to generate an output voltage VOUT. The form of the operational amplifier is not limited, but the offset is inevitably present. In order to highlight the influence of temperature on the offset voltage, a voltage follower for copying a bandgap reference voltage is taken as an example. The bandgap reference is a circuit structure with extremely high requirements for temperature stability, so the voltage copied by the operational amplifier also has extremely high requirements for temperature stability, so the sudden increase of the input offset voltage of the operational amplifier at a high temperature section will seriously reduce the accuracy of the copied voltage.

[0072] In one embodiment, the circuit of the voltage follower for copying a bandgap reference voltage is shown in Figure 3 , which mainly consists of NMOS tubes M1-M2, M7-M9, M12, M14-M15, PMOS tubes M3-M6, M10-M11, M13, M16, resistors R1, R2. Its working process is as follows: after the bandgap reference voltage BGR is established, the current flowing through the PMOS tube M6 is lower than the current flowing through the PMOS tube M5, the current of the PMOS tube M6 is copied to the PMOS tube M11 through the NMOS tube M8 and the NMOS tube M9, and the PMOS tube, and the current of M5 is copied through the PMOS tube M12, the VC potential decreases, the M16 current increases, and the VOUT potential rises, which is fed back to the gate of M5 to make VOUT complete the voltage copying of BGR. At the same time, the sampling voltage VA of BGR and the sampling voltage VB of VOUT are connected to the error amplifier 210 for error amplification, and the sampling voltage VA is the node connected between the gate of the NMOS tube M7 and the gate of the PMOS tube M12, and the sampling voltage VB is the node connected between the gate of the NMOS tube M8 and the gate of the NMOS tube M9.

[0073] The first sampling circuit and the second sampling circuit can be partial branches of a first-stage operational amplifier circuit. By sampling the voltages of the positive and negative input terminals of the operational amplifier 100 through the sampling circuits, the sampled voltages VA and VB input to the error amplifier 210 can meet the input requirements of the error amplifier 210, thereby expanding the voltage range that the error amplifier 210 can recognize, thereby ensuring that an accurate comparison result can be output and improving the accuracy of the error amplification comparison.

[0074] like Figure 4 As shown in the figure, Bandgap is the bandgap reference voltage, and Bandgap_copy is the copied bandgap reference voltage, also known as Vout. Within the -40°C to 60°C temperature range, the bandgap reference voltage is copied with high accuracy, resulting in a low offset voltage for the op amp. As the temperature rises, Bandgap_copy gradually deviates from Bandgap, causing the offset voltage to increase. In particular, at temperatures above 125°C, the offset voltage increases dramatically, resulting in poor copy accuracy.

[0075] Furthermore, in order to solve the aforementioned problem of sudden increase in offset voltage, the error amplifier 210 in the embodiment of the present application can be implemented as follows: Figure 5 In some embodiments, the error amplifier 210 may include NMOS transistors M17-M18, M23-M24, and M26, and PMOS transistors M19-M22 and M25, wherein the NMOS transistors M17 and M18 form a current mirror, the drain of the NMOS transistor M17 is connected to the power supply voltage VCC, the source is grounded, the gate thereof is connected to the gate of the NMOS transistor M18, and the gate of the NMOS transistor M18 is also connected to the drain of the NMOS transistor M17, the source of the PMOS transistor M19 is connected to the power supply voltage VCC, the drain thereof is connected to the drain of the NMOS transistor M18, the gate of the PMOS transistor M19 is connected to the drain thereof, the gate of the PMOS transistor M19 is also connected to the gate of the PMOS transistor M20, the source of the PMOS transistor M20 is connected to the power supply voltage VCC, the gate of the PMOS transistor M20 is also connected to the gate of the PMOS transistor M25, the source of the PMOS transistor M25 is connected to the power supply voltage VCC, and the drain thereof serves as the amplified signal V EA The output of the PMOS tube M20, the drain of the PMOS tube M20 is also connected to the source of the PMOS tubes M21 and M22, and the gate of the PMOS tube M21 is connected to the second sampling signal V B The gate of the PMOS tube M22 is connected to the first sampling signal V AThe drain of the PMOS transistor M21 and the drain of the PMOS transistor M22 are respectively connected to the drain of the NMOS transistor M23 and the drain of the NMOS transistor M24, the source of the NMOS transistor M23 and the source of the NMOS transistor M24 are grounded, the gate of the NMOS transistor M23 and the gate of the NMOS transistor M24 are electrically connected and connected to the drain of the NMOS transistor M23, the gate of the NMOS transistor M26 is connected to the drain of the NMOS transistor M24, the drain of the NMOS transistor M26 is connected to the drain of the PMOS transistor M25, and the source of the NMOS transistor M26 is grounded.

[0076] The first sampling signal of the first operational amplifier 100 shown in the foregoing Figure 3 The sampling voltage VA of the first sampling signal such as BGR and the sampling voltage VB of the second sampling signal such as VOUT are respectively input to the inverting input terminal and the non-inverting input terminal of the error amplifier 210 for error amplification to generate an amplified signal VEA.

[0077] The specific working process is as follows: as known from the working process of the foregoing first operational amplifier, VOUT rises with BGR, and the sampling voltage VB rises, the current of the PMOS transistor M21 decreases, the gate potential VG,M26 of the NMOS transistor M26 rises, the NMOS transistor M26 is turned on, and VEA is pulled low. That is, when the error of the two decreases, the VEA signal generated by amplification also decreases, and when the difference between the first sampling signal and the second sampling signal is less than a preset threshold, the amplified signal VEA is a second amplified signal, for example, a low-level signal.

[0078] As shown in the foregoing Figure 6 When the difference between VOUT and the bandgap reference BGR signal is large, the VEA generated by error amplification of the sampling signal rises, that is, when the difference between the first sampling signal and the second sampling signal is greater than a preset threshold, the amplified signal VEA is a first amplified signal, for example, a high-level signal.

[0079] Further, in some embodiments, the rectifier circuit 220 is electrically connected to the output terminal of the error amplifier 210, and is configured to rectify the amplified signal to obtain an enable signal, wherein the first enable signal is obtained when the rectifier circuit 220 receives the first amplified signal, and the second enable signal is obtained when the rectifier circuit 220 receives the second amplified signal, and the enable signal is used to control the conduction and shutdown of the corresponding first switch tube P1 of the current extraction circuit 230, wherein when the first switch tube P1 is a PMOS transistor, the first enable signal is a low-level signal to control the conduction of the first switch tube P1, and the second enable signal is a high-level signal to control the shutdown of the first switch tube P1.

[0080] Optionally, the rectifier circuit 220 may include a rectifier 221 and an odd number of inverters 222, which are used to rectify and invert the first amplified signal and the second amplified signal to obtain a first enable signal and a second enable signal, respectively. The amplified signal is rectified by the rectifier 221 so that the voltage output to the inverter 222 becomes smoother and more stable, and the signal can be inverted by the inverter 222, thereby controlling the enable signal that controls the output switch tube to be turned on or off.

[0081] For example, when the difference between the first sampling signal and the second sampling signal is less than a preset threshold, the amplified signal VEA is pulled low, that is, the second amplified signal is a low-level signal. After being rectified by the rectifier 221 and inverted by the inverter 222, a second enable signal, for example, "1" is output. Since the temperature is at a relatively low temperature end at this time, the offset voltage is small, and the output of the operational amplifier 100 is not compensated. When the difference between the first sampling signal and the second sampling signal is greater than or equal to the preset threshold, the amplified signal VEA is increased. After being rectified by the rectifier circuit 220, the enable signal En is changed from "1" to "0", thereby turning on the first switch transistor P1, for example, a PMOS transistor, and establishing a PTAT current. As a result, the current extraction circuit 230 extracts a portion of the current output from the output terminal of the operational amplifier 100 to obtain an extraction current to compensate for the output voltage of the operational amplifier 100. The extraction current is a current proportional to the absolute temperature.

[0082] For example, Figure 6 As shown, when the temperature is within the range of -40°C to 60°C, the EN signal is a high-level signal, for example, 5.0V, that is, the enable signal EN generated by VEA through the rectifier circuit 220 is set to "1", the first switch tube P1 is turned off, the current extracted by the current extraction circuit 230 is almost zero, and the PTAT current is not established. When the temperature is higher than 60°C, the EN signal is a low-level signal, that is, EN is set from "1" to "0", the switch tube P1 is turned on, and the current extraction circuit 230 extracts a current proportional to the absolute temperature, thereby selectively compensating the operational amplifier in the high temperature range without affecting the low offset characteristics of the operational amplifier in the low temperature range, thereby significantly improving the full-temperature stability of the operational amplifier.

[0083] The current extraction circuit 230 in the embodiment of the present application can be implemented by any suitable circuit structure, such as a PTAT current extraction circuit. Figure 7 The circuit configuration shown in FIG is used for illustration purposes only, but this is not intended to be limiting.

[0084] In some embodiments, as Figure 7As shown, when the temperature is higher than 60°C, the EN signal is a low-level signal, that is, EN is set from "1" to "0", the first switch tube P1 is turned on, and the negative temperature characteristic of the transistor VBE is used to generate a PTAT current and connect it to the output node VOUT for extraction, thereby compensating the input offset voltage of the operational amplifier 100.

[0085] like Figure 7 As shown, the current extraction circuit 230 includes a first switching tube P1, and the output end of the rectifier circuit 220 is connected to the gate of the gate P1 of the first switching tube, which is used to: when a first enable signal is output, control the first switching tube to be turned on, so that the current extraction circuit 230 extracts part of the current output by the output end of the operational amplifier 100 to obtain the extracted current; when a second enable signal is output, control the first switching tube to be turned off, so that the current extraction circuit 230 is turned off. The first switching tube P1 can be an NMOS tube or a PMOS tube. For example, if it is an NMOS tube, the inverter 222 can be omitted or an even number of inverters 222 can be set, and if it is a PMOS tube, an odd number of inverters 222 can be set, so that the first switching tube P1 is controlled to be turned on at high temperature and turned off at low temperature.

[0086] Furthermore, in some embodiments, the current extraction circuit 230 further includes a current generating branch, a current mirror circuit, and a current extraction branch. The current extraction circuit 230 is connected between a power supply terminal and a ground terminal, and includes a first switching transistor for generating a first current proportional to the absolute temperature when the first switching transistor is turned on. One end of the current mirror circuit is connected to the current generating branch, one end of the current extraction branch is connected to the output terminal of the operational amplifier 100, and the other end is grounded. The current extraction branch is also electrically connected to the other end of the current mirror circuit. The current mirror circuit replicates the first current proportional to the absolute temperature generated by the current generating branch to the current extraction branch at a predetermined multiple, so that the current extraction branch extracts a second current proportional to the absolute temperature from the output terminal of the operational amplifier 100, where the second current is a predetermined multiple of the first current. The predetermined multiple can be reasonably set according to actual needs and is primarily determined by the replication ratio of the current mirror circuit. For example, the current mirror circuit can have a 1:1 ratio, a 1:2 ratio, or other suitable ratios.

[0087] In some embodiments, as Figure 7As shown, the current generation branch includes: a first PMOS M28, a first transistor Q1, a resistor R3, a second PMOS M27, a second transistor Q2, wherein the source of the first PMOS M28 is connected to a power supply end (i.e. a power supply voltage VCC), the drain of the first PMOS M28 is connected to the source of a first switch P1, the collector of the first transistor Q1 is connected to the drain of the first switch P1, one end of the resistor R3 is connected to the emitter of the first transistor Q1, the other end is connected to a ground end, the gate of the second PMOS M27 is connected to the drain of the first PMOS M28, the source of the second PMOS M27 is connected to the power supply end, the base of the second transistor Q2 is connected to the emitter of the first transistor Q1, the collector of the second transistor Q2 is connected to the base of the first transistor Q1 and the drain of the second PMOS M27, the emitter of the second transistor Q2 is grounded, and the current flowing through the first transistor Q1 is a first current proportional to the absolute temperature by using the negative temperature characteristic of the second transistor Q2, and the extraction current from the operational amplifier 100 is controlled based on the first current, thereby effectively suppressing the voltage change of the operational amplifier 100 caused by high temperature, and improving the stability of the entire circuit.

[0088] The current mirror circuit can be implemented based on any suitable circuit structure capable of playing a current copying role, for example, as shown in Figure 7 As shown, the current mirror circuit includes: a third PMOS M29 and a first NMOS M30, the gate of the third PMOS M29 is electrically connected to the gate and the drain of the first PMOS M28, the source of the third PMOS M29 is connected to a power supply end, the drain of the first NMOS M30 is connected to the drain of the third PMOS M29, the gate of the first NMOS M30 is connected to the drain of the third PMOS M29, the source of the first NMOS M30 is connected to a ground end, and the gate of the first NMOS M30 is connected to the current extraction branch. Through such a circuit structure, the current of the first PMOS M28 is copied by the third PMOS M29, that is, the first current proportional to the absolute temperature flowing through the first transistor Q1 and the resistor R3 is copied, and then the first NMOS M30 is used to copy the first current to the current extraction branch, thereby controlling the extraction current from the operational amplifier 100 to be positively related to the temperature, effectively suppressing the voltage change of the operational amplifier 100 caused by high temperature, and improving the stability of the entire circuit.

[0089] In one embodiment, the current extraction branch includes a second NMOS M31, the gate of the second NMOS M31 is connected to the gate of the first NMOS M30, and the drain of the second NMOS M31 is connected to the output end of the operational amplifier 100, for example, and the output node V DThe connection, the source of the second NMOS tube is connected to the ground. The second NMOS tube M31 and the first NMOS tube M30 constitute a current mirror to realize copying the current proportional to the absolute temperature to the branch where the first NMOS tube M30 is located, thereby controlling the extraction current proportional to the temperature from the operational amplifier 100, effectively inhibiting the voltage change of the operational amplifier 100 caused by high temperature, thereby improving the stability of the entire circuit.

[0090] As Figure 7 shown in the current extraction circuit 230, the working process is as follows: when the enable signal EN is "1", the first switch tube P1 of the PMOS tube is off, the third PMOS tube M29 is off, resulting in that the second NMOS tube M31 is off, and the current extraction circuit 230 does not work. When EN is changed from "1" to "0", the first switch tube P1 is turned on, and the negative temperature characteristic of the VBE (base-emitter voltage) of the second transistor Q2 is utilized, that is, the higher the temperature, the lower the VBE of the second transistor Q2, and then the base voltage of the second transistor Q2 is also correspondingly lower. Since the base of the second transistor Q2 is connected to the emitter of the first transistor Q1, that is, the base voltage of the second transistor Q2 is lowered, correspondingly, the emitter of the first transistor Q1 is also pulled down, so that the current flowing through the first transistor Q1 presents a current proportional to the absolute temperature. Since the resistance R3 and the first transistor Q1 are in the same branch, a PTAT current is also generated on the resistance R3, and the PTAT current also flows through the first PMOS tube M28. The second NMOS tube M31 copies the current of the first PMOS tube M28 and extracts from the VOUT node, thereby realizing the offset compensation in the high temperature section.

[0091] As Figure 8 shown, Bandgap is the bandgap reference voltage, Bandgap_copy is the copied voltage before compensation, and Bandgap_copy_compensate is the copied voltage after compensation. It can be seen that when the temperature is higher than 60℃, the input offset voltage of the operational amplifier is obviously reduced, and especially the trend of the offset voltage sharply increasing when the temperature is higher than 125℃ is obviously pulled back.

[0092] It is worth mentioning that the compensation circuit 200 in the embodiment of the present application has wide applicability and is not only suitable for voltage copying of the bandgap reference. This circuit can compensate for different kinds of operational amplifier offset temperature drift. The scheme of the present application can be compensated for different circuits by changing the compensation start temperature or the compensation current size or the current rising slope, and has wide applicability. For example, the high temperature section of the constant voltage source is compensated, combined with Figure 1 and Figure 9It can also be seen that Vref is a reference voltage, V_copy is a copy voltage before compensation, and V_copy_compensate is a copy voltage after compensation. When the temperature is higher than 60℃, the input offset voltage of the operational amplifier is obviously reduced, and the compensation effect of the operational amplifier on the high temperature section of the constant voltage source is also significant.

[0093] With reference to the foregoing Figure 2 In the embodiments of the present application, an operational amplifier circuit is also provided, which comprises the foregoing compensation circuit 200 and the operational amplifier 100, and the compensation circuit 200 is electrically connected to the operational amplifier 100. Since the operational amplifier circuit of the present application comprises the foregoing compensation circuit 200, the operational amplifier can be selectively compensated in the high temperature section, and the low offset characteristic of the operational amplifier in the low temperature section is not affected, so that the full temperature stability of the operational amplifier is significantly improved.

[0094] In another aspect of the present application, as Figure 10 shown, an electronic device 1000 is provided, which comprises the operational amplifier circuit as above. The electronic device can be any electronic product or device such as a household appliance (e.g., a variable frequency air conditioner), a television, a mobile phone, a tablet computer, a notebook computer, a netbook, a game console, a television set, a VCD, a DVD, a navigation device, a camera, a camcorder, a voice recorder, an MP3, an MP4, a PSP, etc. The electronic device of the present application has similar advantages to the operational amplifier circuit as above.

[0095] Although the example embodiments have been described herein with reference to the accompanying drawings, it is to be understood that the above-described example embodiments are merely exemplary and are not intended to limit the scope of the present application. Various changes and modifications can be made thereto by those of ordinary skill in the art without departing from the scope and spirit of the present application. All such changes and modifications are intended to be included within the scope of the present application as claimed in the appended claims.

[0096] In the specification provided herein, a large number of specific details are described. However, it can be understood that the embodiments of the present application can be practiced without these specific details. In some examples, well-known methods, structures and techniques are not shown in detail in order not to obscure the understanding of the present specification.

[0097] Similarly, it is to be understood that the embodiments of the present application can be used in any combination, whether such combinations are specifically noted herein or not. For example, a combination of any of the embodiments described herein can be used in any combination. Descriptions of examples of the application in the detailed description and drawings are illustrative of the various aspects of the present application and are not intended to limit the scope of the application, as claimed. While the application has been illustrated and described in detail in the drawings and foregoing description, the same is to be considered as illustrative and not restrictive in character, it being understood that only illustrative embodiments thereof have been shown and described and that changes and modifications can be made by those skilled in the art without departing from the scope of the application as set forth in the claims below. For example, the features of the various embodiments of the application can be combined in any combination, where such features are not mutually inconsistent. Therefore, the application as claimed is intended to cover all such changes and modifications that are within the scope of this application.

[0098] Those skilled in the art will appreciate that all features described herein (including all accompanying claims, abstract and drawings) can be combined in any combination, except where such combinations are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) can be replaced by alternative features that serve the same, equivalent or similar purpose, unless expressly stated otherwise.

[0099] Furthermore, those skilled in the art will recognize that references in the specification to "one embodiment", "an embodiment", "an example embodiment" mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily referring to a single, "one embodiment".

[0100] It is noted that the foregoing examples have been presented by way of explanation of the present application, not limitation, and that alternative embodiments can be devised by those skilled in the art without departing from the scope of the appended claims.

Claims

1. A compensation circuit for an operational amplifier, characterized in that: include: an error amplifier configured to: obtain a first sampling signal of a first input voltage input to a non-inverting input terminal of the operational amplifier, and obtain a second sampling signal of a second input voltage input to an inverting input terminal of the operational amplifier, and perform error amplification on the first sampling signal and the second sampling signal to obtain an amplified signal, wherein when a difference between the first sampling signal and the second sampling signal is greater than or equal to a preset threshold, the amplified signal is a first amplified signal, and when the difference between the first sampling signal and the second sampling signal is less than the preset threshold, the amplified signal is a second amplified signal; a rectifier circuit, whose input end is electrically connected to the output end of the error amplifier, and configured to: rectify the amplified signal to obtain an enable signal, wherein the first enable signal is obtained when the rectifier circuit receives the first amplified signal, and the second enable signal is obtained when the rectifier circuit receives the second amplified signal; A current extraction circuit is electrically connected to the output end of the operational amplifier and the output end of the rectifier circuit, and is configured such that: when receiving the first enable signal output by the rectifier circuit, the current extraction circuit extracts part of the current output by the output end of the operational amplifier to obtain an extracted current to compensate for the output voltage of the operational amplifier, wherein the extracted current is a current proportional to the absolute temperature; when receiving the second enable signal output by the rectifier circuit, the current extraction circuit is turned off.

2. The compensation circuit according to claim 1, wherein: Also includes: a first sampling circuit, wherein the output end of the first sampling circuit is connected to the first input end of the error amplifier, and is used to sample the first input voltage of the non-inverting input end of the operational amplifier to obtain and output the first sampling signal; a second sampling circuit, wherein the output terminal of the second sampling circuit is connected to the second input terminal of the error amplifier, and is used to sample the second input voltage of the inverting input terminal of the operational amplifier to obtain and output the second sampling signal; The first input terminal of the error amplifier is connected to the first sampling circuit, and the second input terminal of the error amplifier is connected to the second sampling circuit.

3. The compensation circuit according to claim 1, wherein: The first amplified signal is a low-level signal, the second amplified signal is a high-level signal, and the rectifier circuit includes a rectifier and an odd number of inverters connected in sequence, which are used to rectify and invert the first amplified signal and the second amplified signal to obtain the first enable signal and the second enable signal respectively.

4. The compensation circuit according to claim 1, wherein: The current extraction circuit includes a first switching tube, and the output end of the rectifier circuit is connected to the gate of the first switching tube, and is used to: when the first enable signal is output, control the first switching tube to be turned on, so that the current extraction circuit extracts part of the current output by the output end of the operational amplifier to obtain the extracted current; when the second enable signal is output, control the first switching tube to be turned off, so that the current extraction circuit is turned off.

5. The compensation circuit according to claim 4, wherein: The current extraction circuit further includes: a current generating branch, connected between the power supply terminal and the ground terminal, and comprising the first switching tube, configured to generate a first current proportional to the absolute temperature when the first switching tube is turned on; a current mirror circuit, one end of which is connected to the current generating branch; A current extraction branch, one end of which is connected to the output terminal of the operational amplifier and the other end is grounded, and the current extraction branch is also electrically connected to the other end of the current mirror circuit, wherein the current mirror circuit copies the first current generated by the current generating branch and the first current proportional to the absolute temperature to the current extraction branch at a predetermined multiple, so that the current extraction branch extracts a second current proportional to the absolute temperature from the output terminal of the operational amplifier, and the second current is the predetermined multiple of the first current.

6. The compensation circuit according to claim 5, wherein: The current generating branch comprises: a first PMOS transistor, whose source is connected to the power supply terminal and whose drain is connected to the source of the first switch transistor; a first triode, wherein the collector of the first triode is connected to the drain of the first switching tube; a resistor, one end of the resistor being connected to the emitter of the first transistor, and the other end of the resistor being connected to a ground terminal; a second PMOS transistor, wherein a gate of the second PMOS transistor is connected to the drain of the first PMOS transistor, and a source of the second PMOS transistor is connected to the power supply end; a second transistor, wherein the base of the second transistor is connected to the emitter of the first transistor, the collector of the second transistor is connected to the base of the first transistor and the drain of the second PMOS transistor, and the negative temperature characteristic of the second transistor is utilized to make the current flowing through the first transistor the first current that is proportional to the absolute temperature, and the emitter of the second transistor is grounded.

7. The compensation circuit according to claim 6, wherein: The current mirror circuit comprises: a third PMOS transistor, wherein the gate of the third PMOS transistor is electrically connected to the gate and drain of the first PMOS transistor, and the source of the third PMOS transistor is connected to the power supply terminal; a first NMOS transistor, wherein the drain of the first NMOS transistor is connected to the drain of the third PMOS transistor, the gate of the first NMOS transistor is connected to the drain of the third PMOS transistor, the source of the first NMOS transistor is connected to the ground terminal, and the gate of the first NMOS transistor is connected to the current extraction branch.

8. The compensation circuit according to claim 7, wherein: The current extraction branch comprises: A second NMOS transistor, wherein the gate of the second NMOS transistor is connected to the gate of the first NMOS transistor, the drain of the second NMOS transistor is connected to the output end of the operational amplifier, and the source of the second NMOS transistor is connected to the ground end.

9. An operational amplifier circuit, characterized in that: include: Operational amplifiers; And the compensation circuit according to any one of claims 1 to 8, wherein the compensation circuit is electrically connected to the operational amplifier.

10. An electronic device, characterized in that: include: The operational amplifier circuit according to claim 9.

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