Trigger system of broadband oscilloscope and trigger compensation method thereof, host computer, medium

By adding an amplitude difference calculation module to the trigger system of a broadband oscilloscope, and using the upper computer to perform comparison level compensation correction, the trigger inaccuracy problem caused by signal processing is solved, and the accuracy of the trigger system is improved.

CN119689055BActive Publication Date: 2025-08-12成都玖锦科技有限公司
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Patent Information

Application Number
CN202411857973.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-17
Publication Date
2025-08-12
Estimated Expiration
2044-12-17

AI Technical Summary

Technical Problem

In the two-stage triggering system of existing broadband oscilloscopes, the signal processing module performs gain control and other processing on the signal, resulting in a change in the signal waveform amplitude, resulting in inaccurate triggering when the first-stage trigger and the second-stage trigger using the same comparison level.

Method used

The amplitude difference calculation module is added to the trigger system of a broadband oscilloscope. The amplitude difference before and after the signal processing of the upper computer receives the signal, and performs the comparison level compensation correction of the first-level trigger module to ensure that the front and rear-level trigger modules use different comparison levels.

Benefits of technology

Improve the trigger accuracy of the broadband oscilloscope trigger system to ensure the accuracy and stability of the trigger position.

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Patent Text Reader

Abstract

The present application discloses a trigger system for a broadband oscilloscope and its trigger compensation method, host computer, and medium, relating to the technical field of oscilloscopes. The method includes: controlling an acquisition module to perform channel acquisition to obtain parallel measured signals; receiving a first amplitude difference sent by an amplitude difference calculation module, and receiving a second amplitude difference sent by a signal processing module; the first amplitude difference is the difference between the waveform amplitude of the measured signal not processed by the signal processing module and the waveform amplitude of the measured signal processed by the signal processing module, and the second amplitude difference is the amplitude value of gain compensation; based on the first amplitude difference and the second amplitude difference, the first initial comparison level of the first-level trigger module is compensated and corrected; the first initial comparison level is the same as the second initial comparison level of the second-level trigger module. Thus, by performing error compensation on the comparison level of the first trigger, the trigger accuracy of the broadband oscilloscope trigger system is improved.
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Description

Technical Field

[0001] The present application relates to the technical field of oscilloscopes, and in particular to a trigger system of a broadband oscilloscope and a trigger compensation method thereof, a host computer, and a medium. Background Art

[0002] At present, the advanced trigger scheme of oscilloscopes mainly adopts a two-level trigger mechanism, that is, coarse positioning is first performed through the first-level trigger, and then fine positioning is performed based on the coarse trigger data fragment through the second-level trigger. The two-level trigger cooperates with each other to accurately locate the trigger point while improving the trigger resolution, thereby meeting the high-precision triggering requirements of broadband oscilloscopes.

[0003] However, the trigger comparison level set by the user using the host computer software interface is the same comparison level used for both the primary and secondary triggers. After the primary trigger, the signal processing module performs gain control and signal processing on the measured signal, causing the waveform amplitude of the measured signal to change. At this point, if the same comparison level is still used for both the primary and secondary triggers, the trigger position will not be triggered during the triggering process, while the position that should not be triggered will be triggered, thereby reducing the trigger accuracy of the broadband oscilloscope's trigger system. Summary of the Invention

[0004] The main purpose of this application is to provide a trigger system for a broadband oscilloscope and its trigger compensation method, host computer, and medium, so as to improve the trigger accuracy of the broadband oscilloscope trigger system by compensating the error of the comparison level of the first-level trigger.

[0005] To achieve the above objectives, the present application provides a broadband oscilloscope trigger compensation method, which is applied to the trigger system of a broadband oscilloscope. The trigger system of the broadband oscilloscope includes an acquisition module, a signal processing module, an amplitude difference calculation module, a primary trigger module, a secondary trigger module, and a host computer. The method is executed by the host computer and includes:

[0006] Controlling the acquisition module to perform channel acquisition to obtain parallel measured signals;

[0007] receiving a first amplitude difference sent by the amplitude difference calculation module and receiving a second amplitude difference sent by the signal processing module; the first amplitude difference being the difference between the waveform amplitude of the measured signal not processed by the signal processing module and the waveform amplitude of the measured signal processed by the signal processing module; and the second amplitude difference being the amplitude value of the gain compensation;

[0008] A first initial comparison level of the primary trigger module is compensated and corrected based on the first amplitude difference and the second amplitude difference; the first initial comparison level is the same as the second initial comparison level of the secondary trigger module.

[0009] Optionally, the second initial comparison level is half of the peak amplitude of the measured signal processed by the secondary trigger module.

[0010] Optionally, the compensating and correcting the first initial comparison level of the first-level trigger module based on the first amplitude difference and the second amplitude difference includes: determining a total amplitude difference based on the first amplitude difference and the second amplitude difference; determining a compensation coefficient based on the total amplitude difference using a preset formula; and compensating and correcting the first initial comparison level based on the compensation coefficient.

[0011] Optionally, the preset formula is:

[0012] A=( V p -V delt ) / V p *100%

[0013] Wherein, A is the compensation coefficient, Vp is the peak amplitude of the measured signal processed by the secondary trigger module, V delt is the total amplitude difference.

[0014] Optionally, after compensating and correcting the first initial comparison level of the first-level trigger module based on the first amplitude difference and the second amplitude difference, the method further includes: obtaining the sensitivity of the hysteresis comparison band; determining the first comparison threshold and the second comparison threshold corresponding to the first-level trigger module based on the compensated first initial comparison level, the compensation coefficient and the sensitivity, and sending the first comparison threshold and the second comparison threshold corresponding to the first-level trigger module to the first-level trigger module; determining the first comparison threshold and the second comparison threshold corresponding to the second-level trigger module based on the second initial comparison level and the sensitivity, and sending the first comparison threshold and the second comparison threshold corresponding to the second-level trigger module to the second-level trigger module.

[0015] The present application also provides a host computer, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the broadband oscilloscope trigger compensation method described above is implemented.

[0016] The present application also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the broadband oscilloscope trigger compensation method as described above is implemented.

[0017] In addition, to achieve the above-mentioned purpose, the present application also provides a trigger system for a broadband oscilloscope, comprising the above-mentioned host computer, acquisition module, parallel cache module, parallel-to-serial conversion module, signal processing module, amplitude difference calculation module, first-level trigger module and second-level trigger module; the acquisition module is used to perform channel acquisition to obtain two parallel measured signals; wherein, the acquisition module outputs one measured signal to the first-level trigger module, and the acquisition module outputs the other measured signal to the parallel cache module; the parallel cache module is used to cache the measured signal and receive a first control signal sent by the first-level trigger module; the first control signal is used to change the read and write state of the parallel cache module; the parallel-to-serial conversion module is used to convert the parallel measured signal output by the parallel cache module into a serial measured signal, and output the serial measured signal to the amplitude difference module. calculation module and the signal processing module; the signal processing module is used to perform signal processing on the measured signal and output the processed measured signal to the amplitude difference calculation module and the secondary trigger module; the signal processing includes at least gain compensation, amplitude-frequency and phase-frequency compensation; the amplitude difference calculation module is used to determine a first amplitude difference based on the measured signal sent by the parallel-to-serial conversion module and the measured signal sent by the signal processing module, and send the first amplitude difference to the host computer; the host computer is used to receive the first amplitude difference sent by the amplitude difference calculation module and the second amplitude difference sent by the signal processing module, and compensate and correct the first initial comparison level of the primary trigger module based on the first amplitude difference and the second amplitude difference; the second amplitude difference is the amplitude value of the gain compensation, and the first initial comparison level is the same as the second initial comparison level of the secondary trigger module.

[0018] Optionally, the acquisition module includes an ADC acquisition unit and a preprocessing unit; the ADC acquisition unit is used to perform channel acquisition to obtain parallel measured signals; the preprocessing unit is connected to the ADC acquisition unit, and the preprocessing unit is used to reduce the speed and perform hard extraction processing on the measured signals to obtain two parallel measured signals.

[0019] Optionally, the trigger system of the broadband oscilloscope also includes a serial cache module and a data transmission module; the serial cache module is respectively connected to the signal processing module and the secondary trigger module, and the serial cache module is used to receive the measured signal sent by the signal processing module, cache the measured signal, and receive the second control signal sent by the secondary trigger module to output the target signal according to the second control signal; the second control signal is used to change the read and write status of the serial cache module; the data transmission module is respectively connected to the amplitude difference calculation module and the serial cache module, and is used to receive the first amplitude difference sent by the amplitude difference calculation module and the target signal output by the serial cache module, and output the first amplitude difference and the target signal to the host computer.

[0020] The broadband oscilloscope trigger compensation method of the present application adds an amplitude difference calculation module to the trigger system of the broadband oscilloscope to determine the waveform amplitude difference before and after the signal processing module processes the measured signal, that is, the first amplitude difference; the host computer then receives the first amplitude difference sent by the amplitude difference calculation module and the second amplitude difference sent by the signal processing module; finally, the host computer compensates and corrects the first initial comparison level of the first-level trigger module based on the first amplitude difference and the second amplitude difference, thereby improving the trigger accuracy of the broadband oscilloscope trigger system. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 Schematic diagram of the structure of the trigger system of the broadband oscilloscope according to the embodiment of the present application;

[0022] Figure 2 This is one of the flow charts of the broadband oscilloscope trigger compensation method according to an embodiment of the present application;

[0023] Figure 3 This is the second flow chart of the broadband oscilloscope trigger compensation method according to an embodiment of the present application;

[0024] Figure 4 This is the third flow chart of the broadband oscilloscope trigger compensation method according to an embodiment of the present application;

[0025] Figure 5 This is a schematic diagram of a first-level trigger module processing waveform amplitude in a specific example of the present application;

[0026] Figure 6 This is a schematic diagram of a two-stage trigger module processing waveform amplitude in a specific example of the present application;

[0027] Figure 7 An example of a physical structure diagram of a host computer is shown;

[0028] In the figure, 110, host computer; 120, acquisition module; 121, ADC acquisition unit; 122, pre-processing unit; 130, parallel cache module; 140, parallel-to-serial conversion module; 150, signal processing module; 160, amplitude difference calculation module; 170, first-level trigger module; 180, second-level trigger module; 190, serial cache module; 200, data transmission module; 710, processor; 720, communication interface; 730, memory; 740, communication bus.

[0029] The realization of the objectives, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0030] To make the objectives, technical solutions, and advantages of this application more clear, the technical solutions in this application will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0031] An oscilloscope is an electronic measuring instrument used to observe the waveform of an electrical signal as it changes over time. Triggering refers to the process by which an oscilloscope begins recording a signal when specific conditions are met. This process enables the oscilloscope to display repetitive waveforms stably and synchronously with events of interest.

[0032] Among oscilloscope triggering technologies, the most advanced currently employed two-stage triggering mechanisms. Specifically, the first stage uses parallel triggering for coarse positioning. During this stage, the system rapidly scans the input signal stream and identifies signals that meet preset criteria. However, due to the nature of parallel data processing, this process cannot accurately determine the exact trigger point location, which can result in slight time offsets in the captured waveform (for example, a uniform waveform jitter of approximately 4 nanoseconds). These roughly located data fragments are then stored in a parallel FIFO (first-in, first-out) buffer. A parallel-to-serial conversion module converts the parallel data into serial data and transmits it to the backend processing board. After entering the second stage of triggering, the processing board receives the converted serial data and implements more refined trigger control. This approach eliminates the time offset introduced by the first stage of triggering, ensuring stable waveform display.

[0033] The two-stage triggering works together to improve trigger resolution while precisely locating the trigger point, thus meeting the high-precision triggering requirements of oscilloscopes. This trigger system can process large amounts of collected data in real time, significantly improving trigger accuracy through parallel triggering for coarse positioning and serial triggering for fine positioning. As a result, it is widely used in the oscilloscope field.

[0034] However, in practical applications, this "two-stage triggering" approach presents some new challenges. Specifically, after the parallel-to-serial conversion module converts the parallel data into serial data, the signal processing module on the back-end processing board performs gain control on the signal, causing the amplitude of the signal waveform to change. Furthermore, the signal processing module performs a series of signal processing operations, such as amplitude-frequency compensation and phase-frequency compensation. These signal processing operations result in a certain variation in the signal waveform amplitude relative to the signal waveform currently captured by the front-end acquisition board.

[0035] However, the trigger comparison level set by the user through the host computer software interface is used by both the front-end primary trigger module and the back-end secondary trigger module. In other words, signals with different waveform amplitudes use the same trigger comparison level, which can lead to inaccurate triggering. For example, the waveform initially acquired by the front end has a certain attenuation in waveform amplitude due to deviations in the front-end RF link and hardware. After gain control and signal processing in the back-end signal processing module, the waveform amplitude of the signal is relatively higher when it reaches the back-end secondary trigger process. At this time, if the trigger comparison level of the two-stage trigger is placed near the peak, the trigger comparison level exceeds the waveform amplitude processed by the first-stage trigger, causing the first-stage trigger to fail to trigger, which in turn causes the trigger to not be triggered. Conversely, if the waveform amplitude of the signal processed by the first-stage trigger is higher than the waveform amplitude processed by the second-stage trigger, it will trigger when it should not be triggered.

[0036] Therefore, due to the error in the amplitude of the signal waveform processed before and after the two-stage trigger, the current two-stage trigger solution has the problem of inaccurate triggering.

[0037] Based on this, embodiments of the present application provide a trigger system for a broadband oscilloscope, a trigger compensation method thereof, a host computer, and a medium. The amplitude difference caused by gain control changes and the amplitude difference compensated by calibration by a back-end signal processing module are calculated by an amplitude difference calculation module. The amplitude difference is then compensated to the trigger comparison level of the first-stage trigger module by the host computer, eliminating the impact of the amplitude difference between the signal waveforms before and after the two-stage trigger, thereby improving the trigger accuracy of the broadband oscilloscope trigger system.

[0038] For ease of understanding, the embodiment of the present application first introduces in detail the structure of the trigger system of the broadband oscilloscope. Figure 1 Schematic diagram of the trigger system of the broadband oscilloscope according to the embodiment of the present application. Figure 1 As shown, the trigger system of the broadband oscilloscope may include a host computer 110 , an acquisition module 120 , a parallel buffer module 130 , a parallel-to-serial conversion module 140 , a signal processing module 150 , an amplitude difference calculation module 160 , a first-level trigger module 170 , and a second-level trigger module 180 .

[0039] The acquisition module 120 is used to perform channel acquisition to obtain two parallel test signals; the acquisition module 120 outputs one test signal to the first-level trigger module 170, and the acquisition module 120 outputs the other test signal to the parallel cache module 130; the parallel cache module 130 is used to cache the test signal and receive the first control signal sent by the first-level trigger module 170; the first control signal is used to change the read and write state of the parallel cache module 130; the parallel-to-serial conversion module 140 is used to convert the parallel test signal output by the parallel cache module 130 into a serial test signal, and output the serial test signal to the amplitude difference calculation module 160 and the signal processing module 150; the signal processing module 150 is used to perform signal processing on the test signal and The processed measured signal is output to the amplitude difference calculation module 160 and the secondary trigger module 180; the signal processing includes at least gain compensation, amplitude-frequency and phase-frequency compensation; the amplitude difference calculation module 160 is used to determine the first amplitude difference based on the measured signal sent by the parallel-to-serial conversion module 140 and the measured signal sent by the signal processing module 150, and send the first amplitude difference to the host computer 110; the host computer 110 is used to receive the first amplitude difference sent by the amplitude difference calculation module 160 and the second amplitude difference sent by the signal processing module 150, and compensate and correct the first initial comparison level of the primary trigger module 170 based on the first amplitude difference and the second amplitude difference; the second amplitude difference is the amplitude value of the gain compensation, and the first initial comparison level is the same as the second initial comparison level of the secondary trigger module 180.

[0040] It should be noted that the measured signal refers to the electrical signal input into the broadband oscilloscope for analysis and measurement. Any signal input into the broadband oscilloscope can be used as the measured signal. Furthermore, in this embodiment, the entire trigger system, in terms of hardware, is primarily distributed across the FPGA chips of the acquisition circuit board (denoted as the acquisition board) and the processing circuit board (denoted as the processing board). The acquisition board is the front-end, and the processing board is the back-end.

[0041] In this embodiment, the acquisition module 120 is partially structured on the acquisition board and is used to perform channel acquisition and obtain two identical parallel test signals. Furthermore, the acquisition module 120 outputs one test signal to the parallel buffer module 130 and the other test signal to the first-level trigger module 170.

[0042] In some embodiments, the acquisition module 120 includes an ADC acquisition unit 121 and a preprocessing unit 122; the ADC acquisition unit 121 is used to perform channel acquisition to obtain parallel measured signals; the preprocessing unit 122 is connected to the ADC acquisition unit 121, and the preprocessing unit 122 is used to reduce the speed and perform hard extraction processing on the measured signals to obtain two parallel measured signals.

[0043] In this embodiment, the input end of the preprocessing unit 122 is connected to the output end of the ADC acquisition unit 121 , one output end of the preprocessing unit 122 is connected to the parallel cache module 130 , and the other output end of the preprocessing unit 122 is connected to the first-level trigger module 170 .

[0044] Specifically, the broadband oscilloscope begins operation. When the measured signal passes through the conditioning channel and is input to the broadband oscilloscope, the ADC acquisition unit 121 performs high-speed acquisition of the measured signal, obtaining n high-speed measured signals. Furthermore, the ADC acquisition unit 121 outputs the high-speed sampled measured signal to the preprocessing unit 122. It should be noted that the preprocessing unit 122 is located on the FPGA chip. After receiving the high-speed measured signal, the preprocessing unit 122 first converts the high-speed parallel measured signal into a low-speed parallel measured signal using TIADC (Time-Interleaved Analog-to-Digital Converter) technology.

[0045] For example, two ADC acquisition units 121 sample at an acquisition rate of 20 GSPS, and each ADC acquisition unit 121 acquires 40 channels of measured signals. Since the data rate of a single channel is very high, directly processing such high-speed data places high demands on the subsequent processing modules. Therefore, in this embodiment, the measured signals are slowed down by the pre-processing unit 122. Assuming that the system operating clock is 250 MHz, it means that the operations within the entire system are based on a clock frequency of 250 MHz. Therefore, after the pre-processing unit 122 slows down the measured signals, 80 channels of measured signals with a transmission rate of 250 MSPS can be obtained after the data of the two ADC acquisition units 121 are merged.

[0046] Furthermore, the preprocessing unit 122 selects different sampling ratios based on different time base gears, performs hard sampling on the measured signal, and obtains two n-channel measured signals. The preprocessing unit 122 outputs one of the n-channel measured signals to the parallel cache module 130 for data caching; the preprocessing unit 122 outputs the other n-channel measured signals to the first-level trigger module 170 for signal trigger determination and trigger signal generation. This embodiment primarily generates trigger signals such as edge, slope, and runt, and selects the corresponding trigger signal based on the user-specified trigger type. Edge triggering is achieved by searching for a transition edge in the shaped signal output by the upper-level module, searching for the transition edge of the n-channel shaped signal within a single clock.

[0047] Continue to refer Figure 1 In this embodiment, one input end of the parallel cache module 130 is connected to the preprocessing unit 122 to receive n channels of tested signals sent by the preprocessing unit 122; another input end of the parallel cache module 130 is connected to the first-level trigger module 170 to receive the first control signal sent by the first-level trigger module 170; and the output end of the parallel cache module 130 is connected to the parallel-to-serial conversion module 140.

[0048] It should be noted that the parallel cache module 130 can be a parallel signal memory FIFO (first-in-first-out memory) inside the FPGA chip. The complete data storage process includes writing and reading data, and the trigger controls the data writing and reading time during the data storage process.

[0049] Specifically, when the parallel cache module 130 receives the measured signal output by the pre-processing unit 122, the system's pre-trigger module first counts the written measured signal. After the counting is completed, the first-level trigger module 170 does not trigger, and the state of the parallel cache module 130 is write-only. When the pre-trigger module completes the counting, the state of the parallel cache module 130 is changed to read-while-write, and the first-level trigger module 170 starts to look for the trigger point and outputs the first control signal; the newly stored sampling point in the parallel cache module 130 will replace the sampling point stored at the beginning, and this is recorded as the Ready state. When the parallel cache module 130 receives the first control signal, the parallel cache module 130 turns off the read enable, and the state of the parallel cache module 130 changes to write-only, not read, until the parallel cache module 130 is full; after the parallel cache module 130 is full, it means that the acquisition process is completed, the write enable of the parallel cache module 130 is turned off, and the read enable is turned on.

[0050] In this embodiment, the first-level trigger module 170 has relevant functional units in both the acquisition board and the processing board. Specifically, the first-level trigger module 170 includes a parallel data shaping unit, a trigger signal generating unit, a trigger type selection unit, etc. on the acquisition board. The parallel data shaping unit first compares the measured signal with the comparison level, and then uses its comparison result to obtain a shaped signal of the measured signal. The shaped signal is triggered through the trigger judgment logic to complete the generation of the trigger signal of the user-set condition. The trigger comparison unit sequentially compares the multi-channel parallel quantized data sampled by the ADC sampling unit with the comparison level set by the user. The trigger signal generating unit mainly completes the generation of trigger signals such as edge, slope, and runt, and selects the corresponding trigger signal according to the trigger type specified by the user. Among them, edge triggering is achieved by searching for the jumping edge in the shaped signal output by the upper module. Because the first-level trigger module 170 processes n-channel data in one clock, the first-level trigger module 170 can only determine which clock corresponds to the n-channel that meets the trigger condition; but it cannot determine which sampling point in the n-channel is the trigger rising edge, and it needs to be sent to the second-level trigger module 180 to trigger the serial measured signal again to find the point, so as to complete the accurate trigger position judgment and trigger signal generation.

[0051] Furthermore, the first-level trigger module 170 includes a trigger source judgment unit and a trigger control unit on the processing board. When the trigger signal generating unit of the acquisition board generates a trigger signal, the trigger signal will be sent to the processing board. After the processing board receives multiple trigger signals, the trigger signal will be sent to the trigger source judgment unit. The trigger source judgment unit selects the trigger source configuration set by the user and outputs the final selected trigger signal to the trigger control unit. The trigger control unit mainly implements the functions of trigger mode selection, pre-triggering, trigger delay, release, etc. The trigger control module needs to receive the acquisition start enable signal sent from the host computer 110, as well as some trigger control-related register values; according to the start acquisition write enable, trigger state control machine, and trigger signal, it generates a first control signal for controlling the read and write status of the parallel cache module 130. The first control signal plus the reset signal will generate four synchronous first control signal groups, which are fed back to each acquisition board to realize synchronous read and write control of the data of all sub-band acquisition modules 120 of the previous stage.

[0052] Continue to refer Figure 1 In this embodiment, the input end of the parallel-to-serial conversion module 140 is connected to the parallel buffer module 130, receiving the measured signal read out by the parallel buffer module 130 and performing parallel-to-serial conversion. One output end of the parallel-to-serial conversion module 140 is connected to the amplitude difference calculation module 160, for directly outputting the serial measured signal after the parallel-to-serial conversion. The other output end of the parallel-to-serial conversion module 140 is connected to the signal processing module 150, so that the signal processing module 150 processes the serial measured signal after the parallel-to-serial conversion.

[0053] Specifically, parallel buffer module 130 outputs the readout test signal to parallel-to-serial conversion module 140, which converts the parallel test signal into a serial test signal. Parallel-to-serial conversion module 140 retains a copy of the original serial test signal before processing by signal processing module 150 and outputs it to amplitude difference calculation module 160. Parallel-to-serial conversion module 140 can also output the serial test signal to signal processing module 150, allowing signal processing module 150 to perform normal signal processing.

[0054] Continue to refer Figure 1 In this embodiment, the signal processing module 150 can be a DSP processing chip. The input end of the signal processing module 150 is connected to the parallel-to-serial conversion module 140 to receive the serial test signal output by the parallel-to-serial conversion module 140. The first output end of the signal processing module 150 is connected to the secondary trigger module 180 to output the processed test signal to the secondary trigger module 180, thereby facilitating the secondary trigger module 180 to trigger based on the processed test signal. The second output end of the signal processing module 150 is connected to the amplitude difference calculation module 160 to output the processed test signal to the amplitude difference calculation module 160, thereby facilitating the amplitude difference calculation module 160 to calculate the first amplitude difference.

[0055] Specifically, the signal processing module 150 performs a series of signal processing on the received serial test signal, including gain control, TI calibration, interpolation, anti-aliasing, and anti-imaging. Each sub-band serial test signal is then fed into the processing board, which receives the signals synchronously and performs data splicing, amplitude-frequency and phase-frequency compensation, and filtering. The specific signal processing process can be referenced to that of existing DSP chips and will not be further described here.

[0056] Continue to refer Figure 1 In some embodiments, the trigger system of the broadband oscilloscope further includes a serial buffer module 190 and a data transmission module 200. The serial buffer module 190 is connected to the signal processing module 150 and the secondary trigger module 180, respectively. The serial buffer module 190 is used to receive the measured signal sent by the signal processing module 150 and buffer the measured signal, and receive the second control signal sent by the secondary trigger module 180 to output the target signal according to the second control signal; the second control signal is used to change the read and write state of the serial buffer module 190; the data transmission module 200 is connected to the amplitude difference calculation module 160 and the serial buffer module 190, respectively, to receive the first amplitude difference sent by the amplitude difference calculation module 160 and the target signal output by the serial buffer module 190, and output the first amplitude difference and the target signal to the host computer 110.

[0057] In this embodiment, one input end of the serial buffer module 190 is connected to the third output end of the signal processing module 150 to receive and cache the processed measured signal output by the signal processing module 150; another input end of the serial buffer module 190 is connected to the secondary trigger module 180 to receive the second control signal output by the secondary trigger module 180; the output end of the serial buffer module 190 is connected to the data transmission module 200 to output the target signal to the host computer 110 through the data transmission module 200.

[0058] Specifically, after the signal processing module 150 outputs the processed test signal to the secondary trigger module 180, the secondary trigger module 180 re-triggers the serial test signal to determine the trigger point. The secondary trigger module 180 accurately locates the trigger of the serial test signal, thereby determining the target signal required by the user. Finally, the target signal is sent to the industrial computer for stable waveform display.

[0059] It should be noted that the structure and triggering process of the secondary trigger module 180 are the same as those of the aforementioned primary trigger module 170, except that the secondary trigger module 180 processes serial data. Therefore, the structure and triggering process of the secondary trigger module 180 can refer to the structure and triggering process of the primary trigger module 170, and will not be repeated here.

[0060] Secondary trigger module 180 also receives a user-set comparison level and compares the measured signal with the comparison level. Through trigger comparison, it obtains a trigger signal shaping signal and then logically determines whether the trigger conditions, including trigger type and condition selection, are met. Secondary trigger module 180 also has a trigger control unit (which primarily performs pre-trigger and post-trigger counting, both implemented via a counter). Finally, it determines the precise trigger point after secondary triggering and outputs a second control signal to control the read and write state of serial buffer module 190.

[0061] In general, the broadband oscilloscope stores the relevant parallel measured signals based on the first control signal output by the primary trigger module 170. Finally, the measured signals are sent to the processing board for secondary triggering after passing through the parallel-to-serial conversion module 140. This process seeks the precise trigger point, thereby triggering the waveform data of interest to the user. After processing the measured signals through their respective trigger control units, the two trigger modules output corresponding read enable control signals, which are then sent to the corresponding buffer modules to control the acquisition and storage of the entire measured signal. This completes the entire process of the trigger system controlling waveform storage.

[0062] From the structure and triggering process of the trigger system described above, it can be seen that both trigger levels receive the user-set comparison level. The problem lies here: the waveform amplitude processed by the first-level trigger module 170 is inconsistent with the waveform amplitude processed by the subsequent second-level trigger module 180, because the signal processing module 150 performs signal processing on the measured signal; the gain control, amplitude compensation algorithm, etc. therein will cause the waveform amplitude of the measured signal to change, resulting in differences in the waveform amplitude of the measured signal processed by the two-level trigger. The user-set comparison level is also calculated based on serial waveform quantization. If a unified comparison level is used, it is possible that the amplitude of the previous stage waveform may not reach the comparison level trigger position near the waveform peak. As a result, the first-level trigger module 170 will not generate a trigger signal when using the comparison level judgment, and thus no subsequent read signal will be generated. The measured signal will be stuck, and the measured signal of the previous stage acquisition board cannot be sent to the subsequent processing board for subsequent processing.

[0063] Understandably, if the measured signals of different frequencies are input, different frequencies and types of measured signals will experience different group delays, phases, and amplitude compensations, resulting in different amplitude differences. However, the front-end acquisition board cannot determine the compensation difference for the current measured signal. If spectrum analysis were added to the front end to determine the input measured signal frequency, then apply the corresponding compensation coefficients, and then perform simulation calculations to confirm the compensation difference, the front-end FPGA chip would consume a significant amount of resources to process and analyze the spectral characteristics of the input waveform in real time. Therefore, this compensation method is impractical, complex, and wasteful.

[0064] Therefore, the embodiment of the present application adds an amplitude difference calculation module 160 to the trigger system. This module determines the first amplitude difference and outputs the first amplitude difference to the host computer 110. Simultaneously, the signal processing module 150 sends the gain-compensated amplitude value (i.e., the second amplitude difference) to the host computer 110. The host computer 110 then compensates the comparison level of the first-stage trigger module 170 based on the first and second amplitude differences. This allows the two trigger modules to use different comparison levels. Since the amplitude difference between the waveform processed by the first-stage trigger module 170 and the waveform processed by the subsequent second-stage trigger module 180 is already determined, the comparison level corresponding to the first-stage trigger module 170 is reduced or increased accordingly by this amplitude difference. This results in the comparison level of the first-stage trigger module 170 being obtained after the reverse compensation, and is sent to the first-stage trigger module 170 for trigger signal determination. This makes it easier to compensate for comparison level errors and improves the triggering accuracy of the trigger system.

[0065] The broadband oscilloscope trigger compensation method of the embodiment of the present application is described in detail below with reference to the structure of the broadband oscilloscope trigger system and the two-stage trigger principle.

[0066] Figure 2This is one of the flow charts of the broadband oscilloscope trigger compensation method according to the embodiment of the present application. The broadband oscilloscope trigger compensation method according to the embodiment of the present application can be applied to the trigger system of the broadband oscilloscope and executed by the host computer in the trigger system. Figure 2 As shown, the broadband oscilloscope trigger compensation method may include the following steps:

[0067] Step 210: Control the acquisition module to perform channel acquisition to obtain parallel measured signals.

[0068] Step 220: Receive the first amplitude difference sent by the amplitude difference calculation module, and receive the second amplitude difference sent by the signal processing module; the first amplitude difference is the difference between the waveform amplitude of the measured signal that has not been processed by the signal processing module and the waveform amplitude of the measured signal that has been processed by the signal processing module, and the second amplitude difference is the amplitude value of the gain compensation.

[0069] Step 230: Compensate and calibrate the first initial comparison level of the primary trigger module based on the first amplitude difference and the second amplitude difference; the first initial comparison level is the same as the second initial comparison level of the secondary trigger module.

[0070] It should be noted that the first initial comparison level and the second initial comparison level can be any pre-set levels; the first initial comparison level and the second initial comparison level can be used in the calibration compensation process after the broadband oscilloscope is turned on and before the user sets the trigger comparison level.

[0071] In this embodiment, when the broadband oscilloscope is turned on, the host computer can first control the acquisition module to perform channel acquisition, obtaining parallel measured signals. Furthermore, the host computer can quantize the amplitude of the measured signals based on the selected vertical scale (i.e., voltage scale). Specifically, the user selects the desired vertical scale (e.g., 2V / div, 500mV / div, etc.) through the broadband oscilloscope interface or the host computer software. This determines the actual voltage value represented by each grid on the screen. Furthermore, the host computer determines the quantized value of a pre-set first initial comparison level (or second initial comparison level).

[0072] For example, if the user selects a vertical scale of 1V / div and sets a first initial comparison level of 0.5V for triggering, the broadband oscilloscope screen has 8 vertical divisions, so the total quantization range is 8V. For a 12-bit ADC acquisition unit, the voltage per quantization unit is approximately 1.95mV (8V / 4096). Therefore, the quantization value corresponding to the 0.5V first initial comparison level is: Quantization value = 0.5V / 1.95mV ≈ 256. It should be noted that the trigger system initially sends a level of 0 (corresponding to a quantization value of 2048) by default.

[0073] After the ADC acquisition unit of the acquisition module acquires the measured signal, it outputs it to the preprocessing unit, which decelerates and hard-samples it, outputting two n-channel measured signals. One of the n-channel measured signals is triggered by the first-level trigger module, while the other n-channel measured signals pass through the parallel buffer module, the parallel-to-serial conversion module, and the signal processing module. The signal processing module performs a series of signal processing operations on the measured signals, including gain control, TI calibration, interpolation, anti-aliasing, anti-imaging, data splicing, amplitude-frequency and phase-frequency compensation, and filtering. The processed measured signals are then output to the amplitude difference calculation module, the serial buffer module, and the second-level trigger module.

[0074] The amplitude difference calculation module calculates a first amplitude difference based on the measured signal waveform amplitude output by the signal processing module and the measured signal waveform amplitude output by the parallel-to-serial conversion module. The amplitude difference calculation module feeds the first amplitude difference back to the host computer. Simultaneously, the signal processing module sends a second amplitude difference representing the gain compensation amplitude value to the host computer. It should be noted that the gain compensation calibration determines the increase or decrease in amplitude, so the second amplitude difference is known and can be directly fed back to the host computer by the signal processing module.

[0075] The host computer receives the first amplitude difference sent by the amplitude difference calculation module and the second amplitude difference sent by the signal processing module, and compensates and corrects the first initial comparison level of the first-level trigger module based on the first amplitude difference and the second amplitude difference.

[0076] Figure 3 This is the second flow chart of the broadband oscilloscope trigger compensation method according to the embodiment of the present application. Figure 3 As shown, in some embodiments, step 230 of compensating and correcting the first initial comparison level of the first-level trigger module based on the first amplitude difference and the second amplitude difference may include the following steps:

[0077] Step 310: Determine a total amplitude difference based on the first amplitude difference and the second amplitude difference.

[0078] Step 320: Determine a compensation coefficient based on the total amplitude difference using a preset formula.

[0079] Step 330: Perform compensation correction on the first initial comparison level based on the compensation coefficient.

[0080] Specifically, after receiving the first amplitude difference and the second amplitude difference, the host computer can add the first amplitude difference and the second amplitude difference to obtain a total amplitude difference, and then use the total amplitude difference and a preset formula to calculate the compensation coefficient for the first initial comparison level. It should be noted that the calculated compensation coefficient generally does not change. In other words, when the user adjusts the comparison level, the compensation coefficient is still used to compensate the comparison level of the first trigger module. Therefore, when using a broadband oscilloscope, the compensation coefficient only needs to be calculated once unless the processing parameters of the signal processing module are changed.

[0081] In some embodiments, the preset formula is:

[0082] A=( V p -V delt ) / V p *100%

[0083] Among them, A is the compensation coefficient, V p is the peak amplitude of the measured signal processed by the secondary trigger module, V delt is the total amplitude difference.

[0084] After obtaining the compensation coefficient, the host computer uses the compensation coefficient to compensate and correct the first initial comparison level. Specifically, the compensation coefficient can be directly multiplied by the first initial comparison level to obtain the corrected first initial comparison level.

[0085] For example, if the peak amplitude of the measured signal waveform processed by the primary trigger module is 0.8V, and after gain and amplitude compensation by the signal processing module, the measured signal waveform amplitude at the secondary trigger module is 1V, the total amplitude difference is 0.2V. If half of the measured signal waveform amplitude at the secondary trigger module is used as the first initial comparison level, the first initial comparison level is 0.5V. Further, calculation shows that the total amplitude difference is 0.2V, so the compensation coefficient is A = (1-0.2) / 1×100% = 80%; the corrected first initial comparison level is 0.5×80% = 0.4V. If the user adjusts the comparison level, the corrected first initial comparison level is also calculated based on this compensation coefficient.

[0086] In some embodiments, the second initial comparison level is half the peak amplitude of the measured signal processed by the secondary trigger module. The first initial comparison level and the second initial comparison level are the same, both being half the peak amplitude of the measured signal processed by the secondary trigger module (i.e., the peak value of the waveform displayed on the interface).

[0087] It is understandable that the first and second initial comparison levels are used to predetermine the compensation coefficient. However, the waveform amplitude of the measured signal input by the front-end is unknown to the host computer. Furthermore, as mentioned in the previous embodiments, amplitude compensation varies for measured signals of varying amplitudes. Therefore, to ensure that the initially set comparison levels can respond to all randomly input measured signals, half of the peak amplitude of the measured signal processed by the secondary trigger module is used as the first and second initial comparison levels. This ensures that the trigger will respond to measured signals of any waveform amplitude.

[0088] Figure 4 This is the third flow chart of the broadband oscilloscope trigger compensation method according to the embodiment of the present application. Figure 4 As shown, in some embodiments, after compensating and correcting the first initial comparison level of the first-level trigger module based on the first amplitude difference and the second amplitude difference, the broadband oscilloscope trigger compensation method may further include the following steps:

[0089] Step 410: Obtain the sensitivity of the hysteresis comparison band.

[0090] Step 420: Based on the first initial comparison level, compensation coefficient and sensitivity after compensation correction, determine the first comparison threshold and the second comparison threshold corresponding to the first-level trigger module, and send the first comparison threshold and the second comparison threshold corresponding to the first-level trigger module to the first-level trigger module.

[0091] Step 430: Based on the second initial comparison level and the sensitivity, determine the first comparison threshold and the second comparison threshold corresponding to the secondary trigger module, and send the first comparison threshold and the second comparison threshold corresponding to the secondary trigger module to the secondary trigger module.

[0092] It's important to note that the sensitivity of the hysteresis comparator band refers to the threshold within which the trigger system responds to changes in the measured signal. The primary purpose of introducing hysteresis is to prevent false triggering due to noise or small fluctuations, especially when processing signals close to the trigger level.

[0093] Specifically, after determining the corrected first initial comparison level, the host computer can also obtain the sensitivity of the hysteresis comparison band. The sensitivity of the hysteresis comparison band can be obtained by experimentally determining the sensitivity of the hysteresis comparison band. A standard test signal source (such as a function generator) with a known frequency and amplitude can be used, and its output can be adjusted until it can just trigger the broadband oscilloscope. Then, the signal amplitude is gradually reduced or increased, and the exact voltage values at which the trigger starts and stops are recorded. The difference between the two is the actual hysteresis width. In this embodiment, the sensitivity of the hysteresis comparison band can be set by the staff according to the hysteresis width and actual needs. The method for obtaining the sensitivity of the hysteresis comparison band can also adopt other existing methods, which are not specifically limited here.

[0094] After obtaining the sensitivity of the hysteresis comparison band, the sensitivity of the hysteresis comparison band and the second initial comparison level can be used to calculate the first comparison threshold and the second comparison threshold corresponding to the secondary trigger module. Specifically, the calculation can be performed using the following formula:

[0095] 2st_compare_volt_H=2st_compV

[0096] 2st_compare_volt_L=2st_compV–b

[0097] Wherein, 2st_compare_volt_H is the first comparison threshold corresponding to the secondary trigger module; 2st_compare_volt_L is the second comparison threshold corresponding to the secondary trigger module; b is the sensitivity of the hysteresis comparison band; and 2st_compV is the second initial comparison level.

[0098] Furthermore, the sensitivity of the hysteresis comparison band, the first initial comparison level, and the compensation coefficient can be used to calculate the first comparison threshold and the second comparison threshold corresponding to the first-level trigger module. Specifically, the calculation can be performed using the following formula:

[0099] 1st_compare_volt_H=2st_compV*A

[0100] 1st_compare_volt_L=2st_compV*A–b*A

[0101] Wherein, 1st_compare_volt_H is the first comparison threshold corresponding to the first-level trigger module; 1st_compare_volt_L is the second comparison threshold corresponding to the first-level trigger module; b is the sensitivity of the hysteresis comparison band; 2st_compV is the second initial comparison level; and A is the compensation coefficient.

[0102] Figure 5 This is a schematic diagram of a first-level trigger module processing waveform amplitude in a specific example of the present application. Figure 6 This is a schematic diagram of a two-stage trigger module processing waveform amplitude in a specific example of the present application. Figure 6 Where DeltV is the total amplitude difference. Figure 5 or Figure 6As shown, at the rising edge, when the trigger module detects that the measured signal reaches the second comparison threshold, it is triggered; similarly, at the falling edge, when the trigger module detects that the measured signal reaches the first comparison threshold, it is triggered. The sensitivity of the hysteresis comparison band is used to adapt to different noise signals to resist noise interference and prevent false triggering. For signals with slightly louder noise, the sensitivity can be set a little higher to tolerate larger noise signals, so as to avoid triggering when the waveform of the measured signal fluctuates slightly, and ultimately obtain non-target signals. Similarly, if the waveform amplitude processed by the secondary trigger module is smaller than the waveform amplitude processed by the primary trigger module, then the primary trigger module will trigger a signal that should not be triggered. Therefore, through this solution, the triggering accuracy of the entire trigger system can be further improved.

[0103] After obtaining the first and second comparison thresholds corresponding to the primary trigger module and the secondary trigger module, the host computer can send these parameters to the corresponding trigger modules, thereby running the signal acquisition process. If the user subsequently adjusts the comparison level of the primary trigger module, the host computer can use the same compensation coefficient to compensate for the adjusted comparison level.

[0104] Therefore, by adding an amplitude difference calculation module, the amplitude difference for calibration compensation of the back-end signal processing module, namely the first amplitude difference, is calculated; the host computer then calculates the total amplitude difference through the first amplitude difference and the second amplitude difference caused by gain control; finally, the total amplitude difference is compensated to the comparison level of the first-level trigger module by the host computer, eliminating the influence of the amplitude difference of the signal waveform before and after the two-level trigger, and improving the trigger accuracy of the broadband oscilloscope trigger system.

[0105] It should be noted that for details not disclosed in the broadband oscilloscope trigger compensation method of this embodiment, please refer to the details disclosed in the embodiment of the broadband oscilloscope trigger system in the embodiment of this specification, and will not be repeated here.

[0106] Based on the above embodiments, the embodiments of the present application also provide a host computer. Figure 7 An example of a physical structure diagram of a host computer is shown below. Figure 7As shown, the host computer may include: a processor 710, a communication interface 720, a memory 730, and a communication bus 740, wherein the processor 710, the communication interface 720, and the memory 730 communicate with each other via the communication bus 740. The processor 710 may call logic instructions in the memory 730 to execute a broadband oscilloscope trigger compensation method, which includes: controlling an acquisition module to perform channel acquisition to obtain parallel measured signals; receiving a first amplitude difference sent by an amplitude difference calculation module and a second amplitude difference sent by a signal processing module; the first amplitude difference is the difference between the waveform amplitude of the measured signal before being processed by the signal processing module and the waveform amplitude of the measured signal after being processed by the signal processing module, and the second amplitude difference is the amplitude value of gain compensation; compensating and correcting a first initial comparison level of the first trigger module based on the first amplitude difference and the second amplitude difference; the first initial comparison level is the same as the second initial comparison level of the second trigger module.

[0107] Furthermore, the logic instructions in the aforementioned memory 730 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product, stored in a storage medium, includes instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage media include various media capable of storing program code, such as USB flash drives, mobile hard drives, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical disks.

[0108] On the basis of the above embodiments, on the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to execute the filter trigger error compensation method provided by the above methods, the method comprising: controlling the acquisition module to perform channel acquisition to obtain parallel measured signals; receiving a first amplitude difference sent by the amplitude difference calculation module, and receiving a second amplitude difference sent by the signal processing module; the first amplitude difference is the difference between the waveform amplitude of the measured signal not processed by the signal processing module and the waveform amplitude of the measured signal processed by the signal processing module, and the second amplitude difference is the amplitude value of gain compensation; based on the first amplitude difference and the second amplitude difference, the first initial comparison level of the first-level trigger module is compensated and corrected; the first initial comparison level is the same as the second initial comparison level of the second-level trigger module.

[0109] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., they may be located in one location or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the present embodiment. Persons of ordinary skill in the art will be able to understand and implement the present invention without inventive effort.

[0110] Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented using software plus a necessary general-purpose hardware platform, or of course, hardware. Based on this understanding, the essence of the above technical solution, or the portion that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, or an optical disk, and includes a number of instructions for causing a computer device (such as a personal computer, server, or network device) to execute the methods described in each embodiment or certain portions of the embodiments.

[0111] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A broadband oscilloscope trigger compensation method, characterized in that: A trigger system for a broadband oscilloscope includes an acquisition module, a signal processing module, an amplitude difference calculation module, a primary trigger module, a secondary trigger module, and a host computer. The method is executed by the host computer and includes: Controlling the acquisition module to perform channel acquisition to obtain parallel measured signals; receiving a first amplitude difference sent by the amplitude difference calculation module and receiving a second amplitude difference sent by the signal processing module; the first amplitude difference being the difference between the waveform amplitude of the measured signal not processed by the signal processing module and the waveform amplitude of the measured signal processed by the signal processing module; and the second amplitude difference being the amplitude value of the gain compensation; A first initial comparison level of the primary trigger module is compensated and corrected based on the first amplitude difference and the second amplitude difference; the first initial comparison level is the same as the second initial comparison level of the secondary trigger module.

2. The broadband oscilloscope trigger compensation method according to claim 1, characterized in that: The second initial comparison level is half of the peak amplitude of the measured signal processed by the secondary trigger module.

3. The broadband oscilloscope trigger compensation method according to claim 1, wherein: The compensating and correcting the first initial comparison level of the first-level trigger module based on the first amplitude difference and the second amplitude difference includes: determining a total amplitude difference based on the first amplitude difference and the second amplitude difference; Determining a compensation coefficient based on the total amplitude difference using a preset formula; The first initial comparison level is compensated and corrected based on the compensation coefficient.

4. The broadband oscilloscope trigger compensation method according to claim 3, characterized in that: The preset formula is: A=( V p -V delt ) / V p *100% Wherein, A is the compensation coefficient, Vp is the peak amplitude of the measured signal processed by the secondary trigger module, V delt is the total amplitude difference.

5. The broadband oscilloscope trigger compensation method according to claim 3, characterized in that: After compensating and correcting the first initial comparison level of the first-level trigger module based on the first amplitude difference and the second amplitude difference, the method further includes: Get the sensitivity of the hysteresis comparison band; determining a first comparison threshold and a second comparison threshold corresponding to the first-level trigger module based on the first initial comparison level after compensation correction, the compensation coefficient, and the sensitivity, and sending the first comparison threshold and the second comparison threshold corresponding to the first-level trigger module to the first-level trigger module; Based on the second initial comparison level and the sensitivity, a first comparison threshold and a second comparison threshold corresponding to the secondary trigger module are determined, and the first comparison threshold and the second comparison threshold corresponding to the secondary trigger module are sent to the secondary trigger module.

6. A host computer, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the broadband oscilloscope trigger compensation method according to any one of claims 1 to 5 is implemented.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the broadband oscilloscope trigger compensation method according to any one of claims 1 to 5 is implemented.

8. A trigger system for a broadband oscilloscope, characterized in that: The device comprises a host computer as claimed in claim 6, an acquisition module, a parallel cache module, a parallel-to-serial conversion module, a signal processing module, an amplitude difference calculation module, a primary trigger module and a secondary trigger module; The acquisition module is used to perform channel acquisition to obtain two parallel measured signals; wherein, the acquisition module outputs one measured signal to the first-level trigger module, and the acquisition module outputs the other measured signal to the parallel buffer module; The parallel cache module is used to cache the measured signal and receive the first control signal sent by the first-level trigger module; the first control signal is used to change the read and write state of the parallel cache module; The parallel-to-serial conversion module is used to convert the parallel measured signal output by the parallel buffer module into a serial measured signal, and output the serial measured signal to the amplitude difference calculation module and the signal processing module; The signal processing module is used to perform signal processing on the measured signal and output the processed measured signal to the amplitude difference calculation module and the secondary trigger module; the signal processing includes at least gain compensation, amplitude-frequency compensation and phase-frequency compensation; The amplitude difference calculation module is used to determine a first amplitude difference according to the measured signal sent by the parallel-to-serial conversion module and the measured signal sent by the signal processing module, and send the first amplitude difference to the host computer; The host computer is used to receive the first amplitude difference sent by the amplitude difference calculation module and the second amplitude difference sent by the signal processing module, and compensate and correct the first initial comparison level of the first-level trigger module based on the first amplitude difference and the second amplitude difference; the second amplitude difference is the amplitude value of the gain compensation, and the first initial comparison level is the same as the second initial comparison level of the secondary trigger module.

9. The trigger system for a broadband oscilloscope according to claim 8, wherein: The acquisition module includes an ADC acquisition unit and a preprocessing unit; The ADC acquisition unit is used to perform channel acquisition to obtain parallel measured signals; The pre-processing unit is connected to the ADC acquisition unit, and is used for performing speed reduction processing and hard extraction processing on the measured signal to obtain two parallel measured signals.

10. The trigger system for a broadband oscilloscope according to claim 8, wherein: The trigger system of the broadband oscilloscope further includes a serial buffer module and a data transmission module; The serial buffer module is connected to the signal processing module and the secondary trigger module respectively. The serial buffer module is used to receive the measured signal sent by the signal processing module and cache the measured signal, and receive the second control signal sent by the secondary trigger module to output the target signal according to the second control signal; the second control signal is used to change the read and write state of the serial buffer module; The data transmission module is connected to the amplitude difference calculation module and the serial buffer module respectively, and is used to receive the first amplitude difference sent by the amplitude difference calculation module and the target signal output by the serial buffer module, and output the first amplitude difference and the target signal to the host computer.

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