ARINC429 communication board card based on PXIE bus triggering

Abstract

The invention discloses an ARINC429 communication board card based on PXIE bus triggering, and relates to the technical field of data transmission control, in particular to an ARINC429 communication board card based on PXIE bus triggering, which is characterized in that the ARINC429 communication board card comprises an ARINC429 communication board card and is used for multichannel 429 data communication triggering output, the ARINC429 communication board card comprises a PXIE bus connector; the FPGA is used for processing communication and control information data; the eight-channel trigger bus transceiver is connected with the PXIE bus connector and the FPGA; the 429 level conversion receiving chip and the 429 level conversion sending chip are connected with the FPGA; an SCSI68 communication connector; the analog-to-digital isolation chip is connected with the 429 level conversion receiving chip and the 429 level conversion transmitting chip; a power management module; the system is high in model integration level, employs an FPGA to send an instruction, controls and triggers a target board card through a PXIE bus interface, can achieve the simultaneous control of a plurality of target board cards, achieves the extension of the receiving and transmitting functions of a plurality of 429 buses, meets different application demands, and is more flexible in operation.

Description

Technical Field

[0001] The invention relates to the technical field of data transmission control, in particular to an ARINC429 communication board card based on PXIE bus triggering. Background Art

[0002] The ARINC429 communication board based on PXIE bus triggering fully utilizes the advantages of PXIE bus in data transmission rate, modular expansion capability, time synchronization accuracy and reliability; ARINC429 protocol is a data transmission bus standard protocol developed by the American Aviation Electronics Engineering Committee, which can achieve efficient and accurate data transmission and is a key device in avionics system testing, verification and simulation;

[0003] After checking the publication number: CN206075266U, a multi-channel ARINC429 communication board is disclosed. This technology discloses "a multi-channel ARINC429 communication board. A multi-channel ARINC429 communication board, which includes: a PCI bus interface; an FPGA capable of processing received and sent information; a bus switch connecting the PCI bus interface and the FPGA; a 429 level conversion chip capable of connecting to the FPGA. The level conversion chip is connected to the communication connector. A protection circuit is connected in parallel between the level conversion chip and the communication connector. The FPGA completes the FIFO storage of the received data by controlling the SDRAM memory; the FPGA completes the refresh storage of the received data by controlling the SRAM memory" and other technical solutions, which have the characteristics of "high mode integration, flexible settings, electrical isolation, etc., which can meet the increasingly complex upper-layer applications and better protect the equipment" and other technical effects;

[0004] The current 429 protocol board has a limited number of communication channels due to the high power consumption of the 429 level conversion chip, and cannot be implemented when faced with multi-channel data communication conditions; when multiple boards are communicating data at the same time, due to the uneven start-up time of the boards, data transmission asynchrony will occur, and it cannot meet the conditions that require data to be communicated simultaneously. Summary of the invention

[0005] In view of the shortcomings of the prior art, the present invention provides an ARINC429 communication board based on PXIE bus triggering, which has the characteristics of high model integration, adopts FPGA to send instructions to control the triggering target board function through the PXIE bus interface, can realize the simultaneous control of multiple target boards to achieve the expansion of multi-channel 429 bus transceiver function, meet different application requirements, and have more flexible operation.

[0006] To achieve the above objectives, the present invention is implemented through the following technical solutions: an ARINC429 communication board based on PXIE bus trigger, including an ARINC429 communication board and used for multi-channel 429 data communication trigger output, the ARINC429 communication board including: a PXIE bus connector; an FPGA for processing communication and control information data; an 8-channel trigger bus transceiver connecting the PXIE bus connector and the FPGA; a 429 level conversion receiving chip and a 429 level conversion sending chip connected to the FPGA; a SCSI68 communication connector; an analog-to-digital isolation chip connecting the 429 level conversion receiving chip and the 429 level conversion sending chip; and a power management module.

[0007] Preferably, the 8-channel trigger bus transceiver is used to send control signals of the FPGA and receive controlled signals transmitted by the PXIE bus connector.

[0008] Preferably, the power management module is composed of a ±15V isolated power supply, a 5V isolated power supply and a 5V digital power supply, and supplies power to the FPGA, the analog-to-digital isolation chip, the 429 level conversion receiving chip and the 429 level conversion transmitting chip.

[0009] Preferably, the level conversion receiving chip 429 and the level conversion sending chip 429 are connected to the SCSI68 communication connector, and a parallel protection circuit is connected between the level conversion receiving chip 429 and the level conversion sending chip 429 and the SCSI68 communication connector.

[0010] Preferably, the FPGA includes 8-way FIFO and is connected to an 8-channel trigger bus transceiver, and implements 429 communication control of the target board card by 8-to-1 channel.

[0011] Preferably, the FPGA is connected to an input and output trigger clock.

[0012] Preferably, the input and output trigger clocks are connected via an analog-to-digital isolation chip.

[0013] Preferably, the 429 level conversion receiving chip is a HI-8588PSI chip; and the 429 level conversion sending chip is a HI-8585PSI chip.

[0014] The present invention provides an ARINC429 communication card based on PXIE bus triggering. Compared with the prior art, it has the following beneficial effects:

[0015] 1. By realizing the multi-channel 429 data communication trigger output of PXIE in the 3U PXIE size (160mm×100mm), using the PXIE bus interface to exchange trigger data, and using the PXIE channel trigger bus transceiver to connect the FPGA and the PXIE bus interface to send and receive control commands, the problem of limited channels of the 429 communication board and the problem that multiple boards cannot transmit and communicate synchronously are effectively solved.

[0016] 2. The SCSI68 communication connector is connected to the 429 level conversion receiving chip and the 429 level conversion sending chip to receive or send data to the test end; the analog-to-digital isolation chip is connected to the FPGA, the 429 level conversion receiving chip and the 429 level conversion sending chip, and the input and output are isolated from each other to achieve system security protection.

[0017] 3. The 8-channel trigger bus transceiver selects the control instruction of the 429 level conversion sending chip provided by FPGA to the target board according to the received or sent signal provided by FPGA3. The control instruction includes the output idle level configuration, the trigger effective level configuration, the high and low level bit width configuration of the trigger signal, and the trigger output number configuration, and is transmitted to the PXIE bus connector of the target board connected to the same PXIE backplane through the PXIE bus connector of this board. The 8-channel trigger bus transceiver of the target board obtains the controlled instruction from the PXIE bus connector according to the receive command provided by its FPGA, and feeds the controlled instruction back to the FPGA. The FPGA sends 429 communication data to the SCSI68 communication connector according to the number or frequency of communications issued by the controlled instruction. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a front structural schematic diagram of the ARINC429 communication board card based on PXIE bus triggering of the present invention;

[0019] Figure 2 It is a schematic diagram of the back structure of the ARINC429 communication board based on PXIE bus triggering of the present invention;

[0020] Figure 3 The present invention is a flow chart of an ARINC429 communication board card triggered based on a PXIE bus.

[0021] In the figure: 0, ARINC429 communication board; 1, PXIE bus connector; 2, 8-channel trigger bus transceiver; 3, FPGA; 4, power management module; 5, analog-to-digital isolation chip; 6, 429 level conversion receiving chip; 7, 429 level conversion sending chip; 8, SCSI68 communication connector. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] The invention discloses an ARINC429 communication board based on PXIE bus trigger, configured with 62.5MHZ / 32bits, PXIE bus interface, meeting 16 429 transceiver channels, with settable message interval, word interval and number of transmissions, function of adding time tag, function of setting receiving FIFO trigger depth, baud rate of 10K-150Kbps, receiving and transmitting respectively settable, standard ARINC429 data format, receiving and transmitting respectively settable, data dynamically changeable, number of trigger outputs settable, trigger output period settable, and 429 trigger channels selectable.

[0024] See also Figure 1-3 The present invention provides a technical solution of an ARINC429 communication board based on PXIE bus triggering: an ARINC429 communication board based on PXIE bus triggering, including an ARINC429 communication board 0 and used for multi-channel 429 data communication trigger output, the ARINC429 communication board 0 includes: a PXIE bus connector 1; an FPGA 3 for processing communication and control information data; an 8-channel trigger bus transceiver 2 connected to the PXIE bus connector 1 and the FPGA 3; a 429 level conversion receiving chip 6 and a 429 level conversion sending chip 7 connected to the FPGA 3; a SCSI68 communication connector 8; an analog-to-digital isolation chip 5 connected to the 429 level conversion receiving chip 6 and the 429 level conversion sending chip 7; and a power management module 4.

[0025] In this embodiment, the 429 bus signal is composed of a pair of differential signals, namely, ARINC429A terminal and ARINC429B terminal; the level value of the single-end of the 429 bipolar return-to-zero level signal can be divided into three types when interference is not considered, namely, +5V, 0V, and -5V; the difference between the two paths represents the different level information of this ARINC429; when interference is considered, the difference between the A terminal and the B terminal is +6V to +13V, indicating a high level, the difference between the A terminal and the B terminal is +0.5V to -0.5V, indicating a zero level, and the difference between the A terminal and the B terminal is -6V to -13V, indicating a low level.

[0026] Specifically, the 8-channel trigger bus transceiver 2 is used to send control signals from the FPGA 3 and receive controlled signals transmitted by the PXIE bus connector 1 .

[0027] In this embodiment, the 8-channel trigger bus transceiver 2 is connected to the FPGA 3 and the PXIE bus connector 1. The FPGA 3 is used to select receiving or sending control signals and process the commands of the control signals to realize the control of the sending function of the ARINC429 bus information.

[0028] Specifically, the power management module 4 is composed of a ±15V isolated power supply, a 5V isolated power supply and a 5V digital power supply, and supplies power to the FPGA 3, the analog-to-digital isolation chip 5, the 429 level conversion receiving chip 6 and the 429 level conversion transmitting chip 7.

[0029] In this embodiment, the power management module 4 is composed of a ±15V isolated power supply, a 5V isolated power supply, and a 5V digital power supply. The ±15V isolated power supply is connected to the 429 level conversion transmitting chip 7, the 5V isolated power supply is connected to the 429 level conversion receiving chip 6 and the analog-to-digital isolation chip 5, and the 5V digital power supply is connected to the analog-to-digital isolation chip 5 and FPGA3.

[0030] Specifically, the 429 level conversion receiving chip 6 and the 429 level conversion sending chip 7 are connected to the SCSI68 communication connector 8, and a parallel protection circuit is connected between the 429 level conversion receiving chip 6 and the 429 level conversion sending chip 7 and the SCSI68 communication connector 8.

[0031] In this embodiment, the SCSI68 communication connector 8 is connected to the 429 level conversion receiving chip 6 and the 429 level conversion sending chip 7 to receive or send data to the test end; the analog-to-digital isolation chip 5 is connected to the FPGA3, the 429 level conversion receiving chip 6 and the 429 level conversion sending chip 7, and the input and output are isolated from each other to achieve security protection of the system.

[0032] Specifically, FPGA3 includes 8-way FIFO and is connected to 8-channel trigger bus transceiver 2, and realizes 429 communication control of 8-to-1 channel to the target board.

[0033] In this embodiment, the 8-channel trigger bus transceiver 2 selects the control instruction of the 429 level conversion sending chip 7 provided by FPGA3 to the target board according to the received or sent signal provided by FPGA3, and the control instruction includes the output idle level configuration, the trigger effective level configuration, the high and low level bit width configuration of the trigger signal, and the trigger output number configuration, and is transmitted to the PXIE bus connector 1 of the target board connected to the same PXIE backplane through the PXIE bus connector 1 of this board. The 8-channel trigger bus transceiver 2 of the target board obtains the controlled instruction from the PXIE bus connector 1 according to the receive command provided by its FPGA3, and feeds the controlled instruction back to FPGA3. FPGA3 sends 429 communication data to the SCSI68 communication connector 8 according to the number or frequency of communications issued by the controlled instruction.

[0034] Specifically, FPGA3 is connected to the trigger clock of the input and output.

[0035] Specifically, the input and output trigger clocks are connected via the analog-to-digital isolation chip 5 .

[0036] Specifically, the 429 level conversion receiving chip 6 is a HI-8588PSI chip; the 429 level conversion sending chip 7 is a HI-8585PSI chip.

[0037] In this embodiment, the 429 level conversion receiving chip 6 is used to convert the received 429 bipolar return-to-zero level into the 5VTTL level; the 429 level conversion sending chip 7 is used to convert the 429 signal of the 5VTTL level into the 429 standard interface level.

[0038] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0039] The working principle and use process of the present invention are as follows: by realizing the multi-channel 429 data communication trigger output of PXIE in a 3U PXIE size (160mm×100mm), using the PXIE bus interface to exchange trigger data, using the PXIE channel trigger bus transceiver to connect the FPGA and the PXIE bus interface to send and receive control commands, and realizing the simultaneous control of multiple target boards to achieve the expansion of the multi-channel 429 bus transceiver function.

[0040] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. An ARINC429 communication card based on PXIE bus trigger, characterized by: The invention comprises an ARINC429 communication board (0) and is used for multi-channel 429 data communication trigger output. The ARINC429 communication board (0) comprises: a PXIE bus connector (1); an FPGA (3) for processing communication and control information data; an 8-channel trigger bus transceiver (2) connected to the PXIE bus connector (1) and the FPGA (3); a 429 level conversion receiving chip (6) and a 429 level conversion sending chip (7) connected to the FPGA (3); a SCSI68 communication connector (8); an analog-to-digital isolation chip (5) connected to the 429 level conversion receiving chip (6) and the 429 level conversion sending chip (7); and a power management module (4).

2. The ARINC429 communication card based on PXIE bus triggering according to claim 1, characterized in that: The 8-channel trigger bus transceiver (2) is used to send control signals of the FPGA (3) and receive controlled signals transmitted by the PXIE bus connector (1).

3. The ARINC429 communication card based on PXIE bus triggering according to claim 1, characterized in that: The power management module (4) is composed of a ±15V isolated power supply, a 5V isolated power supply and a 5V digital power supply, and supplies power to the FPGA (3), the analog-to-digital isolation chip (5), the 429 level conversion receiving chip (6) and the 429 level conversion sending chip (7).

4. The ARINC429 communication card based on PXIE bus triggering according to claim 1, characterized in that: The 429 level conversion receiving chip (6) and the 429 level conversion sending chip (7) are connected to the SCSI68 communication connector (8), and a parallel protection circuit is connected between the 429 level conversion receiving chip (6) and the 429 level conversion sending chip (7) and the SCSI68 communication connector (8).

5. The ARINC429 communication board based on PXIE bus triggering according to claim 1, characterized in that: The FPGA (3) comprises 8-way FIFOs and is connected to an 8-channel trigger bus transceiver (2), and implements 429 communication control of the target board card through 8-to-1 channels.

6. The ARINC429 communication card based on PXIE bus triggering according to claim 1, characterized in that: The FPGA (3) is connected to the input and output trigger clocks.

7. The ARINC429 communication card based on PXIE bus triggering according to claim 1, characterized in that: The input and output trigger clocks are connected via an analog-to-digital isolation chip (5).

8. The ARINC429 communication card based on PXIE bus triggering according to claim 1, characterized in that: The 429 level conversion receiving chip (6) is a HI-8588PSI chip; and the 429 level conversion sending chip (7) is a HI-8585PSI chip.

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