Error reporting processing method and device for graphics card of graphics processor

Abstract

The invention relates to the technical field of computers, in particular to an error processing method and device for a graphics card of a graphics processor. According to the embodiment of the invention, firstly, whether a graphics card of a graphics processor deployed in current equipment generates a shielding error or not is monitored; and when it is detected that the screenable error is generated, further detecting whether the first graphics processor display card with the error hits the white list or not, distinguishing different conditions by means of the white list, and then calling a corresponding error reporting processing strategy according to a corresponding detection result to execute an error reporting processing operation on the first graphics processor display card. Therefore, graphics cards of the graphics processor generating the maskable errors can be processed in a targeted mode, the situation that distinguishing is not carried out is avoided, the phenomenon that a central processing unit frequently enters an SMI processing program due to the fact that a large number of maskable errors occur is effectively reduced, and the processing efficiency is improved. Therefore, the performance of the central processing unit is prevented from being reduced, the performance of the server is prevented from being influenced, and the production process of a production line is prevented from being blocked.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a method and device for processing an error of a graphics processor display card. Background Art

[0002] When the server encounters an abnormal operation of a high-speed expansion device, the SMI interrupt mechanism of the CPU will be triggered. At this time, the CPU will first retain the currently executing task and then enter the SMM mode. In this mode, the CPU resources will be monopolized and will no longer respond to other processing tasks. It will not resume the previous CPU interrupt point until the SMM mode is exited to continue the previously saved tasks. Although the CPU frequency is already very high nowadays, frequent entry into the SMM mode will still occupy the CPU resources, thereby causing the CPU performance to decline. For example, after the server is equipped with a graphics card from a certain manufacturer, during the production process of the server project, a large number of maskable errors will be reported when the basic input and output system is entered after power-on. The large number of errors reported in a short period of time causes the CPU to frequently enter the SMI handler, which not only reduces the CPU performance and seriously affects the overall performance of the server, but also blocks the production process of the production line due to excessive errors, resulting in a low pass rate. Summary of the invention

[0003] In view of this, an embodiment of the present invention provides an error processing method and device for a graphics processor graphics card to solve the problem that during the production process of a server project, a large number of maskable errors will be reported when the basic input and output system is entered when the computer is powered on. The large number of errors in a short period of time causes the central processing unit to frequently enter the SMI processing program, which not only reduces the performance of the central processing unit and affects the performance of the server, but also blocks the production line production process, resulting in a low pass rate.

[0004] In a first aspect, an embodiment of the present invention provides a method for processing an error of a graphics processor display, the method comprising:

[0005] Monitor whether the graphics processor graphics card deployed in the current device generates maskable errors;

[0006] If a maskable error is detected, whether a first graphics processor graphics card that generates the maskable error hits a graphics card whitelist of the current device is detected to obtain a detection result, wherein the graphics card whitelist includes graphics card information of at least one second graphics processor graphics card, the second graphics processor graphics card is a graphics processor graphics card selected from all graphics processor graphics cards connected to the current device for maskable error management, and the first graphics processor graphics card is any one of a plurality of graphics processor graphics cards in the current device;

[0007] An error processing strategy corresponding to the detection result is obtained, and the error processing strategy is called to report an error condition corresponding to the first graphics processor graphics card to a baseboard management controller.

[0008] Further, the detecting whether the first graphics processor graphics card that generates the maskable error hits a whitelist of graphics processor graphics cards for maskable error management in the current device includes:

[0009] Obtaining a device identifier and a manufacturer identifier corresponding to the first graphics processor graphics card, and constructing graphics card information corresponding to the first graphics processor graphics card using the device identifier and the manufacturer identifier;

[0010] Matching the graphics card information corresponding to the first graphics processor graphics card with the graphics card information in the graphics card whitelist;

[0011] If there is graphics card information in the graphics card whitelist that matches the graphics card information corresponding to the first graphics processor graphics card, it is determined that the detection result is that the first graphics graphics card processor hits the graphics card whitelist; or, if there is no graphics card information in the graphics card whitelist that matches the graphics card information corresponding to the first graphics processor graphics card, it is determined that the detection result is that the first graphics graphics card processor does not hit the graphics card whitelist.

[0012] Furthermore, the method further comprises:

[0013] Traversing all high-speed expansion devices in the current device to obtain asset information of each high-speed expansion device;

[0014] Using the asset information to select a graphics processor graphics card from the high-speed expansion device;

[0015] Identify the device identification and the manufacturer identification of each of the graphics processor graphics cards, and use the graphics processor graphics card whose device identification is a specified device identification and / or whose manufacturer identification is a specified manufacturer identification as the second graphics processor graphics card;

[0016] Graphics card information is generated using the device identifier and the manufacturer identifier corresponding to the second graphics processor graphics card, and the graphics card whitelist is constructed based on the graphics card information of each second graphics processor graphics card.

[0017] Further, calling the error processing strategy to report the error situation corresponding to the first graphics processor graphics card to the baseboard management controller includes:

[0018] If the target identification bit is the first identification bit, it is determined that the maskable error belongs to the first error type, the identification code displayed by the preset identification bit in the status register is updated to the first preset value, and the management interrupt mechanism is triggered to take effect, and the error condition corresponding to the first graphics processor graphics card is reported to the baseboard management controller based on the management interrupt mechanism;

[0019] or,

[0020] If the target identification bit is the second identification bit, it is determined that the maskable error belongs to the second error type, and the triggering number corresponding to the second error type within a preset time period is detected; if the triggering number is lower than the first preset number, the identification code displayed by the preset identification bit in the status register is updated to the second preset value; or, if the triggering number is higher than the first preset number, the management interrupt mechanism is triggered to take effect, and the error condition corresponding to the first graphics processor graphics card is reported to the baseboard management controller based on the management interrupt mechanism;

[0021] or,

[0022] If the target identification bit is the third identification bit, it is determined that the maskable error belongs to the third error type, and the cumulative triggering number corresponding to the third error type is obtained. If the cumulative triggering number reaches a second preset number, the management interrupt mechanism is triggered to take effect, and the error situation corresponding to the first graphics processor graphics card is reported to the baseboard management controller based on the management interrupt mechanism; or, if the cumulative triggering number does not reach the second preset number, the cumulative triggering number corresponding to the third error type is updated, wherein the third error type includes all error types except the first error type and the second error type.

[0023] Further, the reporting of the error condition corresponding to the first graphics processor graphics card to the baseboard management controller based on the management interrupt mechanism includes:

[0024] Acquire identification codes corresponding to the first identification bit, the second identification bit, and the third identification bit in the status register based on the management interrupt mechanism;

[0025] The error type corresponding to the identification bit whose identification code is the first preset value is sent to the baseboard management controller, and the identification bit whose identification code is the first preset value among the first identification bit, the second identification bit and the third identification bit is reset.

[0026] Further, the obtaining an error processing strategy corresponding to the detection result, and calling the error processing strategy to report an error condition corresponding to the first graphics processor graphics card to the baseboard management controller, includes:

[0027] If the detection result is that the first graphics card processor does not hit the graphics card whitelist, obtaining an error processing strategy corresponding to the high-speed expansion device;

[0028] According to the error handling strategy corresponding to the high-speed expansion device, the error condition of the first graphics processor graphics card is reported to the baseboard management controller.

[0029] Furthermore, the device comprises:

[0030] A monitoring module is used to monitor whether a graphics processor graphics card deployed in the current device generates a maskable error;

[0031] a detection module, configured to detect whether a first graphics processor graphics card generating the maskable error hits a graphics card whitelist of a current device if a maskable error is detected, and obtain a detection result, wherein the graphics card whitelist includes graphics card information of at least one second graphics processor graphics card, the second graphics processor graphics card is a graphics processor graphics card selected from all graphics processor graphics cards connected to the current device for maskable error management, and the first graphics processor graphics card is any one of a plurality of graphics processor graphics cards in the current device;

[0032] The processing module is used to obtain an error processing strategy corresponding to the detection result, and call the error processing strategy to report the error situation corresponding to the first graphics processor graphics card to the baseboard management controller.

[0033] In a third aspect, an embodiment of the present invention provides a computer device, comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the method of the first aspect or any corresponding embodiment thereof by executing the computer instructions.

[0034] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the method of the first aspect or any corresponding embodiment thereof.

[0035] The embodiment of the present application first monitors whether the graphics processor graphics card deployed in the current device generates a maskable error. When a maskable error is detected, it is further detected whether the first graphics processor graphics card with an error hits the whitelist, and the whitelist is used to distinguish different situations, and then the corresponding error processing strategy is called according to the corresponding detection result to perform an error processing operation on the first graphics processor graphics card. In this way, those graphics processor graphics cards that generate maskable errors can be processed in a targeted manner, avoiding the situation of indiscriminate use, and effectively reducing the phenomenon of the central processing unit frequently entering the SMI handler due to the occurrence of a large number of maskable errors, thereby preventing the central processing unit performance from being degraded, the server performance from being affected, and the production line production process from being blocked, which ultimately helps to improve the pass rate.

[0036] After the detection result shows that the first graphics card processor hits the whitelist, the embodiment of the present application determines the target identification bit by reading the status identification code of the status register identification bit, and then obtains the corresponding relationship between it and the preset error handling strategy to clarify the corresponding strategy, and then executes the error handling operation according to the strategy. In this process, if the target identification bit is the first identification bit, it can accurately determine that the maskable error belongs to the first error type, and effectively deal with the error by updating the identification code, triggering the management interrupt mechanism and performing operations based on this; if it is the second identification bit, it can be determined that it belongs to the second error type, and according to the number of triggers within the preset time period, it can be flexibly determined whether to update the identification code or trigger the management interrupt mechanism for processing, so as to achieve differentiated response; if it is the third identification code, for the third error type, it can be determined whether to trigger the management interrupt mechanism or update the cumulative number of triggers according to whether the cumulative number of triggers reaches the preset number, covering a variety of error situations.

[0037] In this way, the present application can accurately distinguish different error types, and flexibly and specifically take corresponding processing measures according to the characteristics and frequency of each type of error, so as to efficiently and reasonably handle the maskable errors that occur in the graphics processor graphics card, ensure the stable operation of the system, and reduce the adverse effects of errors on system performance and processes.

[0038] When the present application reports the error situation corresponding to the first graphics processor graphics card to the baseboard management controller based on the management interrupt mechanism, the identification code corresponding to the first identification bit, the second identification bit and the third identification bit in the status register is first obtained through the mechanism. This step can accurately capture the key information reflecting the error state of the current graphics processor graphics card. Then, the error type corresponding to the identification bit with the identification code of the first preset value is sent to the baseboard management controller, so that the baseboard management controller can know the specific error situation in time, which is convenient for overall management and subsequent follow-up processing from a higher level. At the same time, the identification bit with the corresponding identification code of the first preset value will be reset. In this way, it can not only ensure that the relevant identification bits of the status register can accurately reflect the new error state that may appear later, avoid the accumulation and confusion of error information, but also ensure that the entire error reporting process forms an orderly and effective closed loop, which helps the system to more efficiently and accurately deal with various errors in the graphics processor graphics card, maintain the stable operation of the system, and improve the overall operation efficiency and reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0040] Figure 1 is a flowchart of a method for processing an error of a graphics processor display card according to some embodiments of the present invention;

[0041] Figure 2 is a flowchart of a method for processing an error of a graphics processor display card according to some embodiments of the present invention;

[0042] Figure 3 is a flowchart of a method for processing an error of a graphics processor display card according to some embodiments of the present invention;

[0043] Figure 4 is a flowchart of a method for processing an error of a graphics processor display card according to some embodiments of the present invention;

[0044] Figure 5 is a flowchart of a method for processing an error of a graphics processor display card according to some embodiments of the present invention;

[0045] Figure 6 is a structural block diagram of an error processing device of a graphics processor display according to an embodiment of the present invention;

[0046] Figure 7It is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0047] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0048] According to an embodiment of the present invention, a method and device for handling errors in a graphics processor and graphics card are provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0049] In this embodiment, a method for processing an error of a graphics processor display card is provided. Figure 1 is a flow chart of an error processing method of a graphics processor display according to an embodiment of the present invention. Figure 1 As shown, the process includes the following steps:

[0050] Step S101, monitoring whether a graphics processor graphics card deployed in the current device generates a maskable error.

[0051] In an embodiment of the present application, the basic input and output system (BIOS) starts the corresponding monitoring function, and it will identify the various graphics processor cards deployed in the current device according to the established process. After completing the identification, the BIOS will establish a continuous monitoring mechanism for these graphics processor cards, focusing on monitoring the error conditions in their operating status, especially to conduct a detailed investigation on whether shieldable errors have occurred. It will obtain various types of operating data information fed back by the graphics processor card in real time, and analyze and compare these data through the built-in relevant judgment logic and detection algorithm, so as to accurately determine whether these graphics processor cards have shieldable errors, and then provide a basis for other processing processes that may be carried out in the future, and determine whether further response measures need to be taken based on the detection results.

[0052] Step S102: If a maskable error is detected, detect whether the first graphics processor graphics card that generates the maskable error hits a graphics card whitelist of the current device to obtain a detection result, wherein the graphics card whitelist includes graphics card information of at least one second graphics processor graphics card, the second graphics processor graphics card is a graphics processor graphics card screened out from all graphics processor graphics cards connected to the current device for maskable error management, and the first graphics processor graphics card is any one of multiple graphics processor graphics cards in the current device.

[0053] In an embodiment of the present application, when a maskable error is detected through monitoring, the next step of the detection process will be started immediately. Specifically, the system will focus on the first graphics processor graphics card where the maskable error occurs, extract its relevant information, and then compare and verify it with a pre-set graphics card whitelist. This graphics card whitelist covers the graphics card information of at least one second graphics processor graphics card, and these second graphics processor graphics cards are selected from all graphics processor graphics cards connected to the current device through specific screening conditions, and are graphics processor graphics cards specifically used for maskable error management. The system will carefully determine whether the information of the first graphics processor graphics card can find a corresponding record in this graphics card whitelist in accordance with the corresponding matching rules. After such a rigorous matching operation, the corresponding detection result is finally obtained, so that the corresponding processing strategy can be decided based on the detection result in the future.

[0054] In the embodiment of the present application, detecting whether the first graphics processor graphics card that can shield errors hits the graphics card whitelist to obtain the detection result includes the following steps A1-A3:

[0055] Step A1, obtaining a device identifier and a manufacturer identifier corresponding to a first graphics processor graphics card, and constructing graphics card information corresponding to the first graphics processor graphics card using the device identifier and the manufacturer identifier.

[0056] Specifically, first, the corresponding device ID (DeviceID) and vendor ID (VendorID) are accurately extracted from the underlying hardware information storage area of ​​the first graphics processor graphics card or the configuration information fed back by it. After obtaining these two key identification information, the device ID and the vendor ID are combined or associated according to the established information integration rules to construct the graphics card information that can uniquely characterize the first graphics processor graphics card, in preparation for the subsequent comparison with the information in the graphics card whitelist.

[0057] Step A2: Matching the graphics card information corresponding to the first graphics processor graphics card with the graphics card information in the graphics card whitelist.

[0058] Specifically, after obtaining the graphics card information corresponding to the first graphics processor graphics card, access the storage medium such as the database or configuration file storing the graphics card whitelist, and read the graphics card information recorded in the graphics card whitelist one by one. For each graphics card information in the graphics card whitelist, according to the preset matching algorithm, strictly compare and analyze each element in the graphics card information of the first graphics processor graphics card (such as key parts such as device identification and manufacturer identification) with the corresponding element of the corresponding graphics card information in the graphics card whitelist to check whether there is a complete match or a situation that meets the established matching conditions. After traversing all the graphics card information in the entire graphics card whitelist, the matching process is completed.

[0059] Step A3: if the graphics card whitelist contains graphics card information that matches the graphics card information corresponding to the first graphics processor graphics card, then the detection result is determined to be that the first graphics graphics card processor hits the graphics card whitelist; or, if the graphics card whitelist contains graphics card information that matches the graphics card information corresponding to the first graphics processor graphics card, then the detection result is determined to be that the first graphics graphics card processor does not hit the graphics card whitelist.

[0060] Specifically, the final detection result is determined based on the matching result. If, in the process of traversing the graphics card information in the graphics card whitelist, it is found that there is a certain graphics card information that completely matches the graphics card information corresponding to the first graphics processor graphics card in key elements, or satisfies the pre-set matching conditions, then it can be determined that the detection result is that the first graphics graphics card processor hits the graphics card whitelist; conversely, if after completely traversing all the graphics card information in the graphics card whitelist, no graphics card information that can match it is found, then it is determined that the detection result is that the first graphics graphics card processor does not hit the graphics card whitelist, so as to clarify the matching status of the graphics processor graphics card in the graphics card whitelist, and then provide a basis for subsequent operations such as corresponding policy execution based on this detection result.

[0061] Step S103, obtaining an error processing strategy corresponding to the detection result, and calling the error processing strategy to report an error condition corresponding to the first graphics processor graphics card to a baseboard management controller.

[0062] In the embodiment of the present application, obtaining the error handling strategy corresponding to the detection result includes the following steps B1-B4:

[0063] Step B1: If the detection result is that the first graphics card processor hits the graphics card whitelist, then read the status identification code displayed by each identification bit in the status register.

[0064] Specifically, after completing the matching detection between the first graphics graphics processor and the graphics card whitelist, and obtaining the detection result that the first graphics graphics processor hits the graphics card whitelist, the status register (CE Status) corresponding to the first graphics processor graphics card is accurately located through a specific hardware access mechanism and interface program. Since the status register contains identification bit information reflecting the current status of the graphics card, the focus is on the identification bits bit1, bit2, and bit3. The system will read the status identification codes displayed by the identification bits bit1, bit2, and bit3 from the status register in accordance with the established reading order and data acquisition rules, and accurately extract these identification codes so that they can be used to determine the specific error type currently occurring in the graphics card.

[0065] Step B2, using the identification bit of the state identification code with the first preset value as the target identification bit;

[0066] Specifically, after reading the status identification codes corresponding to the bit1, bit2, and bit3 in the status register (CEStatus), the system will select the identification code with the first preset value (that is, 1) as the target identification code according to the pre-set rules. For example, it will check whether the value of bit1 is 1 in turn. If it is, bit1 will be marked as the target identification code; then check the value of bit2. If its value is 1, bit2 will also be marked as the target identification code; and then do the same operation on bit3. In this way, all the identification codes with a status identification code of 1 are screened out. The status information corresponding to these target identification codes represents the corresponding type of error in the current graphics processor graphics card, and the specific error handling strategy will be determined based on them later.

[0067] Step B3, obtaining a first corresponding relationship between the identification bit and the preset error processing strategy.

[0068] Specifically, the basic input and output system is configured with a configuration area for recording the correspondence between the identification bit and the preset error handling strategy. This configuration area can be a configuration file stored in a specific location on the hard disk, or a specific data structure in the memory, such as a correspondence table presented in a tabular form. The system will use the corresponding search algorithm and access mechanism to retrieve this storage area, and obtain the complete first correspondence between the identification bit and the preset error handling strategy. That is to clarify the association information of what error handling strategy should be adopted when the corresponding maskable error occurs corresponding to the identification bits such as bit1, bit2, and bit3, to ensure that the corresponding processing strategy can be accurately matched according to the target identification bit in the future.

[0069] Step B4: determine the error handling strategy corresponding to the target identification bit based on the first corresponding relationship, and use the error handling strategy corresponding to the target identification bit as the error handling strategy matched by the detection result.

[0070] Specifically, if there is bit 1 in the target identification bit, then the preset error handling policy entry corresponding to bit 1 is searched in the first corresponding relationship, and the specific error handling policy corresponding to when the status identification code of bit 1 is 1 is determined according to the established corresponding rules; similarly, for other target identification bits such as bit 2 and bit 3, similar search and matching operations are performed to accurately know the error handling strategy corresponding to each target identification bit when a maskable error occurs.

[0071] Specifically, calling the error processing strategy to report the error situation corresponding to the first graphics processor graphics card to the baseboard management controller includes: ① if the target identification bit is the first identification bit, determining that the maskable error belongs to the first error type, updating the identification code displayed by the preset identification bit in the status register to the first preset value, triggering the management interrupt mechanism to take effect, and reporting the error situation corresponding to the first graphics processor graphics card to the baseboard management controller based on the management interrupt mechanism;

[0072] If the target identification bit is bit1 (CE Status (bit1=1)), the corresponding situation is: because the GPU graphics card is considered to be a normal CE at this time, according to the set policy rules, one is triggered at a time, and the system will send instructions to the control module related to the graphics card to set Bit0 of the GPU CE Status to 1, so as to record and reflect this normal CE situation and the corresponding processing status.

[0073] ② If the target identification bit is the second identification bit, it is determined that the maskable error belongs to the second error type, and the triggering number corresponding to the second error type within the preset time period is detected; if the triggering number is lower than the first preset number, the identification code displayed by the preset identification bit in the update status register is the second preset value; or, if the triggering number is higher than the first preset number, the management interrupt mechanism is triggered to take effect, and the error condition corresponding to the first graphics processor graphics card is reported to the baseboard management controller based on the management interrupt mechanism.

[0074] If the target identification bit is bit2 (CEStatus (bit2 = 1)), the corresponding situation is: At this time, it is considered that GPUCE is an error on the link, and the link is unstable and reports an error. According to the policy rules, the system will start a counting and monitoring mechanism to count the number of CEs of this type that appear within one minute. As long as the number of CEs within one minute is not greater than 32, it is determined that it does not affect the normal operation of the GPU card and will not trigger the SMI mechanism. In addition, through the corresponding instruction operation, Bit0 of the GPU CE Status status is set to 0, indicating that the current link error is within an acceptable range and the graphics card can operate normally.

[0075] ③ If the target identification bit is the third identification bit, it is determined that the maskable error belongs to the third error type, and the cumulative triggering number corresponding to the third error type is obtained. If the cumulative triggering number reaches the second preset number, the management interrupt mechanism is triggered to take effect, and the error situation corresponding to the first graphics processor graphics card is reported to the baseboard management controller based on the management interrupt mechanism; or, if the cumulative triggering number does not reach the second preset number, the cumulative triggering number corresponding to the third error type is updated, wherein the third error type includes all error types except the first error type and the second error type.

[0076] If the target identification bit is bit3 (CE Status (bit3=1)), the corresponding situation is: Since it is determined that this is another error type and the system impact is small, according to the policy rules, the system will start to accumulate the count of CE errors of the same type. Whenever the cumulative number is greater than 2000, an SMI mechanism will be triggered. At the same time, Bit0 of the GPU CE Status state will be set to 1 through instructions, and then the counting of CE errors of this type will be restarted to deal with this error situation and ensure that the overall operation status of the graphics card is as stable as possible.

[0077] After the detection result shows that the first graphics card processor hits the graphics card whitelist, the embodiment of the present application determines the target identification bit by reading the status identification code of the status register identification bit, and then obtains the corresponding relationship between it and the preset error handling strategy to clarify the corresponding strategy, and then executes the error handling operation according to the strategy. In this process, if the target identification bit is the first identification bit, it can accurately determine that the maskable error belongs to the first error type, and effectively deal with the error by updating the identification code, triggering the management interrupt mechanism and performing operations based on this; if it is the second identification bit, it can be determined that it belongs to the second error type, and according to the number of triggers within the preset time period, it can be flexibly determined whether to update the identification code or trigger the management interrupt mechanism for processing, so as to achieve differentiated response; if it is the third identification code, for the third error type, it can be determined whether to trigger the management interrupt mechanism or update the cumulative number of triggers according to whether the cumulative number of triggers reaches the preset number, covering a variety of error situations.

[0078] In this way, the present application can accurately distinguish different error types, and flexibly and specifically take corresponding processing measures according to the characteristics and frequency of each type of error, so as to efficiently and reasonably handle the maskable errors that occur in the graphics processor graphics card, ensure the stable operation of the system, and reduce the adverse effects of errors on system performance and processes.

[0079] In an embodiment of the present application, an error condition corresponding to a first graphics processor graphics card is reported to a baseboard management controller based on a management interrupt mechanism, including: obtaining identification codes corresponding to a first identification bit, a second identification bit, and a third identification bit in a status register based on a management interrupt mechanism; sending an error type corresponding to an identification bit with an identification code having a first preset value to the baseboard management controller, and resetting an identification bit with an identification code having a first preset value among the first identification bit, the second identification bit, and the third identification bit.

[0080] Specifically, the GPU CE Status status register is first accessed through the corresponding hardware, and then the identification codes corresponding to the first identification bit, the second identification bit and the third identification bit are obtained. Then, the obtained identification codes are compared with the first preset value one by one. If the identification code corresponding to a certain identification bit is equal to the first preset value, it is determined that the error type corresponding to the identification bit needs to be processed. Then, according to the BIOS, the GPU graphics card CE error reporting BMC policy rule is used. When Bit0 of the GPU CEStatus status register is 1 and the error type corresponding to the corresponding identification bit is set to 1, the BIOS sends the error type information corresponding to the identification bit with the identification code of the first preset value to the baseboard management controller (BMC). After the reporting operation is completed, the identification bit with the identification code of the first preset value in the first identification bit, the second identification bit and the third identification bit is reset through a specific instruction operation, so as to realize the reporting of the error situation corresponding to the first graphics processor graphics card to the baseboard management controller based on the management interrupt mechanism, ensuring that the system can effectively manage and timely feedback the GPU graphics card CE error, and at the same time, the status register can accurately record the subsequent related situations.

[0081] In addition, while determining the error type, the time when the current error occurs is recorded, and the accurate timestamp is obtained through the system clock for recording. In order to count the frequency of error occurrence, a combination mechanism of a counter and a timer is pre-set. Whenever a specific error type is detected, the corresponding counter is incremented by one, and the timer starts timing. After a certain time period (such as every hour, every day, etc.), the frequency of occurrence of this error type within this time period is calculated. At the same time, for correlation analysis with other system events, other key events in the system are monitored, such as the startup of a specific software module, the status change of hardware devices, etc. When an error occurs, check whether there are related system events occurring at the same time, and record these correlations.

[0082] Next, establish an error type database, and choose to use a relational database or a non-relational database to store error type information. The database contains the following fields: error type identification, error occurrence time, error occurrence frequency, and associated system event description. Every time new error type information is obtained, it is inserted into the database. Subsequent queries are performed based on error type, time range, frequency threshold, and other conditions, and corresponding statistical charts and reports are generated to help technicians better understand the common error types in the system and the patterns of their occurrence.

[0083] In an embodiment of the present application, an error handling strategy corresponding to the detection result is obtained, and the error handling strategy is called to report the error situation corresponding to the first graphics processor graphics card to the baseboard management controller, including: if the detection result is that the first graphics graphics card processor does not hit the graphics card whitelist, then obtaining the error handling strategy corresponding to the high-speed expansion device; according to the error handling strategy corresponding to the high-speed expansion device, reporting the error situation of the first graphics processor graphics card to the baseboard management controller.

[0084] Specifically, when the detection result shows that the first graphics card processor does not hit the graphics card whitelist, it means that the graphics processor graphics card is not in the pre-set graphics card whitelist system. At this time, according to the established rules, the relevant processing path for the device in the graphics card whitelist is not taken, but the error handling strategy corresponding to the high-speed expansion device involved in the PCIE device policy rules of the server is obtained. After successfully obtaining the corresponding error handling strategy, the error of the first graphics processor graphics card is reported to the baseboard management controller in strict accordance with the specific requirements and operating steps of the high-speed expansion device and its corresponding error handling strategy, so as to deal with the error of the graphics processor graphics card, ensure its normal operation in the device environment to which it belongs, or reasonably control its errors.

[0085] The embodiment of the present application first monitors whether the graphics processor graphics card deployed in the current device generates a maskable error. When a maskable error is detected, it is further detected whether the first graphics processor graphics card with an error hits the graphics card whitelist, and the graphics card whitelist is used to distinguish different situations, and then the corresponding error processing strategy is called according to the corresponding detection result to perform an error processing operation on the first graphics processor graphics card. In this way, those graphics processor graphics cards that generate maskable errors can be processed in a targeted manner, avoiding the situation of indiscriminate use, and effectively reducing the phenomenon of the central processing unit frequently entering the SMI handler due to the occurrence of a large number of maskable errors, thereby preventing the central processing unit performance from being degraded, the server performance from being affected, and the production line production process from being blocked, which ultimately helps to improve the pass rate.

[0086] In the embodiments of the present application, Figure 2As shown, the method also includes:

[0087] Step S201, traverse all high-speed expansion devices in the current device to obtain asset information of each high-speed expansion device.

[0088] In the embodiment of the present application, through the corresponding hardware detection module and following the relevant identification protocols and specifications of the high-speed expansion devices (such as PCIE devices), all the connected high-speed expansion devices in the current device are traversed one by one. Starting from the first high-speed expansion device, their hardware configuration areas or the information fed back by the device driver are accessed in turn, and various detailed information such as device model, device functional characteristics, and device hardware version that can reflect its basic situation are collected, and these are combined as the asset information of each high-speed expansion device until the information collection work of all high-speed expansion devices is completed to ensure that nothing is missed, so as to fully grasp the asset status of all high-speed expansion devices in the current device, and provide basic data support for subsequent screening and other operations.

[0089] Step S202: Filter the graphics processor card from the high-speed expansion device using the asset information.

[0090] In the embodiment of the present application, after obtaining the asset information of all high-speed expansion devices, the system will analyze and screen the asset information according to the pre-set specific conditions and judgment rules for identifying the graphics processor graphics card. These conditions and rules may involve information such as the functional description of the device, specific hardware module identification or specific interface type. By comparing the asset information of each high-speed expansion device to see whether it meets these characteristics corresponding to the graphics processor graphics card, the device that meets the graphics processor graphics card judgment standard is selected and separated from the numerous high-speed expansion devices, thereby completing the operation of filtering out the graphics processor graphics card from the high-speed expansion device, so as to further clarify the key identification information of the relevant graphics card in the future.

[0091] Step S203, identifying the device identification and the manufacturer identification of each graphics processor graphics card, and using the graphics processor graphics card whose device identification is a specified device identification and / or whose manufacturer identification is a specified manufacturer identification as the second graphics processor graphics card.

[0092] In the embodiment of the present application, for each screened graphics processor graphics card, the system will go deep into the hardware identification storage area of ​​these graphics processor graphics cards through the corresponding hardware access mechanism and the underlying data reading instructions, and accurately extract the two key identity identification information of its device identification (DeviceID) and manufacturer identification (VendorID). Then, according to the pre-set designated device identification and / or designated manufacturer identification, matching judgment is performed, and those graphics processor graphics cards whose device identification is exactly the designated device identification, or the manufacturer identification is the designated manufacturer identification, or both meet the corresponding designated requirements are selected, and they are identified as the second graphics processor graphics card, so as to clarify the target graphics processor graphics card group that is focused on in the subsequent construction of the graphics card whitelist, and provide core elements for the construction of the graphics card whitelist.

[0093] Step S204: Generate graphics card information using the device identifier and the manufacturer identifier corresponding to the second graphics processor graphics card, and construct a graphics card whitelist based on the graphics card information of each second graphics processor graphics card.

[0094] In the embodiment of the present application, for each screened second graphics processor graphics card, its corresponding device identification and manufacturer identification will first be combined and processed according to the established information integration method, for example, it can be simply spliced ​​or associated in a specific format, so as to generate graphics card information that can uniquely characterize the second graphics processor graphics card. Afterwards, the graphics card information generated by each second graphics processor graphics card is used as an element, and the graphics card information of all second graphics processor graphics cards is orderly integrated together according to a certain storage structure and organizational form, such as a list or table, so as to construct a complete graphics card whitelist. This graphics card whitelist will play an important role in the subsequent management, error handling and related matching judgment of the graphics processor graphics card, so as to distinguish different types of graphics processor graphics cards and take targeted measures.

[0095] The present application embodiment provides a complete GPU error processing flow, such as Figure 3As shown, first, BIOS traverses all PCIE devices through PCIE rules to obtain the asset information of each device. Using the graphics card whitelist, the DeviceID and VendorID of the device are used to determine whether the device that triggers the CE error is a GPU graphics card in the graphics card whitelist. If it is not a GPU graphics card in the graphics card whitelist, the PCIE device policy rules of the server are executed to handle the CE error of the device. If it is a GPU graphics card in the graphics card whitelist, the CE error handling process of the GPU graphics card of the present invention is called. When a GPU CE error is triggered, it is determined whether it is a GPU CE error. If so, the GPU CE error policy rules of the second step are called according to the GPU graphics card in the graphics card whitelist, and the GPU CE triggers the SMI policy rules.

[0096] like Figure 4 As shown, for the GPU graphics card identified in the graphics card whitelist system in the first step, when a CE error is detected, the GPU graphics card CE policy rule system is immediately started. The CE error is classified according to the CEStatus status bit of the GPU graphics card CE error, and the CE type is determined by checking the values ​​of bit1, bit2, and bit3 in the CEStatus status type.

[0097] If bit1=1, it is considered that the GPU graphics card is a normal CE. At this time, the policy rule is set to trigger one by one, and Bit0 of GPUCEStatus is set to 1.

[0098] If bit2 = 1, GPUCE is considered to be an error on the link, and the link is unstable and an error is reported. When the policy rule is set to no more than 32 CEs within one minute, it is considered that the normal operation of the GPU card is not affected, the SMI mechanism is not triggered, and Bit0 of GPUCEStatus is set to 0.

[0099] If bit3 = 1, GPUCE is considered to be other error types, which have little impact on the system. Set the policy rule to trigger the SMI mechanism once every time the same type of CE errors accumulate to more than 2000, set Bit0 of GPUCEStatus to 1, and then restart the count.

[0100] like Figure 5As shown, when an SMI interrupt is triggered, check the GPUCEStatus status register. Determine whether Bit0 of GPUCEStatus is 1 and whether bit (1 / 2 / 3) of GPUCEStatus is set to 1. If Bit0 = 1 and one or more of bits (1 / 2 / 3) are set to 1, BIOS reports the GPUCE error to BMC. After the report is completed, BIOS clears the GPUCEStatus register to prepare for the next error detection and reporting. If Bit0 is not 1 or bit (1 / 2 / 3) is not 1, it will not be reported to BMC.

[0101] In this embodiment, a device for error processing of a graphics processor graphics card is also provided, which is used to implement the above embodiments and preferred implementations, and will not be repeated for what has been described. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0102] This embodiment provides an error processing device for a graphics processor display card, such as Figure 6 As shown, including:

[0103] A monitoring module 601 is used to monitor whether a graphics processor graphics card deployed in the current device generates a maskable error;

[0104] The detection module 602 is used to detect whether the first graphics processor graphics card that generates the maskable error hits the graphics card whitelist of the current device if a maskable error is detected, and obtain a detection result, wherein the graphics card whitelist includes graphics card information of at least one second graphics processor graphics card, the second graphics processor graphics card is a graphics processor graphics card screened from all graphics processor graphics cards connected to the current device for maskable error management, and the first graphics processor graphics card is any one of multiple graphics processor graphics cards in the current device;

[0105] The processing module 603 is used to obtain an error processing strategy that matches the detection result, and call the error processing strategy to report the error situation corresponding to the first graphics processor graphics card to the baseboard management controller.

[0106] In an embodiment of the present application, the detection module 602 is used to obtain a device identifier and a manufacturer identifier corresponding to the first graphics processor graphics card, and use the device identifier and the manufacturer identifier to construct graphics card information corresponding to the first graphics processor graphics card; use the graphics card information corresponding to the first graphics processor graphics card to match the graphics card information in the graphics card whitelist; if there is graphics card information in the graphics card whitelist that matches the graphics card information corresponding to the first graphics processor graphics card, then it is determined that the detection result is that the first graphics graphics card processor hits the graphics card whitelist; or, if there is no graphics card information in the graphics card whitelist that matches the graphics card information corresponding to the first graphics processor graphics card, then it is determined that the detection result is that the first graphics graphics card processor does not hit the graphics card whitelist.

[0107] In an embodiment of the present application, the device also includes: a generation module, which is used to traverse all high-speed expansion devices in the current device and obtain asset information of each high-speed expansion device; use the asset information to filter graphics processor graphics cards from the high-speed expansion devices; identify the device identifier and manufacturer identifier of each graphics processor graphics card, and use the graphics processor graphics card whose device identifier is a specified device identifier and / or whose manufacturer identifier is a specified manufacturer identifier as a second graphics processor graphics card; use the device identifier and manufacturer identifier corresponding to the second graphics processor graphics card to generate graphics card information, and build a graphics card whitelist based on the graphics card information of each second graphics processor graphics card.

[0108] In an embodiment of the present application, the processing module 603 is used to read the status identification code displayed by each identification bit in the status register if the detection result is that the first graphics graphics processor hits the graphics card whitelist; use the identification bit with the status identification code as the first preset value as the target identification bit; obtain the first corresponding relationship between the identification bit and the preset error processing strategy; determine the error processing strategy corresponding to the target identification bit based on the first corresponding relationship; and perform an error processing operation on the first graphics processor graphics card according to the error processing strategy.

[0109] In an embodiment of the present application, processing module 603 is used to determine that the maskable error belongs to the first error type if the target identification bit is the first identification bit, update the identification code displayed by the preset identification bit in the status register to the first preset value, trigger the management interrupt mechanism to take effect, and report the error situation corresponding to the first graphics processor graphics card to the baseboard management controller based on the management interrupt mechanism; or, if the target identification bit is the second identification bit, determine that the maskable error belongs to the second error type, detect the number of triggers corresponding to the second error type within a preset time period; if the number of triggers is lower than the first preset number, update the identification code displayed by the preset identification bit in the status register to the second preset value; or, if the number of triggers is higher than the first preset number , the management interrupt mechanism is triggered to take effect, and the error situation corresponding to the first graphics processor graphics card is reported to the baseboard management controller based on the management interrupt mechanism; or, if the target identification bit is the third identification bit, it is determined that the maskable error belongs to the third error type, and the cumulative number of triggers corresponding to the third error type is obtained. If the cumulative number of triggers reaches the second preset number of times, the management interrupt mechanism is triggered to take effect, and the error situation corresponding to the first graphics processor graphics card is reported to the baseboard management controller based on the management interrupt mechanism; or, if the cumulative number of triggers does not reach the second preset number of times, the cumulative number of triggers corresponding to the third error type is updated, wherein the third error type includes all error types except the first error type and the second error type.

[0110] In an embodiment of the present application, the processing module 603 is used to obtain the identification codes corresponding to the first identification bit, the second identification bit and the third identification bit in the status register based on the management interrupt mechanism; send the error type corresponding to the identification bit whose identification code is the first preset value to the baseboard management controller, and reset the identification bit whose identification code is the first preset value among the first identification bit, the second identification bit and the third identification bit.

[0111] In an embodiment of the present application, the processing module 603 is used to obtain the error processing strategy corresponding to the high-speed expansion device if the detection result is that the first graphics processor does not hit the graphics card whitelist; according to the error processing strategy corresponding to the high-speed expansion device, report the error situation of the first graphics processor graphics card to the baseboard management controller.

[0112] See also Figure 7 , Figure 7 is a schematic diagram of the structure of a computer device provided by an optional embodiment of the present invention, such as Figure 7As shown, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system).

[0113] The processor 10 may be a central processing unit, a network processor or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.

[0114] The memory 20 stores instructions executable by at least one processor 10, so that the at least one processor 10 executes the method shown in the above embodiment.

[0115] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created by the use of a computer device based on the presentation of a small program landing page, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0116] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.

[0117] The computer device further comprises a communication interface 30 for the computer device to communicate with other devices or a communication network.

[0118] The embodiment of the present invention also provides a computer-readable storage medium. The method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium through a network download, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.

[0119] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A method for processing an error of a graphics processor display, characterized in that: The method comprises: Monitor whether the graphics processor graphics card deployed in the current device generates maskable errors; If a maskable error is detected, whether a first graphics processor graphics card that generates the maskable error hits a graphics card whitelist of the current device is detected to obtain a detection result, wherein the graphics card whitelist includes graphics card information of at least one second graphics processor graphics card, the second graphics processor graphics card is a graphics processor graphics card selected from all graphics processor graphics cards connected to the current device for maskable error management, and the first graphics processor graphics card is any one of a plurality of graphics processor graphics cards in the current device; An error processing strategy corresponding to the detection result is obtained, and the error processing strategy is called to report an error condition corresponding to the first graphics processor graphics card to a baseboard management controller.

2. The method according to claim 1, characterized in that The detecting whether the first graphics processor graphics card that generates the maskable error hits a whitelist of graphics processor graphics cards for maskable error management in the current device includes: Obtaining a device identifier and a manufacturer identifier corresponding to the first graphics processor graphics card, and constructing graphics card information corresponding to the first graphics processor graphics card using the device identifier and the manufacturer identifier; Matching the graphics card information corresponding to the first graphics processor graphics card with the graphics card information in the graphics card whitelist; If there is graphics card information in the graphics card whitelist that matches the graphics card information corresponding to the first graphics processor graphics card, it is determined that the detection result is that the first graphics graphics card processor hits the graphics card whitelist; or, if there is no graphics card information in the graphics card whitelist that matches the graphics card information corresponding to the first graphics processor graphics card, it is determined that the detection result is that the first graphics graphics card processor does not hit the graphics card whitelist.

3. The method according to claim 1, characterized in that The method further comprises: Traversing all high-speed expansion devices in the current device to obtain asset information of each high-speed expansion device; Using the asset information, selecting a graphics processor graphics card from the high-speed expansion device; Identify the device identification and the manufacturer identification of each of the graphics processor graphics cards, and use the graphics processor graphics card whose device identification is a specified device identification and / or whose manufacturer identification is a specified manufacturer identification as the second graphics processor graphics card; Graphics card information is generated using the device identifier and the manufacturer identifier corresponding to the second graphics processor graphics card, and the graphics card whitelist is constructed based on the graphics card information of each second graphics processor graphics card.

4. The method according to claim 2, characterized in that: The obtaining of the error handling strategy corresponding to the detection result includes: If the detection result is that the first graphics card processor hits the graphics card whitelist, then reading the status identification code displayed by each identification bit in the status register; Taking the identification bit of the state identification code having a first preset value as the target identification bit; Obtaining a first correspondence between the identification bit and a preset error handling strategy; The error handling strategy corresponding to the target identification bit is determined based on the first corresponding relationship, and the error handling strategy corresponding to the target identification bit is used as the error handling strategy matched by the detection result.

5. The method according to claim 4, characterized in that The calling of the error processing strategy to report the error condition corresponding to the first graphics processor graphics card to the baseboard management controller includes: If the target identification bit is the first identification bit, it is determined that the maskable error belongs to the first error type, the identification code displayed by the preset identification bit in the status register is updated to the first preset value, and the management interrupt mechanism is triggered to take effect, and the error condition corresponding to the first graphics processor graphics card is reported to the baseboard management controller based on the management interrupt mechanism; or, If the target identification bit is the second identification bit, it is determined that the maskable error belongs to the second error type, and the triggering number corresponding to the second error type within a preset time period is detected; if the triggering number is lower than the first preset number, the identification code displayed by the preset identification bit in the status register is updated to the second preset value; or, if the triggering number is higher than the first preset number, the management interrupt mechanism is triggered to take effect, and the error condition corresponding to the first graphics processor graphics card is reported to the baseboard management controller based on the management interrupt mechanism; or, If the target identification bit is the third identification bit, it is determined that the maskable error belongs to the third error type, and the cumulative triggering number corresponding to the third error type is obtained. If the cumulative triggering number reaches a second preset number, the management interrupt mechanism is triggered to take effect, and the error situation corresponding to the first graphics processor graphics card is reported to the baseboard management controller based on the management interrupt mechanism; or, if the cumulative triggering number does not reach the second preset number, the cumulative triggering number corresponding to the third error type is updated, wherein the third error type includes all error types except the first error type and the second error type.

6. The method according to claim 5, characterized in that The reporting an error condition corresponding to the first graphics processor graphics card to the baseboard management controller based on the management interrupt mechanism includes: Acquire identification codes corresponding to the first identification bit, the second identification bit, and the third identification bit in the status register based on the management interrupt mechanism; The error type corresponding to the identification bit whose identification code is the first preset value is sent to the baseboard management controller, and the identification bit whose identification code is the first preset value among the first identification bit, the second identification bit and the third identification bit is reset.

7. The method according to claim 1, characterized in that The obtaining the error processing strategy corresponding to the detection result, and calling the error processing strategy to report the error situation corresponding to the first graphics processor graphics card to the baseboard management controller, includes: If the detection result is that the first graphics card processor does not hit the graphics card whitelist, obtaining an error processing strategy corresponding to the high-speed expansion device; According to the error handling strategy corresponding to the high-speed expansion device, the error condition of the first graphics processor graphics card is reported to the baseboard management controller.

8. An error processing device for a graphics processor display, characterized in that: The device comprises: A monitoring module is used to monitor whether a graphics processor graphics card deployed in the current device generates a maskable error; a detection module, configured to detect whether a first graphics processor graphics card generating the maskable error hits a graphics card whitelist of a current device if a maskable error is detected, and obtain a detection result, wherein the graphics card whitelist includes graphics card information of at least one second graphics processor graphics card, the second graphics processor graphics card is a graphics processor graphics card selected from all graphics processor graphics cards connected to the current device for maskable error management, and the first graphics processor graphics card is any one of a plurality of graphics processor graphics cards in the current device; The processing module is used to obtain an error processing strategy corresponding to the detection result, and call the error processing strategy to report the error situation corresponding to the first graphics processor graphics card to the baseboard management controller.

9. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the method according to any one of claims 1 to 7 by executing the computer instructions.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the method according to any one of claims 1 to 7.

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