Integrated circuit library file processing method and device, equipment, storage medium and product

Abstract

The invention discloses an integrated circuit library file processing method and device, equipment, a storage medium and a product, and relates to the technical field of data transmission, and the method comprises the steps: downloading a library file pair and file identification information of the library file pair from a third-party database; if the integrated circuit library file and the time sequence library file are complete, converting the integrated circuit library file and the time sequence library file into a converted library file pair; storing the converted library file pairs and file identification information in a central library file storage space in an associated manner; and when an integrated circuit design request is received, analyzing the integrated circuit design request to obtain the project identifier and the project progress, determining target identifier information from the file identifier information stored in the central library file storage space, and sending the library file pair associated with the target identifier information to the electronic design automation system. According to the method, the correctness and timeliness of library file integration are improved, so that the accuracy of integrated circuit design is improved.

Description

Technical Field

[0001] The present application relates to the technical field of data transmission, and in particular to an integrated circuit library file processing method, device, equipment, storage medium and product. Background Art

[0002] Integrated Circuit (IC) design is one of the core elements of the modern electronics industry. With the advancement of technology, the complexity of IC design continues to increase. In this context, the integrated circuit library file management system, as an important part of the design process, plays an increasingly significant role. However, the existing library file integration and management usually rely on manual operations, which is not only time-consuming and labor-intensive, but also increases the risk of errors. Especially when dealing with large-scale and complex IC designs, manual operations are prone to inconsistencies and errors, which affect the correctness of the integrated circuit library files and thus the correctness of the integrated circuit design.

[0003] The above contents are only used to assist in understanding the technical solution of the present application and do not constitute an admission that the above contents are prior art. Summary of the invention

[0004] The main purpose of the present application is to provide an integrated circuit library file processing method, device, equipment, storage medium and product, aiming to solve the technical problem that the inaccuracy of the integrated circuit library file affects the correctness of the integrated circuit design.

[0005] To achieve the above-mentioned purpose, the present application proposes a method for processing an integrated circuit library file, the method comprising:

[0006] Downloading a library file pair and file identification information of the library file pair from a third-party database, and detecting whether an integrated circuit library file and a timing library file in the library file pair are complete;

[0007] If the integrated circuit library file and the timing library file are complete, converting the integrated circuit library file and the timing library file into preset target formats to obtain a converted integrated circuit library file and a converted timing library file, and using the converted integrated circuit library file and the converted timing library file as a converted library file pair;

[0008] The converted library file pair is associated with the file identification information and saved in a central library file storage space;

[0009] When an integrated circuit design request is received, the integrated circuit design request is parsed to obtain a project identifier and a project schedule, target identifier information matching the project identifier and the project schedule is determined from the file identifier information stored in the central library file storage space, and the library file pair associated with the target identifier information is sent to the electronic design automation system.

[0010] In one embodiment, the step of detecting whether the integrated circuit library file in the library file pair is complete comprises:

[0011] Detecting whether there are undefined units in each electrical unit included in the integrated circuit library file in the library file pair;

[0012] If the undefined unit does not exist in the electrical units, detecting whether the reference content of the electrical units is correct;

[0013] If the reference content of each electrical unit is correct, it is determined that the integrated circuit library file is complete;

[0014] If the reference content of each electrical unit is incorrect, it is determined that the integrated circuit library file is incomplete.

[0015] In one embodiment, the step of detecting whether the timing library file in the library file pair is complete includes:

[0016] Detecting whether the timing library file in the library file pair contains the respective timing information of each electrical unit;

[0017] If the timing library file contains the timing information of each electrical unit, then detecting whether the timing information of each electrical unit satisfies the preset timing constraint;

[0018] If the timing information of each electrical unit satisfies the timing constraint, it is determined that the timing library file is complete.

[0019] In one embodiment, after the step of converting the integrated circuit library file and the timing library file into preset target formats to obtain the converted integrated circuit library file and the converted timing library file, the step further includes:

[0020] Sending the converted integrated circuit library file and the converted timing library file to the electronic design automation system, wherein the electronic design automation system runs the received converted integrated circuit library file and the converted timing library file and returns the running result;

[0021] If the operation result is successful, the step of using the converted integrated circuit library file and the converted timing library file as a converted library file pair is performed;

[0022] If the running result is a running failure, the running logs corresponding to the converted integrated circuit library file and the converted timing library file are obtained, the converted integrated circuit library file and the converted timing library file are adjusted based on the running logs, and the step of using the converted integrated circuit library file and the converted timing library file as a converted library file pair is executed.

[0023] In one embodiment, the step of associating the converted library file pair with the file identification information and saving it in a central library file storage space comprises:

[0024] Copying the converted library file to obtain a copy library file pair;

[0025] The converted library file pair is associated with the file identification information and stored in a storage master node in a central library file storage space, and the copied library file is associated with the file identification information and stored in a storage standby node in the central library file storage space.

[0026] In one embodiment, the integrated circuit library file processing method further includes:

[0027] Obtaining a node response from the storage master node according to a preset period;

[0028] The step of sending the library file pair associated with the target identification information to the electronic design automation system comprises:

[0029] When the node response of the storage master node is normal, obtaining a library file pair associated with the target identification information from the storage master node, and sending the library file pair associated with the target identification information to an electronic design automation system;

[0030] In case that the node response of the storage master node is abnormal, the library file pair associated with the target identification information is obtained from the storage standby node, and the library file pair associated with the target identification information is sent to the electronic design automation system.

[0031] In addition, to achieve the above-mentioned purpose, the present application also proposes an integrated circuit library file processing device, the integrated circuit library file processing device comprising:

[0032] A detection module, used to download a library file pair and file identification information of the library file pair from a third-party database, and detect whether the integrated circuit library file and the timing library file in the library file pair are complete;

[0033] a conversion module, configured to convert the integrated circuit library file and the timing library file into preset target formats respectively if the integrated circuit library file and the timing library file are complete, to obtain a converted integrated circuit library file and a converted timing library file, and to use the converted integrated circuit library file and the converted timing library file as a converted library file pair;

[0034] A saving module, used for associating the converted library file pair with the file identification information and saving it in a central library file storage space;

[0035] The parsing module is used to parse the integrated circuit design request to obtain the project identification and project progress when receiving the integrated circuit design request, determine the target identification information matching the project identification and the project progress from the file identification information stored in the central library file storage space, and send the library file pair associated with the target identification information to the electronic design automation system.

[0036] In addition, to achieve the above-mentioned purpose, the present application also proposes an integrated circuit library file processing device, which includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, and the computer program is configured to implement the steps of the integrated circuit library file processing method as described above.

[0037] In addition, to achieve the above-mentioned purpose, the present application also proposes a storage medium, which is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by the processor, the steps of the integrated circuit library file processing method described above are implemented.

[0038] In addition, to achieve the above-mentioned purpose, the present application also provides a computer program product, which includes a computer program, and when the computer program is executed by a processor, the steps of the integrated circuit library file processing method described above are implemented.

[0039] In the present application, a library file pair and file identification information of the library file pair are downloaded from a third-party database, and it is detected whether the integrated circuit library file and the timing library file in the library file pair are complete; if the integrated circuit library file and the timing library file are complete, the integrated circuit library file and the timing library file are respectively converted into a preset target format to obtain a converted integrated circuit library file and a converted timing library file, and the converted integrated circuit library file and the converted timing library file are used as a converted library file pair; the converted library file pair is associated with the file identification information and saved in a central library file storage space; when an integrated circuit design request is received, the integrated circuit design request is parsed to obtain a project identification and a project progress, target identification information matching the project identification and the project progress is determined from the file identification information stored in the central library file storage space, and the library file pair associated with the target identification information is sent to an electronic design automation system.

[0040] The present application downloads library file pairs and their file identification information from a third-party database through an automated process, thereby reducing the need for manual downloading, reducing the risk of errors introduced by manual operations, automatically detecting the integrity of integrated circuit library files and timing library files in the library file pairs, ensuring the availability and accuracy of the files in subsequent steps, converting the detected complete library files into a preset target format, solving the integration problem caused by inconsistent formats, making the library files easier to be identified and processed by an electronic design automation system (EDA, Electronic Design Automation), and improving the efficiency and accuracy of integrated circuit design. The converted library file pairs are associated with the file identification information and saved in a central library file storage space, realizing centralized management and rapid retrieval of library files, simplifying version control and backtracking of files, reducing reliance on manual operations, reducing errors caused by human factors, improving the efficiency of library file management, and improving the correctness and timeliness of library file integration, thereby improving the accuracy of integrated circuit design. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0042] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0043] Figure 1A flowchart diagram of the first embodiment of the integrated circuit library file processing method of the present application;

[0044] Figure 2 A flowchart diagram of the second embodiment of the integrated circuit library file processing method of the present application is provided;

[0045] Figure 3 A schematic diagram of a simplified flow chart of an integrated circuit library file processing method provided in one embodiment of the present application;

[0046] Figure 4 This is a schematic diagram of the module structure of the integrated circuit library file processing device according to an embodiment of the present application;

[0047] Figure 5 It is a schematic diagram of the device structure of the hardware operating environment involved in the integrated circuit library file processing method in the embodiment of the present application.

[0048] The purpose, features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0049] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application and are not used to limit the present application.

[0050] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0051] The main solution of the embodiment of the present application is: downloading a library file pair and file identification information of the library file pair from a third-party database, and detecting whether the integrated circuit library file and the timing library file in the library file pair are complete; if the integrated circuit library file and the timing library file are complete, converting the integrated circuit library file and the timing library file into a preset target format respectively to obtain a converted integrated circuit library file and a converted timing library file, and using the converted integrated circuit library file and the converted timing library file as a converted library file pair; associating the converted library file pair with the file identification information and saving it in a central library file storage space; upon receiving an integrated circuit design request, parsing the integrated circuit design request to obtain a project identification and a project progress, determining the target identification information matching the project identification and the project progress from the file identification information stored in the central library file storage space, and sending the library file pair associated with the target identification information to an electronic design automation system.

[0052] In this embodiment, for ease of description, the integrated circuit library file processing device is used as the execution subject for explanation below.

[0053] Since the integrated circuit library file management system is an important part of the integrated circuit design process, it involves the organization and maintenance of various files, data and tools in the design process. At present, integrated circuit design is becoming more and more complex, which requires the library file management system to have high efficiency and high adaptability to meet the ever-changing design requirements. Since the integrated circuit library files come from self-developed or multiple different suppliers, in complex design projects that need to integrate tools and data from multiple suppliers, library files of different formats may increase the difficulty of integration, and the correctness and timeliness of integration are very important in the execution of a project. Traditional library files and integration require manual operation, which is not only time-consuming, but also easy to introduce errors when dealing with complex integrated circuit designs. Due to the lack of a unified format standard, it is difficult to integrate library files from different suppliers, which may lead to compatibility issues. At the same time, manual version control relying on managers is not conducive to backtracking and debugging between different versions. In addition, senior personnel are required for management, and professionals need to have deep knowledge and experience in integrated circuit design. Once there is a personnel change, it will pose a challenge to project progress control and process library quality control.

[0054] The present application downloads library file pairs and their file identification information from a third-party database through an automated process, thereby reducing the need for manual downloading, reducing the risk of errors introduced by manual operations, automatically detecting the integrity of integrated circuit library files and timing library files in the library file pairs, ensuring the availability and accuracy of the files in subsequent steps, converting the detected complete library files into a preset target format, solving the integration problem caused by inconsistent formats, making the library files easier to be identified and processed by an electronic design automation system (EDA, Electronic Design Automation), and improving the efficiency and accuracy of integrated circuit design. The converted library file pairs are associated with the file identification information and saved in a central library file storage space, realizing centralized management and rapid retrieval of library files, simplifying version control and backtracking of files, reducing reliance on manual operations, reducing errors caused by human factors, improving the efficiency of library file management, and improving the correctness and timeliness of library file integration, thereby improving the accuracy of integrated circuit design.

[0055] It should be noted that the execution subject of this embodiment may be a computing service device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc., or an electronic device capable of realizing the above functions, an integrated circuit library file processing device, etc. The following takes the integrated circuit library file processing device as an example to illustrate this embodiment and the following embodiments.

[0056] Based on this, the embodiment of the present application provides an integrated circuit library file processing method, referring to Figure 1 , Figure 1 This is a flow chart of the first embodiment of the integrated circuit library file processing method of the present application.

[0057] In this embodiment, the integrated circuit library file processing method includes steps S10 to S40:

[0058] Step S10, downloading a library file pair and file identification information of the library file pair from a third-party database, and detecting whether the integrated circuit library file and the timing library file in the library file pair are complete;

[0059] It should be noted that the third-party database refers to an external data source that provides integrated circuit library files and timing library files, which can be a warehouse of a commercial library supplier or an open source library, for example, the standard cell library provided by Synopsys or Cadence.

[0060] Download library file pairs and file identification information of library file pairs from third-party databases. Library file pairs usually include integrated circuit library files and timing library files. Integrated circuit library files refer to data files that contain various components (such as transistors, resistors, capacitors, etc.) required for integrated circuit design and the connection methods between them. For example, an integrated circuit library file may contain a standard cell library, which defines the standard sizes and characteristics of a series of basic logic gates, such as AND gates and OR gates. Timing library files are data files that contain timing characteristics of various components in integrated circuits, such as key parameters such as delay time and setup / hold time. Timing library files are usually used for timing analysis and verification during the circuit design stage. For example, a timing library file may specify the propagation delay time of a NAND gate under different working conditions. Each library file will have a unique identifier to distinguish different library file versions or sources. For example, a file identifier may be "stdcell_v1.0_20240901".

[0061] After downloading, the system will check whether these files are complete to ensure that the subsequent steps can proceed normally. It is understandable that through integrity testing, problems such as file damage or missing files can be discovered in time, so that they can be solved in advance and work efficiency can be improved.

[0062] Specifically, the process of detecting whether the integrated circuit library file in the library file pair is complete may include:

[0063] Step S101, detecting whether there are undefined units in each electrical unit included in the integrated circuit library file in the library file pair;

[0064] It should be noted that undefined cells refer to cells that are not referenced and defined. In the integrated circuit library file, each electrical unit should have a clear definition. By checking whether all electrical units in the library file have been defined, it is ensured that all electrical units in the library file are available, thereby avoiding unrecognizable cells during the design process, which may lead to design errors or failures, and improving the reliability and availability of the library file.

[0065] Step S102, if the undefined unit does not exist in the electrical units, then checking whether the reference content of the electrical units is correct;

[0066] If the undefined unit does not exist in the electrical units, check whether the reference of the electrical unit in the library file is correct, to ensure that the reference relationship of the electrical unit is correct and avoid circuit design problems caused by reference errors, such as short circuit or functional failure.

[0067] Step S103, if the referenced content of each electrical unit is correct, it is determined that the integrated circuit library file is complete;

[0068] If all electrical units are defined and referenced correctly, the library file is determined to be complete, confirming that the library file can be used for subsequent integrated circuit design without further correction or completion. It can be understood that the efficiency of the design process is improved by checking the integrity of the library file, because the complete library file can be used directly in the design without waiting for repair or update.

[0069] Step S104: If the reference content of each electrical unit is incorrect, it is determined that the integrated circuit library file is incomplete.

[0070] If it is found that the reference content of the electrical unit is incorrect, this indicates that the library file is incomplete or contains errors. The present embodiment can promptly identify the problem with the library file and can correct it before the design begins, thereby avoiding more time and resource waste caused by discovering problems during the design process. It helps to maintain the quality of the library file and ensure that a complete and correct library file is used for the design, thereby improving the quality of the final product.

[0071] Specifically, the step of detecting whether the timing library file in the library file pair is complete includes:

[0072] Step S105, detecting whether the timing library file in the library file pair contains the timing information of each electrical unit;

[0073] The timing library file contains the timing information of each electrical unit in the integrated circuit. This information is crucial to ensure that the circuit works as expected. Check whether the timing library file provides timing information for each electrical unit. By checking the integrity of the timing library, it can be ensured that the timing characteristics of each electrical unit are recorded and considered, avoiding circuit design problems such as timing errors or performance degradation caused by lack of timing information.

[0074] Step S106, if the timing library file contains the timing information of each electrical unit, then detecting whether the timing information of each electrical unit satisfies the preset timing constraint;

[0075] Timing information needs to meet specific timing constraints, which define the performance requirements of electrical units under specific conditions. By checking whether the timing information in the timing library file meets these preset timing constraints, it can ensure that the circuit design meets the performance requirements, avoid circuit instability or substandard performance caused by timing problems, and improve the reliability and predictability of circuit design.

[0076] Step S107: If the timing information of each electrical unit satisfies the timing constraint, it is determined that the timing library file is complete.

[0077] If the timing information in the timing library file provides complete data for each electrical unit, and these data meet the preset timing constraints, then the timing library file is determined to be complete, and it is confirmed that the timing library file can be used for circuit design without further correction or completion, thereby improving the efficiency of the design process.

[0078] Step S20, if the integrated circuit library file and the timing library file are complete, converting the integrated circuit library file and the timing library file into preset target formats to obtain a converted integrated circuit library file and a converted timing library file, and using the converted integrated circuit library file and the converted timing library file as a converted library file pair;

[0079] It should be noted that the preset target format refers to a specific data format, which is usually a format specified for compatibility with specific design tools. For example, commonly used formats in integrated circuit design include LEF / GDSII, etc.

[0080] If the library files are detected to be complete, the system converts them into a preset target format, and the converted files are more suitable for a specific electronic design automation system or design process. It can be understood that the standardized file format enables library files from different sources to be processed and used uniformly, improves the compatibility and readability of the files, and enables design tools to use these library files more effectively.

[0081] Step S30, associating the converted library file pair with the file identification information and saving them in a central library file storage space;

[0082] It should be noted that the central library file storage space is a centralized storage area used to store verified and converted integrated circuit library files and timing library files. It can be an internal server storage system of an enterprise or a cloud storage service.

[0083] The converted library file pairs are associated with the file identification information and saved to the central library file storage space. Such associated storage facilitates the subsequent rapid retrieval and use of specific library files. Through centralized storage and management, the accessibility and security of library files are improved, which facilitates the maintenance and updating of library files and the tracking of file usage.

[0084] Step S40, when an integrated circuit design request is received, the integrated circuit design request is parsed to obtain a project identifier and a project schedule, target identifier information matching the project identifier and the project schedule is determined from the file identifier information stored in the central library file storage space, and the library file pair associated with the target identifier information is sent to the electronic design automation system.

[0085] It should be noted that the project ID and project schedule are used to describe the unique identifier of the integrated circuit design project and the current design stage of the project. For example, "Project A" may be in the front-end design stage, while "Project B" may have completed synthesis and is in the process of layout and routing. The target identification information is based on the needs of the project. The system will match the corresponding library file ID according to the project ID and project schedule to find the appropriate library file pair. For example, if the project needs to use a high-speed I / O (Input / Output) interface, the system will look for a library file containing the corresponding I / O unit.

[0086] When an integrated circuit design request is received, the system will parse the request to obtain the project identification and project progress. Based on this information, the system retrieves matching library file pairs from the central library and sends them to the EDA system for use. By quickly responding to design requests, the efficiency of the design process is improved, thereby accelerating the design process. Through the automated retrieval and sending mechanism, human errors are reduced and the accuracy of operations is improved.

[0087] This embodiment downloads library file pairs and their file identification information from a third-party database through an automated process, thereby reducing the need for manual downloading and the risk of introducing errors due to manual operations, automatically detecting the integrity of the integrated circuit library files and timing library files in the library file pairs, ensuring the availability and accuracy of the files in subsequent steps, converting the detected complete library files into a preset target format, solving the integration problem caused by inconsistent formats, making the library files easier to be identified and processed by the electronic design automation system, and improving the efficiency and accuracy of integrated circuit design. The converted library file pairs are associated with the file identification information and saved in the central library file storage space, realizing centralized management and rapid retrieval of library files, simplifying version control and backtracking of files, reducing reliance on manual operations, reducing errors caused by human factors, improving the efficiency of library file management, and improving the correctness and timeliness of library file integration, thereby improving the accuracy of integrated circuit design.

[0088] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar contents as those in the above-mentioned embodiment 1 can be referred to the above introduction, and will not be repeated in the following. Figure 2 , step S20: converting the integrated circuit library file and the timing library file into preset target formats to obtain the converted integrated circuit library file and the converted timing library file, further comprising steps S50 to S70:

[0089] Step S50, sending the converted integrated circuit library file and the converted timing library file to the electronic design automation system, wherein the electronic design automation system runs the received converted integrated circuit library file and the converted timing library file and returns the running result;

[0090] The converted IC library files and timing library files are sent to the electronic design automation (EDA) system, which receives these files and runs them to verify their correctness and functionality. By running the library files in the EDA system, it is possible to verify whether the converted files are compatible with the design tools, ensuring that they can be used correctly.

[0091] Step S60, if the operation result is successful, executing the step of using the converted integrated circuit library file and the converted timing library file as a converted library file pair;

[0092] If the EDA system returns a successful result after running the library file, it indicates that there is no problem with the library file and it can be used correctly by the design tool without additional adjustment or correction, thereby improving the efficiency of the design process.

[0093] Step S70, if the operation result is an operation failure, obtain the operation logs corresponding to the converted integrated circuit library file and the converted timing library file, adjust the converted integrated circuit library file and the converted timing library file based on the operation logs, and execute the step of using the converted integrated circuit library file and the converted timing library file as a converted library file pair.

[0094] If the EDA system returns a failed result after running the library file, it is necessary to obtain the run log to diagnose the problem. Based on the information in the run log, the converted library file can be adjusted to solve the problem that caused the run failure. By analyzing the run log, the problem can be quickly located and targeted corrections can be made, which improves the efficiency of problem solving and ensures that all known problems of the library file have been corrected before trying to run it again, increasing the possibility of successful operation. Through iterative improvements, the quality and reliability of the library file are improved, providing a solid foundation for subsequent design work.

[0095] It can be understood that by testing the library files in the EDA system and making necessary adjustments based on the test results, the quality and compatibility of the library files are ensured. This helps to improve the success rate of integrated circuit design, reduce problems and rework during the design process, and thus improve overall design efficiency and product quality.

[0096] In a feasible implementation manner, the step S30: associating the converted library file pair with the file identification information and saving it in a central library file storage space includes:

[0097] Step S301, copying the converted library file to obtain a copy library file pair;

[0098] Before storing the converted library file pairs in the central library file storage space, the files are first copied to obtain a set of copied library file pairs. By creating a copy of the file, the backup of the original file can be retained, improving the availability and redundancy of the data and ensuring that the data can be restored from the backup node when a problem occurs in the primary node.

[0099] Step S302: store the converted library file pair in association with the file identification information in a storage master node in a central library file storage space, and store the copied library file in association with the file identification information in a storage standby node in the central library file storage space.

[0100] It should be noted that the storage master node and storage backup node refer to the distributed storage system in which the master node is responsible for the main data reading and writing operations, while the backup node is a copy of the master node, which is used to take over its functions when the master node fails. For example, the master node can be in a data center in Beijing, while the backup node is located in Shanghai.

[0101] After the converted library file pair is associated with the file identification information, it is stored in the master node of the central library file storage space, which realizes the redundant storage of data and improves the security and reliability of data. At the same time, after the copied library file pair is associated with the same file identification information, it is stored in the backup node of the central library file storage space. When the main node fails, the data can be quickly restored from the backup node to ensure the continuity and stability of the design process.

[0102] It can be understood that by storing the original and copied versions of library files on the primary node and the backup node of the central library file storage space, the security and reliability of the data are ensured, which helps to reduce the risk of data loss and improve the stability and efficiency of the design process.

[0103] In one feasible implementation, the integrated circuit library file processing method further includes:

[0104] Step A01, obtaining a node response of the storage master node according to a preset period;

[0105] It should be noted that node response refers to the mechanism for checking whether the storage node is working properly. This can be achieved by regularly sending heartbeat requests to the storage node. If no response is received within a predetermined time, the node is considered to have failed. For example, a heartbeat packet is sent to the master node every 5 minutes.

[0106] At a preset period (e.g., every hour, every day, etc.), the system automatically checks the status of the storage master node to obtain its response to ensure that the storage master node is always in normal working condition and can respond to requests and provide the required library files.

[0107] Through regular inspections, any problems with the storage master node, such as performance degradation or failure, can be discovered in a timely manner, so that appropriate maintenance measures can be taken, which can ensure the timely acquisition and delivery of library files and support the stable operation of the electronic design automation system (EDA).

[0108] The step S40: sending the library file pair associated with the target identification information to an electronic design automation system includes:

[0109] Step S401, when the node response of the storage master node is normal, obtaining a library file pair associated with the target identification information from the storage master node, and sending the library file pair associated with the target identification information to an electronic design automation system;

[0110] When the node response of the storage master node is normal, the system obtains the library file pairs associated with the target identification information from the storage master node, and then, these library file pairs are sent to the electronic design automation system for use by designers.

[0111] By utilizing the high performance and high availability of the storage master node, library file pairs can be quickly obtained, improving the efficiency of the design process and ensuring that designers can access the latest library files in a timely manner, thereby improving design quality and speed.

[0112] Step S402, when the node response of the storage master node is abnormal, obtain the library file pair associated with the target identification information from the storage standby node, and send the library file pair associated with the target identification information to the electronic design automation system.

[0113] When the node storing the main node responds abnormally, that is, it cannot work normally, the system will instead obtain the library file pair associated with the target identification information from the storage backup node, ensuring that even if there is a problem with the main node, the design process will not be interrupted and the library file pair can still be sent to the electronic design automation system.

[0114] It can be understood that by periodically checking the status of the storage master node and providing a failover mechanism to ensure that the design work can continue when the master node is unavailable, the fault tolerance of the entire system is enhanced, the risk of work interruption and data loss due to storage node failure is reduced, and the high availability and reliability of the integrated circuit library file processing method are ensured, thereby improving the continuity and efficiency of the design process and reducing the potential risks caused by storage node problems.

[0115] For example, in order to help understand the implementation process of the integrated circuit library file processing method obtained by combining this embodiment with the above-mentioned embodiment 1, please refer to Figure 3 , Figure 3 A brief flow chart of an integrated circuit library file processing method is provided, specifically:

[0116] IP (IP Core, intellectual property core, is a pre-designed and verified, reusable circuit function module) download: integrated circuit library file download (that is, downloading library file pairs and file identification information of the library file pairs from a third-party database).

[0117] IP decompression: Decompress the downloaded integrated circuit into a dedicated directory for further processing.

[0118] Library file completeness check: Scan the library file and check the completeness of the library file in combination with the algorithm (that is, if the library file is complete, then perform a process corner completeness check; if the library file is incomplete, then return to re-download the IP. It should be noted that the library file completeness check is based on the input completeness list, and checks whether the content in the library file is consistent with the content listed in the completeness list. If they are consistent, it is determined that the library file completeness check has passed; if they are inconsistent, it is determined that the library file completeness check has failed. After the library file completeness check is completed, a completeness check report is output.

[0119] Process corner completeness check: Check the completeness of the process corners. If the process corner completeness check passes, the timing file format conversion is performed; if the process corner completeness check fails, the IP is returned and downloaded again. The process corner refers to a set of parameters under different working conditions caused by process changes during the semiconductor manufacturing process. It is usually used to describe the possible extreme values ​​of these parameters so that the worst and best cases can be considered when designing integrated circuits. It should be noted that the process corner completeness check is completed based on the input process corner list. Check whether the process corners in the downloaded IP are consistent with the process corner list. If they are consistent, it is determined that the process corner completeness check has passed. If they are inconsistent, it is determined that the process corner completeness check has failed. After the process corner completeness check is completed, the process corner check report is output.

[0120] Timing file format conversion: For libraries that lack db format timing library files, generate db format library files (that is, if the integrated circuit library file and the timing library file are complete, convert the integrated circuit library file and the timing library file into preset target formats to obtain converted integrated circuit library files and converted timing library files, and use the converted integrated circuit library files and the converted timing library files as a converted library file pair). It should be noted that before performing the timing file format conversion, a timing file completeness check can also be performed to scan the timing library files, perform a timing model completeness check in combination with the actual static timing analysis settings of the project, and provide feedback on the missing parts (that is, detect whether the integrated circuit library files and timing library files in the library file pair are complete).

[0121] IP integration: library files are integrated into the central library file system, and library files that have undergone integrity checks and timing library consistency checks are put into storage. The specific process may be: receiving IP classifications, then generating IP indexes based on the IP classifications, and integrating the IP indexes and library files into the central library file system (that is, associating the converted library file pairs with the file identification information and saving them in the central library file storage space).

[0122] Library file release: According to the different progress of different projects, different files are extracted from the central library file system for release, and the unified file interface enables each EDA software to be systematically called. At the same time, automatic version control is performed. The specific process can be: receiving the project IP list, where the project IP list contains the project identification number of each project, and then generating a project index based on the project identification number in the project IP list, and then the project library file releases the project index.

[0123] When an integrated circuit design request is received, the integrated circuit design request is parsed to obtain a project identifier and a project schedule, target identifier information matching the project identifier and the project schedule is determined from the file identifier information stored in the central library file storage space, and the library file pair associated with the target identifier information is sent to the electronic design automation system.

[0124] Compared with traditional integrated circuit design library files that require a lot of manual operations and a lot of time, the use of highly adaptable integrated circuit library file automatic integration system can automatically adapt to the design library files of various suppliers. It is not only fast but also not overly dependent on the professionalism of personnel.

[0125] In addition, the global high-speed file scan can automatically scan tens of thousands of files globally in just 1 to 2 hours. Compared with manual sampling, which is time-consuming and easy to miss, by providing a unified interface file, the files processed by the system are in a standardized format, which is suitable for various stages of various EDA tools. Users no longer need to manually adjust the process for different formats of different design library suppliers.

[0126] It should be noted that the above examples are only used to understand the present application and do not constitute a limitation on the integrated circuit library file processing method of the present application. More simple transformations based on this technical concept are all within the scope of protection of the present application.

[0127] The present application also provides an integrated circuit library file processing device, please refer to Figure 4 , the integrated circuit library file processing device comprises:

[0128] A detection module 10 is used to download a library file pair and file identification information of the library file pair from a third-party database, and detect whether the integrated circuit library file and the timing library file in the library file pair are complete;

[0129] A conversion module 20, configured to convert the integrated circuit library file and the timing library file into preset target formats respectively if the integrated circuit library file and the timing library file are complete, to obtain a converted integrated circuit library file and a converted timing library file, and to use the converted integrated circuit library file and the converted timing library file as a converted library file pair;

[0130] A saving module 30, used for saving the converted library file pair in association with the file identification information to a central library file storage space;

[0131] The parsing module 40 is used to parse the integrated circuit design request to obtain the project identification and project progress when receiving the integrated circuit design request, determine the target identification information matching the project identification and the project progress from the file identification information stored in the central library file storage space, and send the library file pair associated with the target identification information to the electronic design automation system.

[0132] Optionally, the detection module 10 is further used for:

[0133] Detecting whether there are undefined units in each electrical unit included in the integrated circuit library file in the library file pair;

[0134] If the undefined unit does not exist in the electrical units, detecting whether the reference content of the electrical units is correct;

[0135] If the reference content of each electrical unit is correct, it is determined that the integrated circuit library file is complete;

[0136] If the reference content of each electrical unit is incorrect, it is determined that the integrated circuit library file is incomplete.

[0137] Optionally, the detection module 10 is further used for:

[0138] Detecting whether the timing library file in the library file pair contains the respective timing information of each electrical unit;

[0139] If the timing library file contains the timing information of each electrical unit, then detecting whether the timing information of each electrical unit satisfies the preset timing constraint;

[0140] If the timing information of each electrical unit satisfies the timing constraint, it is determined that the timing library file is complete.

[0141] Optionally, the device further includes a sending module for:

[0142] Sending the converted integrated circuit library file and the converted timing library file to the electronic design automation system, wherein the electronic design automation system runs the received converted integrated circuit library file and the converted timing library file and returns the running result;

[0143] If the operation result is successful, the step of using the converted integrated circuit library file and the converted timing library file as a converted library file pair is performed;

[0144] If the running result is a running failure, the running logs corresponding to the converted integrated circuit library file and the converted timing library file are obtained, the converted integrated circuit library file and the converted timing library file are adjusted based on the running logs, and the step of using the converted integrated circuit library file and the converted timing library file as a converted library file pair is executed.

[0145] Optionally, the storage module 30 is further used for:

[0146] Copying the converted library file to obtain a copy library file pair;

[0147] The converted library file pair is associated with the file identification information and stored in a storage master node in a central library file storage space, and the copied library file is associated with the file identification information and stored in a storage standby node in the central library file storage space.

[0148] Optionally, the device further comprises a response module for:

[0149] Obtaining a node response from the storage master node according to a preset period;

[0150] The storage module 30 is also used for:

[0151] When the node response of the storage master node is normal, obtaining a library file pair associated with the target identification information from the storage master node, and sending the library file pair associated with the target identification information to an electronic design automation system;

[0152] In case that the node response of the storage master node is abnormal, the library file pair associated with the target identification information is obtained from the storage standby node, and the library file pair associated with the target identification information is sent to the electronic design automation system.

[0153] The integrated circuit library file processing device provided by the present application adopts the integrated circuit library file processing method in the above embodiment, which can solve the technical problem that the inaccuracy of the integrated circuit library file affects the correctness of the integrated circuit design. Compared with the prior art, the beneficial effects of the integrated circuit library file processing device provided by the present application are the same as the beneficial effects of the integrated circuit library file processing method provided by the above embodiment, and other technical features in the integrated circuit library file processing device are the same as the features disclosed in the above embodiment method, which will not be repeated here.

[0154] The present application provides an integrated circuit library file processing device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the integrated circuit library file processing method in the above-mentioned embodiment one.

[0155] Reference below Figure 5 , which shows a schematic diagram of the structure of an integrated circuit library file processing device suitable for implementing the embodiment of the present application. The integrated circuit library file processing device in the embodiment of the present application may include but is not limited to mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 5 The integrated circuit library file processing device shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0156] like Figure 5As shown, the integrated circuit library file processing device may include a processing device 1001 (e.g., a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM: Read Only Memory) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM: Random Access Memory) 1004. In RAM1004, various programs and data required for the operation of the integrated circuit library file processing device are also stored. The processing device 1001, ROM1002, and RAM1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Generally, the following systems can be connected to the I / O interface 1006: an input device 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; an output device 1008 including, for example, a liquid crystal display (LCD: Liquid Crystal Display), a speaker, a vibrator, etc.; a storage device 1003 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 1009. The communication device 1009 can allow the integrated circuit library file processing device to communicate with other devices wirelessly or by wire to exchange data. Although the figure shows an integrated circuit library file processing device with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems can be implemented or provided instead.

[0157] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are executed.

[0158] The integrated circuit library file processing device provided by the present application adopts the integrated circuit library file processing method in the above embodiment, which can solve the technical problem that the inaccuracy of the integrated circuit library file affects the correctness of the integrated circuit design. Compared with the prior art, the beneficial effects of the integrated circuit library file processing device provided by the present application are the same as the beneficial effects of the integrated circuit library file processing method provided by the above embodiment, and other technical features in the integrated circuit library file processing device are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0159] It should be understood that the various parts disclosed in this application can be implemented by hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0160] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0161] The present application provides a computer-readable storage medium having computer-readable program instructions (ie, computer programs) stored thereon, and the computer-readable program instructions are used to execute the integrated circuit library file processing method in the above-mentioned embodiment.

[0162] The computer-readable storage medium provided in the present application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems or devices, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM: Random Access Memory), a read-only memory (ROM: Read Only Memory), an erasable programmable read-only memory (EPROM: Erasable Programmable Read Only Memory or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM: CD-Read Only Memory), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system or device. The program code contained on the computer-readable storage medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (Radio Frequency: Radio Frequency), etc., or any suitable combination of the above.

[0163] The computer-readable storage medium may be included in the integrated circuit library file processing device; or may exist independently without being assembled into the integrated circuit library file processing device.

[0164] The computer-readable storage medium carries one or more programs. When the one or more programs are executed by the integrated circuit library file processing device, the integrated circuit library file processing device: downloads a library file pair and file identification information of the library file pair from a third-party database, and detects whether the integrated circuit library file and the timing library file in the library file pair are complete; if the integrated circuit library file and the timing library file are complete, the integrated circuit library file and the timing library file are respectively converted into a preset target format to obtain a converted integrated circuit library file and a converted timing library file, and the converted integrated circuit library file and the converted timing library file are used as a converted library file pair; the converted library file pair is associated with the file identification information and saved in a central library file storage space; when an integrated circuit design request is received, the integrated circuit design request is parsed to obtain a project identification and a project progress, target identification information matching the project identification and the project progress is determined from the file identification information stored in the central library file storage space, and the library file pair associated with the target identification information is sent to an electronic design automation system.

[0165] Computer program code for performing the operations of the present application may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0166] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0167] The modules involved in the embodiments described in this application may be implemented by software or hardware, wherein the name of the module does not constitute a limitation on the unit itself in some cases.

[0168] The readable storage medium provided by the present application is a computer-readable storage medium, which stores computer-readable program instructions (i.e., computer programs) for executing the above-mentioned integrated circuit library file processing method, and can solve the technical problem that the inaccuracy of the integrated circuit library file affects the correctness of the integrated circuit design. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided by the present application are the same as the beneficial effects of the integrated circuit library file processing method provided by the above-mentioned embodiment, and will not be repeated here.

[0169] The present application also provides a computer program product, including a computer program, which implements the steps of the above-mentioned integrated circuit library file processing method when executed by a processor.

[0170] The computer program product provided by the present application can solve the technical problem that the inaccuracy of the integrated circuit library file affects the correctness of the integrated circuit design. Compared with the prior art, the beneficial effects of the computer program product provided by the present application are the same as the beneficial effects of the integrated circuit library file processing method provided by the above embodiment, and will not be repeated here.

[0171] The above descriptions are only some embodiments of the present application, and are not intended to limit the patent scope of the present application. All equivalent structural changes made using the contents of the present application specification and drawings under the technical concept of the present application, or direct / indirect applications in other related technical fields are included in the patent protection scope of the present application.

Claims

1. A method for processing an integrated circuit library file, characterized in that: The integrated circuit library file processing method comprises: Downloading a library file pair and file identification information of the library file pair from a third-party database, and detecting whether an integrated circuit library file and a timing library file in the library file pair are complete; If the integrated circuit library file and the timing library file are complete, converting the integrated circuit library file and the timing library file into preset target formats to obtain a converted integrated circuit library file and a converted timing library file, and using the converted integrated circuit library file and the converted timing library file as a converted library file pair; The converted library file pair is associated with the file identification information and saved in a central library file storage space; When an integrated circuit design request is received, the integrated circuit design request is parsed to obtain a project identifier and a project schedule, target identifier information matching the project identifier and the project schedule is determined from the file identifier information stored in the central library file storage space, and the library file pair associated with the target identifier information is sent to the electronic design automation system.

2. The integrated circuit library file processing method according to claim 1, characterized in that: The step of detecting whether the integrated circuit library file in the library file pair is complete comprises: Detecting whether there are undefined units in each electrical unit included in the integrated circuit library file in the library file pair; If the undefined unit does not exist in the electrical units, detecting whether the reference content of the electrical units is correct; If the reference content of each electrical unit is correct, it is determined that the integrated circuit library file is complete; If the reference content of each electrical unit is incorrect, it is determined that the integrated circuit library file is incomplete.

3. The integrated circuit library file processing method according to claim 2, characterized in that: The step of detecting whether the timing library file in the library file pair is complete comprises: Detecting whether the timing library file in the library file pair contains the respective timing information of each electrical unit; If the timing library file contains the timing information of each electrical unit, then detecting whether the timing information of each electrical unit satisfies the preset timing constraint; If the timing information of each electrical unit satisfies the timing constraint, it is determined that the timing library file is complete.

4. The integrated circuit library file processing method according to claim 1, characterized in that: After the step of converting the integrated circuit library file and the timing library file into preset target formats to obtain the converted integrated circuit library file and the converted timing library file, the method further includes: Sending the converted integrated circuit library file and the converted timing library file to the electronic design automation system, wherein the electronic design automation system runs the received converted integrated circuit library file and the converted timing library file and returns the running result; If the operation result is successful, the step of using the converted integrated circuit library file and the converted timing library file as a converted library file pair is performed; If the running result is a running failure, the running logs corresponding to the converted integrated circuit library file and the converted timing library file are obtained, the converted integrated circuit library file and the converted timing library file are adjusted based on the running logs, and the step of using the converted integrated circuit library file and the converted timing library file as a converted library file pair is executed.

5. The integrated circuit library file processing method according to any one of claims 1 to 4, characterized in that: The step of associating the converted library file pair with the file identification information and saving it in a central library file storage space comprises: Copying the converted library file to obtain a copy library file pair; The converted library file pair is associated with the file identification information and stored in a storage master node in a central library file storage space, and the copied library file is associated with the file identification information and stored in a storage standby node in the central library file storage space.

6. The integrated circuit library file processing method according to claim 5, characterized in that: The integrated circuit library file processing method further includes: Obtaining a node response from the storage master node according to a preset period; The step of sending the library file pair associated with the target identification information to the electronic design automation system comprises: When the node response of the storage master node is normal, obtaining a library file pair associated with the target identification information from the storage master node, and sending the library file pair associated with the target identification information to an electronic design automation system; In case that the node response of the storage master node is abnormal, the library file pair associated with the target identification information is obtained from the storage standby node, and the library file pair associated with the target identification information is sent to the electronic design automation system.

7. An integrated circuit library file processing device, characterized in that: The integrated circuit library file processing device comprises: A detection module, used to download a library file pair and file identification information of the library file pair from a third-party database, and detect whether the integrated circuit library file and the timing library file in the library file pair are complete; a conversion module, configured to convert the integrated circuit library file and the timing library file into preset target formats respectively if the integrated circuit library file and the timing library file are complete, to obtain a converted integrated circuit library file and a converted timing library file, and to use the converted integrated circuit library file and the converted timing library file as a converted library file pair; A saving module, used for associating the converted library file pair with the file identification information and saving it in a central library file storage space; The parsing module is used to parse the integrated circuit design request to obtain the project identification and project progress when receiving the integrated circuit design request, determine the target identification information matching the project identification and the project progress from the file identification information stored in the central library file storage space, and send the library file pair associated with the target identification information to the electronic design automation system.

8. An integrated circuit library file processing device, characterized in that: The device comprises: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the integrated circuit library file processing method according to any one of claims 1 to 6.

9. A storage medium, characterized in that: The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the integrated circuit library file processing method according to any one of claims 1 to 6 are implemented.

10. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the steps of the integrated circuit library file processing method according to any one of claims 1 to 6 are implemented.

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