Edge etching apparatus

Abstract

The application discloses an edge etching device, which comprises a reaction cavity, a base arranged at the inner bottom of the reaction cavity and used for carrying a wafer, an upper shielding part arranged at the inner top of the reaction cavity, a lower limiting ring arranged around the base, and an upper limiting ring arranged around the upper shielding part; the upper limiting ring and the lower limiting ring cooperate to form a plasma reaction space in the edge area of the wafer; and the upper limiting ring is provided with a first notch facing the plasma reaction space. The first notch can effectively increase the volume of the plasma reaction space, so that more process gas can be accommodated in the plasma reaction space, and more plasma can be generated after the process gas is ionized, so that the etching rate of the edge area of the wafer is greatly improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor fabrication technology, and more particularly to an edge etching apparatus. Background Technology

[0002] During the process of plasma etching to create the designed pattern on a wafer, some excess film layers, such as polysilicon layers, nitride layers, and metal layers, will accumulate on the outer edge of the wafer. When these excess film layers accumulate to a certain extent, they are prone to cracking, which will contaminate the wafer surface and affect the yield of wafer fabrication. Therefore, it is necessary to remove the excess film layers at the edge of the wafer through edge etching process.

[0003] Existing edge etching equipment typically employs a movable upper electrode design. The upper electrode is raised when the wafer is moved in and out of the reaction chamber; during wafer processing, the upper electrode descends, maintaining a small gap between itself and the wafer. When the upper electrode descends to near the wafer, it must maintain a very high degree of concentricity with the wafer and substrate, ensuring that the portion of the wafer edge exposed to the plasma is symmetrical in the circumferential direction, thereby enabling uniform etching of the wafer edge.

[0004] However, ensuring the concentricity of the top electrode, wafer, and substrate meets process requirements requires a considerable amount of time to adjust, impacting wafer processing efficiency. Therefore, it is necessary to improve the wafer etching rate in other ways to increase wafer output within a fixed time. Summary of the Invention

[0005] The purpose of this invention is to provide an edge etching apparatus that can effectively increase the volume of the plasma reaction space, allowing the plasma reaction space to contain more process gases and generate more plasma, thereby improving the etching rate of the wafer edge region.

[0006] To achieve the above objectives, the present invention is implemented through the following technical solution:

[0007] An edge etching apparatus, comprising:

[0008] reaction chamber;

[0009] The base, located at the bottom of the reaction chamber, is used to support the wafer;

[0010] An upper shielding part is located at the top inside the reaction chamber;

[0011] A lower limiting ring is disposed around the base; and

[0012] An upper limiting ring is disposed around the upper shielding portion; the upper limiting ring and the lower limiting ring cooperate to form a plasma reaction space in the edge region of the wafer; and the upper limiting ring is provided with a first notch facing the plasma reaction space.

[0013] Optionally, the upper limiting ring includes a lower surface facing the wafer, and the first notch is located above the lower surface of the upper limiting ring.

[0014] Optionally, the cross-section of the first notch is one or any combination of arc, U, V, and L shapes.

[0015] Optionally, the outer diameter of the lower surface of the upper limiting ring is smaller than the diameter of the wafer, and the difference between the two is 2 to 5 mm.

[0016] Optionally, the lower limiting ring is provided with a second notch facing the plasma reaction space.

[0017] Optionally, the lower limiting ring includes an upper surface supporting the wafer, and the second notch is located below the upper surface of the lower limiting ring.

[0018] Optionally, the cross-section of the second notch is one or any combination of arc, U, V, and L shapes.

[0019] Optionally, the outer diameter of the upper surface of the lower limiting ring is smaller than the diameter of the wafer, and the difference between the two is 2 to 5 mm.

[0020] Optionally, the edge etching apparatus further includes a lower grounding ring located below the second notch and disposed around the lower limiting ring.

[0021] Optionally, the edge etching apparatus further includes an upper grounding ring located above the first notch and disposed around the upper limiting ring.

[0022] Optionally, the upper grounding ring is provided with a gas channel and an air inlet communicating with the gas channel and the plasma reaction space to introduce process gas into the plasma reaction space.

[0023] Optionally, the air inlet is angled toward the edge of the wafer.

[0024] Optionally, the upper and lower limiting rings are made of alumina, silicon oxide, or silicon carbide.

[0025] Compared with the prior art, the present invention has at least one of the following advantages:

[0026] This invention provides an edge etching apparatus. The bottom of the reaction chamber is provided with a base for supporting the wafer, and the top of the reaction chamber is provided with an upper shielding portion. A lower limiting ring is arranged around the base, and an upper limiting ring is arranged around the upper shielding portion. The upper and lower limiting rings cooperate to form a plasma reaction space in the edge region of the wafer, and the upper limiting ring has a first notch facing the plasma reaction space. The first notch effectively increases the volume of the plasma reaction space, allowing more process gas to be contained within it. This, in turn, generates more plasma after the process gas is ionized, significantly increasing the etching rate of the wafer edge region.

[0027] In this invention, the upper limiting ring includes a lower surface facing the wafer, and the first notch is located above the lower surface of the upper limiting ring. This can both increase the plasma reaction space volume through the first notch and ensure that the original etching path or etching area of ​​the wafer is not changed through the lower surface of the upper limiting ring.

[0028] In this invention, the lower limiting ring is provided with a second notch facing the plasma reaction space, which can also increase the volume of the plasma reaction space to further improve the etching rate of the wafer edge region; and the lower limiting ring includes an upper surface that supports the wafer, and the second notch is located below the upper surface of the lower limiting ring. Similarly, the volume of the plasma reaction space can be increased by the second notch, and the original etching path or etching area of ​​the wafer can be kept unchanged by the upper surface of the lower limiting ring.

[0029] In this invention, the cross-sections of the first and second notches are one or any combination of arc, U, V, and L shapes, so that the cross-sectional areas of the first and second notches are as large as possible, thereby maximizing the volume of the first and second notches and thus increasing the volume of the plasma reaction space as much as possible.

[0030] In this invention, an upper grounding ring is provided around the upper limiting ring, and the upper grounding ring is provided with a gas channel and an air inlet communicating with the gas channel and the plasma reaction space to introduce process gas into the plasma reaction space; and the air inlet is inclined toward the edge of the wafer so that the introduced process gas is concentrated in the edge region of the wafer as much as possible, thereby making the plasma concentration in the edge region of the wafer higher and further improving the etching rate of the edge region of the wafer. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the structure of an edge etching device according to an embodiment of the present invention;

[0032] Figure 2 yes Figure 1 Enlarged diagram of A in the middle;

[0033] Figure 3 This is a wafer etching rate diagram in the prior art when the upper confinement ring does not have a first notch and the lower confinement ring does not have a second notch;

[0034] Figure 4 This is a wafer etching rate diagram when the upper limiting ring has a first notch and the lower limiting ring does not have a second notch, according to an embodiment of the present invention. Detailed Implementation

[0035] The edge etching apparatus proposed in this invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of this invention will become clearer from the following description. It should be noted that the drawings are in a very simplified form and use non-precise proportions, only for the purpose of conveniently and clearly illustrating the embodiments of this invention. Please refer to the drawings to make the objectives, features, and advantages of this invention more apparent and understandable. It should be understood that the structures, proportions, sizes, etc., depicted in the accompanying drawings are only for the purpose of assisting those skilled in the art in understanding and reading the content disclosed in the specification, and are not intended to limit the implementation conditions of this invention. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in the proportional relationships, or adjustments to the size, without affecting the effects and objectives achieved by this invention, should still fall within the scope of the technical content disclosed in this invention.

[0036] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0037] Combined with appendix Figures 1-4As shown, this embodiment provides an edge etching apparatus, including: a reaction chamber 110; a base 130 disposed at the bottom of the reaction chamber 110 for supporting a wafer 100; an upper shielding portion 120 disposed at the top of the reaction chamber 110, and the upper shielding portion 120 is disposed opposite to the base 130; a lower limiting ring 150 disposed around the base 130; and an upper limiting ring 140 disposed around the upper shielding portion 120; the upper limiting ring 140 and the lower limiting ring 150 cooperate to form a plasma reaction space 180 in the edge region of the wafer 100.

[0038] Please also refer to Figure 1 and Figure 2 The edge etching apparatus further includes: an upper grounding ring 160, which is disposed around the upper limiting ring 140; and a lower grounding ring 170, which is disposed around the lower limiting ring 150.

[0039] Specifically, in this embodiment, the reaction chamber 110 includes a chamber 1102 and a cover plate 1101 disposed on the top of the chamber 1102. The upper shielding part 120 can be fixed to the mounting base plate 121, and the upper shielding part 120, the mounting base plate 121, the upper limiting ring 140, and the upper grounding ring 160 constitute an upper electrode assembly. More specifically, the mounting base plate 121 can be connected to the top cover 1101 by a pulling device 122, so that the upper electrode assembly is fixed to the top cover 1101; and when the top cover 1101 is moved to realize the switching chamber of the edge etching device, the upper electrode assembly moves with the top cover 1101 through the pulling device 122. Furthermore, a lifting mechanism 123 is provided within the cavity 1102 for receiving the upper electrode assembly and driving the upper electrode assembly to move up and down. When transferring the wafer 100 into and out of the cavity 1102, the lifting mechanism 123 can lift the upper electrode assembly upwards to create space for the wafer 100 transfer operation. When performing etching on the wafer 100, the lifting mechanism 123 can lower the upper electrode assembly downwards to adjust the distance between the upper shielding plate 120 and the wafer 100. Optionally, the mounting substrate 121 is made of aluminum, and the upper shielding portion 120 is made of ceramic. Optionally, the base 130, the lower limiting ring 150, and the lower grounding ring 170 constitute the lower electrode assembly, and the upper limiting ring 140 and the lower limiting ring 150 are made of alumina, silicon oxide, or silicon carbide, but the invention is not limited thereto.

[0040] Specifically, in this embodiment, the upper grounding ring 160 and the lower grounding ring 170 are disposed opposite to each other, and the upper grounding ring 160 and / or the lower grounding ring 170 are connected to a radio frequency source to form an electric field in the plasma reaction space 180 through the upper grounding ring 160 and the lower grounding ring 170. More specifically, the upper grounding ring 160 is provided with a gas channel 161 and an air inlet 162 communicating with the gas channel 161 and the plasma reaction space 180 to introduce process gas into the plasma reaction space 180; and the process gas is ionized into plasma under the action of the upper grounding ring 160 and the lower grounding ring 170 to etch the edge region of the wafer 100. Optionally, the air inlet 162 is inclined toward the edge of the wafer 100 so that the introduced process gas is concentrated as much as possible in the edge region of the wafer 100, thereby making the plasma concentration in the edge region of the wafer 100 higher, and thus improving the etching rate of the edge region of the wafer 100. Optionally, the first gas source 101 for storing the process gas is located outside the reaction chamber 110, and the gas channel 161 also passes through the upper shielding part 120 and the mounting substrate 121 and communicates with the first gas source 101, but the present invention is not limited thereto.

[0041] Specifically, in this embodiment, during the etching process of the wafer 100, a gap exists between the upper shielding portion 120 and the wafer 100. A second gas source 102 storing purge gas can communicate with this gap through a purge gas passage 103 penetrating the mounting substrate 121 and the upper shielding portion 120. This allows the supplied purge gas to pass radially through the gap along the surface of the wafer 100 to reach the plasma reaction space 180, thereby preventing the plasma within the plasma reaction space 180 from reaching the central region of the wafer 100 and avoiding etching of the central region of the wafer 100. Optionally, the purge gas is an inert gas, and the second gas source 102 is also located outside the reaction chamber 110, but this invention is not limited thereto.

[0042] Please continue to refer to this. Figure 1 and Figure 2 The upper limiting ring 140 is provided with a first notch 141 facing the plasma reaction space 180.

[0043] Specifically, in this embodiment, the first notch 141 increases the volume of the plasma reaction space 180, allowing the plasma reaction space 180 to hold more of the process gas, thereby generating more plasma after ionization and further improving the etching rate of the edge region of the wafer 100. More specifically, the upper limiting ring 140 includes a lower surface 1401 facing the wafer 100, and the first notch 141 is located above the lower surface 1401 of the upper limiting ring 140. This allows the volume of the plasma reaction space 180 to be increased through the first notch 141, while ensuring that the original etching path or etching area of ​​the wafer 100 is not changed through the lower surface 1401. In other words, it can both improve the etching rate of the edge region of the wafer 100 and meet the original etching requirements of the wafer 100. Specifically, the lower surface 1401 of the upper confinement ring 140 can shield the wafer edge region, limiting the plasma's processing of the wafer edge region. Since the edge region size to be etched varies for different applications, this invention can provide multiple upper confinement rings 140 for alternative selection. By setting different outer diameters of the lower surface 1401 of the upper confinement ring 140, etching of the edge regions of wafers with different requirements can be achieved. Optionally, the outer diameter of the lower surface 1401 of the upper confinement ring 140 is smaller than the diameter of the wafer 100, with a difference of 2-5 mm, so that the edge region of the upper surface of the wafer 100 is exposed to the plasma reaction space 180 for etching processing; however, this invention is not limited to this.

[0044] Specifically, in this embodiment, the cross-section of the first notch 141 is one or a combination of an arc shape, a U shape, a V shape, and an L shape to maximize the cross-sectional area of ​​the first notch 141, thereby maximizing the volume of the first notch 141 and thus increasing the volume of the plasma reaction space 180 as much as possible. More specifically, if a first angle exists in the cross-section of the first notch 141, the opening direction of the first angle should avoid facing the upper limiting ring 140 or the upper grounding ring 160 to prevent the process gas or plasma from accumulating at the first angle and being unable to flow to the edge region of the wafer 100. Optionally, the upper grounding ring 160 is located above the first notch 141 so that the upper grounding ring 160 can ionize the process gas in the plasma reaction space 180 with the increased volume into plasma, but the present invention is not limited thereto.

[0045] In some applications, plasma etching is also required below the edge region of the wafer. As mentioned above, to increase the volume of the plasma region, such as... Figure 1 and Figure 2As shown, the lower limiting ring 150 may also be provided with a second notch 151 facing the plasma reaction space 180.

[0046] Specifically, similar to the first notch 141, the second notch 151 can also increase the volume of the plasma reaction space 180, thereby further improving the etching rate of the edge region of the wafer 100. The lower limiting ring 150 includes an upper surface 1501 supporting the wafer 100, and the second notch 151 is located below the upper surface 1501 of the lower limiting ring 150. In this way, the volume of the plasma reaction space 180 can be increased by the second notch 151, and the upper surface 1501 can ensure that the original etching path or etching area of ​​the wafer 100 is not changed (similar to the lower surface 1401 of the upper limiting ring 140). Similarly, it can both improve the etching rate of the edge region of the wafer 100 and meet the original etching requirements of the wafer 100. Optionally, the outer diameter of the upper surface 1501 of the lower limiting ring 150 is smaller than the diameter of the wafer 100 and the difference between the two is 2 to 5 mm, so that the edge region of the lower surface of the wafer 100 is exposed to the plasma reaction space 180 for etching process, but the present invention is not limited thereto.

[0047] Specifically, the cross-section of the second notch 151 can also be one or a combination of arc, U, V, and L shapes to maximize the cross-sectional area of ​​the second notch 151, thereby maximizing its volume and increasing the volume of the plasma reaction space 180. If a second angle exists in the cross-section of the second notch 151, the opening direction of the second angle should avoid facing the lower limiting ring 150 or the lower grounding ring 170 to prevent the process gas or plasma from accumulating at the second angle and being unable to flow to the edge region of the wafer 100. Optionally, the lower grounding ring 170 is located below the second notch 151 so that the lower grounding ring 170 can ionize the process gas in the plasma reaction space 180 after the volume is increased into plasma, but the present invention is not limited thereto.

[0048] Furthermore, to verify the improvement in etching rate of the wafer edge region by the edge etching equipment provided in this embodiment, etching processes were performed on wafers of different radii with and without the first notch 141. The comparison results are as follows: Figure 3 (No first gap was set) and Figure 4 (Setting the first gap) as shown; from Figure 3 and Figure 4 As can be seen, when etching the edge regions of the wafers with the same radius, Figure 4 The etching rate of the wafer is significantly higher than that of the standard. Figure 3 The etching rate of the wafer effectively demonstrates the improvement of the etching rate of the wafer edge region in this embodiment.

[0049] In summary, the edge etching apparatus provided in this embodiment has a base for supporting the wafer at the bottom of the reaction chamber, an upper shielding portion at the top of the reaction chamber, a lower limiting ring around the base, and an upper limiting ring around the upper shielding portion. The upper and lower limiting rings cooperate to form a plasma reaction space in the edge region of the wafer, and the upper limiting ring has a first notch facing the plasma reaction space. The first notch can effectively increase the volume of the plasma reaction space, thereby allowing more process gas to be contained within the plasma reaction space, and thus generating more plasma after ionization of the process gas, significantly improving the etching rate of the wafer edge region. In this embodiment, the upper limiting ring includes a lower surface facing the wafer, and the first notch is located above the lower surface of the upper limiting ring. This allows the volume of the plasma reaction space to be increased through the first notch, while ensuring that the original etching path or etching area of ​​the wafer is not altered by the lower surface of the upper limiting ring. Furthermore, in this embodiment, the lower limiting ring is provided with a second notch facing the plasma reaction space, which can also increase the volume of the plasma reaction space to further improve the etching rate of the wafer edge region. The lower limiting ring includes an upper surface supporting the wafer, and the second notch is located below the upper surface of the lower limiting ring. This notch can both increase the volume of the plasma reaction space and ensure that the original etching path or etching area of ​​the wafer is not altered by the upper surface of the lower limiting ring. The cross-sections of the first and second notches are one or any combination of arc, U, V, and L shapes to maximize the cross-sectional area of ​​the first and second notches, thereby maximizing their volume and further increasing the volume of the plasma reaction space.

[0050] Although the present invention has been described in detail through the preferred embodiments above, it should be understood that the above description should not be considered as a limitation of the present invention. Various modifications and substitutions to the present invention will be apparent to those skilled in the art after reading the above description. Therefore, the scope of protection of the present invention should be defined by the appended claims.

Claims

1. An edge etching apparatus, characterized in that, include: reaction chamber; The base, located at the bottom of the reaction chamber, is used to support the wafer; An upper shielding part is located at the top inside the reaction chamber; A lower limiting ring is disposed around the base; as well as An upper limiting ring is disposed around the upper shielding portion; the upper limiting ring and the lower limiting ring cooperate to form a plasma reaction space in the edge region of the wafer; and the upper limiting ring is provided with a first notch facing the plasma reaction space to increase the volume of the plasma reaction space; The upper limiting ring includes a lower surface facing the wafer, and the outer diameter of the lower surface of the upper limiting ring is smaller than the diameter of the wafer.

2. The edge etching apparatus as described in claim 1, characterized in that, The first notch is located above the lower surface of the upper limiting ring.

3. The edge etching apparatus as described in claim 1, characterized in that, The cross-section of the first notch is one or any combination of arc, U, V, and L shapes.

4. The edge etching apparatus as described in claim 2, characterized in that, The difference between the outer diameter of the lower surface of the upper limiting ring and the diameter of the wafer is 2~5mm.

5. The edge etching apparatus as described in claim 1, characterized in that, The lower limiting ring has a second notch facing the plasma reaction space.

6. The edge etching apparatus as described in claim 5, characterized in that, The lower limiting ring includes an upper surface that supports the wafer, and the second notch is located below the upper surface of the lower limiting ring.

7. The edge etching apparatus as described in claim 5, characterized in that, The cross-section of the second notch is one or any combination of arc, U, V, and L shapes.

8. The edge etching apparatus as described in claim 6, characterized in that, The outer diameter of the upper surface of the lower limiting ring is smaller than the diameter of the wafer, and the difference between the two is 2~5mm.

9. The edge etching apparatus as described in claim 6, characterized in that, Also includes: A lower grounding ring is located below the second notch and is arranged around the lower limiting ring.

10. The edge etching apparatus as described in claim 1, characterized in that, Also includes: An upper grounding ring is located above the first gap and is arranged around the upper limiting ring.

11. The edge etching apparatus as described in claim 10, characterized in that, The upper grounding ring is provided with a gas channel and an air inlet that communicates with the gas channel and the plasma reaction space to introduce process gas into the plasma reaction space.

12. The edge etching apparatus as described in claim 11, characterized in that, The air inlet is angled toward the edge of the wafer.

13. The edge etching apparatus as described in claim 1, characterized in that, The upper and lower restricting rings are made of alumina, silicon oxide, or silicon carbide.

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