High-precision single-frequency laser seed injection locking method

Abstract

The application relates to a high-precision single-frequency laser seed injection locking method, steps S1, a resonant pulse signal is generated based on an FPGA unit and a piezoelectric ceramic, the resonant pulse signal collected by an ADC unit is monitored, and the time t1 required from the start of a slope voltage to the appearance of an error signal is recorded; steps S2, after the error signal is monitored, the slope voltage is slowly adjusted, the S-shaped waveform center position of a resonant cavity spectrum range corresponding to a plurality of resonant pulse signals is detected based on a peak value detection module, a PID feedback control program is started, and the time t2 is recorded; steps S3, after the error signal is stabilized at the S-shaped waveform center 0 point position, the time t3 is kept, the Q switch signal is turned on while the PID feedback control is turned off, the Q switch signal is kept for the time t4 and then turned off, and the digital quantity corresponding to the slope voltage at the moment is recorded; and steps S4, the slope voltage is controlled to drop to 0V, a period of time is kept, and the overall time of the step S4 is recorded as t5. The application has the characteristics of adjustable repetition frequency, high time stability and high frequency stability.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of laser technology, and particularly to a high-precision single-frequency laser seed injection locking method. BACKGROUND

[0002] The improvement of laser power or energy, the compression of pulse width, the narrowing of line width and the improvement of frequency stability are several important directions of laser development. The single-frequency narrow line width, high power (large energy) and high stability pulse laser has important applications in the fields of gravitational wave detection, high-resolution spectral analysis, nonlinear optics and laser radar remote sensing. In order to realize stable single-frequency narrow line width laser output in a high power or large energy laser, people propose to inject the single longitudinal mode, narrow line width and small power continuous laser output by a high-resolution laser oscillator (seed laser or main laser) into a high power laser oscillator (power laser or slave laser), so as to control the spectral characteristics, mode phase characteristics and spatial characteristics of the power oscillator by the seed laser. This technology is called seed injection technology. The seed injection technology is the most effective method to realize the Fourier transform limit line width, stable single-frequency output in a high peak power Q-switched laser.

[0003] The commonly used seed injection methods include: the minimum time establishment method, the Pound-Drever-Hall (PDH) method, the Ramp-Fire resonance detection method and various improved methods based on the Ramp-Fire technology. The minimum time establishment method is to compare the establishment time of even pulses and technical pulses to adjust the cavity length, so that the establishment time of the resonant cavity output pulse is minimized. When the frequency detuning amount is 0, that is, the frequency of a certain longitudinal mode of the slave laser resonant cavity matches the frequency of the seed light, the establishment time of the Q-switched laser pulse is the shortest, and the establishment time increases with the increase of the detuning amount.

[0004] PDH frequency stabilization technology is to lock the frequency of laser to Fabry-Perot resonator (F-P cavity), which firstly uses electro-optic crystal to modulate the single frequency output of laser, then the laser is incident into F-P cavity, the beat frequency signal of the reflected signal of F-P cavity and the frequency of laser is detected by optical heterodyne, the cavity length of laser is feedback controlled to lock the frequency of laser to the resonant frequency of F-P cavity. Because F-P cavity has very high stability and very narrow spectral width, the frequency stability of laser can be very high by using PDH technology, but the system structure is relatively complex. The ramp-fire method is to scan the cavity length of resonator by using ramp voltage and detect the interference signal generated by the interference of seed laser in the resonator, the position of the peak of interference signal corresponds to the position of matching the frequency of laser resonator and seed light. The peak of signal is detected by circuit, and the Q switch is opened at this time to establish the pulse. Because the ramp-fire technology scans the cavity length of slave laser and detects the resonance in each pump cycle, it can approximately ensure that the single frequency output is 100%, and the anti-interference ability is very strong. However, because the initial phase of interference signal obtained by each scan is not fixed, it will be randomly fluctuated by mechanical vibration and environmental temperature and other factors, causing the position of resonance peak to fluctuate, the triggering time of Q switch and the light output time of pulse are relatively unstable, causing the energy of output single frequency laser to be unstable, so it cannot be applied to some occasions which have high requirements for the time stability of laser pulse.

[0005] The subsequent ramp-hold-fire technology is to apply a ramp voltage on the PZT to scan the resonator cavity length of slave laser, but when the peak of interference signal is detected, the Q switch is not immediately opened, but the voltage is maintained until a fixed time to trigger the Q switch to output laser pulse. This method can improve the time stability of laser pulse. However, during the voltage maintaining process, the mechanical ringing effect of piezoelectric ceramic will cause the resonator length to change, and the external environment will also bring additional frequency detuning after the maintaining time is too long, which will cause the instability of pulse output frequency.

[0006] The start time of scanning ramp voltage of delay-ramp-fire technology is not fixed relative to the pump pulse, but is adjusted according to the pulse light output time of the last cycle to feedback to the current pulse to adjust the voltage application time to compensate the fluctuation of resonator length, so that the time of scanning the resonance peak is relatively fixed, and the time stability of laser pulse is improved. However, this method only has good compensation effect for low frequency disturbance, and has high requirements for closed loop control circuit.

[0007] Therefore, it is an urgent problem to design a single frequency laser injection locking method with adjustable repetition frequency, high time stability and very high frequency stability. SUMMARY

[0008] To solve the technical problems existing in the prior art, the purpose of the present application is to provide a high-precision single-frequency laser seed injection locking method, which has the characteristics of adjustable repetition frequency, high time stability and extremely high frequency stability.

[0009] To achieve the above-mentioned purpose of the application, the present application provides a high-precision single-frequency laser seed injection locking method, comprising the following steps:

[0010] Step S1, a resonant pulse signal is generated based on an FPGA unit and a piezoelectric ceramic, the resonant pulse signal collected by an ADC unit is monitored, and the time t1 required from the start of the slope voltage to the appearance of the error signal is recorded;

[0011] Step S2, after the error signal is monitored, the slope voltage is slowly adjusted, the detection of the center position of the S-shaped waveform of the resonant cavity spectral range corresponding to a plurality of resonant pulse signals is performed based on a peak value detection module, a PID feedback control program is started, and the time t2 is recorded;

[0012] Step S3, after the error signal is stabilized at the center 0 point of the S-shaped waveform, t3 time is maintained, the Q switch signal is turned on while the PID feedback control is turned off, the Q switch signal is turned off after t4 time, and the digital quantity corresponding to the slope voltage at this time is recorded;

[0013] Step S4, the slope voltage is controlled to drop to 0V, maintained for a period of time, and the overall time of step S4 is recorded as t5.

[0014] According to one aspect of the present application, it further comprises:

[0015] Step S5, the steps S1 to S4 are repeatedly executed, and the single-frequency injection locking laser is repeatedly generated.

[0016] According to one aspect of the present application, the step S1 specifically comprises:

[0017] Step S11, a FPGA chip in the FPGA unit generates a digital slope signal, the digital slope signal is converted into an analog signal through a first DAC chip, at the same time, the digital slope signal generates a high-voltage analog slope signal through the first DAC chip and a voltage amplifier to drive the piezoelectric ceramic in the laser cavity to move and scan the laser cavity, and when the injected seed laser and the cavity length satisfy the resonance condition, an electric pulse signal is generated;

[0018] Step S12, the resonant pulse signal collected by the resonant light output mirror, the photodetector and the ADC unit is monitored, the collected signal s1(t) is first asynchronously synchronized, and the derivative The pulse signal is changed into an error signal, and the time t1 required from the start of the slope voltage to the appearance of the error signal is recorded.

[0019] According to one aspect of the present application, in the step S2, based on the detection of the center position of the S-shaped waveform of the resonant cavity spectral range corresponding to the resonant pulse signal by the peak detection module, the PID feedback control program is started, specifically comprising:

[0020] Step S21, register the waveform of the resonant cavity spectral range corresponding to the plurality of resonant pulse signals in real time;

[0021] Step S22, when the peak detection module first determines the center position of the second S-shaped waveform of the resonant cavity spectral range corresponding to the plurality of resonant pulse signals, slightly reduce the ramp voltage, and correspondingly drive the piezoelectric ceramic to retreat;

[0022] Step S23, during the retreat of the piezoelectric ceramic, the peak detection module of the FPGA detects the just registered waveform center position again, and immediately starts the PID feedback control program;

[0023] Step S24, set the proportional, integral and differential parameters, and load the feedback control signal on the basis of the ramp voltage.

[0024] According to one aspect of the present application, in the step S3, the FPGA chip in the FPGA unit generates a digital ramp signal, which is directly input to the acousto-optic Q-switch driver, and the Q-switch signal is generated through the acousto-optic Q-switch driver, the time of t3 is dynamically adjusted, so that t1+t2+t3=A, wherein A is a constant.

[0025] According to one aspect of the present application, in the step S4, the compensation time t5 is dynamically adjusted so that t1+t2+t3+t4+t5=T

[0026] Wherein, T is the pulse period.

[0027] According to one aspect of the present application, in the step S4, the steady-state holding time of the PID in the t3 time is automatically calculated, so that the time interval of the giant pulse generated in the front and rear two scanning periods is the set period.

[0028] According to one aspect of the present application, the FPGA unit is designed by using a five-stage state machine, comprising:

[0029] State G0 is used to prevent the influence caused by unstable light output of the system;

[0030] State G1 is used to continuously increase the PZT driving voltage, scan the resonant cavity, and record the scanning step lengths of the front and rear two scanning periods as value_pre and value, respectively, and when the peak detection module of the system determines the peak point of the resonant signal, jump to state G2;

[0031] The state G2 slightly reduces the PZT driving voltage, so that the system re-detects the peak point registered at the previous time, and then starts the PID feedback control system, and after maintaining for a period of time, jumps to the state G3;

[0032] The state G3 records the G2 segment steps of the previous and next scanning periods as thr and hold_time, and the PZT voltage descending speed is affected by the piezoelectric ceramic characteristics, and when it is reduced to zero, jumps to the state G4;

[0033] The state G4 has the same descending step as the G0 segment step, and the previous and next scanning periods correspond to value_pre and value respectively, the G4 state maintaining time needs to compensate the duration of each state, the scanning period is strictly set to be the set period, and the G4 segment steps of the previous and next scanning periods are recorded as cntG4 and cntG4_pre.

[0034] According to one aspect of the application, the state steps in the previous and next scanning periods of the FPGA unit need to meet:

[0035] CntG0+2value_pre+thr+cntG4_pre=1 / f

[0036] value_pre+cntG4_pre+cntG0+value+hold_time=1 / f.

[0037] Compared with the prior art, the application has the following beneficial effects:

[0038] The application provides a high-precision single-frequency laser seed injection locking method, avoids frequency jitter and lock loss caused by factors such as hysteresis and creep effect of piezoelectric ceramics, mechanical vibration and environmental temperature, and has the advantages of adjustable repetition frequency, high time stability and extremely high frequency stability. BRIEF DESCRIPTION OF DRAWINGS

[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed in the embodiments. Obviously, the drawings described in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0040] Figure 1 A schematic diagram of a device for realizing the seed injection locking method of the single-frequency pulsed laser according to one embodiment of the present application is shown;

[0041] Figure 2 A flow chart of the injection locking algorithm according to one embodiment of the present application is shown;

[0042] Figure 3 schematic representation of a resonance signal (left) and an error signal (right) according to an embodiment of the application;

[0043] Figure 4 schematic representation of an injection locking algorithm flow according to an embodiment of the application;

[0044] Figure 5 schematic representation of an injection locking system state transition simulation diagram according to an embodiment of the application;

[0045] Figure 6 schematic representation of a piezoelectric ceramic driving voltage signal simulation diagram according to an embodiment of the application;

[0046] Figure 7 schematic representation of a flow chart of a high-precision single-frequency laser seed injection locking method according to an embodiment of the application. DETAILED DESCRIPTION

[0047] The description of the embodiments of this specification should be considered in conjunction with the accompanying drawings, which are incorporated in and constitute part of this specification. In the drawings, the shapes or thicknesses of the embodiments can be exaggerated and simplified for the purpose of convenience or clarity. Furthermore, parts of structures in the drawings will be described separately, and it should be noted that elements not shown or not described in the drawings are in the form known to those skilled in the art.

[0048] The description of the embodiments herein, any reference to direction or orientation is merely intended for convenience of description and is not to be construed as any limitation of the scope of the present application. The following description of preferred embodiments will refer to a combination of features, which can exist independently from each other or in combination. The present application is not particularly limited to the preferred embodiments. The scope of the present application is defined by the claims.

[0049] As shown in the drawings, a high-precision single-frequency laser seed injection locking method according to an embodiment of the present application comprises the following steps: Figures 1 to 7

[0050] Step S1, generate a resonance pulse signal based on an FPGA unit and a piezoelectric ceramic, monitor the resonance pulse signal collected by an ADC unit, and record the time t1 required from the start of the slope voltage to the appearance of the error signal;

[0051] Step S2, after monitoring the error signal, slowly adjust the slope voltage, detect the center position of the S-shaped waveform of the resonance cavity spectral range corresponding to a plurality of resonance pulse signals based on a peak detection module, start a PID feedback control program, and record the time t2;

[0052] ​Step S3, after the error signal is stabilized at the center 0 point of the S-shaped waveform, a time t3 is kept, the Q switch signal is turned on while the PID feedback control is turned off, the Q switch signal is kept for a time t4, then it is turned off, and the digital quantity corresponding to the ramp voltage at this time is recorded;

[0053] Step S4, the ramp voltage is controlled to drop to 0V, and a time is kept, and the overall time of step S4 is recorded as t5.

[0054] In this embodiment, by improving the single-frequency laser injection locking technology of Ramp-Fire, the frequency jitter and loss of lock caused by the mechanical ringing effect, mechanical vibration and environmental temperature of the piezoelectric ceramic are avoided, the time error of the Q switch is reduced by strictly controlling the opening time, the jitter of the energy output is reduced, the high time sequence stability of the laser pulse is ensured, and the advantages of adjustable repetition frequency and extremely high frequency stability are achieved.

[0055] The device diagram for realizing the seed injection locking method of the single-frequency pulsed laser is as shown in Figure 1 .

[0056] In one embodiment of the present application, preferably, it further comprises:

[0057] Step S5, the steps S1 to S4 are repeatedly executed, and the single-frequency injection locking laser is repeatedly generated in a loop, so that the high repetition of the pulse generation time is ensured, and the high frequency stability of each generated pulse is ensured by the PID locking.

[0058] As shown in Figure 4 , the first step, the FPGA generates a rising ramp signal (the laser is scanned and the resonance signal is collected and converted into an error signal at the same time; the second step, when the peak value of the resonance signal is determined twice by the peak value detection module, the PID locking program is started; the third step, after the error signal is stabilized at the center 0 point of the S-shaped waveform, a time is kept, the Q switch signal is turned on and the PID locking is turned off; the fourth step, the FPGA controls the ramp voltage to drop to 0V and keeps a time; after the fourth step is completed, the first step is returned, and this step is step S5.

[0059] In one embodiment of the present application, preferably, the step S1 specifically comprises:

[0060] Step S11, the FPGA chip in the FPGA unit generates a digital ramp signal, the digital ramp signal is converted into an analog signal through a first DAC chip, at the same time, the digital ramp signal generates a high-voltage analog ramp signal through the first DAC chip and a voltage amplifier to drive the piezoelectric ceramic in the laser cavity to move and scan the laser cavity, and when the injected seed laser and the cavity length meet the resonance condition, an electric pulse signal is generated.

[0061] Step S12, the resonant pulse signal collected by the resonant light output mirror, the photodetector and the ADC unit is monitored, the collected signal s1(t) is first asynchronously synchronized, and the derivative is calculated The pulse signal is converted into an error signal, and the time t1 required from the start of the slope voltage to the appearance of the error signal is recorded.

[0062] As shown in Figure 2 Compared with the resonant pulse signal, the resonant error signal obtained by derivation amplifies the signal characteristics, is easy to judge, and is convenient for subsequent implementation of cavity length locking.

[0063] Figure 2 In the formula, Laserswitch signal represents the light switch signal; Sawtooth scanning signal represents the sawtooth wave scanning signal; Resonant signal represents the resonant signal; Resonanterror signal represents the resonant error signal; PID trigger signal PID represents the trigger signal; Delay trigger signal represents the PZT delay trigger signal; Hold trigger signal represents the PZT hold trigger signal; Q-Switch trigger signal represents the Q switch trigger signal.

[0064] In an embodiment of the present application, preferably, in the step S2, based on the detection of the center position of the S-shaped waveform of the resonant cavity spectral range corresponding to the resonant pulse signal by the peak value detection module, the PID feedback control program is started, and specifically includes the following steps.

[0065] Step S21, the waveforms of the resonant cavity spectral range corresponding to a plurality of resonant pulse signals are stored in real time, specifically: the slope difference derivative is performed on the second resonant signal converted into an analog signal by the second DAC chip, the resonant pulse signal is converted into a resonant error signal, and the error signal value sampled in real time is stored in the FPGA, and the second resonant signal is a detection signal representing light intensity;

[0066] Step S22, the signal as shown in Figure 3 is monitored, and the slope voltage is slowly adjusted, when the peak value detection module first determines the center position of the second S-shaped waveform of the resonant cavity spectral range corresponding to a plurality of resonant pulse signals, the slope voltage is slightly reduced, and the piezoelectric ceramic is correspondingly retreated;

[0067] Step S23, during the retreat of the piezoelectric ceramic, the peak value detection module of the FPGA detects the just stored waveform center position again, and immediately starts the PID feedback control program;

[0068] Step S24, setting the proportional, integral and differential parameters, loading the feedback control signal on the reference of the ramp voltage.

[0069] In this embodiment, when the system determines that the resonance error signal value is zero, and then several resonance error signal values input continuously gradually decrease, it is considered that the zero value point of the resonance error signal (corresponding to the peak value of the resonance signal) is determined, and the FPGA registers the position of the zero value point. When the system is determined to be effective, due to the influence of the determination mechanism and the system response time, the corresponding resonance signal has passed the maximum value at this time, so the PZT driving voltage is slightly reduced, and the corresponding spectrum range is returned to the last determined spectrum range. At this time, the system detects the zero value point of the resonance error signal registered by the FPGA again, and then starts the PID feedback control system to set the feedback parameters. The PID feedback control system feeds back the calculation results to the PZT in real time, and the cavity length of the resonant cavity changes slightly with the PZT, so as to lock the resonance signal to the zero point of the error signal (corresponding to the peak value of the resonance signal).

[0070] In an embodiment of the present application, preferably, in the step S3, the FPGA chip in the FPGA unit generates a digital ramp signal, which is directly input to the acousto-optic Q-switch driver, and the acousto-optic Q-switch driver generates a Q-switch signal to dynamically adjust the time of t3, so that t1+t2+t3=A, wherein A is a constant.

[0071] After the resonance error signal is stabilized near the zero value point, the system automatically calculates the required time of each stage, dynamically adjusts the opening time of the Q-switch, and strictly guarantees that the time interval between the two giant pulses is fixed, so that the generated single-frequency pulsed laser has extremely high time repeatability.

[0072] According to one aspect of the present application, in the step S4, in order to realize pulse repetition frequency stability, the compensation time t5 is dynamically adjusted so that t1+t2+t3+t4+t5=T (T is the pulse period). At the same time, the system automatically calculates the steady-state holding time of the PID in the t3 time to ensure that the time interval between the two giant pulses generated in the front and rear scanning periods is the set period.

[0073] In an embodiment of the present application, preferably, in the step S4, the steady-state holding time of the PID in the t3 time is automatically calculated, so that the time interval between the two giant pulses generated in the front and rear scanning periods is the set period.

[0074] As shown in Figure 5 、 Figure 6 In an embodiment of the present application, preferably, a five-stage state machine is designed for the FPGA unit, which includes:

[0075] State G0 is used to prevent the influence caused by unstable light output of the system;

[0076] State G1, constantly increase the PZT driving voltage, scan the resonant cavity, record the scan step length of the previous and next two scan periods as value_pre and value, when the peak detection module of the system determines the peak point of the resonant signal, jump to state G2;

[0077] The state G2, slightly reduce the PZT driving voltage, make the system detect the peak point registered at the previous time again, and then start the PID feedback control system, keep for a period of time, and jump to state G3;

[0078] The state G3, record the G2 segment step length of the previous and next two scan periods as thr and hold_time, the PZT voltage descending speed is affected by the characteristics of the piezoelectric ceramic, when it is reduced to zero, jump to state G4;

[0079] The state G4, the descending step length is the same as the G0 segment step length, the corresponding previous and next two scan periods are value_pre and value respectively, the G4 state holding time needs to compensate the duration of each state, control the scan period to be strictly set period, record the G4 segment step length of the previous and next two scan periods as cntG4 and cntG4_pre.

[0080] In an embodiment of the present application, preferably, the state step length of the FPGA unit in the previous and next scan periods needs to meet:

[0081] cntG0+2value_pre+thr+cntG4_pre=1 / f

[0082] value_pre+cntG4_pre+cntG0+value+hold_time=1 / f.

[0083] The high-precision single-frequency laser seed injection locking method of the application comprises the following steps: S1, a resonant pulse signal is generated based on an FPGA unit and a piezoelectric ceramic, a resonant pulse signal collected by an ADC unit is monitored, and a time t1 required from a slope voltage to an error signal is recorded; S2, after the error signal is monitored, the slope voltage is slowly adjusted, a peak value detection module is used to detect a center position of an S-shaped waveform of a resonant cavity spectrum range corresponding to a plurality of resonant pulse signals, a PID feedback control program is started, and a time t2 is recorded; S3, after the error signal is stabilized at the center 0 point of the S-shaped waveform, a time t3 is maintained, a Q switch signal is turned on while the PID feedback control is turned off, the Q switch signal is turned off after maintaining a time t4, and a digital quantity corresponding to the slope voltage at this time is recorded; and S4, the slope voltage is controlled to drop to 0 V, a period of time is maintained, and a whole time t5 of step S4 is recorded; the method avoids frequency jitter and loss of lock caused by hysteresis and peristalsis effects of the piezoelectric ceramic, mechanical vibration, environmental temperature and other factors, and has the advantages of adjustable repetition frequency, high time stability and extremely high frequency stability.

[0084] It should be noted that in this document the terms "comprise", "comprising", or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element preceded by "comprises a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article, or apparatus that comprises the recited element.

[0085] Finally, it should be noted that the above description is a preferred embodiment of the application, and it should be pointed out that although the preferred embodiment of the application has been described, for those skilled in the art, once the basic creative concept of the application is known, without departing from the principles of the application, some improvements and refinements can also be made, which should also be considered as the protection scope of the application. Therefore, the appended claims are intended to be interpreted as including the preferred embodiment and all changes and modifications falling within the scope of the embodiments of the application.

Claims

1. A high precision single frequency laser seed injection locking method, characterized in that, The method comprises the following steps: Step S1, generating a resonance pulse signal based on an FPGA unit and a piezoelectric ceramic, monitoring the resonance pulse signal collected by an ADC unit, and recording the time t1 required from the start of the slope voltage to the appearance of an error signal; Step S2, after the error signal is monitored, slowly adjusting the slope voltage, detecting the center position of the S-shaped waveform of the resonance cavity spectral range corresponding to a plurality of resonance pulse signals based on a peak detection module, starting a PID feedback control program, and recording the time t2; Step S3, after the error signal is stabilized at the center 0 point of the S-shaped waveform, maintaining the time t3, opening the Q switch signal while turning off the PID feedback control, closing the Q switch signal after maintaining the time t4, and recording the digital quantity corresponding to the slope voltage at this time; Step S4, controlling the slope voltage to drop to 0V, maintaining for a period of time, and recording the overall time t5 of step S4.

2. The high precision single frequency laser seed injection locking method of claim 1, wherein, Further comprising: Step S5, repeatedly executing steps S1 to S4 to cyclically generate a single-frequency injection-locked laser.

3. The high precision single frequency laser seed injection locking method of claim 2, wherein, The step S1 specifically comprises: Step S11, the FPGA chip in the FPGA unit generates a digital slope signal, the digital slope signal is converted into an analog signal by a first DAC chip, at the same time, the digital slope signal generates a high-voltage analog slope signal after the first DAC chip and a voltage amplifier to drive the piezoelectric ceramic in the laser cavity to move and scan the laser cavity, when the injected seed laser and the cavity length meet the resonance condition, an electric pulse signal is generated; Step S12, using resonant light output mirror, photodetector, ADC unit collection resonant pulse signal, and monitor the ADC unit collected resonant pulse signal, first to the collected resonant pulse signal s1(t) asynchronous synchronization, and derivative The pulse signal is converted into an error signal, and the time t1 required from the start of the ramp voltage to the appearance of the error signal is recorded.

4. The high precision single frequency laser seed injection locking method of claim 3, wherein, In the step S2, the PID feedback control program is started based on the detection of the center position of the S-shaped waveform of the resonance cavity spectral range corresponding to the resonance pulse signal by the peak detection module, specifically comprising: Step S21, real-time storing the waveforms of the resonance cavity spectral range corresponding to a plurality of resonance pulse signals; Step S22, when the peak detection module first determines the second center position of the S-shaped waveform of the resonance cavity spectral range corresponding to a plurality of continuous resonance pulse signals, the slope voltage is slightly reduced, and the piezoelectric ceramic is correspondingly driven to retreat; Step S23, during the retreat of the piezoelectric ceramic, the peak detection module of the FPGA detects the just stored waveform center position again, and immediately starts the PID feedback control program; Step S24, setting the proportional, integral and differential parameters, loading the feedback control signal on the basis of the slope voltage.

5. The high precision single frequency laser seed injection locking method of claim 1, wherein, In the step S3, the FPGA chip in the FPGA unit generates a digital slope signal, directly inputs the acousto-optic Q switch driver, generates a Q switch signal through the acousto-optic Q switch driver, dynamically adjusts the time t3, so that t1+t2+t3=A, wherein A is a constant.

6. The high precision single frequency laser seed injection locking method of claim 5, wherein, In the step S4, the compensation time t5 is dynamically adjusted so that t1+t2+t3+t4+t5=T Wherein, T is the pulse period.

7. The high precision single frequency laser seed injection locking method of claim 4, wherein, In the step S4, the steady-state holding time of the PID in the t3 time is automatically calculated, so that the time interval of the giant pulse generated in the front and back two scanning periods is the set period.

8. The high precision single frequency laser seed injection locking method of claim 1, wherein, The FPGA unit is designed by adopting a five-stage state machine, comprising: State G0, used to prevent the influence caused by unstable light output of the system; State G1, increase PZT driving voltage constantly, scan the resonant cavity, record the scan step length of the previous and next two scan periods as value_pre and value, when the system peak detection module determines the resonant signal peak point, jump to state G2; The state G2, slightly reduce the PZT driving voltage, make the system detect the peak point registered at the previous time again, and then start the PID feedback control system, keep for a period of time, and jump to state G3; The state G3, record the G2 segment step length of the previous and next two scan periods as thr and hold_time, the PZT voltage descending speed is affected by the piezoelectric ceramic characteristics, when it is reduced to zero, jump to state G4; The state G4, the descending step length is the same as the G0 segment step length, the corresponding previous and next two scan periods are value_pre and value respectively, the G4 state holding time needs to compensate the duration of each state, control the scan period to be strictly set period, record the G4 segment step length of the previous and next two scan periods as cntG4 and cntG4_pre.

9. The high precision single frequency laser seed injection locking method of claim 8, wherein, The state step length of the FPGA unit in the previous and next scan periods needs to meet: cntG0+2value_pre+thr+cntG4_pre=1 / f value_pre+cntG4_pre+cntG0+value+hold_time=1 / f.

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