Fast frequency self-adaptive inversion control method and system applied to network construction type V2G charging pile

Abstract

The invention discloses a fast frequency self-adaptive inversion control method and system applied to a network construction type V2G charging pile. The fast frequency self-adaptive inversion control system comprises an instantaneous power calculation loop, a network construction type power control loop and a voltage control loop with fast frequency self-adaptive capability. The power control loop simultaneously retains the frequency modulation and damping functions of the inverter system to reduce the risk of power oscillation of the system, and a voltage instruction synchronized with the actual power grid frequency is constructed and sent to a voltage control inner loop. And a frequency adaptive strategy in the voltage inner loop control scheme can ensure high-quality synchronous grid-connected voltage even if the frequency of the power grid drops. In combination with a linear active disturbance rejection controller, a final voltage inner loop control loop can be used for eliminating potential aperiodic noise interference in a charging pile inverter system, so that the recovery time of the system is shortened. According to the invention, the output electric energy quality and the dynamic performance of the network construction type V2G type charging pile under the complex power grid can be improved, and the stable grid-connected operation of the electric vehicle V2G type charging pile is realized.

Description

Technical Field

[0001] The present invention relates to the field of three-phase inverter control of V2G type charging piles for electric vehicles, and in particular to a fast frequency adaptive inverter control method and system applied to a network-building V2G charging pile. Background Art

[0002] The direct power control and voltage-current dual closed-loop control strategy adopted by the front-stage DC-AC inverter of traditional electric vehicle charging piles can achieve unity power factor, sinusoidal AC current and stable DC bus voltage, but this result will face huge challenges in actual complex power grid environments such as frequency fluctuations. Therefore, how electric vehicle V2G charging piles can actively participate in grid frequency adjustment and improve the output power quality to achieve grid-friendly grid connection is an urgent problem to be solved.

[0003] In order to avoid the adverse effects of the phase-locked loop on the frequency control loop, the prior art adopts a grid-type power control strategy that replaces the actual grid-connected angular frequency with the rated angular frequency. However, the differences between the frequency modulation function and the damping function in the dynamic adjustment process may cause violent power oscillations and lead to system instability. However, if the frequency fluctuations of the actual power grid are taken into account, the virtual angular frequency will deviate from the rated frequency following the actual grid frequency, causing the reference signal received by the underlying control loop to present a variable frequency characteristic. The internal power quality control loop used in the prior art still adopts a proportional-integral control strategy in a synchronous rotating coordinate system or a traditional repetitive control strategy in a stationary coordinate system, but these traditional strategies have inherent constraints on tracking accuracy and disturbance suppression performance, which not only require complex decoupling operations, but also have very limited harmonic orders that can be suppressed. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a fast frequency adaptive inverter control method and system for a network-building V2G charging pile in view of the shortcomings of the existing technology, so as to solve the problem that the traditional V2G charging pile has insufficient supporting capacity and low output power quality when dealing with grid frequency fluctuations.

[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is: a fast frequency adaptive inverter control method applied to a network-building V2G charging pile, comprising the following steps:

[0006] The output voltage and current of the three-phase inverter side of the V2G charging pile are collected, and the output instantaneous power is calculated. The collected three-phase output voltage is transformed by Clark to obtain the inverter side output voltage v under the α axis. αo ;

[0007] Calculate the phase angle θ and virtual potential E of the V2G charging pile m , and using the phase angle θ and the virtual potential Em A three-phase reference voltage signal is obtained, and the three-phase reference voltage signal is subjected to Clark transformation to obtain a reference voltage under the α-axis;

[0008] The reference voltage under the α axis is compared with v αo After subtraction, we get the tracking difference v e , v e The signal is sent to a fast frequency adaptive repetitive controller based on anti-disturbance suppression. The tracking difference is calculated in each control cycle to obtain the modulation signal of the inverter bridge. After modulation by the PWM modulator, the duty cycle signal for controlling the switching of the three-phase inverter switch in the V2G charging pile is obtained.

[0009] The instantaneous power calculation formula is: Among them, u a 、u b 、u c is the three-phase output voltage; i a 、i b 、i c is the three-phase output current, P e , Q e are the instantaneous active power and instantaneous reactive power respectively.

[0010] The calculation formula of the phase angle θ is: θ=∫ωdt; where ω is the mechanical angular velocity.

[0011] Reference voltage signal v under the α axis αref It is expressed as:

[0012] v αref =E m sin(θ).

[0013] The linear extended state observer in the active disturbance rejection control loop is constructed as follows:

[0014]

[0015] In the formula, is the expanded observation vector corresponding to the state vector x(k), L c is the observation gain to be adjusted, The corresponding output variable y(k)=v αo (k)+δ y The observed variable, δ y represents the measurement noise interference; where:

[0016]

[0017] A d , B d and C dis the coefficient matrix, expressed as follows:

[0018]

[0019] Among them, T s is the controller sampling period, b0=1 / L f C f , L f and C f They represent the inductance and capacitance of the inverter-side LC filter in the V2G charging pile, represents the modulation signal of the inverter bridge, i gα Represents the grid current, Δv α is the voltage error caused by the unmeasured signal, T pwm The delay introduced by SPWM modulation, R L is the equivalent resistance of the inductor, i Lα , ν αo They represent the inductance L in the LC filter. f The current and capacitance C f The output voltage on

[0020] in, and They represent the first-order derivatives of the inductor current, capacitor voltage and grid current in the LC filter respectively, and t is the time variable.

[0021] The expression of the modulation signal u(k) of the inverter bridge at time k is:

[0022]

[0023] Where k1 and k2 are error control gains, v e is the tracking difference of the output voltage; G FARC represents the transfer function of a repetitive controller with frequency adaptation capability; the compensation amount given the known model information The expression is

[0024] The transfer function G of the repetitive controller with frequency adaptation capability FARC The expression is:

[0025]

[0026] In the formula, k rc is a constant control gain, S(z) is a calibration function, G FD (z) is a filter with a farrow structure, Q(z) represents a zero-phase shift low-pass filter, and is selected as a constant of 0.95; is a periodic delay unit, N1 is the delay step length, is the delay unit of the forward path, and N2 is the delay step length.

[0027] The filter G with farrow structure FD The expression of (z) is:

[0028]

[0029] In the formula, the delay time p d =(n s -n c )-n d ; Sampling times n s and delay compensation times n d The calculation formulas are: s =f s / (k h f n ), n d =floor(n s -n c ), floor is the rounding function; f s is the sampling frequency, k h To repeat the number of times the controller suppresses harmonics, set it to a constant of 1 to perform zero steady-state error tracking in a two-phase stationary coordinate system, f n is the periodic nominal frequency, n c is a given number of look-ahead beats.

[0030] As an inventive concept, the present invention also provides a fast frequency adaptive inverter control system applied to a meshed V2G charging pile, comprising a memory, a processor and a computer program stored in the memory; the processor executes the computer program to implement the steps of the above method.

[0031] The instantaneous power calculation loop of the present invention provides an input signal for the grid-type power control loop, and the power control loop retains the frequency modulation and damping functions of the inverter system to reduce the risk of power oscillation in the system. By constructing a reference frequency synchronized with the actual power grid, a discrete hybrid control scheme with fast frequency adaptation capability is adopted to improve the output power quality. The frequency adaptation strategy in the voltage inner loop control scheme can ensure high-quality synchronous grid-connected voltage even when the grid frequency drops. Combined with a linear anti-disturbance controller, the final voltage inner loop control loop can be used to eliminate potential non-periodic noise interference in the charging pile inverter system, thereby shortening the system recovery time.

[0032] Compared with the prior art, the beneficial effects of the present invention are as follows: the meshed power control loop of the present invention retains the actual damping effect and frequency modulation function at the same time, and can provide the inner power quality control loop with a variable frequency reference signal that changes synchronously with the grid frequency when providing power support. In addition, the proposed power quality inner loop controller has a simple but accurate frequency adaptation capability, which can effectively track any periodic reference signal and compensate for harmonic distortion. In particular, the delay coefficient in the proposed scheme does not need to be updated online, which can reduce the memory usage of conventional frequency adaptation schemes when they are digitally implemented. Through the integrated design of the discrete self-anti-disturbance controller, the proposed scheme can also actively suppress external interference to provide a fast dynamic response that complements the frequency adaptive repetitive controller, making up for the inherent deficiency of traditional control schemes that require a compromise between tracking accuracy and dynamic performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 The circuit topology and overall control block diagram of the V2G charging pile in the embodiment of the present invention;

[0034] Figure 2 This is a fast frequency adaptive inverter control block diagram of a V2G charging pile according to an embodiment of the present invention;

[0035] FIG3(a) and FIG3(b) are respectively output voltage responses and harmonic content analysis diagrams when the power grid frequency drops when the proposed control method is not applied in an embodiment of the present invention;

[0036] FIG4(a) and FIG4(b) are respectively output voltage responses and harmonic content analysis diagrams when the control method proposed in the embodiment of the present invention is applied when the grid frequency drops.

[0037] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0038] Example 1

[0039] Figure 1 The system structure diagram of the embodiment of the present invention applied to the three-phase inverter of the electric vehicle V2G charging pile includes a three-phase inverter bridge, an LC filter circuit (L f and C f ), A / D sampling circuit, DSP28335 controller and drive protection circuit. Three-phase programmable AC power supply simulating grid frequency fluctuation gabcPower is supplied to the main circuit, and the power grid, LC filter and inverter circuit are connected in sequence. The grid-side LC filter circuit is used to filter out the high-frequency noise of the power grid; the digital sampling signal comes from the output side of the LC filter circuit; the drive circuit drives and controls the on and off of the fully controlled power device in the inverter circuit; the complete control method and operation processing are implemented on the TMS320F28335 digital signal processor.

[0040] Figure 2 This is a fast frequency adaptive control block diagram of an embodiment of the present invention, which is mainly composed of a meshed power control loop, a voltage control loop with fast frequency adaptation, and an SPWM modulation module. The voltage control method is implemented by a frequency adaptive repetitive controller based on auto-disturbance rejection;

[0041] The implementation process of a fast frequency adaptive inverter control method applied to a network-building V2G charging pile in an embodiment of the present invention is as follows:

[0042] 1) When each sampling cycle starts, the controller activates the A / D converter to sample the output voltage and current of the three-phase inverter bridge of the V2G charging pile. After the collected data is A / D converted, it is transmitted to the DSP digital signal processor through the parallel interface for further processing;

[0043] 2) The DSP controller calculates the output instantaneous power based on the output voltage and current values ​​collected in step 1), and obtains the reference voltage amplitude E through the network control loop. m And phase angle θ, so as to obtain the three-phase voltage reference signal u ref ;

[0044] The instantaneous power calculation formula is:

[0045] P e =u a i a +u b i b +u c i c

[0046]

[0047] In the formula, u a 、u b 、u c is the three-phase output voltage; i a 、i b 、i c is the three-phase output current.

[0048] The calculation formula of the reference voltage signal under the α axis is:

[0049] v αref =E msin(θ)

[0050] Among them, the phase angle θ and the virtual potential E m The calculation formula is:

[0051]

[0052] Where ω is the mechanical angular velocity, U n Indicates the output voltage reference value; U peka Indicates the peak value of the output voltage sampled back; D q is the voltage regulation coefficient; Q ref is the reactive power reference value, Q e is the instantaneous value of reactive power; K is the integral adjustment coefficient.

[0053] 3) The DSP controller operates the output voltage collected in step 1) and the voltage reference value calculated in step 2) to output a voltage tracking error value;

[0054] 4) The output voltage tracking error value is sent to the fast frequency adaptive repetitive controller based on anti-disturbance control in each control cycle to obtain the SPWM modulation signal to control the switching of the three-phase inverter in the V2G charging pile.

[0055] The specific frequency adaptive repetitive controller transfer function is expressed as:

[0056]

[0057] In the formula, k rc is a constant control gain, S(z) is a calibration function, G FD (z) is a filter with a farrow structure, Q(z) represents a zero-phase-shift low-pass filter, and the empirical constant is 0.95; is a periodic delay unit, N1 is the delay step length, is the delay unit of the forward path, and N2 is the delay step length.

[0058] The discrete linear extended state observer in the active disturbance rejection control loop is expressed as:

[0059]

[0060] In the formula, is the expanded observation vector corresponding to the state vector x(k), L c is the observation gain to be adjusted, The corresponding output variable y(k)=v αo (k)+δ y The observed variable, δ yrepresents the measurement noise interference; the expression including the total external interference such as measurement noise is:

[0061]

[0062] A d , B d and C d is the coefficient matrix, expressed as follows:

[0063]

[0064] Among them, T s is the controller sampling period, b0=1 / L f C f is a fixed constant related to the controlled object model.

[0065] The modulation signal expression of the final inverter bridge is:

[0066]

[0067] Where k1 and k2 are error control gains, v e is the tracking difference of the output voltage, G FARC represents the transfer function of a repetitive controller with frequency adaptation capability, is the compensation amount for known model information.

[0068] The filter G in the aforementioned frequency adaptive repetitive controller FD (z) The transfer function is:

[0069]

[0070] In the formula, the delay time p d =(n s -n c )-n d ; Sampling times n s and delay compensation times n d The calculation formulas are: s =f s / (k h f n ), n d =floor(n s -n c ), floor is the rounding function; f s is the sampling frequency, k h To repeat the number of times the controller suppresses harmonics, set it to a constant of 1 to perform zero steady-state error tracking in a two-phase stationary coordinate system, f n is the periodic nominal frequency, n c is a given number of look-ahead beats.

[0071] Figures 3(a), 3(b) and 4(a), 4(b) are the output voltage response and harmonic content analysis diagrams when the traditional embedded repetitive control method and the control method proposed in the embodiment of the present invention are respectively used. Figure 3(a) is the output voltage and its tracking error simulation waveform when the grid frequency drops under the traditional embedded repetitive control method, and Figure 3(b) is the total output voltage distortion rate when the grid frequency drops under the traditional embedded repetitive control method. When the traditional embedded repetitive control method is adopted, the output voltage is greatly affected by the reference frequency, the tracking error increases significantly, the waveform quality is poor (the total distortion rate is 5.21%), and the grid-connected power quality requirements are not met; Figure 4(a) is the output voltage and tracking error simulation waveform when the grid frequency drops under the proposed control method, and Figure 4(b) is the total output voltage distortion rate when the grid frequency drops under the proposed control method. When the control method proposed in the present invention is adopted, the output voltage does not see a switching spike, the tracking error fluctuates less, and the waveform quality is better (the total distortion rate is only 2.13%). The grid-connected power quality is greatly improved.

[0072] Example 2

[0073] Embodiment 2 of the present invention provides a system corresponding to the above-mentioned embodiment 1, including a memory, a processor and a computer program stored in the memory; the processor executes the computer program in the memory to implement the steps of the method in the above-mentioned embodiment 1.

[0074] In some implementations, the memory may be a high-speed random access memory (RAM), and may also include a non-volatile memory, such as at least one disk memory.

[0075] In some other implementations, the processor may be a central processing unit (CPU), a digital signal processor (DSP), or other general-purpose processors of various types, which are not limited herein.

[0076] Example 3

[0077] Embodiment 3 of the present invention provides a computer-readable storage medium corresponding to the above embodiment 1, on which a computer program / instruction is stored. When the computer program / instruction is executed by a processor, the steps of the method of the above embodiment 1 are implemented.

[0078] Computer readable storage media can be tangible devices that hold and store instructions used by instruction execution devices. Computer readable storage media can be, for example, but not limited to, electronic storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any combination thereof.

[0079] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of complete hardware embodiments, complete software embodiments, or embodiments in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code. The scheme in the embodiments of the present application can be implemented in various computer languages, for example, object-oriented programming language Java and literal scripting language JavaScript, etc.

[0080] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0081] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0082] Although the preferred embodiments of the present application have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0083] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A fast frequency adaptive inverter control method for a network-building V2G charging pile, characterized in that: The following steps are involved: The output voltage and current of the three-phase inverter side of the V2G charging pile are collected, and the output instantaneous power is calculated. The collected three-phase output voltage is transformed by Clark to obtain the inverter side output voltage v under the α axis. αo ; Calculate the phase angle θ and virtual potential E of the V2G charging pile m , and using the phase angle θ and the virtual potential E m A three-phase reference voltage signal is obtained, and the three-phase reference voltage signal is subjected to Clark transformation to obtain a reference voltage under the α-axis; The reference voltage under the α axis is compared with the capacitor C in the LC filter on the inverter side of the V2G charging pile. f The output voltage v αo After subtraction, we get the tracking difference v e , v e The signal is sent to a fast frequency adaptive repetitive controller based on anti-disturbance suppression. The tracking difference is calculated in each control cycle to obtain the modulation signal of the inverter bridge. After modulation by the PWM modulator, the duty cycle signal for controlling the switching of the three-phase inverter switch in the V2G charging pile is obtained.

2. The fast frequency adaptive inverter control method for a network-building V2G charging pile according to claim 1 is characterized in that: The instantaneous power calculation formula is: P e =u a i a +u b i b +u c i c Among them, u a 、u b 、u c is the three-phase output voltage; i a 、i b 、i c is the three-phase output current, P e , Q e are the instantaneous active power and instantaneous reactive power respectively.

3. The fast frequency adaptive inverter control method for a network-building V2G charging pile according to claim 1 is characterized in that: The calculation formula of the phase angle θ is: θ=∫ωdt; where ω is the mechanical angular velocity.

4. The fast frequency adaptive inverter control method for a network-building V2G charging pile according to claim 1 is characterized in that: Reference voltage signal v under the α axis αref It is expressed as: v αref =E m sin(θ).

5. The fast frequency adaptive inverter control method for a network-building V2G charging pile according to claim 1 is characterized in that: The linear extended state observer in the active disturbance rejection control loop is constructed as follows: In the formula, is the expanded observation vector corresponding to the state vector x(k), L c is the observation gain to be adjusted, The corresponding output variable y(k)=v αo (k)+δ y The observed variable, δ y represents the measurement noise interference; in: A d , B d and C d is the coefficient matrix, expressed as follows: Among them, T s is the controller sampling period, b0=1 / L f C f , L f and C f They represent the inductance and capacitance of the inverter-side LC filter in the V2G charging pile, Indicates the modulation signal of the inverter bridge, Δv α is the voltage error caused by the unmeasured signal, T pwm The delay introduced by SPWM modulation, R L is the equivalent resistance of the inductor, i Lα Indicates the inductance L in the LC filter f The current on First derivative of grid current.

6. The fast frequency adaptive inverter control method for a network-building V2G charging pile according to claim 5 is characterized in that: in, They represent the first-order derivative of the inductor current and the first-order derivative of the capacitor voltage in the LC filter respectively, and t is the time variable.

7. The fast frequency adaptive inverter control method for a network-building V2G charging pile according to claim 5 is characterized in that: The expression of the modulation signal u(k) of the inverter bridge at time k is: Where k1 and k2 are error control gains, v e is the tracking difference of the output voltage; G FARC represents the transfer function of a repetitive controller with frequency adaptation capability; the compensation amount given the known model information The expression is 8. The fast frequency adaptive inverter control method for a network-building V2G charging pile according to claim 7 is characterized in that: The transfer function G of the repetitive controller with frequency adaptation capability FARC The expression is: In the formula, k rc is a constant control gain, S(z) is a calibration function, G FD (z) is a filter with a farrow structure, Q(z) represents a zero-phase-shift low-pass filter, is a periodic delay unit, N1 is the delay step length, is the delay unit of the forward channel, N2 is the delay step; preferably, Q(z) is set to a constant of 0.

95.

9. The fast frequency adaptive inverter control method for a network-building V2G charging pile according to claim 8 is characterized in that: The filter G with farrow structure FD The expression of (z) is: In the formula, the delay time p d =(n s -n c )-n d ; Sampling times n s and delay compensation times n d The calculation formulas are: s =f s / (k h f n ), n d =floor(n s -n c ), floor is the rounding function; f s is the sampling frequency, k h is the number of harmonics suppressed by the repetitive controller, f n is the periodic nominal frequency, n c is a given number of look-ahead beats.

10. A fast frequency adaptive inverter control system applied to a network-building V2G charging pile, comprising a memory, a processor and a computer program stored in the memory; characterized in that: The processor executes the computer program to implement the steps of the method according to any one of claims 1 to 9.

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