Battery pack active equalization system and method

Abstract

The invention discloses a battery pack active equalization system and method. The system comprises a plurality of battery packs, a plurality of fuses, a plurality of bidirectional isolation DC / DC power supplies and a bidirectional AC / DC power supply. Wherein the positive electrode and the negative electrode of each battery pack are respectively connected with the corresponding bidirectional isolation DC / DC power supply through a fuse; the bidirectional isolation DC / DC power supply comprises a battery pack anti-creeping circuit, a main power circuit, a peak current and reverse synchronous rectification control circuit and a digital isolation and main control chip circuit. And the output end of each bidirectional isolation DC / DC power supply is connected with the direct current end of the bidirectional AC / DC power supply. According to the system, active equalization control is refined to a battery pack level, and a peak current and synchronous rectification control circuit of a bidirectional isolation DC / DC power supply is added, so that the equalization control cost is reduced, and the equalization effect is improved.

Description

Technical Field

[0001] The present application relates to the technical field of active balancing of battery clusters, and in particular to a system and method for active balancing of battery packs. Background Art

[0002] Under the trend of energy conservation and emission reduction, new energy technology has been rapidly developed as an important way to reduce carbon emissions. For example, the popularity of new energy vehicles and various new energy power stations has gradually increased. At present, in various new energy products, such as energy storage equipment of new energy power stations and new energy vehicles, battery clusters are needed to store energy in the form of electrochemical energy storage.

[0003] Among them, the battery cluster achieves high battery voltage and high battery capacity by connecting a large number of single batteries in series and parallel. In actual applications, due to individual differences in the manufacturing and use of battery cells, the attenuation degree of each battery cell is different. And because the battery needs a protection mechanism, the charge and discharge capacity of the battery cluster is affected by the battery cell with the most attenuation, resulting in the battery with less attenuation cannot be fully charged and discharged, reducing the operating efficiency of the battery cluster.

[0004] In the related art, the above problems are generally improved through passive balancing technology or active balancing technology. Among them, active balancing technology is more popular because of its larger balancing current and higher energy utilization rate than passive balancing technology. The active balancing technology in the related art usually balances between battery cells or between each PACK in a battery cluster. However, balancing between battery cells requires more balancing circuits, and the balancing control is complex and costly; for balancing between PACKs, the balancing granularity is too large, and the energy efficiency improvement is relatively limited. In addition, the current active balancing control circuit requires the development and use of dedicated control chips, resulting in high balancing costs. Summary of the invention

[0005] The purpose of this application is to solve one of the above-mentioned technical problems at least to a certain extent.

[0006] To this end, the first purpose of this application is to propose a battery pack active balancing system. The system refines the active balancing solution to the battery pack level, and adopts the peak current and synchronous rectification control circuit of the bidirectional DC / DC power supply. It only needs to use a general control chip, and does not need to use a dedicated power supply control chip to achieve balancing control, which greatly reduces the cost and improves the energy efficiency of active balancing. It solves the shortcomings of complex control and high cost of the balancing solution between battery cells, as well as the shortcomings of low improvement in battery pack energy efficiency of the balancing technology solution between PACKs.

[0007] The second objective of the present application is to provide a battery pack active balancing method.

[0008] A third object of the present application is to provide a non-transitory computer-readable storage medium.

[0009] To achieve the above-mentioned purpose, the first embodiment of the present application proposes a battery pack active balancing system, which includes: multiple battery packs, multiple fuses, multiple bidirectional isolated DC / DC power supplies and bidirectional AC / DC power supplies; wherein,

[0010] Each of the battery packs corresponds to one of the bidirectional isolated DC / DC power supplies, and the positive electrode and the negative electrode of each of the battery packs are connected to the corresponding bidirectional isolated DC / DC power supply through one of the fuses respectively;

[0011] The bidirectional isolated DC / DC power supply is an active balancing control circuit, and the bidirectional isolated DC / DC power supply includes a battery pack leakage protection circuit, a main power circuit, a control circuit for the forward peak current and reverse synchronous rectification on the battery pack side, a control circuit for the forward peak current and reverse synchronous rectification on the bidirectional AC / DC power supply side, and a digital isolation and main control chip circuit;

[0012] The bidirectional isolated DC / DC power supply is used to perform additional charging and discharging operations on a target battery group with a large attenuation degree during the charging and discharging process of the battery cluster, so that the target battery operates within a safe voltage range. The control circuit of the forward peak current and the reverse synchronous rectification is used to perform peak current limitation on the primary side and synchronous rectification control on the secondary side during the charging and discharging operation. The output end of each of the bidirectional isolated DC / DC power supplies is connected to the DC end of the bidirectional AC / DC power supply;

[0013] The bidirectional AC / DC power supply is used to realize energy interaction between the target battery pack and the power grid during the additional charging or discharging process of the target battery pack.

[0014] In addition, the active battery equalization system of the embodiment of the present application also has the following additional technical features:

[0015] Optionally, in some embodiments, the digital isolation and main control chip circuit includes a digital isolation chip and a main control chip; the battery pack leakage protection circuit includes: a first MOS tube, a voltage regulator diode, a first resistor, a second resistor, a third resistor and a second MOS tube; wherein,

[0016] The voltage stabilizing diode is connected in parallel with the first resistor, the cathode of the voltage stabilizing diode is connected with the source of the first MOS tube, the anode of the voltage stabilizing diode is connected with the gate of the first MOS tube to prevent gate overvoltage, the drain of the first MOS tube is connected with the first port of the bidirectional isolation DC / DC main power module in the main power circuit, and the source of the first MOS tube is connected in series with the first fuse and connected with the positive electrode of the battery pack;

[0017] The first end of the second resistor is connected to the gate of the first MOS transistor, the second end of the second resistor is connected to the drain of the second MOS transistor, the source of the second MOS transistor is connected to the ground of the battery pack side, and the third resistor is connected in parallel between the gate of the second MOS transistor and the ground of the battery pack side;

[0018] The gate of the second MOS tube is also connected to the digital isolation chip, and the digital isolation chip is also connected to the main control chip.

[0019] Optionally, in some embodiments, the main power circuit includes: the bidirectional isolated DC / DC main power module, a battery pack side current sampling resistor and a bidirectional AC / DC power supply side current sampling resistor; wherein,

[0020] The second port of the bidirectional isolation DC / DC main power module is connected to the first end of the current sampling resistor on the battery pack side, and the second end of the current sampling resistor on the battery pack side is connected to the ground on the battery pack side;

[0021] The third port of the bidirectional isolated DC / DC main power module is connected to the first driving chip in the control circuit of the forward peak current and reverse synchronous rectification on the battery pack side, and the fourth port of the bidirectional isolated DC / DC main power module is connected to the DC side positive bus network of the bidirectional AC / DC power supply;

[0022] The fifth port of the bidirectional isolated DC / DC main power module is connected to the first end of the current sampling resistor on the bidirectional AC / DC power supply side, and the second end of the current sampling resistor on the bidirectional AC / DC power supply side is connected to the ground on the bidirectional AC / DC power supply side;

[0023] The sixth port of the bidirectional isolated DC / DC main power module is connected to the second driving chip in the control circuit of the forward peak current and reverse synchronous rectification on the bidirectional AC / DC power supply side.

[0024] Optionally, in some embodiments, the control circuit of the forward peak current and reverse synchronous rectification on the battery pack side includes: a first comparator, a second comparator, a third MOS tube, a fourth MOS tube, the first driving chip, and a fifth resistor to a sixteenth resistor; wherein the first end of the current sampling resistor on the battery pack side is also connected to the first ends of the sixth resistor and the thirteenth resistor, respectively, and the second end of the current sampling resistor on the battery pack side is also connected to the first ends of the seventh resistor and the twelfth resistor, respectively; the second end of the sixth resistor is connected to the reverse input end of the first comparator, the second end of the seventh resistor is connected to the same-direction input end of the first comparator, the second end of the twelfth resistor is connected to the reverse input end of the second comparator, and the second end of the thirteenth resistor is connected to the same-direction input end of the second comparator; the first end of the eighth resistor is connected to the first reference voltage, and the second end of the eighth resistor is connected to the same-direction input end of the first comparator. The first comparator is connected to the first reference voltage input terminal, the second comparator is connected to the first reference voltage input terminal, the ninth resistor is connected in parallel between the same-direction input terminal and the output terminal of the first comparator, the output terminal of the first comparator is pulled up to the first preset voltage through the tenth resistor, and the output terminal of the first comparator is also respectively connected to the first driver chip, the drain of the fourth MOS tube and the digital isolation chip; the first end of the fourteenth resistor is connected to the first reference voltage, the second end of the fourteenth resistor is connected to the same-direction input terminal of the second comparator, the sixteenth resistor is connected in parallel between the same-direction input terminal and the output terminal of the second comparator, the output terminal of the second comparator is pulled up to the first preset voltage through the eleventh resistor, and the output terminal of the second comparator is also respectively connected to the gate of the fourth MOS tube and the drain of the third MOS tube; the source of the third MOS tube and the fourth MOS tube is connected to the ground on the battery pack side, and the gate of the third MOS tube is connected to the corresponding pin of the digital isolation chip.

[0025] Optionally, in some embodiments, the control circuit of the forward peak current and reverse synchronous rectification on the bidirectional AC / DC power supply side includes: a third comparator, a fourth comparator, a fifth MOS transistor, a sixth MOS transistor, the second driver chip, and the seventeenth to twenty-seventh resistors; wherein, some pins of the second driver chip are connected to the main control chip through the seventeenth resistor; the first end of the current sampling resistor on the bidirectional AC / DC power supply side is also connected to the first end of the twenty-seventh resistor and the twenty-second resistor, respectively, and the second end of the current sampling resistor on the bidirectional AC / DC power supply side is also connected to the first end of the twenty-sixth resistor and the twenty-first resistor, respectively; the second end of the twenty-seventh resistor is connected to the inverting input terminal of the third comparator, the second end of the twenty-sixth resistor is connected to the same-direction input terminal of the third comparator, the second end of the twenty-first resistor is connected to the inverting input terminal of the fourth comparator, and the second end of the twenty-second resistor is connected to the same-direction input terminal of the fourth comparator; the first end of the twenty-fifth resistor is connected to the The second reference voltage is connected to the second comparator, the second end of the twenty-fifth resistor is connected to the non-inverting input end of the third comparator, the twenty-fourth resistor is connected in parallel between the non-inverting input end and the output end of the third comparator, the output end of the third comparator is pulled up to the second preset voltage through the eighteenth resistor, and the output end of the third comparator is also respectively connected to the drain of the fifth MOS tube, the second driving chip and the main control chip; the first end of the twenty-third resistor is connected to the second reference voltage, the second end of the twenty-third resistor is connected to the non-inverting input end of the fourth comparator, the twentieth resistor is connected in parallel between the non-inverting input end and the output end of the fourth comparator, the output end of the fourth comparator is pulled up to the second preset voltage through the nineteenth resistor, and the output end of the fourth comparator is also respectively connected to the gate of the fifth MOS tube and the drain of the sixth MOS tube; the source of the fifth MOS tube and the sixth MOS tube is connected to the ground of the bidirectional AC / DC power supply side, and the gate of the sixth MOS tube is connected to the corresponding pin of the main control chip.

[0026] To achieve the above object, a second embodiment of the present invention provides a battery pack active balancing method, which is applied to the battery pack active balancing system of the first aspect. The method includes:

[0027] Detecting whether the battery cluster is currently in a charging process or a discharging process, and detecting the voltage of each battery group in the battery cluster in real time during the charging and discharging process of the battery cluster;

[0028] During the charging process of the battery cluster, the battery group that reaches the maximum safety voltage of the battery first is used as the target battery group, and the target battery group is discharged by turning on the bidirectional isolated DC / DC power supply corresponding to the target battery group until each battery group reaches a fully charged state;

[0029] During the discharge process of the battery cluster, the battery group that reaches the minimum safety voltage of the battery first is used as the target battery group, and the target battery group is charged by turning on the bidirectional isolated DC / DC power supply corresponding to the target battery group until each battery group is fully discharged;

[0030] In which, during the additional charging or discharging process of the target battery pack, the peak current limitation on the primary side and the synchronous rectification control on the secondary side are performed through the forward peak current and reverse synchronous rectification control circuit in the bidirectional isolated DC / DC power supply.

[0031] In addition, the active balancing method for a battery pack according to an embodiment of the present application also has the following additional technical features:

[0032] Optionally, in some embodiments, discharging the target battery pack by turning on the bidirectional isolated DC / DC power supply corresponding to the target battery pack includes: controlling the bidirectional AC / DC power supply to power on, and controlling the first MOS tube to turn on through a main control chip and a digital isolation chip, so that both the battery pack side and the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC power supply are charged;

[0033] The relevant pins connected to the main control chip and the digital isolation chip are set to a high level, and the relevant pins connected to the main control chip and the sixth MOS tube are set to a low level to perform preparations before starting the wave transmission, and enable the first driver chip and the second driver chip; the main control chip outputs a PWM signal with a preset duty cycle, and based on the PWM signal, the first driver chip, the switching device on the battery pack side in the bidirectional isolated DC / DC main power module, the first comparator and the main control chip are driven in sequence to perform corresponding actions, and the energy of the target battery pack is released on the bidirectional AC / DC power supply side through the bidirectional isolated DC / DC main power module; the operation of outputting the PWM signal is repeatedly performed to perform constant current discharge on the target battery pack, wherein, during the constant current discharge process, the bidirectional AC / DC power supply performs a grid-connected inverter working mode to feed back the electric energy released by the target battery pack to the power grid.

[0034] Optionally, in some embodiments, charging the target battery pack by turning on the bidirectional isolated DC / DC power supply corresponding to the target battery pack includes: controlling the bidirectional AC / DC power supply to power on, and controlling the first MOS tube to turn on through the main control chip and the digital isolation chip, so that both the battery pack side and the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC power supply are powered; setting the relevant pins connected to the main control chip and the digital isolation chip to a low level, and setting the relevant pins connected to the main control chip and the sixth MOS tube to a high level, so as to prepare for starting the wave, and enable the first driver chip and the second driver chip; through the The main control chip outputs a PWM signal with a preset duty cycle, and based on the PWM signal, sequentially drives the second driver chip, the switching device on the bidirectional AC / DC power supply side in the bidirectional isolated DC / DC main power module, the third comparator and the main control chip to perform corresponding actions, and releases energy on the battery pack side through the bidirectional isolated DC / DC main power module to charge the target battery; repeatedly outputs the PWM signal to perform constant current charging on the target battery pack, wherein, during the constant current charging process, the bidirectional AC / DC power supply executes a PWM rectification mode to supply power to the target battery pack through the AC power supply of the power grid.

[0035] Optionally, in some embodiments, controlling the first MOS tube to be turned on by the main control chip and the digital isolation chip includes:

[0036] The main control chip controls the pin of the digital isolation chip connected to the second MOS tube to output a high level signal;

[0037] Based on the high level signal, the second MOS tube is controlled to be turned on to apply the battery pack voltage to the first resistor and the second resistor; the battery pack voltage is divided by the first resistor and the second resistor connected in series, and the first MOS tube is driven to be turned on by the divided signal.

[0038] To achieve the above objectives, a third aspect of the present invention provides a non-temporary computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the battery pack active balancing method as described in any one of the second aspect embodiments described above is implemented.

[0039] The technical solution provided by the embodiments of the present application brings at least the following beneficial effects:

[0040] The present application refines the active balancing scheme to the battery pack level. In view of the difference in charge and discharge capacity between battery packs, additional charge and discharge operations are performed on the battery pack with fast decay during the charge and discharge process of the battery cluster, so that the voltage of the battery pack with fast decay can be always controlled within the safe voltage range, thereby improving the charge and discharge depth of the battery pack with high capacity and the overall energy storage capacity of the battery cluster. Compared with the balancing control method at the battery cell level, the present application greatly reduces the cost, and improves the energy efficiency brought by balancing compared with the balancing method at the PACK level. In addition, the present application adds a peak current and synchronous rectification control circuit in the bidirectional isolated DC / DC power supply, and only needs to use a general control chip to realize various functions such as power wave control, synchronous rectification and fault protection, avoiding the use of a dedicated power control chip, greatly reducing the cost of balancing control. The battery pack voltage range of the single bidirectional isolated DC / DC power supply of the present application is wide, which can be applied to combinations with different numbers of battery cells. The anti-leakage circuit of the additional battery pack can also avoid leakage of the battery pack in the non-working state, avoid discharge damage of the battery pack during transportation and storage, reduce the leakage rate, and improve the applicability of battery pack balancing control and the safety of the battery pack. Therefore, the present application significantly reduces the cost of balanced control and improves the effect of balanced control.

[0041] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0043] Figure 1 A schematic diagram of the structure of a battery pack active balancing system proposed in an embodiment of the present application;

[0044] Figure 2 A schematic diagram of the structure of another battery pack active balancing system proposed in an embodiment of the present application;

[0045] Figure 3 A schematic diagram of an equivalent circuit of a bidirectional isolated DC / DC power supply proposed in an embodiment of the present application;

[0046] Figure 4 A flow chart of a battery pack active balancing method proposed in an embodiment of the present application;

[0047] Figure 5 A flow chart of a method for discharging a target battery pack proposed in an embodiment of the present application;

[0048] Figure 6A schematic diagram of a control waveform during the discharge process of a target battery pack proposed in an embodiment of the present application;

[0049] Figure 7 A flow chart of a charging method for a target battery pack proposed in an embodiment of the present application;

[0050] Figure 8 A schematic diagram of a control waveform during charging of a target battery pack proposed in an embodiment of the present application. DETAILED DESCRIPTION

[0051] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.

[0052] It should be noted that among the current new energy products, the main type of new energy vehicles is electric vehicles, which use motors and electronic control systems to convert electrical energy into kinetic energy to drive the vehicle. For new energy power stations, due to the serious instability of photovoltaic power generation and wind power generation, energy storage facilities need to be built to achieve peak load shifting and valley filling, and reduce the impact of sudden changes in photovoltaic and wind power generation on the power grid when the natural environment fluctuates. Therefore, current energy storage equipment and new energy vehicles need to use electrochemical energy storage to store energy, which has the advantages of high energy density and fast charging and discharging speed.

[0053] Among them, the high battery voltage of the battery cluster is conducive to reducing the current on the wiring, reducing losses and improving efficiency. Taking the energy storage application scenario as an example, hundreds of single-cell batteries are generally connected in series to form a battery cluster, which can achieve a high-voltage battery output of 500V to 1500V to meet the bus voltage requirements of PCS operation. Due to the huge number of battery cells in a battery cluster, the battery cells in the battery cluster are generally divided into several equal parts, and each part is packaged together to form a PACK. Generally, a PACK is divided into several battery groups according to the number of battery cells and the resources of the analog front-end (AFE) chip. Because the charge and discharge capacity of the battery cluster is affected by the battery cells with the most attenuation, the battery with less attenuation cannot be fully charged and discharged, which will reduce the benefits of the energy storage equipment, and for electric vehicles, it will cause the range to decline.

[0054] There are two main technical means to improve the above problems, one is passive balancing technology, and the other is active balancing technology. Passive balancing technology is generally implemented in the AFE chip in the BMU. The MOS tube is integrated in the AFE chip. The drain of the MOS tube is connected to the positive electrode of the battery cell in series with a resistor, and the source of the MOS tube is connected to the negative electrode of the battery cell. The BMU detects the voltage of the battery through the AFE chip to analyze the battery status, and controls the MOS tube switch of the AFE chip through communication to discharge the battery cell through the series resistor. The maximum balancing current of the general passive balancing technology is 200mA, and all the discharged electric energy is consumed by resistor heating, and the energy utilization rate is low. The active balancing technology, on the other hand, is to charge and discharge the battery bidirectionally through a switching power supply to realize the bidirectional flow of energy. Generally, the balancing current is large, and the power efficiency can generally reach more than 80%, which is higher than the passive balancing technology in terms of energy utilization.

[0055] However, as mentioned above, the active balancing solution in the relevant embodiments has the disadvantages of complex control and high balancing cost in the balancing solution between battery cells, and low improvement in battery pack energy efficiency in the balancing solution between PACKs. In addition, a dedicated power control chip is required in the control circuit, which increases the cost of balancing control.

[0056] To this end, the present application proposes a battery pack active balancing system and method, which refines the active balancing scheme to the battery pack level, and adopts the peak current and synchronous rectification control circuit of the bidirectional DC / DC power supply. Only a general control chip is required, and no dedicated power supply control chip is required to achieve balancing control, which greatly reduces costs.

[0057] The following describes a battery pack active balancing system and method according to an embodiment of the present application with reference to the accompanying drawings.

[0058] Figure 1 This is a structural diagram of a battery pack active balancing system proposed in an embodiment of the present application, such as Figure 1 As shown, the system includes: a plurality of battery packs 10 , a plurality of fuses 20 , a plurality of bidirectional isolated DC / DC power supplies 30 , and a bidirectional AC / DC power supply 40 .

[0059] Each battery pack 10 corresponds to a bidirectional isolated DC / DC power supply 20, and the positive and negative electrodes of each battery pack 10 are connected to the corresponding bidirectional isolated DC / DC power supply 30 through a fuse 20. The output end 30 of each bidirectional isolated DC / DC power supply is connected to the DC end of the bidirectional AC / DC power supply 40.

[0060] It should be noted that the multiple battery packs 10 in the present application may be all battery packs in a PACK of a battery cluster, and the number of battery packs is determined according to actual needs, for example, Figure 1In the example, four battery packs are used to form a PACK. In actual applications, there may be other different numbers of combinations, and then the number of fuses and bidirectional isolated DC / DC power supplies is set accordingly. This application does not impose any restrictions on this.

[0061] Specifically, the fuse 20 is used to implement short circuit and overcurrent protection of the battery pack, and the bidirectional isolated DC / DC power supply 30 is used as the active balancing control circuit in this application. In this application, the battery pack with a large attenuation degree that requires active balancing control is used as the target battery pack, and the bidirectional AC / DC power supply 40 is used to realize the energy interaction between the target battery pack and the power grid during the additional charging or discharging process of the target battery pack, for example, to supply power to each target battery pack in the additional charging operation.

[0062] In one embodiment of the present application, the balancing topology of the battery pack active balancing system can be as follows: Figure 1 As shown, each battery pack in a PACK can be actively balanced and controlled. Figure 2 As shown, different PACKs are cascaded to share a bidirectional AC / DC power supply 40, thereby forming a battery cluster, and achieving unified balancing control of the battery groups 10 in different PACKs in the battery cluster.

[0063] As an example, the active balancing control circuit of the present application is as follows: Figure 3 As shown, the circuit can be Figure 1 Any bidirectional isolated DC / DC power supply in the embodiment of the present invention comprises a battery pack leakage protection circuit (PART1), a main power circuit (PART4), a control circuit for forward peak current and reverse synchronous rectification on the battery pack side (PART2), a control circuit for forward peak current and reverse synchronous rectification on the bidirectional AC / DC power supply side (PART4) and a digital isolation main control chip circuit (PART5).

[0064] Specifically, the bidirectional isolated DC / DC power supply is used to perform additional charging and discharging operations on the target battery group with a large attenuation degree during the charging and discharging process of the battery cluster, so that the target battery operates within a safe voltage range. The control circuit of the forward peak current and reverse synchronous rectification is used to limit the peak current on the primary side and control the synchronous rectification on the secondary side during the charging and discharging operation.

[0065] Continue to refer to Figure 3 The active balancing control circuit in the present application is described in detail.

[0066] like Figure 3 As shown, the circuit also includes: a battery pack, which is composed of BAT1~BATn in series. Figure 1One of the multiple battery packs 10 in the battery pack, the number of batteries in the battery pack is not limited, and the maximum number is generally 16 or 18. Fuses F1 and F2 are Figure 1 Two adjacent fuses among the multiple fuses 20.

[0067] In one embodiment of the present application, the digital isolation and main control chip circuit includes a digital isolation chip and a main control chip; the battery pack leakage protection circuit includes: a first MOS tube, a voltage regulator diode, a first resistor, a second resistor, a third resistor, and a second MOS tube. The main power circuit includes: a bidirectional isolated DC / DC main power module, a current sampling resistor on the battery pack side, and a current sampling resistor on the bidirectional AC / DC power supply side. The control circuit of the forward peak current and reverse synchronous rectification on the battery pack side includes: a first comparator, a second comparator, a third MOS tube, a fourth MOS tube, a first driver chip, and the fifth to sixteenth resistors. The control circuit of the forward peak current and reverse synchronous rectification on the bidirectional AC / DC power supply side includes: a third comparator, a fourth comparator, a fifth MOS tube, a sixth MOS tube, a second driver chip, and the seventeenth to twenty-seventh resistors.

[0068] Compare to Figure 3 For the example shown, the battery pack leakage protection circuit, that is, Figure 3 PART1 in the circuit is composed of a power PMOS tube (i.e., the first MOS tube) Q1 and its driving circuit. The driving circuit mainly includes a voltage-stabilizing diode D1, a resistor R1 (i.e., the first resistor, and the corresponding relationship of other resistors is the same, which will not be repeated in the following of this application), a resistor R2, a resistor R3, and a signal NMOS tube (i.e., the second MOS tube) Q2.

[0069] The main power circuit part PART4 includes a bidirectional isolated DC / DC main power module ( Figure 3 In the figure, the bidirectional DC / DC main power circuit is used as the representation), the battery pack side current sampling resistor RC1 and the bidirectional AC / DC power supply side current sampling resistor RC2.

[0070] The digital isolation and main control chip circuit part PART5 includes the digital isolation chip UI1 and the main control chip UC1.

[0071] The forward peak current control and reverse synchronous rectification control circuit PART2 of the main power circuit on the battery pack side includes: a first driving chip UD1, a first comparator U1, a second comparator U2, and resistors R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15 and R16, as well as a signal NMOS tube Q3 (i.e., the third MOS tube) and a signal NMOS tube Q4 (i.e., the fourth MOS tube).

[0072] The forward peak current control and reverse synchronous rectification control circuit PART3 of the main power circuit on the bidirectional AC / DC power supply side includes: a second driver chip UD2, a third comparator U3, a fourth comparator U4, and resistors R17, R18, R19, R20, R21, R22, R23, R24, R25, R26 and R27, as well as a signal NMOS tube Q5 (i.e., the fifth MOS tube) and a signal NMOS tube Q6 (i.e., the sixth MOS tube). The PART2 and PART3 parts of the circuit are circuits with the same functions, which are respectively applied on both sides of the isolated bidirectional power supply to control the on and off of the switch tube in the isolated bidirectional DC / DC main power circuit.

[0073] The connection relationship of the above-mentioned components in the active balancing control circuit of the present application is described below.

[0074] In one embodiment of the present application, for the battery pack leakage protection circuit, a voltage regulator diode and a first resistor are connected in parallel, the cathode of the voltage regulator diode is connected to the source of the first MOS tube, the anode of the voltage regulator diode is connected to the gate of the first MOS tube to prevent gate overvoltage, the drain of the first MOS tube is connected to the first port of the bidirectional isolation DC / DC main power module in the main power circuit, the source of the first MOS tube is connected in series with the first fuse and connected to the positive electrode of the battery pack; the first end of the second resistor is connected to the gate of the first MOS tube, the second end of the second resistor is connected to the drain of the second MOS tube, the source of the second MOS tube is connected to the ground on the battery pack side, and the third resistor is connected in parallel between the gate of the second MOS tube and the ground on the battery pack side; the gate of the second MOS tube is also connected to the digital isolation chip, and the digital isolation chip is also connected to the main control chip.

[0075] For the main power circuit, the second port of the bidirectional isolated DC / DC main power module is connected to the first end of the current sampling resistor on the battery pack side, and the second end of the current sampling resistor on the battery pack side is connected to the ground on the battery pack side; the third port of the bidirectional isolated DC / DC main power module is connected to the first driver chip in the control circuit of the forward peak current and reverse synchronous rectification on the battery pack side, and the fourth port of the bidirectional isolated DC / DC main power module is connected to the DC side positive bus network of the bidirectional AC / DC power supply; the fifth port of the bidirectional isolated DC / DC main power module is connected to the first end of the current sampling resistor on the bidirectional AC / DC power supply side, and the second end of the current sampling resistor on the bidirectional AC / DC power supply side is connected to the ground on the bidirectional AC / DC power supply side; the sixth port of the bidirectional isolated DC / DC main power module is connected to the second driver chip in the control circuit of the forward peak current and reverse synchronous rectification on the bidirectional AC / DC power supply side. For the control circuit of the forward peak current and reverse synchronous rectification on the battery pack side, the first end of the current sampling resistor on the battery pack side is also connected to the first ends of the sixth resistor and the thirteenth resistor respectively, and the second end of the current sampling resistor on the battery pack side is also connected to the first ends of the seventh resistor and the twelfth resistor respectively; the second end of the sixth resistor is connected to the reverse input end of the first comparator, the second end of the seventh resistor is connected to the same-direction input end of the first comparator, the second end of the twelfth resistor is connected to the reverse input end of the second comparator, and the second end of the thirteenth resistor is connected to the same-direction input end of the second comparator; the first end of the eighth resistor is connected to the first reference voltage, the second end of the eighth resistor is connected to the same-direction input end of the first comparator, and the ninth resistor is connected in parallel to the same-direction input end of the first comparator. The first comparator is connected between the first and second comparator terminals and the output terminal, the output terminal of the first comparator is pulled up to the first preset voltage through the tenth resistor, and the output terminal of the first comparator is also respectively connected to the first driving chip, the drain of the fourth MOS tube and the digital isolation chip; the first end of the fourteenth resistor is connected to the first reference voltage, the second end of the fourteenth resistor is connected to the non-inverting input terminal of the second comparator, the sixteenth resistor is connected in parallel between the non-inverting input terminal and the output terminal of the second comparator, the output terminal of the second comparator is pulled up to the first preset voltage through the eleventh resistor, and the output terminal of the second comparator is also respectively connected to the gate of the fourth MOS tube and the drain of the third MOS tube; the source electrodes of the third MOS tube and the fourth MOS tube are connected to the ground on the battery pack side, and the gate electrode of the third MOS tube is connected to the corresponding pin of the digital isolation chip.

[0076] For the control circuit of the forward peak current and reverse synchronous rectification on the bidirectional AC / DC power supply side, some pins of the second driving chip are connected to the main control chip through the seventeenth resistor; the first end of the current sampling resistor on the bidirectional AC / DC power supply side is also connected to the first ends of the twenty-seventh resistor and the twenty-second resistor respectively, and the second end of the current sampling resistor on the bidirectional AC / DC power supply side is also connected to the first ends of the twenty-sixth resistor and the twenty-first resistor respectively; the second end of the twenty-seventh resistor is connected to the reverse input end of the third comparator, the second end of the twenty-sixth resistor is connected to the same-direction input end of the third comparator, the second end of the twenty-first resistor is connected to the reverse input end of the fourth comparator, and the second end of the twenty-second resistor is connected to the same-direction input end of the fourth comparator; the first end of the twenty-fifth resistor is connected to The second reference voltage is connected, the second end of the twenty-fifth resistor is connected to the non-inverting input end of the third comparator, the twenty-fourth resistor is connected in parallel between the non-inverting input end and the output end of the third comparator, the output end of the third comparator is pulled up to the second preset voltage through the eighteenth resistor, and the output end of the third comparator is also respectively connected to the drain of the fifth MOS tube, the second driving chip and the main control chip; the first end of the twenty-third resistor is connected to the second reference voltage, the second end of the twenty-third resistor is connected to the non-inverting input end of the fourth comparator, the twentieth resistor is connected in parallel between the non-inverting input end and the output end of the fourth comparator, the output end of the fourth comparator is pulled up to the second preset voltage through the nineteenth resistor, and the output end of the fourth comparator is also respectively connected to the gate of the fifth MOS tube and the drain of the sixth MOS tube;

[0077] The source electrodes of the fifth MOS tube and the sixth MOS tube are connected to the ground of the bidirectional AC / DC power supply side, and the gate electrode of the sixth MOS tube is connected to the corresponding pin of the main control chip.

[0078] Specifically, compared with Figure 3 In the example shown, the connection relationship of each component in this embodiment is described in detail from the battery pack side and the DC power supply side.

[0079] On the battery pack side, battery cells BAT1 to BATn are connected in series to form a battery pack. One end of the fuse F1 is connected to the positive electrode of the battery pack, and the other end of the fuse F1 is connected to the source of the PMOS tube Q1 in the battery pack anti-leakage circuit PART1. The drain of the PMOS tube Q1 is connected to the VS+ port (i.e., the first port) of the bidirectional isolation DC / DC main power module of the PART4 part. In this embodiment, the connection point network is named VBAT+ (i.e., the battery pack voltage). One end of the fuse F2 is connected to the negative electrode of the battery pack, and the other end is connected to one end of the battery pack side current sampling resistor RC1 of the PART4 part. In this embodiment, the connection point network is named ISO_GND, which is the ground on the battery pack side.

[0080] In the battery pack anti-leakage circuit PART1, the voltage zener diode D1 and the resistor R1 are connected in parallel, and the cathode of the voltage zener diode is connected to the source of the PMOS tube Q1, and the anode of the voltage zener diode is connected to the gate of the PMOS tube Q1 to prevent gate overvoltage. One end of the resistor R2 is connected to the gate of the PMOS tube Q1, and the other end of the resistor R2 is connected to the drain of the signal NMOS tube Q2. The source of the signal NMOS tube Q2 is connected to the battery pack side ground, that is, ISO_GND. The resistor R3 is connected in parallel between the gate of the signal NMOS tube Q2 and the battery pack side ground ISO_GND. The gate of the signal NMOS tube Q2 is connected to the OUT4 pin of the digital isolation chip UI1 in the digital isolation and main control chip circuit PART5, and the IN4 pin of the digital isolation chip UI1 is connected to the GPIO9 of the main control chip UC1.

[0081] In the main power circuit part PART4, the VS+ port (i.e., the first port) of the bidirectional isolated DC / DC main power module is connected to the drain of the PMOS tube Q1, the VS- port (i.e., the second port) of the bidirectional isolated DC / DC module is connected to one end of the current sampling resistor RC1, and the other end of RC1 is connected to the battery pack side ground network ISO_GND, and the DRV-S port (i.e., the third port) of the bidirectional isolated DC / DC module is connected to the OUTA and OUTB pins of the driver chip UD1.

[0082] In this embodiment, the two-end network of the sampling resistor RC1 is named IS+ and IS- respectively, IS+ is connected to R6 and R13 in PART2, and IS- is connected to R7 and R12 in PART2. The other end of R6 is connected to the inverting input of the comparator U1, the other end of R7 is connected to the same-direction input of the comparator U1, one end of R8 is connected to the reference voltage ISO_REF_3V (i.e., the first reference voltage), the other end of R8 is connected to the same-direction input of the comparator U1, R9 is connected in parallel to the same-direction input and output of the comparator U1, the output of U1 is pulled up to ISO_5V (i.e., the first preset voltage) through the resistor R10, and the output of U1 is connected to the ENA and ENB pins of the driver chip UD1, the IN5 pin of the digital isolation chip UI1, and the drain of the signal NMOS tube Q4, and the OUT5 pin of the digital isolation chip UI1 is connected to the GPIO4 of the main control chip UC1. The other end of R12 is connected to the inverting input of comparator U2, the other end of R13 is connected to the non-inverting input of comparator U2, one end of R14 is connected to the reference voltage ISO_REF_3V, the other end of R14 is connected to the non-inverting input of comparator U2, resistor R16 is connected in parallel between the non-inverting input and output of comparator U2, the output of comparator U2 is pulled up to ISO_5V through resistor R11, the output of U2 is connected to the gate of signal NMOS tube Q4 and the drain of signal NMOS tube Q3, the source of signal NMOS tubes Q4 and Q3 are connected to the battery pack side ground ISO_GND, the gate of signal NMOS tube Q3 is connected to the OUT3 pin of digital isolation chip UI1, and the IN3 pin of UI1 is connected to the GPIO3 pin of main control chip UC1. On the bidirectional AC / DC power supply side, the VP+ port (i.e., the fourth port) of the bidirectional isolated DC / DC main power module is connected to the DC side positive bus network of the bidirectional AC / DC power supply, the network name is VBUS, the VP- port (i.e., the fifth port) of the bidirectional isolated DC / DC main power module is connected to one end of the current sampling resistor RC2 on the bidirectional AC / DC power supply side, the other end of RC2 is connected to the ground network GND on the bidirectional AC / DC power supply side, and the DRV-P port (i.e., the sixth port) of the bidirectional isolated DC / DC main power module is connected to the OUTA and OUTB pins of the driver chip UD2. The INA and INB pins of the driver chip UD2 are connected to the GPIO5 of the main control chip UC1, and the ENA and ENB pins of the driver chip UD2 are connected to the GPIO6 of the main control chip UC1 through the series resistor R17.

[0083] In this embodiment, the two ends of the current sampling resistor RC2 on the bidirectional AC / DC power supply side are named IP+ and IP-, IP+ is connected to R22 and R27, IP- is connected to R21 and R26, the other end of R27 is connected to the inverting input end of the comparator U3, the other end of R26 is connected to the non-inverting input end of the comparator U3, one end of the resistor R25 is connected to the non-inverting input end of the comparator U3, and the other end is connected to the voltage reference REF_3V (i.e., the second reference voltage), the resistor R24 ​​is connected in parallel between the non-inverting input end and the output end of the comparator U3, the output end of the comparator U3 is pulled up to a 3.3V power supply (i.e., the second preset voltage) through a resistor R18, and the output end of the comparator U3 is simultaneously connected to the drain of the signal NMOS tube Q5, the GPIO7 of the main control chip UC1, and the ENA and ENB pins of the driver chip UD2. The other end of resistor R21 is connected to the inverting input of comparator U4, the other end of resistor R22 is connected to the non-inverting input of comparator U4, one end of R23 is connected to the non-inverting input of comparator U4, the other end of R23 is connected to the voltage reference REF_3V, resistor R20 is connected in parallel between the non-inverting input of comparator U4 and the output of U4, the output of comparator U4 is pulled up to the 3.3V power supply through resistor R19, the output of comparator U4 is connected to the gate of signal NMOS tube Q5, the output of comparator U4 is connected to the drain of signal NMOS tube Q6, the sources of Q5 and Q6 are connected to GND, and the gate of Q6 is connected to the GPIO8 pin of the main control chip UC1.

[0084] Therefore, the battery pack active balancing system of the present application sets up an independent bidirectional DC / DC isolated power supply for each battery pack in a PACK. In practical applications, due to the individual differences of battery cells, the battery packs also have individual differences, and the capacity of some battery packs decays quickly, while the capacity of some battery packs decays slowly. During the charging and discharging process of the battery cluster, the present application can determine the attenuation degree of each battery pack by detecting the voltage of each battery pack, and perform additional charging and discharging operations on the target battery pack with a large attenuation degree according to the actual situation, so as to realize active balancing control of each battery pack.

[0085] In summary, the active balancing system for battery packs in the embodiment of the present application refines the active balancing scheme to the battery pack level, and performs additional charging and discharging operations on the battery packs with fast decay during the charging and discharging process of the battery cluster in view of the difference in charging and discharging capacity between the battery packs. The voltage of the battery packs with fast decay can be always controlled within the safe voltage range, thereby improving the charging and discharging depth of the high-capacity battery packs and the overall energy storage capacity of the battery cluster. Compared with the balancing control method at the battery cell level, the system greatly reduces the cost, and improves the energy efficiency brought by balancing compared to the PACK-level balancing method. In addition, the system adds peak current and synchronous rectification control circuits in the bidirectional isolated DC / DC power supply, and only needs to use a general control chip to realize various functions of the power supply such as wave control, synchronous rectification and fault protection, avoiding the use of a dedicated power control chip, and greatly reducing the cost of balancing control. The battery pack voltage range of the single bidirectional isolated DC / DC power supply of the system is wide, which can be applied to combinations with different numbers of battery cells. The additional anti-leakage circuit of the battery pack can prevent leakage of the battery pack in a non-working state, prevent discharge damage of the battery pack during transportation and storage, reduce leakage speed, and improve the applicability and safety of battery pack balancing control. As a result, the system significantly reduces the cost of balancing control and improves the effect of balancing control.

[0086] In order to more clearly illustrate the specific implementation process of actively balancing the battery packs in the battery cluster through the active balancing of the battery pack, a battery pack active balancing method proposed in the embodiment of the present application is described in detail below. The method is applied to the battery pack active balancing system in the above embodiment, that is, the active balancing method of the present embodiment is implemented by performing relevant control on the battery pack active balancing system in the above embodiment. The various components involved in the method are as described in the above embodiment and will not be repeated here. The executor of the active balancing method in the embodiment of the present application can be the MCU chip in the active balancing system in the above embodiment.

[0087] Figure 4 This is a flow chart of a battery pack active balancing method proposed in an embodiment of the present application, such as Figure 4 As shown, the method comprises the following steps:

[0088] Step S101: Detect whether the battery cluster is currently in a charging process or a discharging process, and detect the voltage of each battery group in the battery cluster in real time during the charging and discharging process of the battery cluster.

[0089] Specifically, during the charge and discharge process of the battery cluster, the battery pack with a large attenuation has a small charge and discharge capacity, and thus its voltage changes faster than that of a normal battery pack with a small attenuation. Therefore, the present application detects the voltage of each battery pack in the battery cluster in real time when the battery cluster is charging and discharging, so as to facilitate the subsequent determination of the target battery that requires additional charge and discharge operations.

[0090] As a possible implementation method, it is possible to determine whether the battery cluster currently needs to perform a charging operation or a discharging operation by reading the control instructions currently received by the battery cluster, and during the charging and discharging process of the battery cluster, the voltage of each battery group in the battery cluster is detected in real time through a preset voltage detection device.

[0091] It should be noted that, as described in the above-mentioned embodiment of the battery pack active balancing system, the bidirectional isolated DC / DC power supply of the battery pack of the present application is isolated and independent and can work independently, so during the charging and discharging process of the entire battery cluster, each bidirectional isolated DC / DC power supply can charge and discharge its corresponding battery pack at the same time, so the charging and discharging control process of the present application needs to be controlled accordingly according to the voltage conditions of each battery pack. Figure 2 In the battery cluster shown, the isolated bidirectional DC / DC power supplies corresponding to each battery group in the multiple PACKs can independently charge and discharge the isolated corresponding battery group.

[0092] Step S102: During the charging process of the battery cluster, the battery pack that reaches the maximum safety voltage of the battery first is used as the target battery pack, and the target battery pack is discharged by turning on the bidirectional isolated DC / DC power supply corresponding to the target battery pack until each battery pack reaches a fully charged state.

[0093] Specifically, during the process of determining whether a battery cluster is to be charged, due to differences between battery groups, the capacity of a certain battery group decays quickly. In this case, the voltage of this battery group will reach the maximum safe voltage of the battery first during charging. If charging continues at this time, the battery group will overcharge and fail, resulting in serious consequences. Therefore, during the charging process of the battery cluster, the present application turns on the bidirectional isolated DC / DC power supply corresponding to the battery group with the fastest decay according to the decay degree of each battery group, and discharges the battery group. The electric energy released by the battery group can be fed back to the power grid through the bidirectional AC / DC power supply. Since the voltage of the battery group with the fastest decay is reduced by the discharge of the bidirectional isolated DC / DC power supply, the entire battery cluster can continue to be charged. Therefore, through balanced control, each battery group can be fully charged, thereby improving the charging capacity of the entire battery cluster.

[0094] Among them, the battery group that first reaches the maximum safe voltage of the battery is used as the target battery group to be discharged. The number of target battery groups is determined according to the actual attenuation of each battery group in the battery cluster. It can be one or more, and this application does not impose any restrictions on this.

[0095] In order to more clearly explain the process of discharging the determined target battery pack by turning on the bidirectional isolated DC / DC power supply corresponding to the target battery pack, the following reference is made to Figure 3A specific discharge method proposed in an embodiment of the present application is used for exemplary description. Figure 5 This is a flow chart of a method for discharging a target battery pack proposed in an embodiment of the present application, such as Figure 5 As shown, the method comprises the following steps:

[0096] Step S501, control the bidirectional AC / DC power supply to power on, and control the first MOS tube to turn on through the main control chip and the digital isolation chip, so that both the battery side and the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC power supply are powered.

[0097] Specifically, Figure 3 As shown, the main power part of the bidirectional isolated DC / DC power supply of the embodiment of the present application can adopt topological structures such as bidirectional forward and bidirectional flyback, and the present application does not limit this. When it is necessary to turn on the isolated bidirectional DC / DC power supply to control the discharge of the target battery pack, it is first necessary to ensure that the bidirectional AC / DC power supply is powered on. If the power supply is not powered on, the isolated bidirectional DC / DC power supply cannot be turned on, and the bidirectional AC / DC power supply is controlled to be powered on first; if the bidirectional AC / DC power supply is powered on, the isolated bidirectional DC / DC power supply can be turned on.

[0098] Furthermore, when the bidirectional AC / DC power supply is powered on, the main control chip UC1 performs subsequent operations by controlling the first MOS tube to be turned on so that both the battery side and the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC power supply are powered.

[0099] As a possible implementation method, the first MOS tube is controlled to be turned on through the main control chip and the digital isolation chip, including: controlling the pin of the digital isolation chip connected to the second MOS tube to output a high-level signal through the main control chip; controlling the second MOS tube to be turned on based on the high-level signal to apply the battery pack voltage to the first resistor and the second resistor; dividing the battery pack voltage through the first resistor and the second resistor connected in series, and driving the first MOS tube to be turned on through the divided signal.

[0100] Specifically, refer to Figure 3In the example shown, the main control chip UC1 sets the GPIO9 pin to a high level, so that the OUT4 pin of the digital isolation chip UI1 outputs a high level. The high-level signal is added to the gate of the signal NMOS tube Q2, which will turn on the signal NMOS tube Q2. After the signal NMOS tube Q2 is turned on, its drain and source are equivalent to a short circuit, and the drain voltage is 0V. Then, the resistors R1 and R2 are connected in series to divide the voltage of the battery pack. The divided signal is used to drive the PMOS tube Q1 to turn on, and the voltage regulator diode D1 is used to prevent overvoltage between the gate and source of the PMOS tube Q1. Therefore, in this application, once the GPIO9 signal of the main control chip UC1 is set to a high level, the PMOS tube Q1 will be turned on to make VBAT+ equal to the potential of the battery pack. At this time, the primary and secondary sides of the bidirectional isolated power supply are both charged. Step S502, setting the relevant pins connecting the main control chip and the digital isolation chip to a high level, and setting the relevant pins connecting the main control chip and the sixth MOS tube to a low level, to prepare for starting the wave, and enable the first driver chip and the second driver chip.

[0101] Specifically, after the battery pack side and the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC power supply are powered, the GPIO3 of the main control chip UC1 is set to a high level, and the GPIO8 pin of the main control chip UC1 is set to a low level. After the two pin levels are set, the preparation work before starting the wave is completed.

[0102] Among them, in this state, the GPIO3 of the main control chip UC1 is isolated and transmitted to the battery pack side through the IN3 pin of the digital isolation chip UI1, and the OUT3 level of the digital isolation chip UI15 is still high. This signal turns on the signal NMOS tube Q3, and the output pin of the comparator U2 is pulled low. The output of the comparator U2 is no longer related to its input signal state. Since the output signal state of the comparator U2 is low, the signal NMOS tube Q4 is turned off, and the ENA and ENB pin states of the first driver chip UD1 are controlled by the GPIO2 of the main control chip UC1. When GPIO2 outputs a high level, the first driver chip UD1 is enabled, and when GPIO2 outputs a low level, the first driver chip UD1 is disabled.

[0103] The GPIO8 pin of the main control chip UC1 outputs a low level, and the signal NMOS tube Q6 is turned off. At this time, the output level of the comparator U4 is affected by the pull-up resistor R19 to a high level, the signal NMOS tube Q5 is turned on, the ENA and ENB pins of the second driver chip UD2 are low levels, and the drive signal is not enabled. According to the state of the signal chain, the state of the ENA and ENB pins of the second driver chip UD2 will be affected by the GPIO6 state of the main control chip UC1 and the output state of the comparator U4.

[0104] Furthermore, before officially starting the wave control, the main control chip UC1 needs to set the GPIO2 and GPIO6 pins to high level to enable the driver chips UD1 and UD2. At this time, the ENA and ENB states of UD1 are only enabled by GPIO2, and the ENA and ENB states of UD2 are only controlled by the state of the comparator U4.

[0105] Step S503, output a PWM signal with a preset duty cycle through the main control chip, and based on the PWM signal, sequentially drive the first driver chip, the switching device on the battery pack side in the bidirectional isolated DC / DC main power module, the first comparator and the main control chip to perform corresponding actions, and release the energy of the target battery pack through the bidirectional isolated DC / DC main power module on the bidirectional AC / DC power supply side.

[0106] Specifically, the main control chip UC1 outputs a complementary PWM signal with a 50% duty cycle and a dead zone, which can be output through GPIO1 and GPIO5. Since ENA and ENB of the first driver chip UD1 have been set to high level and enabled, the PWM signal of GPIO1 will cause OUTA and OUTB of the first driver chip UD1 to output high level when it is high, and then drive the switch device on the battery pack side of the bidirectional isolated DC / DC main power module to turn on, so that the current rises linearly.

[0107] Furthermore, when the current rises to the comparison value set by the comparator U1, the comparator U1 outputs a low level, ENA and ENB of the first driver chip UD1 are pulled low, OUT1 and OUT2 of the first driver chip UD1 output a low level, and the switch device on the battery pack side of the bidirectional isolated DC / DC main power module is turned off. At this time, the output signal of the comparator U1 is also transmitted to the GPIO4 pin of the main control chip UC1 through the IN5 channel of the digital isolation chip UI1. After the main control chip UC1 receives the low-level signal of GPIO4, it pulls the GPIO1 pin low and turns off the drive signal of this cycle. After the GPIO1 pin signal is set low, the energy stored in the bidirectional isolated DC / DC main power module is released on the bidirectional AC / DC power supply side.

[0108] At the same time, after the GPIO1 pin is set low, after the dead time Td, the main control chip UC1 sets GPIO5 to a high level. At the same time, because the comparator U4 outputs a low level, the ENA and ENB pins of the second driver chip UD2 are pulled high and enabled by the GPIO6 pin, thereby turning on the switch device of the bidirectional isolated DC / DC main power module on the bidirectional AC / DC power supply side.

[0109] Furthermore, when the current on the switching device of the bidirectional isolated DC / DC main power module on the bidirectional AC / DC power supply side is reduced to close to 0A, the comparator U4 outputs a high level, the signal NMOS tube Q5 is turned on, and the ENA and ENB pin signals of the second driver chip UD2 are pulled low. After the drive signal is not enabled, the switching device of the bidirectional isolated DC / DC main power module on the bidirectional AC / DC power supply side is turned off.

[0110] Step S504, repeatedly executing the operation of outputting PWM signals to perform constant current discharge on the target battery pack, wherein during the constant current discharge process, the bidirectional AC / DC power supply executes a grid-connected inverter working mode to feed back the electric energy released by the target battery pack to the grid.

[0111] Specifically, the operation of outputting the PWM signal in step S503 is repeated, that is, the main control chip UC1 repeats the PWM signal generation in step S503, so as to achieve constant current discharge of the battery pack. Figure 1 The bidirectional AC / DC power supply in the battery pack realizes the grid-connected inverter working mode and feeds the energy discharged by the battery pack back to the grid. Therefore, through the additional discharge method of the target battery pack, the control logic waveform of the battery pack discharge process control circuit is as follows: Figure 6 As shown, the process corresponds to the description in the above-mentioned discharge method.

[0112] Step S103: During the discharge process of the battery cluster, the battery pack that reaches the minimum safety voltage first is used as the target battery pack, and the target battery pack is charged by turning on the bidirectional isolated DC / DC power supply corresponding to the target battery pack until each battery pack is fully discharged.

[0113] Specifically, during the discharge of the battery cluster, due to the differences between the battery groups, the capacity of a certain battery group decays quickly. In this case, during discharge, the voltage of the battery group will first reach the minimum battery voltage allowed by the battery. If the battery group continues to discharge, it will cause the battery group to over-discharge and fail. Therefore, during the discharge of the battery cluster, the present application turns on the isolated bidirectional DC / DC power supply corresponding to the battery group with the fastest decay according to the decay of each battery group, charges the battery group, and increases the voltage of the battery group. This process requires a bidirectional AC / DC power supply to provide DC power to the bidirectional isolated DC / DC power supply, and the bidirectional DC / DC power supply charges the energy into the battery group. By charging the battery group with the fastest decay, the voltage of the battery group is increased, allowing other battery groups with smaller decay to continue to discharge, release more energy, and increase the discharge depth of the entire battery cluster.

[0114] Among them, this step will first use the battery group that reaches the minimum safe voltage allowed by the battery as the target battery group to be charged. The number of target battery groups in this step is also determined according to the actual attenuation of each battery group in the battery cluster, and can be one or more. This application does not impose any restrictions on this.

[0115] In order to more clearly explain the process of charging the determined target battery pack by turning on the bidirectional isolated DC / DC power supply corresponding to the target battery pack, the following continues to refer to Figure 3 A specific charging method proposed in an embodiment of the present application is used for exemplary description. Figure 7 This is a flow chart of a charging method for a target battery pack proposed in an embodiment of the present application, such as Figure 7 As shown, the method comprises the following steps:

[0116] Step S701, control the bidirectional AC / DC power supply to power on, and control the first MOS tube to turn on through the main control chip and the digital isolation chip, so that both the battery side and the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC power supply are powered.

[0117] Specifically, when the isolated bidirectional DC / DC power supply needs to be turned on to charge the target battery pack, it is also necessary to ensure that the bidirectional AC / DC power supply is powered on. If the power supply is not powered on, the isolated bidirectional DC / DC power supply cannot be turned on, and the bidirectional AC / DC power supply is controlled to be powered on first; if the bidirectional AC / DC power supply is powered on, the isolated bidirectional DC / DC power supply can be turned on.

[0118] Further, when the bidirectional AC / DC power supply is powered on, the main control chip UC1 performs subsequent operations to control the first MOS tube to be turned on, so that both the battery side and the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC power supply are powered. The implementation method of controlling the first MOS tube to be turned on by the main control chip UC1 and the digital isolation chip UI1 is the same as the implementation method in step S501 of the above embodiment.

[0119] Specifically, the main control chip UC1 sets its GPIO9 pin to a high level, and outputs a high level through the digital isolation chip UI1. The high level signal is added to the gate of the signal NMOS tube Q2, which turns on the signal NMOS tube Q2. After the signal NMOS tube Q2 is turned on, the drain and source are short-circuited, and the drain voltage is 0 V. The resistors R1 and R2 are connected in series to divide the voltage of the battery pack. The divided signal is used to drive the PMOS tube Q1 to turn on, and the voltage regulator diode D1 is used to prevent overvoltage between the gate and source of the PMOS tube Q1.

[0120] Therefore, in this application, once the GPIO9 signal of the main control chip UC1 is set to a high level, the PMOS tube Q1 will be turned on, and VBAT+ will be at the same potential as the battery pack.

[0121] Step S702, setting the relevant pins connecting the main control chip and the digital isolation chip to a low level, and setting the relevant pins connecting the main control chip and the sixth MOS tube to a high level, to prepare for starting the wave, and enable the first driver chip and the second driver chip.

[0122] Specifically, after the battery pack side and the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC power supply are powered, the GPIO8 of the main control chip UC1 is set to a high level, and the GPIO3 pin of the main control chip UC1 is set to a low level. After the two pin levels are set, the preparation work before starting the wave is completed.

[0123] In this state, the low level state of GPIO3 of the main control chip UC1 is isolated and transmitted to the OUT3 pin of the battery pack side UI1 through the IN3 pin of the digital isolation chip UI1. The OUT3 level of the digital isolation chip UI1 is still low. This signal turns off the signal NMOS tube Q3, the output pin of the comparator U2 is pulled up to the 5V level, the signal NMOS tube Q4 is turned on, the ENA and ENB signals of the first driver chip UD1 are pulled low, and the ENA and ENB states of UD1 are controlled by the output state of the comparator U2 and the GPIO2 of the main control chip UC1. The GPIO8 pin of the main control chip UC1 outputs a high level, the signal NMOS tube Q6 is turned on, at this time the output of the comparator U4 is pulled low, the signal NMOS tube Q5 is turned off, and the ENA and ENB pins of the second driver chip UD2 are controlled by the output of the comparator U3 and the GPIO6 of the main control chip UC1.

[0124] Furthermore, before officially starting the wave control, the main control chip UC1 needs to set the GPIO 2 and GPIO6 pins to high level to enable the first driver chips UD1 and UD2. At this time, the ENA and ENB states of the driver chip UD1 are only controlled by the comparator U2, and the ENA and ENB states of the driver chip UD2 are only controlled by GPIO6.

[0125] Step S703, a PWM signal with a preset duty cycle is outputted through the main control chip, and based on the PWM signal, the second driving chip, the switching device on the bidirectional AC / DC power supply side in the bidirectional isolated DC / DC main power module, the third comparator and the main control chip are driven in sequence to perform corresponding actions, and energy is released on the battery pack side through the bidirectional isolated DC / DC main power module to charge the target battery.

[0126] Specifically, wave control is performed, that is, the main control chip UC1 outputs a complementary PWM signal with a 50% duty cycle with a dead zone, which can be output through GPIO5 and GPIO1. Since ENA and ENB of the second driver chip UD2 have been set to a high level to enable, the PWM signal of GPIO5 will cause OUTA and OUTB of the second driver chip UD2 to output a high level when it is at a high level, driving the power switch on the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC main power module to turn on, and the current rises linearly. When the current rises to the comparison value set by the comparator U3, the comparator U3 outputs a low level, ENA and ENB of the second driver chip UD2 are pulled low, and the power switch on the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC main power module is turned off. At this time, the output signal of the comparator U3 is also transmitted to the GPIO7 pin of the main control chip UC1. After receiving the low-level signal of GPIO7, the main control chip UC1 pulls the GPIO5 pin low to turn off the drive signal of this cycle.

[0127] After the GPIO5 pin signal is set low, the bidirectional isolated DC / DC main power module releases energy on the battery pack side. At the same time, after the GPIO5 pin signal is set low, after the dead time Td, the main control chip UC1 sets GPIO1 to a high level, and the comparator U2 outputs a low level after the bidirectional isolated DC / DC main power module releases energy on the battery pack side, the signal NMOS tube Q4 is turned off, the ENA and ENB pins of the first driver chip UD1 are pulled high to enable, and the OUTA and OUTB pins of the first driver chip UD1 output a high level to drive the battery pack side power switch of the bidirectional isolated DC / DC main power module to turn on.

[0128] Furthermore, when the current on the battery pack side is reduced to close to 0A, the comparator U2 outputs a high level, the signal NMOS tube Q4 is turned on, and the ENA and ENB pin signals of the first driver chip UD1 are pulled low. After the drive signal is disabled, the power switch of the bidirectional isolated DC / DC main power module on the battery pack side is turned off.

[0129] Step S704, repeatedly executing the operation of outputting PWM signals to perform constant current charging on the target battery pack, wherein during the constant current charging process, the bidirectional AC / DC power supply executes a PWM rectification mode to supply power to the target battery pack through the AC power supply of the power grid.

[0130] Specifically, the operation of outputting the PWM signal in step S703 is repeated, that is, the main control chip UC1 repeats the PWM signal generation in step S703, so as to realize constant current charging of the battery pack. Figure 1The bidirectional AC / DC power supply in the battery pack realizes the PWM rectification mode, and the AC power of the power grid is used as the power supply to charge the target battery pack. Therefore, through the above-mentioned additional charging method of the target battery pack, the control logic waveform of the main control chip UC1 during the battery pack charging process is as follows: Figure 8 As shown, the process corresponds to the description in the above charging method.

[0131] It should be noted that during the additional charging or discharging process of the target battery pack in step S102 and step S103, the peak current limiting on the primary side and the synchronous rectification control on the secondary side are performed by the forward peak current and reverse synchronous rectification control circuit in the bidirectional isolated DC / DC power supply.

[0132] In summary, the active balancing method for battery packs implemented in this application can control the voltage of fast-decaying battery packs within a safe voltage range by additionally charging or discharging the fast-decaying battery packs during the charging and discharging process of the battery cluster, thereby improving the charging and discharging capacity of the entire battery pack. In practical applications, it can increase the range of electric vehicles and increase the storage capacity of electric energy for energy storage products, thereby increasing revenue. As a result, this method significantly reduces the cost of balancing control and improves the effect of balancing control.

[0133] Based on the above embodiments, in order to more clearly describe the specific implementation process of the active balancing control method performed by the present application based on the battery pack active balancing system, a specific embodiment in actual application is described below.

[0134] In this embodiment, the selection of each component in the battery pack active balancing system is first realized. Among them, the specific implementation of each device is as follows: the battery pack is 13 lithium batteries connected in series, the full charge voltage is 46.8V, the full discharge control voltage is 32.5V, F1 and F2 are 5A fuses, D1 is a 15V voltage regulator diode, R1 is a 10k resistor, PMOS tube Q1 is a -100V / 30A MOS tube, resistor R2 is 10k, signal NMOS tube Q2 is a 100V / 0.17A MOS, resistor R3 is a 10k resistor, resistors RC1 and RC2 are 10mΩ / 2W resistors, and driver chips UD1 and UD2 are TI's UCC27524DR chips. Digital isolation chip UI1 is CA-IS3741LW. Resistors R5 and R17 are 1k, resistors R6 and R27 are 100Ω, resistors R7 and R26 are 100Ω, resistors R8 and R25 are 2k, resistors R9 and R24 are 200k resistors, resistors R10 and R18 are 20k, resistors R11 and R19 are 1k resistors, resistors R12 and R21 are 100Ω resistors, R13 and R22 are 33Ω resistors, resistors R14 and R23 are 2k resistors, and resistors R16 and R20 are 200k resistors. Signal NMOS tubes Q3, Q4, Q5, and Q6 are 100V / 0.17A MOS, and the main control chip UC1 is TI's F28035. The bidirectional AC / DC power supply is a 220V ac input and 48Vdc output power supply. The isolated bidirectional DC / DC main power module takes the bidirectional flyback topology as an example. It should be noted that the models of the above devices are not fixed settings and can be adjusted according to actual scenarios. This application does not impose any restrictions on this.

[0135] In combination with the above selected battery pack active balancing system, the processes of performing additional discharge control and charge control on the target battery pack are described in detail below.

[0136] For the target battery pack discharge control: When the bidirectional isolated DC / DC power supply needs to be turned on to discharge the battery pack, it should be during the charging process of the entire battery pack. First, it is necessary to ensure that the bidirectional AC / DC power supply has been powered on and outputs 48V power VBUS. If the power supply is not powered on, the isolated bidirectional DC / DC power supply cannot be turned on; if the bidirectional AC / DC power supply has been powered on and outputs 48V VBUS, the isolated bidirectional DC / DC power supply can be turned on.

[0137] When the bidirectional AC / DC power supply is powered on, the main control chip UC1 operates according to the following steps:

[0138] In the first step, the main control chip UC1 sets the GPIO9 pin to a high level, and the digital isolation chip UI1 outputs a high level. The signal is added to the gate of the signal NMOS tube Q2, which will turn on the signal NMOS tube Q2. After the signal NMOS tube Q2 is turned on, its drain and source are equivalent to a short circuit, and the drain voltage is 0V. The resistors R1 and R2 are connected in series to divide the voltage of the battery pack. The divided signal is used to drive the PMOS tube Q1 to turn on, and the voltage regulator diode D1 is used to prevent overvoltage between the gate and source of the PMOS tube Q1. Therefore, once the GPIO1 signal of the main control chip UC1 is set to a high level, the PMOS tube Q1 will be turned on, and VBAT+ will be at the same potential as the battery pack. At this time, the primary and secondary sides of the isolated bidirectional DC / DC power supply are both energized.

[0139] In the second step, after the battery side and the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC power supply are powered, set the GPIO3 of the main control chip UC1 to a high level and the GPIO8 pin of the main control chip UC1 to a low level. After the two pin levels are set, the preparations before starting the wave are completed. At this time, the GPIO3 of the main control chip UC1 is isolated and transmitted to the battery pack side through the IN3 pin of the digital isolation chip UI1. The OUT3 level of the digital isolation chip UI1 is 5V. This signal turns on the signal NMOS tube Q3, and the output pin of the comparator U2 is pulled low by Q3. The output of the comparator U2 is no longer related to its input signal state. Since the output signal state of the comparator U2 is low, the signal NMOS tube Q4 is turned off, and the ENA and ENB pin states of the driver chip UD1 are controlled by the GPIO2 of the main control chip UC1. When GPIO2 outputs a high level, the ENA and ENB pin voltages of the driver chip UD1 are 5V and are enabled. When GPIO2 outputs a low level, the ENA and ENB pin voltages of the driver chip UD1 are 0V and are not enabled. The GPIO8 pin of the main control chip UC1 outputs a low level, and the signal NMOS tube Q6 is turned off. At this time, the output of the comparator U4 is pulled up to a high level by the resistor R19, and the signal NMOS tube Q5 is turned on. The ENA and ENB pins of the driver chip UD2 are at a low level of 0V, and the drive signal is not enabled. According to the state of the signal chain, the state of the ENA and ENB pins of the driver chip UD2 will be affected by the GPIO6 state of the main control chip UC1 and the output state of the comparator U4.

[0140] The third step is that before the formal start of the wave control, the main control chip UC1 needs to set the GPIO 2 and GPIO6 pins to 3.3V level to enable the driver chips UD1 and UD2. At this time, the ENA and ENB states of UD1 are only enabled by GPIO2, and the ENA and ENB states of UD2 are only controlled by the state of the comparator U4.

[0141] In the fourth step, the main control chip UC1 outputs a complementary PWM signal with a 50% duty cycle with a dead zone, which is output through GPIO1 and GPIO5. Since the ENA and ENB of the driver chip UD1 have been set to a high level of 5V to enable, the PWM signal of GPIO1 will cause the OUTA and OUTB of the driver chip U1 to output a high level when it is at a high level, driving the switch device on the battery pack side of the isolated bidirectional DC / DC main power module to turn on, and the current rises linearly. When the current rises to the R7 and R8 voltage divider comparison value 0.148V set by the comparator U1, the comparator U1 outputs a low level, and the ENA and ENB of the driver chip UD1 are pulled down to 0V, and the switch device on the battery pack side of the isolated bidirectional DC / DC main power module is turned off. At this time, the output signal of the comparator U1 is also transmitted to the GPIO4 pin of the main control chip UC1 through the IN5 channel output of the digital isolation chip UI1. After receiving the low-level signal of GPIO4, the main control chip UC1 pulls the GPIO1 pin low to turn off the drive signal of this cycle. After the GPIO1 pin signal is set low, the energy stored in the isolated bidirectional DC / DC main power module is released on the bidirectional AC / DC power supply side. At the same time, after the GPIO1 pin is set low, after the dead time Td = 200ns, the main control chip UC1 sets GPIO5 to a high level. At the same time, because the comparator U4 outputs a low level, the ENA and ENB pins of the driver chip UD2 are pulled high to enable GPIO6, and the switch device of the isolated bidirectional DC / DC power module on the bidirectional AC / DC power supply side is turned on.

[0142] Furthermore, when the current on the bidirectional AC / DC power supply side is reduced to close to 0A, the voltage division of the current on RC2 is less than the voltage division value of R22 and R23, 0.048V, and the comparator U4 outputs a high level, the signal NMOS tube Q5 is turned on, and the ENA and ENB pin signals of the driver chip UD2 are pulled down to 0V. After the drive signal is disabled, the switch device of the isolated bidirectional DC / DC power module on the bidirectional AC / DC power supply side is turned off. At the same time, the ENA and ENB signals of the driver chip UD2 are also input to the GPIO7 pin of the main control chip UC1. After receiving the low-level signal, the main control chip UC1 pulls GPIO5 low.

[0143] In the fifth step, the main control chip UC1 repeats the wave generation in the fourth step above to achieve constant current discharge of the battery pack. Figure 1 The bidirectional AC / DC power supply in the inverter realizes the grid-connected inverter working mode and feeds the energy discharged by the battery pack back to the grid.

[0144] For the target battery pack charging control: When the isolated bidirectional DC / DC power supply needs to be turned on to charge the battery pack, it should generally be during the discharge process of the entire battery pack. First, you need to ensure that the bidirectional AC / DC power supply is powered on. If the power supply is not powered on, the isolated bidirectional DC / DC power supply cannot be turned on; if the bidirectional AC / DC power supply is powered on, the isolated bidirectional DC / DC power supply can be turned on, and the VBUS voltage is 48V at this time. When the bidirectional AC / DC power supply is powered on, the main control chip UC1 operates according to the following steps:

[0145] In the first step, the main control chip UC1 sets its GPIO9 pin to a high level, and outputs a high level through the digital isolation chip UI1. This signal is added to the gate of the signal NMOS tube Q2, which will turn on the signal NMOS tube Q2. After the signal NMOS tube Q2 is turned on, its drain and source are equivalent to a short circuit, and the drain voltage is 0V. The resistors R1 and R2 are connected in series to divide the voltage of the battery pack. The divided signal is used to drive the PMOS tube Q1 to turn on, and the voltage regulator diode D1 is used to prevent overvoltage between the gate and source of the PMOS tube Q1. Therefore, once the GPIO1 signal of the main control chip UC1 is set to a low level, the PMOS tube Q1 will be turned on, and VBAT+ will have the same potential as the battery pack.

[0146] In the second step, after the battery side and the bidirectional AC / DC power side of the bidirectional isolated DC / DC power supply are powered, set the GPIO8 of the main control chip UC1 to a high level of 3.3V, and set the GPIO3 pin of the main control chip UC1 to a low level of 0V. After the two pin levels are set, the preparations before starting the wave are completed. At this time, the GPIO3 state of the main control chip UC1 is isolated and transmitted to the battery pack side through the IN3 pin of the digital isolation chip UI1, and the OUT3 output of the digital isolation chip UI1 is still low. This signal turns off the signal NMOS tube Q3, and the output pin of the comparator U2 is pulled up to 5V by the resistor R11. The signal NMOS tube Q4 is turned on, and the ENA and ENB signals of the driver chip UD1 are pulled low. The ENA and ENB states of UD1 are controlled by the output state of the comparator U2 and the GPIO2 of the main control chip UC1. The GPIO8 pin of the main control chip UC1 outputs a high level of 3.3V, and the signal NMOS tube Q6 is turned on. At this time, the output of the comparator U4 is a low level, the signal NMOS tube Q5 is turned off, and the ENA and ENB pins of the driver chip UD2 are controlled by the output of the comparator U3 and the output state of the GPIO6 of the main control chip UC1.

[0147] The third step is that before the formal start of wave control, the main control chip UC1 needs to set the GPIO 2 and GPIO6 pins to 3.3V to enable the driver chips UD1 and UD2. At this time, the ENA and ENB states of the driver chip UD1 are only controlled by the output state of the comparator U2, and the ENA and ENB states of the driver chip UD2 are only controlled by the output state of GPIO6.

[0148] In the fourth step, the main control chip UC1 outputs a complementary PWM signal with a 50% duty cycle with a dead zone, and outputs it through GPIO5 and GPIO1. Since the ENA and ENB of the driver chip UD2 have been set to a high level to enable, the PWM signal of GPIO5 will cause the OUTA and OUTB of the driver chip UD2 to output a high level of 15V when it is at a high level, driving the power switch on the bidirectional AC / DC power supply side of the isolated bidirectional DC / DC main power module to turn on, and the current rises linearly. When the current rises to the R26 and R25 voltage divider comparison value of 0.148V set by the comparator U3, the comparator U3 outputs a low level, and the ENA and ENB of the driver chip UD2 are pulled down to 0V, and the power switch on the bidirectional AC / DC power supply side of the isolated bidirectional DC / DC main power module is turned off. At this time, the output signal of the comparator U3 is also transmitted to the GPIO7 pin of the main control chip UC1. After receiving the low level signal of GPIO7, the main control chip UC1 pulls the GPIO5 pin low to turn off the drive signal of this cycle. After the GPIO5 pin signal is set low, the isolated bidirectional DC / DC main power module releases energy on the battery pack side. At the same time, after the GPIO5 pin is set low, after the dead time Td = 200ns, the main control chip UC1 sets GPIO1 to a high level, and the comparator U2 outputs a low level after the isolated bidirectional DC / DC main power module releases energy on the battery pack side, the signal NMOS tube Q4 is turned off, the ENA and ENB pins of the driver chip UD1 are pulled high to enable, and the OUTA and OUTB pins of the driver chip UD1 output a high level to drive the power switch on the battery pack side of the isolated bidirectional DC / DC main power module to turn on.

[0149] Furthermore, when the current of the bidirectional isolated DC / DC power supply on the battery pack side is reduced to nearly 0A, the voltage divider value of the current on the resistor RC1 is less than the voltage divider value of R13 and R14, 0.048V, and the comparator U2 outputs a high level of 5V. The signal NMOS tube Q4 is turned on, and the ENA and ENB pin signals of the driver chip UD1 are pulled low. After the drive signal is not enabled, the power switch on the battery pack side of the isolated bidirectional DC / DC main power module is turned off. At the same time, the ENA and ENB signal states of the driver chip UD1 will also be input to the GPIO4 pin of the main control chip UC1 through the digital isolation chip UI1. After receiving the low-level signal, the main control chip UC1 pulls GPIO1 low to turn off the drive.

[0150] In the fifth step, the main control chip UC1 repeats the wave generation in the fourth step above to achieve constant current charging of the battery pack. Figure 1 The bidirectional AC / DC power supply in the circuit realizes PWM rectification mode, and charges the AC power supply of the power grid into the battery pack. It can be understood that the charge and discharge control of the above bidirectional isolated DC / DC power supply is all realized by the main control chip UC1. The four battery packs can share chip resources according to the resource situation of the main control chip UC1 to save costs.

[0151] In order to implement the above-mentioned embodiment, the present application also proposes a non-temporary computer-readable storage medium storing a computer program. When the computer program is executed by a processor, the battery pack active balancing method proposed in the above-mentioned second aspect embodiment of the present application is implemented.

[0152] It should be noted that it should be understood that the various parts of the present application can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0153] In addition, in the description of the present application, the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0154] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0155] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0156] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0157] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in the field can change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A battery pack active balancing system, characterized in that: include: Multiple battery packs, multiple fuses, multiple bidirectional isolated DC / DC power supplies and bidirectional AC / DC power supplies; wherein, Each of the battery packs corresponds to one of the bidirectional isolated DC / DC power supplies, and the positive electrode and the negative electrode of each of the battery packs are connected to the corresponding bidirectional isolated DC / DC power supply through one of the fuses respectively; The bidirectional isolated DC / DC power supply is an active balancing control circuit, and the bidirectional isolated DC / DC power supply includes a battery pack leakage protection circuit, a main power circuit, a control circuit for the forward peak current and reverse synchronous rectification on the battery pack side, a control circuit for the forward peak current and reverse synchronous rectification on the bidirectional AC / DC power supply side, and a digital isolation and main control chip circuit; The bidirectional isolated DC / DC power supply is used to perform additional charging and discharging operations on a target battery group with a large attenuation degree during the charging and discharging process of the battery cluster, so that the target battery operates within a safe voltage range. The control circuit of the forward peak current and the reverse synchronous rectification is used to perform peak current limitation on the primary side and synchronous rectification control on the secondary side during the charging and discharging operation. The output end of each of the bidirectional isolated DC / DC power supplies is connected to the DC end of the bidirectional AC / DC power supply; The bidirectional AC / DC power supply is used to realize energy interaction between the target battery pack and the power grid during the additional charging or discharging process of the target battery pack.

2. The battery pack active balancing system according to claim 1, characterized in that: The digital isolation and main control chip circuit includes a digital isolation chip and a main control chip; the battery pack leakage protection circuit includes: a first MOS tube, a voltage regulator diode, a first resistor, a second resistor, a third resistor and a second MOS tube; wherein, The voltage stabilizing diode is connected in parallel with the first resistor, the cathode of the voltage stabilizing diode is connected with the source of the first MOS tube, the anode of the voltage stabilizing diode is connected with the gate of the first MOS tube to prevent gate overvoltage, the drain of the first MOS tube is connected with the first port of the bidirectional isolation DC / DC main power module in the main power circuit, and the source of the first MOS tube is connected in series with the first fuse and connected with the positive electrode of the battery pack; The first end of the second resistor is connected to the gate of the first MOS transistor, the second end of the second resistor is connected to the drain of the second MOS transistor, the source of the second MOS transistor is connected to the ground of the battery pack side, and the third resistor is connected in parallel between the gate of the second MOS transistor and the ground of the battery pack side; The gate of the second MOS tube is also connected to the digital isolation chip, and the digital isolation chip is also connected to the main control chip.

3. The battery pack active balancing system according to claim 2, characterized in that: The main power circuit includes: the bidirectional isolated DC / DC main power module, a battery pack side current sampling resistor and a bidirectional AC / DC power supply side current sampling resistor; wherein, The second port of the bidirectional isolation DC / DC main power module is connected to the first end of the current sampling resistor on the battery pack side, and the second end of the current sampling resistor on the battery pack side is connected to the ground on the battery pack side; The third port of the bidirectional isolated DC / DC main power module is connected to the first driving chip in the control circuit of the forward peak current and reverse synchronous rectification on the battery pack side, and the fourth port of the bidirectional isolated DC / DC main power module is connected to the DC side positive bus network of the bidirectional AC / DC power supply; The fifth port of the bidirectional isolated DC / DC main power module is connected to the first end of the current sampling resistor on the bidirectional AC / DC power supply side, and the second end of the current sampling resistor on the bidirectional AC / DC power supply side is connected to the ground on the bidirectional AC / DC power supply side; The sixth port of the bidirectional isolated DC / DC main power module is connected to the second driving chip in the control circuit of the forward peak current and reverse synchronous rectification on the bidirectional AC / DC power supply side.

4. The battery pack active balancing system according to claim 3, characterized in that: The control circuit of the forward peak current and reverse synchronous rectification on the battery pack side includes: a first comparator, a second comparator, a third MOS tube, a fourth MOS tube, the first driving chip, and fifth to sixteenth resistors; wherein, The first end of the battery pack side current sampling resistor is also connected to the first ends of the sixth resistor and the thirteenth resistor respectively, and the second end of the battery pack side current sampling resistor is also connected to the first ends of the seventh resistor and the twelfth resistor respectively; The second end of the sixth resistor is connected to the inverting input terminal of the first comparator, the second end of the seventh resistor is connected to the non-inverting input terminal of the first comparator, the second end of the twelfth resistor is connected to the inverting input terminal of the second comparator, and the second end of the thirteenth resistor is connected to the non-inverting input terminal of the second comparator; A first end of an eighth resistor is connected to a first reference voltage, a second end of the eighth resistor is connected to a non-inverting input end of the first comparator, a ninth resistor is connected in parallel between the non-inverting input end and an output end of the first comparator, an output end of the first comparator is pulled up to a first preset voltage through a tenth resistor, and an output end of the first comparator is also connected to the first driver chip, a drain of a fourth MOS tube and the digital isolation chip respectively; A first end of a fourteenth resistor is connected to the first reference voltage, a second end of the fourteenth resistor is connected to the non-inverting input end of the second comparator, a sixteenth resistor is connected in parallel between the non-inverting input end and the output end of the second comparator, the output end of the second comparator is pulled up to the first preset voltage through an eleventh resistor, and the output end of the second comparator is also connected to the gate of the fourth MOS tube and the drain of the third MOS tube respectively; The source electrodes of the third MOS tube and the fourth MOS tube are connected to the ground of the battery pack side, and the gate electrode of the third MOS tube is connected to the corresponding pin of the digital isolation chip.

5. The battery pack active balancing system according to claim 3, characterized in that: The control circuit of the forward peak current and reverse synchronous rectification on the bidirectional AC / DC power supply side includes: a third comparator, a fourth comparator, a fifth MOS transistor, a sixth MOS transistor, the second driving chip, and seventeenth to twenty-seventh resistors; wherein, Some pins of the second driving chip are connected to the main control chip through the seventeenth resistor; The first end of the bidirectional AC / DC power supply side current sampling resistor is also connected to the first ends of the twenty-seventh resistor and the twenty-second resistor respectively, and the second end of the bidirectional AC / DC power supply side current sampling resistor is also connected to the first ends of the twenty-sixth resistor and the twenty-first resistor respectively; a second end of the twenty-seventh resistor is connected to the inverting input terminal of the third comparator, a second end of the twenty-sixth resistor is connected to the non-inverting input terminal of the third comparator, a second end of the twenty-first resistor is connected to the inverting input terminal of the fourth comparator, and a second end of the twenty-second resistor is connected to the non-inverting input terminal of the fourth comparator; The first end of the twenty-fifth resistor is connected to the second reference voltage, the second end of the twenty-fifth resistor is connected to the non-inverting input end of the third comparator, the twenty-fourth resistor is connected in parallel between the non-inverting input end and the output end of the third comparator, the output end of the third comparator is pulled up to the second preset voltage through the eighteenth resistor, and the output end of the third comparator is also connected to the drain of the fifth MOS tube, the second driving chip and the main control chip respectively; A first end of a twenty-third resistor is connected to the second reference voltage, a second end of the twenty-third resistor is connected to the non-inverting input end of the fourth comparator, a twentieth resistor is connected in parallel between the non-inverting input end and the output end of the fourth comparator, an output end of the fourth comparator is pulled up to the second preset voltage through a nineteenth resistor, and an output end of the fourth comparator is also connected to the gate of the fifth MOS tube and the drain of the sixth MOS tube respectively; The source electrodes of the fifth MOS tube and the sixth MOS tube are connected to the ground of the bidirectional AC / DC power supply side, and the gate electrode of the sixth MOS tube is connected to the corresponding pin of the main control chip.

6. A battery pack active balancing method, characterized in that: Applied to the battery pack active equalization system according to any one of claims 1 to 5, the method comprises the following steps: Detecting whether the battery cluster is currently in a charging process or a discharging process, and detecting the voltage of each battery group in the battery cluster in real time during the charging and discharging process of the battery cluster; During the charging process of the battery cluster, the battery group that reaches the maximum safety voltage of the battery first is used as the target battery group, and the target battery group is discharged by turning on the bidirectional isolated DC / DC power supply corresponding to the target battery group until each battery group reaches a fully charged state; During the discharge process of the battery cluster, the battery group that reaches the minimum safety voltage of the battery first is used as the target battery group, and the target battery group is charged by turning on the bidirectional isolated DC / DC power supply corresponding to the target battery group until each battery group is fully discharged; In which, during the additional charging or discharging process of the target battery pack, the peak current limitation on the primary side and the synchronous rectification control on the secondary side are performed through the forward peak current and reverse synchronous rectification control circuit in the bidirectional isolated DC / DC power supply.

7. The active balancing method for a battery pack according to claim 6, characterized in that: The discharging the target battery pack by turning on the bidirectional isolated DC / DC power supply corresponding to the target battery pack includes: Control the bidirectional AC / DC power supply to power on, and control the first MOS tube to turn on through the main control chip and the digital isolation chip, so that both the battery pack side and the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC power supply are powered; The relevant pins connecting the main control chip and the digital isolation chip are set to a high level, and the relevant pins connecting the main control chip and the sixth MOS tube are set to a low level, so as to prepare for starting the wave transmission, and enable the first driver chip and the second driver chip; Outputting a PWM signal with a preset duty cycle through the main control chip, and sequentially driving the first driving chip, the switch device on the battery pack side in the bidirectional isolated DC / DC main power module, the first comparator and the main control chip based on the PWM signal to perform corresponding actions, so as to release the energy of the target battery pack through the bidirectional isolated DC / DC main power module on the bidirectional AC / DC power supply side; The operation of outputting the PWM signal is repeatedly performed to perform constant current discharge on the target battery pack, wherein during the constant current discharge process, the bidirectional AC / DC power supply performs a grid-connected inverter working mode to feed back the electric energy released by the target battery pack to the grid.

8. The active equalization method for a battery pack according to claim 6, characterized in that: The charging of the target battery pack by turning on a bidirectional isolated DC / DC power supply corresponding to the target battery pack includes: Control the bidirectional AC / DC power supply to power on, and control the first MOS tube to turn on through the main control chip and the digital isolation chip, so that both the battery pack side and the bidirectional AC / DC power supply side of the bidirectional isolated DC / DC power supply are powered; The relevant pins connecting the main control chip and the digital isolation chip are set to a low level, and the relevant pins connecting the main control chip and the sixth MOS tube are set to a high level, so as to prepare for starting the wave transmission, and enable the first driver chip and the second driver chip; The main control chip outputs a PWM signal with a preset duty cycle, and based on the PWM signal, sequentially drives the second driver chip, the switch device on the bidirectional AC / DC power supply side in the bidirectional isolated DC / DC main power module, the third comparator, and the main control chip to perform corresponding actions, and releases energy on the battery pack side through the bidirectional isolated DC / DC main power module to charge the target battery; The operation of outputting the PWM signal is repeatedly performed to perform constant current charging on the target battery pack, wherein during the constant current charging process, the bidirectional AC / DC power supply performs a PWM rectification mode to supply power to the target battery pack through the AC power supply of the power grid.

9. The active equalization method for a battery pack according to claim 7 or 8, characterized in that: The method of controlling the first MOS tube to be turned on by the main control chip and the digital isolation chip includes: The main control chip controls the pin of the digital isolation chip connected to the second MOS tube to output a high level signal; Based on the high level signal, the second MOS tube is controlled to be turned on, so as to apply the battery pack voltage to the first resistor and the second resistor; The battery pack voltage is divided by the first resistor and the second resistor connected in series, and the first MOS tube is driven to turn on by the divided signal.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the active balancing method for a battery pack as described in any one of claims 6 to 9 is implemented.

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