Gate driving circuit, gate driving chip and electronic equipment

Abstract

A gate drive circuit, a gate drive chip and an electronic device, the gate drive circuit comprising a drive signal generating circuit used for outputting a drive signal based on an input signal, the drive signal being used for driving a power device to start; the driving current control circuit is used for controlling the average current of the driving signal in the first time period and the third time period to be greater than the average current in the second time period; wherein the first time period is from the time when the input signal meets the starting condition of the power device to the time when the voltage of the driving signal reaches a preset voltage threshold value; the second time period is from the time when the voltage of the driving signal reaches the preset voltage threshold value to the time when the collector current of the power device reaches the preset current threshold value; the third time period is from the time when the collector current of the power device reaches the preset current threshold value to the time when the power device is started. The driving current control circuit is adopted to control the gate driving current of the power device in different time periods, so that the surge current can be suppressed while the switching speed is increased.

Description

Technical Field

[0001] The present application relates to the field of circuit technology, and more specifically to a gate drive circuit, a gate drive chip and an electronic device. Background Art

[0002] Insulated Gate Bipolar Transistor (IGBT) is usually used as power element in Intelligent Power Module (IPM) that drives inductive load. If the switching speed of IGBT is increased, the switching loss can be reduced, but the surge current will increase when the IGBT is turned on. There is no suitable solution to improve this situation. Summary of the invention

[0003] The present application is proposed to solve the above problems. According to one aspect of the present application, a gate drive circuit is provided, the gate drive circuit comprising:

[0004] A drive signal generating circuit, used for outputting a drive signal based on an input signal, wherein the drive signal is used for driving the power device to turn on;

[0005] A driving current control circuit, used for controlling the average current of the driving signal in the first time period and the third time period to be greater than the average current in the second time period;

[0006] The first time period is from when the input signal meets the start-up condition of the power device to when the voltage of the drive signal reaches a preset voltage threshold;

[0007] The second time period is: from the voltage of the driving signal reaching the preset voltage threshold to the collector current of the power device reaching the preset current threshold;

[0008] The third time period is from when the collector current of the power device reaches the preset current threshold to when the power device is turned on completely.

[0009] The above technical scheme has the following technical effects: a driving current control circuit is used to control the gate driving current of the power device in time periods, and the gate driving current is controlled to increase in the first time period (i.e., the time period from when the input signal meets the start-up condition of the power device to when the voltage of the driving signal reaches a preset voltage threshold), and the gate driving current is controlled to decrease in the second time period (i.e., the time period from when the voltage of the driving signal reaches the preset voltage threshold to when the collector current of the power device reaches the preset current threshold), and the gate driving current is controlled to increase in the third time period (i.e., the time period from when the collector current of the power device reaches the preset current threshold to when the power device completes the start-up), so that the average current of the gate driving current in the first time period and the third time period is respectively greater than the average current in the second time period, and finally the surge current is suppressed while the switching speed is accelerated.

[0010] In one embodiment of the present application, the driving current control circuit includes:

[0011] A shunt circuit connected in parallel with the output stage circuit of the drive signal generating circuit, the shunt circuit being turned on or off under the action of a control signal;

[0012] A voltage detection circuit, used for detecting the voltage of the driving signal;

[0013] a pulse generating circuit, configured to generate a pulse signal based on a detection result of the voltage detecting circuit, wherein the pulse signal is at a first level in the first time period, at a second level in the second time period, and at the first level in the third time period;

[0014] The switch control circuit is used to output the control signal based on the pulse signal, and the control signal controls the shunt circuit to turn on in the first time period and the third time period, and to turn off in the second time period.

[0015] The above technical solution has the following technical effects: according to the IGBT gate voltage or collector current, the shunt circuit is controlled to be turned on or off, thereby controlling the size of the gate drive circuit in different time periods, which can improve the switching speed while suppressing surge current.

[0016] In one embodiment of the present application, the shunt circuit includes:

[0017] A shunt element, wherein a first end of the shunt element is connected to the voltage detection circuit, and a second end of the shunt element is connected to a first end of the switch element;

[0018] The switch element, the second end of the switch element is connected to the power supply, and the third end of the switch element is connected to the switch control circuit.

[0019] The above technical solution has the following technical effects: a shunt current is formed by a combination of a shunt element and a switch element, and the shunt element can be controlled by controlling the switch element, thereby playing a role in adjusting the size of the gate drive circuit.

[0020] In one embodiment of the present application, the shunt element includes a first resistor, and the switch element includes a first transistor.

[0021] The above technical solution has the following technical effects: the shunt element is realized by a resistor, and the switch element is realized by a transistor, and the structure is simple and easy to implement.

[0022] In one embodiment of the present application, the voltage detection circuit includes:

[0023] a second resistor, wherein a first end of the second resistor is connected to a power supply, and a second end of the second resistor is connected to a negative input terminal of the operational amplifier;

[0024] a third resistor, a first end of the third resistor being grounded, and a second end of the third resistor being connected to the negative input terminal of the operational amplifier;

[0025] The operational amplifier, the positive input terminal of the operational amplifier is connected to the gate of the power device, and the output terminal of the operational amplifier is connected to the pulse generating circuit.

[0026] The above technical solution has the following technical effects: it can be used to detect the gate voltage of a power device through a simple device combination.

[0027] In one embodiment of the present application, the pulse generating circuit comprises:

[0028] A capacitor, a first end of the capacitor is connected to the voltage detection circuit, and a second end of the capacitor is connected to a first end of a fourth resistor and an input end of the first level converter;

[0029] The fourth resistor, a second end of the fourth resistor is grounded;

[0030] The first level converter, an output end of the first level converter is connected to the switch control circuit.

[0031] The above technical solution has the following technical effects: it can be used to generate pulse signals through a simple device combination.

[0032] In one embodiment of the present application, the switch control circuit includes:

[0033] A logic control circuit, wherein a first input end of the logic control circuit is connected to the pulse generating circuit, a second input end of the logic control circuit is connected to the driving signal generating circuit, and an output end of the logic control circuit is connected to the shunt circuit.

[0034] The above technical solution has the following technical effects: the switch control of the shunt circuit is realized through the logic control circuit, the structure is simple and easy to implement.

[0035] In one embodiment of the present application, the driving signal generating circuit includes:

[0036] An inverter, wherein an input end of the inverter is connected to the input signal, and an output end of the inverter is connected to an input end of a second level converter;

[0037] The second level converter, the output end of the second level converter is connected to the input end of the output stage circuit;

[0038] An output stage circuit, wherein an output end of the output stage circuit is connected to a gate of the power device.

[0039] The above technical solution has the following technical effects: controlling the power device is achieved through a simple structure.

[0040] In one embodiment of the present application, the preset voltage threshold is a Miller platform voltage.

[0041] The above technical solution has the following technical effects: it is easy to suppress surge current.

[0042] According to another aspect of the present application, a gate driving chip is further provided, and the gate driving chip includes the above-mentioned gate driving circuit.

[0043] According to another aspect of the present application, an electronic device is provided, the electronic device comprising a power element; the above-mentioned gate driving chip, the power element and the gate driving chip are packaged together.

[0044] In one embodiment of the present application, the electronic device is an intelligent power module.

[0045] According to the gate drive circuit, gate drive chip and electronic device of the embodiments of the present application, a drive current control circuit is used to control the gate drive current of the power device in time periods, which can suppress surge current while speeding up the switching speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] By describing the embodiments of the present application in more detail in conjunction with the accompanying drawings, the above and other purposes, features and advantages of the present application will become more apparent. The accompanying drawings are used to provide a further understanding of the embodiments of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the present application and do not constitute a limitation of the present application. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0047] Figure 1 A schematic diagram of simulated waveforms of different surge currents corresponding to different switching speeds in an existing gate drive circuit is shown.

[0048] Figure 2 A schematic structural block diagram of a gate driving circuit according to an embodiment of the present application is shown.

[0049] Figure 3 A schematic diagram showing changes of various signals of the gate driving circuit in a first time period, a second time period and a third time period according to an embodiment of the present application is shown.

[0050] Figure 4 A schematic circuit diagram of a gate driving circuit according to an embodiment of the present application is shown.

[0051] Figure 5 A more specific schematic circuit diagram of a gate driving circuit according to an embodiment of the present application is shown.

[0052] Figure 6 Shows Figure 5 Schematic diagram of simulation results for the circuit shown.

[0053] Figure 7 and Figure 8 A schematic diagram showing simulation results of a comparison between a conventional gate drive circuit and the gate drive circuit of the present application is shown.

[0054] Fig. 9 A schematic diagram showing a summary of simulation results of a gate driving circuit according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0055] In order to make the purpose, technical solutions and advantages of the present application more obvious, the example embodiments according to the present application will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application, and it should be understood that the present application is not limited to the example embodiments described herein. Based on the embodiments of the present application described in the present application, all other embodiments obtained by those skilled in the art without creative work should fall within the scope of protection of the present application.

[0056] At present, in order to speed up the IGBT's turn-on switching speed, it can be achieved by increasing the gate drive current at the time of turn-on. However, when the gate voltage of the IGBT rises, the overshoot of the gate potential in the Miller (Mirror) region becomes higher, and as a result, when the IGBT is turned on, the change speed di / dt of the collector current of the IGBT is accelerated due to the influence of the inductive power on the inductive load side. When di / dt is accelerated, the reverse recovery current of the reverse recovery diode (Fast Recovery Di or RC-IGBT built-in Di) on the corresponding IGBT used will increase. Here, "corresponding IGBT used" means: when the change speed di / dt of the collector current of the IGBT on the high-voltage side is accelerated, the reverse recovery current of the reverse recovery diode on the IGBT on the low-voltage side will increase; when the change speed di / dt of the collector current of the IGBT on the low-voltage side is accelerated, the reverse recovery current of the reverse recovery diode on the IGBT on the high-voltage side will increase. The surge current is caused by this reverse recovery current, so simply increasing the gate drive current and speeding up the turn-on time will increase the surge current proportionally.

[0057] Figure 1 That is, it shows a schematic diagram of simulated waveforms of different surge currents corresponding to different switching speeds in the existing gate drive circuit. Figure 1 As shown, Vin represents the input voltage, Vout represents the output voltage of the gate drive circuit in the first case, Ix(U4:C) represents the surge current in the first case, and Vout1 represents the output voltage of the gate drive circuit in the second case. As can be seen from the figure, in the first case, the output voltage of the gate drive circuit changes quickly, that is, the switching speed is fast. At this time, although the switching loss is small, the corresponding surge current is large; in the second case, the output voltage of the gate drive circuit changes more slowly than in the first case, that is, the switching speed is slow. At this time, the switching loss is large, but the corresponding surge current is smaller than in the first case.

[0058] When the gate driver integrated circuit (hereinafter referred to as IC) of the IGBT and the IGBT used are independent circuit structures of unspecified combination, the corresponding design method can be to set the acceptable value of the surge current generated when the IGBT is turned on, and speed up the switching speed of the IGBT without exceeding this range. However, this method will still generate a large surge current while speeding up the switching speed.

[0059] The applicant of the present application has found that in the case of IPM, the IC and IGBT are installed in the same package, and the characteristics of the IC and IGBT are a known combination (rather than the aforementioned unspecified combination), so it is possible to try to suppress the generated surge current while speeding up the switching speed through the solution proposed in the present application. The solution of the present application is described below in conjunction with the accompanying drawings.

[0060] Figure 2 FIG. 1 shows a schematic structural block diagram of a gate drive circuit 1 according to an embodiment of the present application. Figure 2 As shown, the gate drive circuit 1 includes a drive signal generating circuit 11 and a drive current control circuit 12. The drive signal generating circuit 11 is used to output a drive signal based on an input signal, and the drive signal is used to drive the power device to turn on. The drive current control circuit 12 is used to control the average current of the drive signal in the first time period and the third time period to be greater than the average current in the second time period. The first time period is: from the input signal meeting the turn-on condition of the power device to the voltage of the drive signal reaching the preset voltage threshold. The second time period is: from the voltage of the drive signal reaching the preset voltage threshold to the collector current of the power device reaching the preset current threshold. The third time period is: from the collector current of the power device reaching the preset current threshold to the power device completing the turn-on.

[0061] In the embodiments of the present application, the applicant has made the following considerations: In order to speed up the switching speed of a functional device (such as an IGBT) (reduce switching losses), it is necessary to quickly increase the gate voltage of the IGBT. To this end, it is effective to increase the current charging the gate (gate drive current); the surge current generated when the IGBT is turned on is proportional to the di / dt of the collector current reaching the Mirror region when the IGBT is in the turned-on state; when the IGBT is turned on, the di / dt of the collector current in the Mirror region, if the current charging the gate is small, then the di / dt will also be small, if the charging current is large, then the di / dt will also be large.

[0062] Taking the above into consideration, in the embodiment of the present application, the gate drive current of the IGBT is controlled by the drive current control circuit 12 in different time periods. Specifically, in the start-up operation of the IGBT, in the first time period (i.e., the time period from when the input signal meets the start-up condition of the power device to when the voltage of the drive signal reaches the preset voltage threshold), the gate drive current is controlled to increase; in the second time period (i.e., the time period from when the voltage of the drive signal reaches the preset voltage threshold to when the collector current of the power device reaches the preset current threshold), the gate drive current is controlled to decrease; in the third time period (i.e., the time period from when the collector current of the power device reaches the preset current threshold to when the power device completes the start-up), the gate drive current is controlled to increase, so that the average current of the gate drive current in the first time period and the third time period is greater than the average current in the second time period, and finally the surge current is suppressed while the switching speed is accelerated.

[0063] Among them, the above-mentioned preset current threshold can be a Mirror platform voltage. That is, during the time period from the gate ON signal input (that is, when the input signal meets the start-up condition of the power device, for example, when the input signal changes from a low level to a high level) to the gate voltage (that is, the voltage of the drive signal output by the drive signal generating circuit 11) reaching the preset voltage threshold (for example, the Mirror platform voltage, that is, entering the Mirror area), the gate drive current (that is, the current of the drive signal output by the drive signal generating circuit 11) is increased; during the time period from the gate voltage reaching the Mirror area to the surge current reaching the peak value, the gate drive current is reduced; thereafter, by controlling the gate drive current to remain in a larger state, the switching speed can be accelerated (the switching loss can be reduced), and the surge current can be suppressed. It can be combined with Figure 3 Understand the above control process of the driving current, wherein ①, ② and ③ are the above first time period, second time period and third time period respectively.

[0064] An example of a circuit configuration capable of realizing the above-described drive current control circuit 12 is described below.

[0065] In one example, the driving current control circuit 12 may include a shunt circuit, a voltage detection circuit, a pulse generating circuit, and a switch control circuit. The shunt circuit is connected in parallel with the output stage circuit of the driving signal generating circuit, and the shunt circuit is turned on or off under the action of the control signal. The voltage detection circuit is used to detect the voltage of the driving signal. The pulse generating circuit is used to generate a pulse signal based on the detection result of the voltage detection circuit, and the pulse signal is at a first level in a first time period, at a second level in a second time period, and at a first level in a third time period. The switch control circuit is used to output a control signal based on the pulse signal, and the control signal controls the shunt circuit to turn on in the first time period and the third time period, and to turn off in the second time period. The following is combined with Figure 4 to describe.

[0066] like Figure 4 As shown, the blue boxed portion in the figure is an example structure of the driving current control circuit 12, and the rest is the structure of the driving signal generating circuit 11 (this partial structure may not fully show all the structures, and shows the parts related to the driving current control circuit 12, such as the inverter connected to the VDD signal, the level converter, and the output stage circuit connected to VCC). The shunt circuit in the driving current control circuit 12 is shown to include a transistor M3 and a resistor Ron2, wherein M3 serves as a switching element, and Ron2 serves as a shunt element. The first end of the shunt element is connected to the voltage detection circuit, and the second end is connected to the first end of the switching element M3; the second end of the switching element M3 is connected to the power supply VCC, and the third end of the switching element is connected to the switch control circuit. Figure 4In the figure, the switch control circuit is shown as a logic control circuit, a first input terminal of the logic control circuit is connected to a pulse generating circuit, a second input terminal is connected to a driving signal generating circuit (specifically, an output terminal of a level converter), and an output terminal of the logic control circuit is connected to a shunt circuit (specifically, a gate of transistor M3), which plays a role in controlling the shunt circuit to be turned on or off.

[0067] Without adding the drive current control circuit 12, the gate drive condition of the power device IGBT depends on the transistors M1 and M2 in the output stage circuit and the resistors Ron1 and Roff that determine the gate charge and discharge current. After adding the drive current control circuit 12, the working principle is as follows:

[0068] In the initial state when the input signal is IGBT gate ON, the M3 switch element is in the ON state (at this time, the pulse signal generated by the pulse generation circuit based on the gate voltage of the IGBT detected by the voltage detection circuit has a first level, and the first level together with the input signal after the control signal output by the logic control circuit makes the M3 switch element in the ON state), and the charging current (i.e., gate drive current) provided to the gate of the IGBT is determined by the parallel impedance of Ron1 and Ron2. Then, the gate voltage of the IGBT is continuously detected by the voltage detection circuit. When it is detected that the gate voltage of the IGBT reaches the Mirror region, a signal is generated by the pulse generation circuit (the signal has a second level in the second time period), so that the M3 switch element is controlled to be ON / OFF by the logic control circuit within a certain time (i.e., within the second time period). As a result, at the initial moment, the charging current to the gate of the IGBT is large. When the gate voltage of the IGBT reaches the Mirror region, due to the OFF of the M3 switch element, the charging current to the gate of the IGBT is limited to the condition of only Ron1. Therefore, by suppressing the speed change dv / dt (becoming smaller) when the IGBT switches to the ON state, the generated surge current can also be suppressed. At the moment when the surge current peak point is exceeded (within the time period set by the pulse drive circuit, that is, within the third time period), switching the M3 switch element to the ON state again can speed up the speed change dv / dt between the collector-emitter of the IGBT, thereby reducing the switching loss.

[0069] Therefore, in this embodiment, the opening or closing of the shunt circuit is controlled according to the conditions of the IGBT gate voltage or collector current, thereby controlling the size of the gate drive circuit in different time periods, which can improve the switching speed while suppressing the surge current.

[0070] In an embodiment of the present application, the aforementioned voltage detection circuit may include: a second resistor, a third resistor and an operational amplifier. Wherein, the first end of the second resistor is connected to the power supply, and the second end is connected to the negative input terminal of the operational amplifier. The first end of the third resistor is grounded, and the second end is connected to the negative input terminal of the operational amplifier. The positive input terminal of the operational amplifier is connected to the gate of the power device, and the output terminal of the operational amplifier is connected to the aforementioned pulse generation circuit. In this embodiment, a simple device combination can be used to detect the gate voltage of the power device.

[0071] In an embodiment of the present application, the aforementioned pulse generating circuit includes a capacitor and a fourth resistor. The first end of the capacitor is connected to the voltage detection circuit, the second end of the capacitor is connected to the first end of the fourth resistor and the input end of the first level converter; the second end of the fourth resistor is grounded; the output end of the first level converter is connected to the switch control circuit. In this embodiment, a simple device combination can be used to generate a pulse signal.

[0072] Combine the following Figure 5 A more specific schematic circuit diagram of a gate driving circuit according to an embodiment of the present application is described, in which a voltage detection circuit, a pulse generating circuit, and a switch control circuit are relatively Figure 4 With a more specific structure.

[0073] like Figure 5 As shown, the gate drive circuit includes a drive signal generating circuit and a drive current control circuit. Among them, the drive signal generating circuit includes an inverter A2, a level converter A1 and an output stage circuit. The input end of the inverter A2 is connected to the input signal IN, the output end is connected to the input end of the level converter A1, and the output end of A1 is connected to the output stage circuit. The output stage circuit includes transistors M1, M2 and resistors R1 and R2. The drive current control circuit includes a shunt circuit, a voltage detection circuit, a pulse generation circuit and a switch control circuit. Among them, the shunt circuit is shown as including a transistor M3 and a resistor R3. The voltage detection circuit includes resistors R5, R6 and an operational amplifier U2. The first end of R5 is connected to the power supply Vcc, and the second end is connected to the negative input end of U2. The first end of R6 is grounded, and the other end is connected to the negative input end of U2. The positive input end of U2 is connected to the gate G of the IGBT. The pulse generation circuit includes a capacitor C1, a resistor R4 and a level converter A4. The first end of C1 is connected to the output end of U2, the second end is connected to the first end of R4 and the input end of A4, the second end of R4 is grounded, and the output end of A4 is connected to the switch control circuit. The switch control circuit includes a logic control circuit A3. The input end of A3 is connected to the output end of A2 and the output end of A4, and the output end of A3 is connected to the gate of M3. In addition, Figure 5Also shown are the collector C, emitter E of the IGBT and other devices connected to them, such as resistor R7, diode D1, inductor L1 and resistor R8, voltage source V1 and output signal out2, which are not related to the main working content described in this application and will not be described here.

[0074] Figure 5 The circuit shown is Figure 4 A more specific exemplary structure of the circuit shown, its working principle is similar to Figure 4 Similar, no further description is given here. Figures 6 to 9 Describe the simulation results. Among them, Figure 6 for Figure 5 Simulation results of the circuit shown. Figure 6 It can be seen from the results that the gate drive circuit of the present application can greatly shorten (reduce) the switching period (loss) while achieving the same surge current as the surge current suppressed by the traditional drive circuit. Figure 7 and 8 Comparison data is shown for these results with simulation results that suppress surge current on the same IGBT using a conventional drive circuit, and simulation results that allow surge current to increase to suppress switching losses. Figure 7 and 8 It can be seen from the results that if the switching period (loss) is reduced in the conventional driving circuit, the surge current will increase, while in the improved circuit of the present application, the surge current is suppressed even if the switching period is the same.

[0075] at last, Fig. 9 The internal operation simulation results of the gate drive circuit according to the embodiment of the present application are summarized. Fig. 9 Operation process:

[0076] When the input signal Vin of the gate drive becomes high level, the gate of the IGBT starts to be charged. Until the gate potential of the IGBT reaches the detection voltage of the gate detection circuit, the large current set by the drive circuit will flow. When the gate potential reaches the detection voltage, the pulse generation circuit generates a pulse for a period of time, and outputs a current switching signal from the control logic to reduce the charging current to the gate. In this way, the collector current peak of the IGBT is suppressed (surge current is suppressed). After the time of suppressing the current charging to the gate, it will return to the initial drive current condition, shortening the time when switching loss occurs, thereby reducing loss.

[0077] The above describes in detail the gate drive circuit according to the embodiment of the present application. Based on the above description, the gate drive circuit according to the embodiment of the present application uses a drive current control circuit to control the gate drive current of the power device in time periods, controls the gate drive current to increase in the first time period (i.e., the time period from when the input signal meets the start-up condition of the power device to when the voltage of the drive signal reaches the preset voltage threshold), controls the gate drive current to decrease in the second time period (i.e., the time period from when the voltage of the drive signal reaches the preset voltage threshold to when the collector current of the power device reaches the preset current threshold), and controls the gate drive current to increase in the third time period (i.e., the time period from when the collector current of the power device reaches the preset current threshold to when the power device completes the start-up), so that the average current of the gate drive current in the first time period and the third time period is greater than the average current in the second time period, and finally realizes the suppression of surge current while accelerating the switching speed.

[0078] According to another aspect of the present application, a gate driving chip is further provided, and the gate driving chip includes the above-mentioned gate driving circuit according to the embodiment of the present application.

[0079] According to another aspect of the present application, an electronic device is provided, the electronic device comprising a power device and the above-mentioned gate drive chip, wherein the power device and the gate drive chip are packaged together. Exemplarily, the electronic device is an intelligent power module (IPM).

[0080] Although example embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above example embodiments are merely exemplary and are not intended to limit the scope of the present application to this. Those of ordinary skill in the art may make various changes and modifications therein without departing from the scope and spirit of the present application. All these changes and modifications are intended to be included within the scope of the present application as required by the appended claims.

[0081] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0082] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed.

[0083] In the description provided herein, a large number of specific details are described. However, it is understood that the embodiments of the present application can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0084] Similarly, it should be understood that in order to streamline the present application and help understand one or more of the various aspects, in the description of the exemplary embodiments of the present application, the various features of the present application are sometimes grouped together into a single embodiment, figure, or description thereof. However, the method of the present application should not be interpreted as reflecting the following intention: the claimed application requires more features than the features clearly stated in each claim. More specifically, as reflected in the corresponding claims, the inventive point is that the corresponding technical problem can be solved with features less than all the features of a single disclosed embodiment. Therefore, the claims following the specific embodiment are hereby explicitly incorporated into the specific embodiment, wherein each claim itself serves as a separate embodiment of the present application.

[0085] It will be understood by those skilled in the art that, except for mutually exclusive features, all features disclosed in this specification (including the accompanying claims, abstracts and drawings) and all processes or units of any method or device disclosed in this specification may be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstracts and drawings) may be replaced by an alternative feature that provides the same, equivalent or similar purpose.

[0086] In addition, those skilled in the art will appreciate that, although some embodiments herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present application and form different embodiments. For example, in the claims, any one of the claimed embodiments may be used in any combination.

[0087] The various component embodiments of the present application can be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. It should be understood by those skilled in the art that a microprocessor or digital signal processor (DSP) can be used in practice to implement some or all of the functions of some modules in the article analysis device according to the embodiment of the present application. The present application can also be implemented as a device program (e.g., computer program and computer program product) for executing part or all of the methods described herein. Such a program implementing the present application can be stored on a computer-readable medium, or can have the form of one or more signals. Such a signal can be downloaded from an Internet website, or provided on a carrier signal, or provided in any other form.

[0088] It should be noted that the above embodiments illustrate the present application rather than limit the present application, and that those skilled in the art may design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference symbol between brackets should not be constructed as a limitation to the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "one" or "an" preceding an element does not exclude the presence of multiple such elements. The present application may be implemented by means of hardware including several different elements and by means of a suitably programmed computer. In a unit claim that lists several devices, several of these devices may be embodied by the same hardware item. The use of the words first, second, and third, etc. does not indicate any order. These words may be interpreted as names.

[0089] The above is only a specific implementation method or description of a specific implementation method of the present application, and the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. The protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A gate drive circuit, characterized in that: The gate drive circuit comprises: A drive signal generating circuit, used for outputting a drive signal based on an input signal, wherein the drive signal is used for driving the power device to turn on; A driving current control circuit, used for controlling the average current of the driving signal in the first time period and the third time period to be greater than the average current in the second time period; The first time period is from when the input signal meets the start-up condition of the power device to when the voltage of the drive signal reaches a preset voltage threshold; The second time period is: from the voltage of the driving signal reaching the preset voltage threshold to the collector current of the power device reaching the preset current threshold; The third time period is from when the collector current of the power device reaches the preset current threshold to when the power device is turned on completely.

2. The gate driving circuit according to claim 1, characterized in that: The driving current control circuit comprises: A shunt circuit connected in parallel with the output stage circuit of the drive signal generating circuit, the shunt circuit being turned on or off under the action of a control signal; A voltage detection circuit, used for detecting the voltage of the driving signal; a pulse generating circuit, configured to generate a pulse signal based on a detection result of the voltage detecting circuit, wherein the pulse signal is at a first level in the first time period, at a second level in the second time period, and at the first level in the third time period; The switch control circuit is used to output the control signal based on the pulse signal, and the control signal controls the shunt circuit to turn on in the first time period and the third time period, and to turn off in the second time period.

3. The gate driving circuit according to claim 2, characterized in that: The shunt circuit comprises: A shunt element, wherein a first end of the shunt element is connected to the voltage detection circuit, and a second end of the shunt element is connected to a first end of the switch element; The switch element, the second end of the switch element is connected to the power supply, and the third end of the switch element is connected to the switch control circuit.

4. The gate driving circuit according to claim 3, characterized in that: The shunt element includes a first resistor, and the switch element includes a first transistor.

5. The gate driving circuit according to claim 2, characterized in that: The voltage detection circuit comprises: a second resistor, wherein a first end of the second resistor is connected to a power supply, and a second end of the second resistor is connected to a negative input terminal of the operational amplifier; a third resistor, a first end of the third resistor being grounded, and a second end of the third resistor being connected to the negative input terminal of the operational amplifier; The operational amplifier, the positive input terminal of the operational amplifier is connected to the gate of the power device, and the output terminal of the operational amplifier is connected to the pulse generating circuit.

6. The gate driving circuit according to claim 2, characterized in that: The pulse generating circuit comprises: A capacitor, a first end of the capacitor is connected to the voltage detection circuit, and a second end of the capacitor is connected to a first end of a fourth resistor and an input end of the first level converter; The fourth resistor, a second end of the fourth resistor is grounded; The first level converter, an output end of the first level converter is connected to the switch control circuit.

7. The gate driving circuit according to claim 2, characterized in that: The switch control circuit comprises: A logic control circuit, wherein a first input end of the logic control circuit is connected to the pulse generating circuit, a second input end of the logic control circuit is connected to the driving signal generating circuit, and an output end of the logic control circuit is connected to the shunt circuit.

8. The gate driving circuit according to claim 1, characterized in that: The driving signal generating circuit comprises: An inverter, wherein an input end of the inverter is connected to the input signal, and an output end of the inverter is connected to an input end of a second level converter; The second level converter, the output end of the second level converter is connected to the input end of the output stage circuit; An output stage circuit, wherein an output end of the output stage circuit is connected to a gate of the power device.

9. The gate driving circuit according to claim 1, characterized in that: The preset voltage threshold is the Miller platform voltage.

10. A gate driver chip, characterized in that: The gate driving chip comprises the gate driving circuit according to any one of claims 1 to 9.

11. An electronic device, characterized in that: The electronic device comprises: Power components; The gate driver chip as described in claim 10, wherein the power element is packaged together with the gate driver chip.

12. The electronic device according to claim 11, characterized in that: The electronic device is an intelligent power module.

Images