Bridge-less power factor correction circuit and its control method

Abstract

The present invention discloses a bridgeless power factor correction circuit and its control method, belonging to the technical field of power factor correction. The bridgeless power factor correction circuit includes an input capacitor, an energy storage module, a polarity control module, at least one energy storage inductor, at least one loop control module, and a control module; the energy storage module includes a first energy storage capacitor and a second energy storage capacitor connected in series between the first output terminal and the second output terminal of the bridgeless power factor correction circuit, the loop control module includes a third switching unit, a fourth switching unit, and a fifth switching unit, and the fifth switching unit is connected between the second node and the first node of the loop control module; wherein, the first node of the loop control module is connected to the second end of the energy storage inductor corresponding to the loop control module, and the second node is the connection node between the first energy storage capacitor and the second energy storage capacitor. The present invention can reduce the volume of the bridgeless power factor correction circuit and improve the efficiency of the bridgeless power factor correction circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of power factor correction, and in particular to a bridgeless power factor correction circuit and a control method thereof. Background Art

[0002] In power supply products, the bridgeless power factor correction circuit has attracted much attention due to its unique design. Compared with the traditional bridged power factor correction circuit, the bridgeless power factor correction circuit can significantly reduce the conduction loss, which is beneficial to improving the power supply conversion efficiency.

[0003] However, compared with the bridged power factor correction circuit, the volume of the traditional bridgeless power factor correction circuit has not been significantly reduced, and the efficiency improvement in practical applications is limited, making it difficult for the bridgeless power factor correction circuit to be widely used. Summary of the Invention

[0004] The present invention provides a bridgeless power factor correction circuit and a control method thereof to reduce the volume of the bridgeless power factor correction circuit and improve the efficiency of the bridgeless power factor correction circuit.

[0005] According to one aspect of the present invention, there is provided a bridgeless power factor correction circuit, comprising:

[0006] An input capacitor connected between the first input terminal and the second input terminal of the bridgeless power factor correction circuit;

[0007] A energy storage module including a first energy storage capacitor and a second energy storage capacitor connected in series between the first output terminal and the second output terminal of the bridgeless power factor correction circuit;

[0008] A polarity control module including a first switch unit and a second switch unit; the first switch unit is connected between the first input terminal and the first output terminal, and the second switch unit is connected between the first input terminal and the second output terminal;

[0009] At least one energy storage inductor; a first end of each of the energy storage inductors is connected to the second input terminal;

[0010] A loop control module corresponding to each of the energy storage inductors; the loop control module includes: a third switch unit, a fourth switch unit, and a fifth switch unit; the third switch unit is connected between the first output terminal and the first node of the loop control module, the fourth switch unit is connected between the second output terminal and the first node of the loop control module, and the fifth switch unit is connected between the second node and the first node of the loop control module; wherein, the first node of the loop control module is connected to the second end of the corresponding energy storage inductor of the loop control module, and the second node is the connection node between the first energy storage capacitor and the second energy storage capacitor;

[0011] A control module, respectively connected to the control terminals of the first switch unit, the second switch unit, the control terminals of each of the third switch units, the control terminals of each of the fourth switch units, and the control terminals of each of the fifth switch units.

[0012] Optionally, the control terminal of the fifth switch unit includes a first sub-control terminal and a second sub-control terminal; the control module is respectively connected to the first sub-control terminal and the second sub-control terminal;

[0013] The fifth switch unit includes: a first transmission sub-unit and a second transmission sub-unit connected in series between the first node and the second node, the first sub-control terminal serves as the control terminal of the first transmission sub-unit, and the second sub-control terminal serves as the control terminal of the second transmission sub-unit.

[0014] Optionally, the first switch unit includes a first transistor, the control electrode of the first transistor is connected to the control terminal of the first switch unit, the first pole of the first transistor is connected to the first input terminal, and the second pole of the first transistor is connected to the first output terminal;

[0015] The second switch unit includes a second transistor, the control electrode of the second transistor is connected to the control terminal of the second switch unit, the first pole of the second transistor is connected to the second output terminal, and the second pole of the second transistor is connected to the first input terminal;

[0016] The third switch unit includes a third transistor, the control electrode of the third transistor is connected to the control terminal of the third switch unit, the first pole of the third transistor is connected to the first node, and the second pole of the third transistor is connected to the first output terminal;

[0017] The fourth switch unit includes a fourth transistor, the control electrode of the fourth transistor is connected to the control terminal of the fourth switch unit, the first pole of the fourth transistor is connected to the second output terminal, and the second pole of the fourth transistor is connected to the first node;

[0018] The first transmission subunit includes a fifth transistor. The control electrode of the fifth transistor is connected to the first sub-control end of the fifth switch unit, and the second electrode of the fifth transistor is connected to the first node;

[0019] The second transmission subunit includes a sixth transistor. The control electrode of the sixth transistor is connected to the second sub-control end of the fifth switch unit. The first electrode of the sixth transistor is connected to the first electrode of the fifth transistor, and the second electrode of the sixth transistor is connected to the second node.

[0020] Optionally, the breakdown voltages of the first transistor, the second transistor, the third transistor, and the fourth transistor are all greater than the absolute value of the voltage difference between the first output end and the second output end; the breakdown voltages of the fifth transistor and the sixth transistor are both greater than half of the absolute value of the voltage difference between the first output end and the second output end; the on-state impedances of the fifth transistor and the sixth transistor are both a first impedance, and the on-state impedances of the first transistor, the second transistor, the third transistor, and the fourth transistor are all a second impedance, and the first impedance is half of the second impedance.

[0021] Optionally, the breakdown voltages of the first energy storage capacitor and the second energy storage capacitor are both greater than half of the absolute value of the voltage difference between the first output end and the second output end.

[0022] Optionally, the bridgeless power factor correction circuit includes two of the energy storage inductors and two of the loop control modules.

[0023] According to another aspect of the present invention, there is provided a control method for a bridgeless power factor correction circuit, which is used to control the bridgeless power factor correction circuit provided in any of the above embodiments and is executed by the control module;

[0024] The control method for the bridgeless power factor correction circuit includes:

[0025] For the polarity control module, according to the positive or negative of the first voltage difference, control one of the first switch unit and the second switch unit to conduct and the other to turn off; wherein, the first voltage difference is the voltage difference between the second input end and the first input end;

[0026] For any one of the loop control modules, according to the magnitude of the absolute value of the first voltage difference, control one of the third switch unit and the fourth switch unit to alternately conduct with the fifth switch unit, and control the other of the third switch unit and the fourth switch unit to turn off.

[0027] Optionally, according to the positive or negative value of the first voltage difference, controlling one of the first switching unit and the second switching unit to conduct and the other to turn off includes:

[0028] When the first voltage difference is positive, controlling the first switching unit to turn off and controlling the second switching unit to conduct;

[0029] When the first voltage difference is negative, controlling the second switching unit to turn off and controlling the first switching unit to conduct;

[0030] According to the magnitude of the absolute value of the first voltage difference, controlling one of the third switching unit and the fourth switching unit to alternately conduct with the fifth switching unit and controlling the other of the third switching unit and the fourth switching unit to turn off includes:

[0031] In the case where the first voltage difference is positive, when the absolute value of the first voltage difference is less than or equal to the second voltage difference, controlling the fourth switching unit and the fifth switching unit to alternately conduct and controlling the third switching unit to turn off; when the absolute value of the first voltage difference is greater than the second voltage difference, controlling the third switching unit and the fifth switching unit to alternately conduct and controlling the fourth switching unit to turn off; wherein, the second voltage difference is half of the absolute value of the voltage difference between the first output terminal and the second output terminal;

[0032] In the case where the first voltage difference is negative, when the absolute value of the first voltage difference is less than or equal to the second voltage difference, controlling the third switching unit and the fifth switching unit to alternately conduct and controlling the fourth switching unit to turn off; when the absolute value of the first voltage difference is greater than the second voltage difference, controlling the fourth switching unit and the fifth switching unit to alternately conduct and controlling the third switching unit to turn off.

[0033] Optionally, the fifth switching unit includes: a first transmission sub-unit and a second transmission sub-unit;

[0034] The controlling the fourth switching unit and the fifth switching unit to alternately conduct includes: controlling the first transmission sub-unit to remain conducting and controlling the fourth switching unit and the second transmission sub-unit to alternately conduct;

[0035] The controlling the third switching unit and the fifth switching unit to alternately conduct includes: controlling the second transmission sub-unit to remain conducting and controlling the third switching unit and the first transmission sub-unit to alternately conduct.

[0036] Optionally, the bridgeless power factor correction circuit includes two of the energy storage inductors and two of the loop control modules;

[0037] When controlling the third switch unit or the fourth switch unit of one of the loop control modules to conduct, control the fifth switch unit of the other loop control module to conduct.

[0038] The technical solution of the embodiment of the present invention provides a bridgeless power factor correction circuit including an input capacitor, an energy storage module, a control module, a polarity control module, at least one energy storage inductor, and at least one loop control module. The energy storage module includes a first energy storage capacitor and a second energy storage capacitor connected in series, such that the first energy storage capacitor and the second energy storage capacitor provide an output voltage in series, which can effectively reduce the requirement for the energy storage capacity of the energy storage inductor, thereby reducing the size of the energy storage inductor. And the energy storage inductor occupies most of the area of the bridgeless power factor correction circuit, and the size of the energy storage inductor largely affects the size of the entire circuit; therefore, reducing the volume of the energy storage inductor can effectively reduce the volume of the bridgeless power factor correction circuit. Also, the voltage across each energy storage capacitor only needs to reach half of the required output voltage ultimately, which can effectively reduce the loss of the energy storage inductor and improve the efficiency of the bridgeless power factor correction circuit. And in this circuit, in order to charge the two energy storage capacitors, the control module can control the on / off of the first switch unit, the second switch unit, the third switch unit, the fourth switch unit, and the fifth switch unit according to the input voltage, thereby controlling the charging process of the two energy storage capacitors and realizing bridgeless power factor correction. In summary, the embodiment of the present invention can reduce the volume of the bridgeless power factor correction circuit and improve the efficiency of the bridgeless power factor correction circuit.

[0039] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention, and for those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0041] Figure 1 It is a schematic structural diagram of a bridgeless power factor correction circuit provided by an embodiment of the present invention;

[0042] Figure 2 It is a schematic structural diagram of another bridgeless power factor correction circuit provided by an embodiment of the present invention;

[0043] Figure 3 It is a schematic diagram of the comparison of the measured waveforms between the first driving voltage of the first transistor gate and the input voltage;

[0044] Figure 4 Schematic diagram of the measured waveform comparison between the second driving voltage of the second transistor gate and the input voltage;

[0045] Figure 5 Schematic diagram of the measured waveform comparison between the third driving voltage of the third transistor gate and the input voltage;

[0046] Figure 6 Schematic diagram of the measured waveform comparison between the fourth driving voltage of the fourth transistor gate and the input voltage;

[0047] Figure 7 Schematic diagram of the measured waveform comparison between the fifth driving voltage of the fifth transistor gate and the input voltage;

[0048] Figure 8 Schematic diagram of the measured waveform comparison between the sixth driving voltage of the sixth transistor gate and the input voltage;

[0049] Figure 9 Measured waveform diagram of the input current and input voltage of the bridgeless power factor correction circuit;

[0050] Figure 10 Schematic diagram of the structure of another bridgeless power factor correction circuit provided by the embodiment of the present invention;

[0051] Figure 11 Flowchart of a control method for a bridgeless power factor correction circuit provided by the embodiment of the present invention. Detailed implementation manners

[0052] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0053] It should be noted that the terms "first", "second", etc. in the description, claims and above-mentioned drawings of the present invention are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and their variants are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0054] An embodiment of the present invention provides a bridgeless power factor correction circuit. Figure 1 It is a schematic structural diagram of a bridgeless power factor correction circuit provided by an embodiment of the present invention. Refer to Figure 1 , the bridgeless power factor correction circuit includes: an input capacitor C0, an energy storage module 10, a control module 40, a polarity control module 20, at least one energy storage inductor L1, and at least one loop control module 30.

[0055] Among them, the input capacitor C0 is connected between the first input terminal N and the second input terminal L of the bridgeless power factor correction circuit. The energy storage module 10 includes a first energy storage capacitor C1 and a second energy storage capacitor C2 connected in series between the first output terminal OUT1 and the second output terminal OUT2 of the bridgeless power factor correction circuit. The polarity control module 20 includes a first switch unit 21 and a second switch unit 22. The first switch unit 21 is connected between the first input terminal N and the first output terminal OUT1, and the second switch unit 22 is connected between the first input terminal N and the second output terminal OUT2. The first end of each energy storage inductor L1 is connected to the second input terminal L. Each loop control module 30 corresponds to each energy storage inductor L1 one by one; the loop control module 30 includes a third switch unit 31, a fourth switch unit 32, and a fifth switch unit 33; in any loop control module 30, the third switch unit 31 is connected between the first output terminal OUT1 and the first node A of the loop control module 30, the fourth switch unit 32 is connected between the second output terminal OUT2 and the first node A of the loop control module 30, and the fifth switch unit 33 is connected between the second node B and the first node A of the loop control module 30; among them, the first node A of the loop control module 30 is connected to the second end of the energy storage inductor L1 corresponding to the loop control module 30, and the second node B is the connection node between the first energy storage capacitor C1 and the second energy storage capacitor C2; the control module 40 is respectively connected to the control terminal G1 of the first switch unit 21, the control terminal G2 of the second switch unit 22, the control terminal G3 of each third switch unit 31, the control terminal G4 of each fourth switch unit 32, and the control terminal G5 of each fifth switch unit 33.

[0056] Among them, the bridgeless power factor correction circuit can be applied to various power supplies. The input voltage is between the first input terminal N and the second input terminal L, which can specifically be single-phase AC input. The output voltage is between the first output terminal OUT1 and the second output terminal OUT2, and this output voltage is the power factor correction voltage. Figure 1 An energy storage inductor L1 and a loop control module 30 are exemplarily given, but it is not a limitation to the present invention.

[0057] For any of the switch units in the first switch unit 21, the second switch unit 22, the third switch unit 31, the fourth switch unit 32, and the fifth switch unit 33, the switch unit is used to conduct or cut off according to the potential of its control terminal. The conduction potentials of each switch unit can be set to be the same or different according to requirements. Any switch unit can be composed of any device with a controllable switch function.

[0058] The control module 40 realizes power factor correction by controlling the on and off of each unit, and the specific analysis is as follows:

[0059] When the control module 40 controls the second switching unit 22 and the fourth switching unit 32 to conduct and controls other switching units to turn off, a first loop can be formed to enable the input capacitor C0 to store energy in the energy storage inductor L1.

[0060] When the control module 40 controls the second switching unit 22 and the fifth switching unit 33 to conduct and controls other switching units to turn off, a second loop can be formed at this time to enable the input capacitor C0 and the energy storage inductor L1 to be connected in series to release energy to the second energy storage capacitor C2, or to enable the input capacitor C0 to store energy in the energy storage inductor L1 and the second energy storage capacitor C2 at the same time. Among them, the specific function of the second loop is related to the magnitude of the input voltage. For example, when the absolute value of the input voltage is less than or equal to half of the absolute value of the output voltage, the second loop is used to enable the input capacitor C0 and the energy storage inductor L1 to be connected in series to release energy to the second energy storage capacitor C2; when the absolute value of the input voltage is greater than half of the absolute value of the output voltage, the second loop is used to enable the input capacitor C0 to store energy in the energy storage inductor L1 and the second energy storage capacitor C2 at the same time.

[0061] When the control module 40 controls the second switching unit 22 and the third switching unit 31 to conduct and controls other switching units to turn off, a third loop can be formed at this time to enable the input capacitor C0 and the energy storage inductor L1 to jointly release energy to the first energy storage capacitor C1 and the second energy storage capacitor C2.

[0062] When the control module 40 controls the first switching unit 21 and the third switching unit 31 to conduct and controls other switching units to turn off, a fourth loop can be formed at this time to enable the input capacitor C0 to store energy in the energy storage inductor L1.

[0063] When the control module 40 controls the first switching unit 21 and the fifth switching unit 33 to conduct and controls other switching units to turn off, a fifth loop can be formed at this time to enable the input capacitor C0 and the energy storage inductor L1 to be connected in series to release energy to the first energy storage capacitor C1, or to enable the input capacitor C0 to store energy in the energy storage inductor L1 and the first energy storage capacitor C1 at the same time. Among them, the specific function of the fifth loop is related to the magnitude of the input voltage. For example, when the absolute value of the input voltage is less than or equal to half of the absolute value of the output voltage, the fifth loop is used to enable the input capacitor C0 and the energy storage inductor L1 to be connected in series to release energy to the first energy storage capacitor C1; when the absolute value of the input voltage is greater than half of the absolute value of the output voltage, the second loop is used to enable the input capacitor C0 to store energy in the energy storage inductor L1 and the first energy storage capacitor C1 at the same time.

[0064] When the control module 40 controls the first switching unit 21 and the fourth switching unit 32 to conduct and controls other switching units to turn off, a sixth loop can be formed at this time to enable the input capacitor C0 and the energy storage inductor L1 to jointly release energy to the first energy storage capacitor C1 and the second energy storage capacitor C2.

[0065] In summary, through the on / off states of each switching unit, multiple circuits can be provided to achieve different energy storage / charging functions. Therefore, the control module 40 can reasonably select the required circuit according to the voltage state between the first input terminal N and the second input terminal L (such as including the positive / negative of the voltage and the voltage value, etc.), and control the action time of each circuit to achieve power factor correction.

[0066] Exemplarily, the first output terminal OUT1 is a positive output terminal, and the second output terminal OUT2 is a negative output terminal; the positive electrode of the first energy storage capacitor C1 is connected to the first output terminal OUT1, the negative electrode of the first energy storage capacitor C1 is connected to the second node B, the positive electrode of the second energy storage capacitor C2 is connected to the second node B, and the negative electrode of the second energy storage capacitor C2 is connected to the second output terminal OUT2. Correspondingly, when the voltage of the second input terminal L is a positive voltage compared to the voltage of the first input terminal N, the control module 40 can control the first circuit and the second circuit to appear alternately according to the magnitude of the positive voltage, so as to realize the alternation of storing energy in the energy storage inductor L1 and supplying power to the second energy storage capacitor C2; or control the second circuit and the third circuit to appear alternately, so as to realize the alternation of storing energy in the energy storage inductor L1 and the second energy storage capacitor C2 at the same time and supplying power to the first energy storage capacitor C1 and the second energy storage capacitor C2 at the same time. When the voltage of the second input terminal L is a negative voltage compared to the voltage of the first input terminal N, the control module 40 can control the fourth circuit and the fifth circuit to appear alternately according to the magnitude of the negative voltage, so as to realize the alternation of storing energy in the energy storage inductor L1 and supplying power to the first energy storage capacitor C1; or control the fifth circuit and the sixth circuit to appear alternately, so as to realize the alternation of storing energy in the energy storage inductor L1 and the first energy storage capacitor C1 at the same time and supplying power to the first energy storage capacitor C1 and the second energy storage capacitor C2 at the same time.

[0067] The technical solution of the embodiment of the present invention provides a bridgeless power factor correction circuit including an input capacitor C0, an energy storage module 10, a control module 40, a polarity control module 20, at least one energy storage inductor L1, and at least one loop control module 30. The energy storage module 10 includes a first energy storage capacitor C1 and a second energy storage capacitor C2 connected in series, so that the first energy storage capacitor C1 and the second energy storage capacitor C2 provide an output voltage in series, which can effectively reduce the requirement for the energy storage capacity of the energy storage inductor L1, thereby reducing the size of the energy storage inductor L1. The energy storage inductor L1 occupies most of the area of the bridgeless power factor correction circuit, and the size of the energy storage inductor L1 greatly affects the size of the entire circuit. Therefore, reducing the volume of the energy storage inductor L1 can effectively reduce the volume of the bridgeless power factor correction circuit. Moreover, the voltage across each energy storage capacitor finally reaches half of the required output voltage, which can effectively reduce the loss of the energy storage inductor L1 and improve the efficiency of the bridgeless power factor correction circuit. In addition, in this circuit, in order to charge the two energy storage capacitors, the control module 40 can control the on / off of the first switch unit 21, the second switch unit 22, the third switch unit 31, the fourth switch unit 32, and the fifth switch unit 33 according to the input voltage, thereby controlling the charging process of the two energy storage capacitors and achieving bridgeless power factor correction. In summary, the embodiment of the present invention can reduce the volume of the bridgeless power factor correction circuit and improve the efficiency of the bridgeless power factor correction circuit.

[0068] Figure 2 FIG. is a schematic structural diagram of another bridgeless power factor correction circuit provided by an embodiment of the present invention. Refer to Figure 2 , based on the above embodiment, optionally, the control terminal G5 of the fifth switch unit 33 includes a first sub-control terminal G5-1 and a second sub-control terminal G5-2; the control module 40 is respectively connected to the first sub-control terminal G5-1 and the second sub-control terminal G5-2. The fifth switch unit 33 includes: a first transmission sub-unit 331 and a second transmission sub-unit 332 connected in series between a first node A and a second node B of the loop control module 30 where the fifth switch unit 33 is located. The first sub-control terminal G5-1 serves as the control terminal of the first transmission sub-unit 331, and the second sub-control terminal G5-2 serves as the control terminal of the second transmission sub-unit 332.

[0069] Among them, the first transmission sub-unit 331 is used to conduct or turn off according to the potential of the first sub-control terminal G5-1, and the second transmission sub-unit 332 is used to conduct or turn off according to the potential of the second sub-control terminal G5-2. When both the first transmission sub-unit 331 and the second transmission sub-unit 332 are conducting, the fifth switch unit 33 is conducting; when at least one of the first transmission sub-unit 331 and the second transmission sub-unit 332 is turned off, the fifth switch unit 33 is turned off.

[0070] In the above embodiments, the functions of the functional modules in the bridgeless power factor correction circuit are described. Next, the specific structures that the functional modules may have are described, but this is not a limitation to the present invention.

[0071] Continuing to refer to Figure 2 , based on the above embodiments, optionally, the first switch unit 21 includes a first transistor Q1. The control electrode of the first transistor Q1 is connected to the control terminal G1 of the first switch unit 21. The first electrode of the first transistor Q1 is connected to the first input terminal N. The second electrode of the first transistor Q1 is connected to the first output terminal OUT1. The second switch unit 22 includes a second transistor Q2. The control electrode of the second transistor Q2 is connected to the control terminal G2 of the second switch unit 22. The first electrode of the second transistor Q2 is connected to the second output terminal OUT2. The second electrode of the second transistor Q2 is connected to the first input terminal N. The third switch unit 31 includes a third transistor Q3. The control electrode of the third transistor Q3 is connected to the control terminal G3 of the third switch unit 31. The first electrode of the third transistor Q3 is connected to the first node A. The second electrode of the third transistor Q3 is connected to the first output terminal OUT1. The fourth switch unit 32 includes a fourth transistor Q4. The control electrode of the fourth transistor Q4 is connected to the control terminal G4 of the fourth switch unit 32. The first electrode of the fourth transistor Q4 is connected to the second output terminal OUT2. The second electrode of the fourth transistor Q4 is connected to the first node A. The first transmission sub-unit 331 includes a fifth transistor Q5. The control electrode of the fifth transistor Q5 is connected to the first sub-control terminal G5-1 of the fifth switch unit 33. The second electrode of the fifth transistor Q5 is connected to the first node A. The second transmission sub-unit 332 includes a sixth transistor Q6. The control electrode of the sixth transistor Q6 is connected to the second sub-control terminal G5-2 of the fifth switch unit 33. The first electrode of the sixth transistor Q6 is connected to the first electrode of the fifth transistor Q5. The second electrode of the sixth transistor Q6 is connected to the second node B.

[0072] Exemplarily, the first transistor Q1, the second transistor Q2, the third transistor Q3, the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor Q6 may all be field effect transistors.

[0073] Based on the above embodiments, optionally, the control module 40 can control the on and off of the first switch unit 21 and the second switch unit 22 according to the positive and negative of the voltage difference between the second input terminal L and the first input terminal N, so as to ensure the conversion from AC input to DC output based on the control of the two switch units in the polarity control module 20. On this basis, the control module 40 can select one of the third switch unit 31 and the fourth switch unit 32 to conduct alternately with the fifth switch unit 33 according to the magnitude of the voltage difference between the second input terminal L and the first input terminal N, so as to select the most suitable power factor correction strategy for different input voltage magnitudes. Next, taking Figure 2Taking the specific circuit structure in [the circuit] as an example, the working process of the bridgeless power factor correction circuit under different conditions will be described.

[0074] Specifically, the voltage on any energy storage capacitor is half of the output voltage. When the absolute value of the input voltage is less than or equal to the absolute value of half of the output voltage, the first strategy can be used to control the working process of the bridgeless power factor correction circuit; when the absolute value of the input voltage is greater than the absolute value of half of the output voltage, the second strategy can be used to control the working process of the bridgeless power factor correction circuit. Then, when the amplitude of the input voltage is less than or equal to the absolute value of half of the output voltage, the first strategy can be always executed; when the amplitude of the input voltage is greater than the absolute value of half of the output voltage, the first strategy and the second strategy can be alternately executed in real time according to the amplitude of the input voltage. The above strategies will be described through specific embodiments below.

[0075] Exemplarily, the output voltage is a DC voltage of 380V, and half of the output voltage is 190V. Then, when the absolute value of the input voltage is less than or equal to 190V, the first strategy can be used; when the absolute value of the input voltage is greater than 190V, the second strategy can be used.

[0076] The first strategy specifically includes: when the voltage difference between the second input terminal L and the first input terminal N is positive, that is, the voltage of the second input terminal L is a positive voltage compared to the voltage of the first input terminal N, the control module 40 controls the second transistor Q2 and the fifth transistor Q5 to remain continuously conducting, and controls the fourth transistor Q4 and the sixth transistor Q6 to conduct alternately at high frequency. Here, the fourth transistor Q4 is a switching transistor, and the sixth transistor Q6 is a freewheeling diode. At this time, the input capacitor C0, the energy storage inductor L1, the second transistor Q2, the fourth transistor Q4, the fifth transistor Q5, the sixth transistor Q6, and the second energy storage capacitor C2 form a first boost converter. During the conduction period of the fourth transistor Q4, the input capacitor C0 stores energy for the energy storage inductor L1; after the fourth transistor Q4 is turned off and the sixth transistor Q6 conducts, the input capacitor C0 and the energy storage inductor L1 are connected in series to release energy to the second energy storage capacitor C2. Exemplarily, the sixth transistor Q6 can use a transistor with a body diode, so that the sixth transistor Q6 can be turned on and off naturally through its own body diode.

[0077] When the voltage difference between the second input terminal L and the first input terminal N is negative, that is, the voltage of the second input terminal L is negative with respect to the voltage of the first input terminal N, the control module 40 controls the first transistor Q1 and the sixth transistor Q6 to remain continuously conducting, and controls the third transistor Q3 and the fifth transistor Q5 to conduct in high-frequency alternation. Here, the third transistor Q3 is a switching transistor, and the fifth transistor Q5 is a freewheeling diode. At this time, the input capacitor C0, the energy storage inductor L1, the first transistor Q1, the third transistor Q3, the fifth transistor Q5, the sixth transistor Q6, and the first energy storage capacitor C1 form a second boost converter. During the conduction period of the third transistor Q3, the input capacitor C0 stores energy for the energy storage inductor L1; after the third transistor Q3 is turned off, the fifth transistor Q5 conducts, and the input capacitor C0 and the energy storage inductor L1 are connected in series to release energy to the first energy storage capacitor C1. Exemplarily, the fifth transistor Q5 can be a transistor with a body diode, so that the fifth transistor Q5 can be turned on and off naturally through its own body diode.

[0078] Through this setting, it can be ensured that when the voltage between the first input terminal N and the second input terminal L is in the positive half-cycle, the first boost converter supplies power to the second energy storage capacitor C2, and when the voltage between the first input terminal N and the second input terminal L is in the negative half-cycle, the second boost converter supplies power to the first energy storage capacitor C1, so that the voltage across the first energy storage capacitor C1 and the final voltage across the second energy storage capacitor C2 are both half of the output voltage. Then, each boost converter superimposes the energy stored in the energy storage inductor L1 on the input voltage and outputs energy to the first energy storage capacitor C1 and the second energy storage capacitor C2 respectively, which is equivalent to providing twice the input superimposed inductor energy to the output energy. For example, when boosting 100VAC to 380V, each boost converter boosts 100VAC to 190V. In this way, compared with the traditional bridgeless power factor correction circuit that directly superimposes the energy stored in the energy storage inductor on the input voltage and releases it to the output (such as directly boosting 100VAC to 380V), the boost ratio of the input voltage and the output voltage can be effectively reduced, the total energy storage required for the energy storage inductor L1 can be reduced, thereby reducing the loss of the energy storage inductor L1, improving the efficiency of the power factor correction circuit, and reducing the volume of the energy storage inductor, and further reducing the volume of the bridgeless power factor correction circuit.

[0079] The second strategy specifically includes: when the voltage difference between the second input terminal L and the first input terminal N is positive, the control module 40 controls the second transistor Q2 and the sixth transistor Q6 to remain continuously conducting, and controls the third transistor Q3 and the fifth transistor Q5 to conduct alternately at a high frequency. Here, the fifth transistor Q5 is a switching transistor, and the third transistor Q3 is a freewheeling diode. At this time, the input capacitor C0, the energy storage inductor L1, the second transistor Q2, the third transistor Q3, the fifth transistor Q5, the sixth transistor Q6, the first energy storage capacitor C1, and the second energy storage capacitor C2 form a third boost converter. During the conduction period of the fifth transistor Q5, the input capacitor C0, the energy storage inductor L1, and the second energy storage capacitor C2 form a loop, enabling the input capacitor C0 to store energy for both the energy storage inductor L1 and the second energy storage capacitor C2 simultaneously. After the fifth transistor Q5 is turned off, the third transistor Q3 conducts for freewheeling, causing the energy on the input capacitor C0 to be superimposed with the energy of the energy storage inductor L1 and released to the first energy storage capacitor C1 and the second energy storage capacitor C2.

[0080] When the voltage difference between the second input terminal L and the first input terminal N is negative, the control module 40 controls the first transistor Q1 and the fifth transistor Q5 to remain continuously conducting, and controls the fourth transistor Q4 and the sixth transistor Q6 to conduct alternately at a high frequency. Here, the sixth transistor Q6 is a switching transistor, and the fourth transistor Q4 is a freewheeling diode. At this time, the input capacitor C0, the energy storage inductor L1, the first transistor Q1, the fourth transistor Q4, the fifth transistor Q5, the sixth transistor Q6, the first energy storage capacitor C1, and the second energy storage capacitor C2 form a fourth boost converter. During the conduction period of the sixth transistor Q6, the input capacitor C0, the energy storage inductor L1, and the first energy storage capacitor C1 form a loop, enabling the input capacitor C0 to store energy for both the energy storage inductor L1 and the first energy storage capacitor C1 simultaneously. After the sixth transistor Q6 is turned off, the fourth transistor Q4 conducts for freewheeling, causing the energy on the input capacitor C0 to be superimposed with the energy of the energy storage inductor L1 and released to the first energy storage capacitor C1 and the second energy storage capacitor C2.

[0081] With this setting, when the voltage between the first input terminal N and the second input terminal L is in the positive or negative half-cycle, and the absolute value of the input voltage is greater than half of the absolute value of the output voltage, while storing energy in the energy storage inductor L1 through the third boost converter or the fourth boost converter, energy can be stored in the first energy storage capacitor C1 and / or the second energy storage capacitor C2, reducing the total energy storage required by the energy storage inductor L1, thereby reducing the loss of the energy storage inductor L1, improving the efficiency of the power factor correction circuit, and reducing the volume of the energy storage inductor, and further reducing the volume of the bridgeless power factor correction circuit.

[0082] In a specific embodiment, optionally, the output voltage is 380V, and the input voltage is a voltage with a lower amplitude, for example, between 100VAC and 120VAC. Specifically, when it is 100VAC, the first strategy can always be adopted. In another specific embodiment, optionally, the output voltage is 380V, and the input voltage is a voltage with a higher amplitude, for example, 240VAC. In this case, the first strategy or the second strategy can be selected in real time according to the magnitude of the input voltage.

[0083] It should be noted that when the amplitude of the input voltage is greater than the absolute value of half of the output voltage, the fifth switching unit 33 can always be controlled to turn off, so that the bridgeless power factor correction circuit can adopt the control strategy of the traditional bridgeless power factor correction circuit for power factor correction. For example, the on and off of the first switching unit 21, the second switching unit 22, the third switching unit 31, and the fourth switching unit 32 are controlled according to the positive and negative of the input voltage to charge the energy storage module 10 as a whole.

[0084] Based on the above embodiments, optionally, the breakdown voltages of the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 are all greater than the absolute value of the voltage difference between the first output terminal OUT1 and the second output terminal OUT2; the breakdown voltages of the fifth transistor Q5 and the sixth transistor Q6 are both greater than half of the absolute value of the voltage difference between the first output terminal OUT1 and the second output terminal OUT2. Exemplarily, when the absolute value of the voltage difference between the first output terminal OUT1 and the second output terminal OUT2 is 380V, the breakdown voltages of the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 can all be 500V, and the breakdown voltages of the fifth transistor Q5 and the sixth transistor Q6 can both be 250V.

[0085] Based on the above embodiments, optionally, the on-state impedances of the fifth transistor Q5 and the sixth transistor Q6 are both the first impedance, and the on-state impedances of the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 are all the second impedance, and the first impedance is half of the second impedance. By setting the first impedance to be half of the second impedance, the losses of the first transistor Q1, the second transistor Q2, the third transistor Q3, the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor Q6 can be made equivalent to the losses of the switching tube part in the traditional bridgeless power factor correction circuit.

[0086] Based on the above embodiments, optionally, the withstand voltage of the first energy storage capacitor C1 and the withstand voltage of the second energy storage capacitor C2 are both greater than half of the absolute value of the voltage difference between the first output terminal OUT1 and the second output terminal OUT2. Exemplarily, both the first energy storage capacitor C1 and the second energy storage capacitor C2 can be electrolytic capacitors; when the absolute value of the voltage difference between the first output terminal OUT1 and the second output terminal OUT2 is 380V, the withstand voltage of the first energy storage capacitor C1 and the withstand voltage of the second energy storage capacitor C2 can both be 250V.

[0087] To verify the effect of the bridgeless power factor correction circuit provided in any of the above embodiments, the inventor conducted actual measurements based on Figure 2 the circuit shown. The actual measurements were based on a 500W bridgeless power factor correction circuit. The test results are as follows: when the input voltage is 100VAC, for this bridgeless power factor correction circuit compared with a traditional bridgeless power factor correction circuit (without the fifth transistor Q5 and the sixth transistor Q6, and the energy storage module 10 is composed of one electrolytic capacitor), the full-load efficiency is increased from 97.1% to 97.6%, that is, it is increased by 0.5%, and the efficiency is increased by 0.7% compared with a bridged power factor correction circuit. When the input voltage is 240VAC, for this bridgeless power factor correction circuit compared with the traditional bridgeless power factor correction circuit, the full-load efficiency is increased from 99.0% to 99.1%, that is, it is increased by 0.1%, and the efficiency is increased by 0.3% compared with a bridged power factor correction circuit.

[0088] At the same time, during the test process, the inventor conducted actual measurements on the input current, input voltage, and the driving voltage of each transistor gate of this circuit. The test results can be seen in Figures 3 to 9 . Among them, the test frequency is 50Hz.

[0089] Among them, Figures 3 - 8 are respectively the schematic diagrams of the measured waveform comparison between the first driving voltage of the first transistor gate, the second driving voltage of the second transistor gate, the third driving voltage of the third transistor gate, the fourth driving voltage of the fourth transistor gate, the fifth driving voltage of the fifth transistor gate, the sixth driving voltage of the sixth transistor gate and the input voltage. Figures 3 - 8 The waveforms of the input voltage within one cycle are given in all of them. Among them, the horizontal axis represents time, the value of the driving voltage of the transistor gate refers to the scale of the left vertical axis, and the value of the input voltage refers to the scale of the right vertical axis. The blue line represents the input voltage, and the red line represents the driving voltage of each transistor gate. Exemplarily, each transistor conducts according to a high level (here it is 10V) and turns off according to a low level (here it is 0V). It should be noted that, Figures 5 - 8The large areas of red color indicate that the driving voltage is a high-frequency signal during this stage, with high and low levels alternating at high frequency. The large areas of red are caused by the fact that the frequency of the driving voltage is too high compared to the frequency of the input voltage. For the developed view of any large red area, refer to Figure 5 the developed view at the dashed box in Figures 6 - 8 where it will not be further expanded one by one.

[0090] Specifically, refer to Figure 3 , when the input voltage is in the positive half-cycle, the first transistor Q1 is turned off; when the input voltage is in the negative half-cycle, the first transistor Q1 is turned on. Refer to Figure 4 , when the input voltage is in the positive half-cycle, the second transistor Q2 is turned on; when the input voltage is in the negative half-cycle, the second transistor Q2 is turned off. Refer to Figure 5 , when the input voltage is in the positive half-cycle, the third transistor Q3 is turned off; when the input voltage is in the negative half-cycle, the third transistor Q3 is turned on at high frequency. Refer to Figure 6 , when the input voltage is in the positive half-cycle, the fourth transistor Q4 is turned on at high frequency; when the input voltage is in the negative half-cycle, the fourth transistor Q4 is turned off. Refer to Figure 7 , when the input voltage is in the positive half-cycle, the fifth transistor Q5 is turned on; when the input voltage is in the negative half-cycle, the fifth transistor Q5 is turned on at high frequency. Refer to Figure 8 , when the input voltage is in the positive half-cycle, the sixth transistor Q6 is turned on at high frequency; when the input voltage is in the negative half-cycle, the sixth transistor Q6 is turned on.

[0091] Figure 9 is the measured waveform diagram of the input current and input voltage of the bridgeless power factor correction circuit. Among them, the blue line represents the input voltage, and the red line represents the input current. Here, the envelope shape of the input current is directly given for easy display. Refer to Figure 9 It can be seen that in the bridgeless power factor correction circuit provided in this embodiment, the envelope of the input current is a sine wave and is basically in the same phase as the input voltage, achieving good power factor correction.

[0092] Figure 10 is the structural schematic diagram of another bridgeless power factor correction circuit provided by the embodiment of the present invention. Refer to Figure 10, in one embodiment, optionally, the bridgeless power factor correction circuit may include two energy storage inductors L1, namely a first energy storage inductor L1-1 and a second energy storage inductor L1-2; and two loop control modules 30 respectively connected to the two energy storage inductors L1, namely a first loop control module 30-1 and a second loop control module 30-2. Among them, the first loop control module 30-1 includes a first third transistor Q3-1, a first fourth transistor Q4-1, a first fifth transistor Q5-1 and a first sixth transistor Q6-1. The control end of the first third transistor Q3-1 is connected to the control end G3-1 of the first third switch unit; the control end of the first fourth transistor Q4-1 is connected to the control end G4-1 of the first fourth switch unit; the control end of the first fifth transistor Q5-1 is connected to the first sub-control end G5-11, and the control end of the first sixth transistor Q6-1 is connected to the first second sub-control end G5-21. The second loop control module 30-2 includes a second third transistor Q3-2, a second fourth transistor Q4-2, a second fifth transistor Q5-2 and a second sixth transistor Q6-2. The control end of the second third transistor Q3-2 is connected to the control end G3-2 of the second third switch unit, the control end of the second fourth transistor Q4-2 is connected to the control end G4-2 of the second fourth switch unit, the control end of the second fifth transistor Q5-2 is connected to the second first sub-control end G5-12, and the control end of the second sixth transistor Q6-1 is connected to the second second sub-control end G5-22. The first node A1 of the first loop control module 30-1 is connected to the second end of the first energy storage inductor L1-1, and the second node A2 of the second loop control module 30-2 is connected to the second end of the second energy storage inductor L1-2.

[0093] In this way, by setting two sets of energy storage inductors and loop control modules, the efficiency of the bridgeless power factor correction circuit can be further improved, making the circuit more suitable for high-power applications.

[0094] Exemplarily, by setting two sets of energy storage inductors and a loop control module, an interleaved bridgeless power factor correction circuit can be formed. Specifically, the transistors in the third switch unit of the two loop control modules can have a phase difference of 180° in the high-frequency operating state, that is, the first third transistor Q3-1 and the second third transistor Q3-2 can have a phase difference of 180° in the high-frequency operating state, which means the first third transistor Q3-1 and the second third transistor Q3-2 conduct alternately at high frequency. Also, the transistors in the fourth switch unit of the two loop control modules can have a phase difference of 180° in the high-frequency operating state, that is, the first fourth transistor Q4-1 and the second fourth transistor Q4-2 can have a phase difference of 180° in the high-frequency operating state, which means the first fourth transistor Q4-1 and the second fourth transistor Q4-2 conduct alternately at high frequency. It can be understood that the polarity control module 20 cooperating with the first loop control module 30-1 can adopt the above first strategy and second strategy for control, and the polarity control module 20 cooperating with the second loop control module 30-2 can also adopt the above first strategy and second strategy for control. The cooperation relationship between the fifth switch unit and the third switch unit and the fourth switch unit in any loop control module can refer to the above description and will not be elaborated here.

[0095] It should be noted that in the above embodiments, it is exemplarily shown that the transistors in the third switch unit and the fourth switch unit of the two loop control modules have a phase difference of 180° in the high-frequency operating state, but this is not a limitation to the present invention. In actual applications, the phase difference of the transistors in the two third switch units in the high-frequency operating state, and the phase difference of the transistors in the two fourth switch units in the high-frequency operating state can be set according to actual requirements.

[0096] To verify the efficiency of the interleaved bridgeless power factor correction circuit provided in the above embodiments in high-power applications, the inventor conducted actual measurements on the circuit as Figure 10 shown. The actual measurement was based on a 1000W bridgeless power factor correction circuit, and the test results are as follows: when the input voltage is 100VAC, the full-load efficiency of this interleaved bridgeless power factor correction circuit is 97.9%.

[0097] The embodiment of the present invention also provides a control method for a bridgeless power factor correction circuit. This embodiment can be applied to the bridgeless power factor correction circuit provided in any of the above embodiments. This method can be executed by a control module, and the control module can be implemented in the form of hardware and / or software.

[0098] Figure 11 For the flowchart of a control method for a bridgeless power factor correction circuit provided by an embodiment of the present invention, referring to Figure 11 , the control method for the bridgeless power factor correction circuit includes:

[0099] S101. For the polarity control module, according to the positive or negative value of the first voltage difference, control one of the first switch unit and the second switch unit to conduct, and the other to turn off; wherein, the first voltage difference is the voltage difference between the second input terminal and the first input terminal.

[0100] Specifically, the first voltage difference is the value obtained by subtracting the voltage of the first input terminal from the voltage of the second input terminal. Exemplarily, the first output terminal is the positive output terminal, and the second output terminal is the negative output terminal; when the first voltage difference is positive, control the second switch unit to conduct and the first switch unit to turn off; when the first voltage difference is negative, control the first switch unit to conduct and the second switch unit to turn off. Controlling the two switch units in the polarity control module according to the positive or negative value of the first voltage difference can make the positive output terminal always receive a positive voltage and the negative output terminal always receive a negative voltage, thereby realizing voltage polarity control. For the specific control process, please refer to the description of the specific working process of the bridgeless power factor correction circuit in the above embodiment, and details will not be elaborated here.

[0101] S102. For any loop control module, according to the magnitude of the absolute value of the first voltage difference, control one of the third switch unit and the fourth switch unit to conduct alternately with the fifth switch unit, and control the other between the third switch unit and the fourth switch unit to turn off.

[0102] Specifically, when the absolute value of the first voltage difference is less than or equal to half of the absolute value of the output voltage, if it is necessary to supply power to the second energy storage capacitor by superimposing the energy of the input capacitor and the energy storage inductor, control the fourth switch unit and the fifth switch unit to conduct alternately. If it is necessary to supply power to the first energy storage capacitor by superimposing the energy of the input capacitor and the energy storage inductor, control the third switch unit and the fifth switch unit to conduct alternately.

[0103] When the absolute value of the first voltage difference is greater than half of the absolute value of the output voltage, if it is necessary to store energy in the energy storage inductor by the input capacitor and supply power to the first energy storage capacitor and the second energy storage capacitor at the same time, control the third switch unit and the fifth switch unit to conduct alternately or control the fourth switch unit and the fifth switch unit to conduct alternately.

[0104] In the technical solution of the embodiment of the present invention, the first energy storage capacitor and the second energy storage capacitor provide an output voltage in series, which can effectively reduce the requirement for the energy storage capacity of the energy storage inductor, thereby reducing the size of the energy storage inductor. The energy storage inductor occupies most of the area of the bridgeless power factor correction circuit, and the size of the energy storage inductor greatly affects the size of the entire circuit; therefore, reducing the volume of the energy storage inductor can effectively reduce the volume of the bridgeless power factor correction circuit. Moreover, the voltage across each energy storage capacitor only needs to reach half of the required output voltage eventually, which can effectively reduce the loss of the energy storage inductor and improve the efficiency of the bridgeless power factor correction circuit. Also, in this circuit, in order to charge the two energy storage capacitors, the control module can control the on and off of the first switch unit, the second switch unit, the third switch unit, the fourth switch unit, and the fifth switch unit according to the input voltage, thereby controlling the charging process of the two energy storage capacitors and realizing bridgeless power factor correction. To sum up, the embodiment of the present invention can reduce the volume of the bridgeless power factor correction circuit and improve the efficiency of the bridgeless power factor correction circuit.

[0105] Based on the above embodiment, optionally, the above S101 specifically includes: when the first voltage difference is positive, control the first switch unit to turn off and control the second switch unit to turn on. When the first voltage difference is negative, control the second switch unit to turn off and control the first switch unit to turn on.

[0106] The above S102 specifically includes:

[0107] 1. In the case where the first voltage difference is positive:

[0108] 1) When the absolute value of the first voltage difference is less than or equal to the second voltage difference, control the fourth switch unit and the fifth switch unit to conduct alternately, and control the third switch unit to turn off. In this way, the input capacitor can store energy for the energy storage inductor through the first loop, and the input capacitor and the energy storage inductor can be connected in series to release energy to the second energy storage capacitor through the second loop.

[0109] 2) When the absolute value of the first voltage difference is greater than the second voltage difference, control the third switch unit and the fifth switch unit to conduct alternately, and control the fourth switch unit to turn off; where the second voltage difference is half of the absolute value of the voltage difference between the first output terminal and the second output terminal. In this way, the input capacitor can store energy for both the energy storage inductor and the second energy storage capacitor through the second loop, and the input capacitor and the energy storage inductor can jointly release energy to the first energy storage capacitor and the second energy storage capacitor through the third loop.

[0110] 2. In the case where the first voltage difference is negative:

[0111] 1) When the absolute value of the first voltage difference is less than or equal to the second voltage difference, control the third switching unit and the fifth switching unit to conduct alternately, and control the fourth switching unit to turn off. In this way, the input capacitor can store energy for the energy storage inductor through the fourth loop, and the input capacitor and the energy storage inductor can be connected in series to release energy to the first energy storage capacitor through the fifth loop.

[0112] 2) When the absolute value of the first voltage difference is greater than the second voltage difference, control the fourth switching unit and the fifth switching unit to conduct alternately, and control the third switching unit to turn off. In this way, the input capacitor can store energy for both the energy storage inductor and the first energy storage capacitor through the fifth loop, and the input capacitor and the energy storage inductor can jointly release energy to the first energy storage capacitor and the second energy storage capacitor through the sixth loop.

[0113] In summary, the present embodiment provides a control method for a bridgeless power factor correction circuit, which can reduce the volume of the bridgeless power factor correction circuit and improve the efficiency.

[0114] Optionally, based on the above embodiments, the fifth switching unit includes: a first transmission subunit and a second transmission subunit. Controlling the fourth switching unit and the fifth switching unit to conduct alternately includes: controlling the first transmission subunit to remain conducting, and controlling the fourth switching unit and the second transmission subunit to conduct alternately. Controlling the third switching unit and the fifth switching unit to conduct alternately includes: controlling the second transmission subunit to remain conducting, and controlling the third switching unit and the first transmission subunit to conduct alternately.

[0115] Specifically, when the first voltage difference is positive and the absolute value of the first voltage difference is less than or equal to the absolute value of the second voltage difference, the first transmission subunit can be controlled to remain conducting, and the fourth switching unit and the second transmission subunit can be controlled to conduct alternately.

[0116] When the first voltage difference is positive and the absolute value of the first voltage difference is greater than the absolute value of the second voltage difference, the second transmission subunit can be controlled to remain conducting, and the third switching unit and the first transmission subunit can be controlled to conduct alternately.

[0117] When the first voltage difference is negative and the absolute value of the first voltage difference is less than or equal to the absolute value of the second voltage difference, the second transmission subunit can be controlled to remain conducting, and the third switching unit and the first transmission subunit can be controlled to conduct alternately.

[0118] When the first voltage difference is negative and the absolute value of the first voltage difference is greater than the absolute value of the second voltage difference, the first transmission subunit can be controlled to remain conducting, and the fourth switching unit and the second transmission subunit can be controlled to conduct alternately.

[0119] Based on the above embodiments, optionally, the bridgeless power factor correction circuit may include two energy storage inductors and two loop control modules. Correspondingly, for any one of the loop control modules, the relevant control methods provided by any of the above embodiments can be used for control.

[0120] Regarding the operating states between the two loop control modules, the two loop control modules can be controlled to operate in an interleaved manner to form an interleaved bridgeless power factor correction circuit. Specifically, when controlling the third switch unit or the fourth switch unit of one loop control module to conduct, control the fifth switch unit of the other loop control module to conduct.

[0121] For example, in the case where both loop control modules control the fourth switch unit and the fifth switch unit to conduct alternately, when the first fourth switch unit conducts, the second fourth switch unit can be controlled to turn off and the second fifth switch unit can be controlled to conduct simultaneously, so that the two loop control modules operate in an interleaved manner to achieve interleaved bridgeless power factor correction.

[0122] It should be noted that this embodiment provides a control method for an interleaved bridgeless power factor correction circuit, but it is not a limitation to the present invention. In practical applications, the relationship of the operating states between the two loop control modules can be set according to actual requirements.

[0123] It should be understood that various forms of the processes shown above can be used, reordering, adding, or deleting steps. For example, the steps described in the present invention can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. No limitation is imposed herein.

[0124] The above specific embodiments do not constitute a limitation to the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub - combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A bridgeless power factor correction circuit, characterized in that: include: An input capacitor connected between a first input terminal and a second input terminal of the bridgeless power factor correction circuit; An energy storage module, comprising a first energy storage capacitor and a second energy storage capacitor connected in series between a first output terminal and a second output terminal of the bridgeless power factor correction circuit; A polarity control module, comprising a first switch unit and a second switch unit; the first switch unit is connected between the first input terminal and the first output terminal, and the second switch unit is connected between the first input terminal and the second output terminal; for the polarity control module, when the first voltage difference is a positive value, the first switch unit is controlled to be turned off, and the second switch unit is controlled to be turned on; when the first voltage difference is a negative value, the second switch unit is controlled to be turned off, and the first switch unit is controlled to be turned on; the first voltage difference is the voltage difference between the second input terminal and the first input terminal; at least one energy storage inductor; The first end of each of the energy storage inductors is connected to the second input end; A loop control module corresponding one-to-one to the energy storage inductor; The loop control module includes: a third switch unit, a fourth switch unit and a fifth switch unit; the third switch unit is connected between the first output end and the first node of the loop control module, the fourth switch unit is connected between the second output end and the first node of the loop control module, and the fifth switch unit is connected between the second node and the first node of the loop control module; wherein the first node of the loop control module is connected to the second end of the energy storage inductor corresponding to the loop control module, and the second node is a connection node between the first energy storage capacitor and the second energy storage capacitor; for any loop control module, when the first voltage difference is a positive value, when the absolute value of the first voltage difference is less than or equal to the second voltage difference, the fourth switch unit is controlled The third switch unit and the fifth switch unit are alternately turned on, and the third switch unit is controlled to be turned off; when the absolute value of the first voltage difference is greater than the second voltage difference, the third switch unit and the fifth switch unit are controlled to be alternately turned on, and the fourth switch unit is controlled to be turned off; wherein the second voltage difference is half of the absolute value of the voltage difference between the first output terminal and the second output terminal; in the case where the first voltage difference is a negative value, when the absolute value of the first voltage difference is less than or equal to the second voltage difference, the third switch unit and the fifth switch unit are controlled to be alternately turned on, and the fourth switch unit is controlled to be turned off; when the absolute value of the first voltage difference is greater than the second voltage difference, the fourth switch unit and the fifth switch unit are controlled to be alternately turned on, and the third switch unit is controlled to be turned off; The control module is respectively connected to the control end of the first switch unit, the control end of the second switch unit, the control end of each of the third switch units, the control end of each of the fourth switch units and the control end of each of the fifth switch units.

2. The bridgeless power factor correction circuit according to claim 1, characterized in that: The control end of the fifth switch unit includes a first sub-control end and a second sub-control end; the control module is connected to the first sub-control end and the second sub-control end respectively; The fifth switch unit includes: a first transmission subunit and a second transmission subunit connected in series between the first node and the second node, the first sub-control end serving as the control end of the first transmission subunit, and the second sub-control end serving as the control end of the second transmission subunit.

3. The bridgeless power factor correction circuit according to claim 2, characterized in that: The first switch unit includes a first transistor, a control electrode of the first transistor is connected to a control terminal of the first switch unit, a first electrode of the first transistor is connected to the first input terminal, and a second electrode of the first transistor is connected to the first output terminal; The second switch unit includes a second transistor, a control electrode of the second transistor is connected to the control end of the second switch unit, a first electrode of the second transistor is connected to the second output end, and a second electrode of the second transistor is connected to the first input end; The third switch unit comprises a third transistor, a control electrode of the third transistor is connected to the control end of the third switch unit, a first electrode of the third transistor is connected to the first node, and a second electrode of the third transistor is connected to the first output end; The fourth switch unit includes a fourth transistor, a control electrode of the fourth transistor is connected to the control end of the fourth switch unit, a first electrode of the fourth transistor is connected to the second output end, and a second electrode of the fourth transistor is connected to the first node; The first transmission sub-unit includes a fifth transistor, a control electrode of the fifth transistor is connected to the first sub-control terminal of the fifth switch unit, and a second electrode of the fifth transistor is connected to the first node; The second transmission sub-unit includes a sixth transistor, a control electrode of the sixth transistor is connected to the second sub-control terminal of the fifth switch unit, a first electrode of the sixth transistor is connected to the first electrode of the fifth transistor, and a second electrode of the sixth transistor is connected to the second node.

4. The bridgeless power factor correction circuit according to claim 3, characterized in that: The withstand voltage of the first transistor, the withstand voltage of the second transistor, the withstand voltage of the third transistor and the withstand voltage of the fourth transistor are all greater than the absolute value of the voltage difference between the first output terminal and the second output terminal; the withstand voltage of the fifth transistor and the withstand voltage of the sixth transistor are both greater than half of the absolute value of the voltage difference between the first output terminal and the second output terminal; the on-state impedance of the fifth transistor and the sixth transistor are both the first impedance, and the on-state impedance of the first transistor, the second transistor, the third transistor and the fourth transistor are all the second impedance, and the first impedance is half of the second impedance.

5. The bridgeless power factor correction circuit according to claim 1, characterized in that: The withstand voltage of the first energy storage capacitor and the withstand voltage of the second energy storage capacitor are both greater than half of the absolute value of the voltage difference between the first output terminal and the second output terminal.

6. The bridgeless power factor correction circuit according to claim 1, characterized in that: The bridgeless power factor correction circuit includes two energy storage inductors and two loop control modules.

7. A control method for a bridgeless power factor correction circuit, characterized in that: Used to control the bridgeless power factor correction circuit according to any one of claims 1 to 6, executed by the control module; The control method of the bridgeless power factor correction circuit includes: For the polarity control module, according to the positive or negative of the first voltage difference, one of the first switch unit and the second switch unit is controlled to be turned on and the other is turned off; For any of the loop control modules, according to the absolute value of the first voltage difference, one of the third switch unit and the fourth switch unit is controlled to be alternately turned on with the fifth switch unit, and the other of the third switch unit and the fourth switch unit is controlled to be turned off; According to the positive or negative value of the first voltage difference, controlling one of the first switch unit and the second switch unit to be turned on and the other to be turned off includes: When the first voltage difference is a positive value, controlling the first switch unit to be turned off, and controlling the second switch unit to be turned on; When the first voltage difference is a negative value, controlling the second switch unit to be turned off, and controlling the first switch unit to be turned on; According to the absolute value of the first voltage difference, controlling one of the third switch unit and the fourth switch unit to be alternately turned on with the fifth switch unit, and controlling the other of the third switch unit and the fourth switch unit to be turned off, comprising: In the case where the first voltage difference is a positive value, when the absolute value of the first voltage difference is less than or equal to the second voltage difference, the fourth switch unit and the fifth switch unit are controlled to be alternately turned on, and the third switch unit is controlled to be turned off; when the absolute value of the first voltage difference is greater than the second voltage difference, the third switch unit and the fifth switch unit are controlled to be alternately turned on, and the fourth switch unit is controlled to be turned off; wherein the second voltage difference is half of the absolute value of the voltage difference between the first output terminal and the second output terminal; In the case that the first voltage difference is a negative value, when the absolute value of the first voltage difference is less than or equal to the second voltage difference, the third switch unit and the fifth switch unit are controlled to be alternately turned on, and the fourth switch unit is controlled to be turned off; when the absolute value of the first voltage difference is greater than the second voltage difference, the fourth switch unit and the fifth switch unit are controlled to be alternately turned on, and the third switch unit is controlled to be turned off.

8. The control method of the bridgeless power factor correction circuit according to claim 7, characterized in that: The fifth switch unit includes: a first transmission subunit and a second transmission subunit; The controlling the fourth switch unit and the fifth switch unit to be alternately turned on comprises: controlling the first transmission sub-unit to remain turned on, and controlling the fourth switch unit and the second transmission sub-unit to be alternately turned on; The controlling the third switch unit and the fifth switch unit to be alternately turned on includes: controlling the second transmission subunit to remain turned on, and controlling the third switch unit and the first transmission subunit to be alternately turned on.

9. The control method of the bridgeless power factor correction circuit according to claim 7, characterized in that: The bridgeless power factor correction circuit comprises two energy storage inductors and two loop control modules; When the third switch unit or the fourth switch unit of one of the loop control modules is controlled to be turned on, the fifth switch unit of another loop control module is controlled to be turned on.

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