Multi-loss port test board and optical module test system
By designing a multi-loss port test board and using a layered wiring structure to replace the switch for testing, the problems of increased testing time and equipment investment in the existing technology are solved, and efficient testing of adapting different loss ports of LPO optical modules is achieved.
Patent Information
- Application Number
- CN202411715894.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-27
- Publication Date
- 2025-03-25
AI Technical Summary
The prior art relies on switches when testing the adaptation of different loss ports of LPO high-speed optical modules, resulting in an increase in test duration and an increase in equipment investment.
设计了一种多损耗端口测试板,采用分层布置的损耗布线层与光模块端口一一对应,每个损耗布线层设有若干PCB走线,通过信号通孔连接光模块端口和连接器,替代交换机进行测试。
Through the multi-loss port test board, the test time is reduced, the investment in test equipment is reduced, and efficient testing is achieved for adapting different loss ports of LPO optical modules.
Smart Images
Figure CN119697528A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of optical module testing, and in particular to a multi-loss port testing board and an optical module testing system. Background Art
[0002] In recent years, with the construction of data centers and the continuous development of AI needs, low-power LPO high-speed optical modules have gradually been commercialized. Since LPO high-speed optical modules use linear driver chips (drivers) instead of traditional digital processing chips (DSPs), the testing and verification of port adaptation with different losses can only rely on switches, which increases testing time and equipment investment. Summary of the invention
[0003] The purpose of the present invention is to overcome at least one defect in the prior art and provide a multi-loss port test board and an optical module test system. The multi-loss test board is used for testing the adaptation of different loss ports of an LPO optical module, replacing a switch, shortening the test time and reducing the investment in test equipment.
[0004] The technical solution of the present invention is implemented as follows: the present invention discloses a multi-loss port test board, including a multi-layer test board body, a surface of the multi-layer test board body is provided with a plurality of connectors and a plurality of optical module ports for connecting optical modules, a plurality of loss wiring layers arranged in layers are provided on the multi-layer test board body, the plurality of loss wiring layers correspond one-to-one to a plurality of optical module ports for connecting optical modules, each loss wiring layer is provided with a plurality of PCB traces, one end of each PCB trace is respectively connected to the optical module port directly or through a signal through hole, and the other end of each PCB trace is respectively connected to the connector directly or through a signal through hole.
[0005] Furthermore, there are three optical module ports, which are respectively a high-loss port, a medium-loss port and a low-loss port; there are three loss wiring layers, which are respectively a high-loss wiring layer, a medium-loss wiring layer and a low-loss wiring layer; the high-loss wiring layer corresponds to the high-loss port, the medium-loss wiring layer corresponds to the medium-loss port, and the low-loss wiring layer corresponds to the low-loss port.
[0006] Furthermore, three groups of connectors are provided on the surface of the multi-layer test board body, namely a high-loss connector group, a medium-loss connector group and a low-loss connector group. The high-loss connector group includes multiple high-loss connectors, the medium-loss connector group includes multiple medium-loss connectors, and the low-loss connector group includes multiple low-loss connectors. The high-loss connector group, the loss connector group and the low-loss connector group correspond to the high-loss port, the medium-loss port and the low-loss port respectively. The length of the PCB trace of the high-loss wiring layer is greater than the length of the corresponding PCB trace on the medium-loss wiring layer, and the length of the PCB trace of the medium-loss wiring layer is greater than the length of the corresponding PCB trace on the low-loss wiring layer.
[0007] Furthermore, the high-loss wiring layer is located on the L1 layer of the multi-layer test board body, the high-speed line refers to the L2 layer, and the high-speed signal transmission line type of the microstrip line is adopted. The medium-loss wiring layer is located on the L5 layer of the multi-layer test board body, and the stripline transmission line type is adopted, referring to the L4 / L6 layer. The low-loss wiring layer is located on the L3 layer of the multi-layer test board body, and the stripline transmission line type is referred to the L2 / L4 layer.
[0008] Furthermore, one end of each PCB trace of the high-loss wiring layer is connected to each pin of the high-loss port through a signal through-hole, and the other end of each PCB trace of the high-loss wiring layer is connected to each high-loss connector; one end of each PCB trace of the medium-loss wiring layer is connected to each pin of the medium-loss port through a signal through-hole, and the other end of each PCB trace of the medium-loss wiring layer is connected to each medium-loss connector through a signal through-hole; one end of each PCB trace of the low-loss wiring layer is connected to each pin of the low-loss port through a signal through-hole, and the other end of each PCB trace of the low-loss wiring layer is connected to each low-loss connector through a signal through-hole.
[0009] Furthermore, the multi-layer test board body has 12 layers, namely L1 layer, L2 layer, L3 layer, L4 layer, L5 layer, L6 layer, L7 layer, L8 layer, L9 layer, L10 layer, L11 layer, and L12 layer. The L1 layer is a signal layer, the L2 layer is a GND layer, the L3 layer is a signal layer, the L4 layer is a GND layer, the L5 layer is a signal layer, the L6 layer is a GND layer, the L7 layer is a GND layer, the L8 layer is a GND layer, the L9 layer is a GND layer, the L10 layer is a power layer, the L11 layer is a GND layer, and the L12 layer is a GND layer.
[0010] Furthermore, the boards used in the multi-layer test board body are FR4, M6, and M7 series, and the copper foil roughness has two specifications: RTF and HVLP;
[0011] The sheet material layers of the multi-layer test board body are, in order, the first PP material layer of the M6 series, the first PP material layer of the M7 series, the second PP material layer of the M7 series, the third PP material layer of the M7 series, the fourth PP material layer of the M7 series, the core layer of the FR4 series, the fifth PP material layer of the M7 series, the sixth PP material layer of the M7 series, the seventh PP material layer of the M7 series, the eighth PP material layer of the M7 series, and the second PP material layer of the M6 series;
[0012] The conductive layers of the multi-layer test board body are the first RTF layer, the second RTF layer, the first HVLP layer, the second HVLP layer, the third HVLP layer, the fourth HVLP layer, the fifth HVLP layer, the sixth HVLP layer, the seventh HVLP layer, the eighth HVLP layer, the third RTF layer, and the fourth RTF layer in sequence;
[0013] The first PP material layer of the M6 series is located between the first RTF layer and the second RTF layer, the first PP material layer of the M7 series is located between the second RTF layer and the first HVLP layer, the second PP material layer of the M7 series is located between the first HVLP layer and the second HVLP layer, the third PP material layer of the M7 series is located between the second HVLP layer and the third HVLP layer, the fourth PP material layer of the M7 series is located between the third HVLP layer and the fourth HVLP layer, the core layer is located between the fourth HVLP layer and the fifth HVLP layer, the fifth PP material layer of the M7 series is located between the fifth HVLP layer and the sixth HVLP layer, the sixth PP material layer of the M7 series is located between the sixth HVLP layer and the seventh HVLP layer, the seventh PP material layer of the M7 series is located between the seventh HVLP layer and the eighth HVLP layer, the eighth PP material layer of the M7 series is located between the eighth HVLP layer and the third RTF layer, and the second PP material layer of the M6 series is located between the third RTF layer and the fourth RTF layer.
[0014] The present invention also discloses an optical module testing system, comprising a testing device and the multi-loss port testing board as described above, wherein the testing device is connected to a connector of the multi-loss port testing board.
[0015] Furthermore, the test equipment includes a bit error tester, which is connected to a transmitting end connector and a receiving end connector among several connectors. The test signal sent by the bit error tester passes through the transmitting end connector, PCB traces, and the optical module port in sequence, and then enters the optical module connected to the optical module port for electro-optical conversion. The optical signal sent by the optical module is transmitted to another optical module through optical fiber, and the other optical module performs photoelectric conversion on the optical signal. After being converted into an electrical signal, it returns to the bit error tester through another optical module port and the receiving end connector in sequence to complete the bit error test.
[0016] Furthermore, the test equipment includes a code generator and an optical eye diagram instrument. The code generator is connected to a transmitter connector among several connectors. The test signal sent by the code generator passes through the transmitter connector, PCB traces, and optical module port in sequence, and then enters the optical module connected to the optical module port for electro-optical conversion. The optical eye diagram instrument is used to capture the eye diagram signal at the output end of the optical module.
[0017] The present invention has at least the following beneficial effects:
[0018] 1. The multilayer test board body of the present invention is provided with a plurality of loss wiring layers arranged in layers, the plurality of loss wiring layers correspond one-to-one to a plurality of optical module ports for connecting optical modules, each loss wiring layer is provided with a plurality of PCB traces, one end of each PCB trace is connected to the optical module port directly or through a signal through hole, and the other end of each PCB trace is connected to the connector directly or through a signal through hole. The present invention adopts a layered wiring method to reduce the size of the test board.
[0019] 2. The present invention uses different loss plates to optimize costs.
[0020] 3. The present invention designs different transmission line structures and transmission line lengths to achieve different losses. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 A schematic diagram of a multi-loss port test board provided by an embodiment of the present invention;
[0022] Figure 2 A schematic diagram of a PCB stacking design of a multi-loss port test board provided by an embodiment of the present invention;
[0023] Figure 3 A schematic diagram of the front layout of a multi-loss port test board provided by an embodiment of the present invention;
[0024] Figure 4 A schematic diagram of the reverse layout of a multi-loss port test board provided by an embodiment of the present invention;
[0025] Figure 5 A schematic diagram of high loss port wiring (L1 layer) of a multi-loss port test board according to an embodiment of the present invention;
[0026] Figure 6 A schematic diagram of mid loss port wiring (L5 layer) of a multi-loss port test board according to an embodiment of the present invention;
[0027] Figure 7 A schematic diagram of low loss port wiring (L3 layer) of a multi-loss port test board according to an embodiment of the present invention;
[0028] Figure 8 A schematic diagram of an eye diagram test using a high-loss port provided by an embodiment of the present invention;
[0029] Fig. 9 A schematic diagram of an eye diagram test using a loss port provided in an embodiment of the present invention;
[0030] Fig.10 A schematic diagram of an eye diagram test using a low-loss port provided by an embodiment of the present invention;
[0031] Fig.11 A schematic diagram of a bit error rate test provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0032] In order to enable those skilled in the art to better understand the technical solution of the present disclosure, the present disclosure is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.
[0033] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described target changes, the relative positional relationship may also change accordingly.
[0034] In each of the accompanying drawings, identical elements are represented by similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not all drawn to scale. In addition, some well-known parts may not be shown in the drawings.
[0035] Embodiment 1
[0036] See also Figures 1 to 7The embodiment of the present invention discloses a multi-loss port test board, including a multi-layer test board body, a surface of the multi-layer test board body is provided with a plurality of connectors (i.e., a high-speed connector 1) and a plurality of optical module ports for connecting optical modules (the optical module ports are optical module connectors, i.e., a high-speed connector 2), a plurality of loss wiring layers arranged in layers are provided on the multi-layer test board body, the plurality of loss wiring layers correspond one-to-one to the plurality of optical module ports for connecting optical modules, each loss wiring layer is provided with a plurality of PCB traces, one end of each PCB trace is respectively connected to the optical module port directly or through a signal through hole, and the other end of each PCB trace is respectively connected to the connector directly or through a signal through hole.
[0037] The multi-loss port test board of the present invention includes not only connectors and optical module ports (ports with three types of losses) but also a high-speed cage and a DC interface, etc., for simulating the scenarios of LPO optical modules at different loss ports of a switch.
[0038] Furthermore, the connector includes but is not limited to 1.85 / 2.4 / 2.92mm SMA.
[0039] Furthermore, the optical module ports include but are not limited to 400G / 800G / 1.6T QSFDD / OSFP packaged ports.
[0040] Furthermore, the high-speed cage adopts but is not limited to QSFPDD / OSFP packaging.
[0041] Furthermore, there are three optical module ports, that is, the present invention has three loss ports, which are respectively a high-loss port, a medium-loss port and a low-loss port. There are three loss wiring layers, which are respectively a high-loss wiring layer, a medium-loss wiring layer and a low-loss wiring layer. The high-loss wiring layer corresponds to the high-loss port, the medium-loss wiring layer corresponds to the medium-loss port, and the low-loss wiring layer corresponds to the low-loss port.
[0042] Furthermore, three groups of connectors are provided on the surface of the multi-layer test board body, namely a high-loss connector group, a medium-loss connector group and a low-loss connector group. The high-loss connector group includes multiple high-loss connectors, the medium-loss connector group includes multiple medium-loss connectors, and the low-loss connector group includes multiple low-loss connectors. The high-loss connector group, the loss connector group and the low-loss connector group correspond to the high-loss port, the medium-loss port and the low-loss port respectively. The length of the PCB trace of the high-loss wiring layer is greater than the length of the corresponding PCB trace on the medium-loss wiring layer, and the length of the PCB trace of the medium-loss wiring layer is greater than the length of the corresponding PCB trace on the low-loss wiring layer.
[0043] Furthermore, the high-loss wiring layer is located on the L1 layer of the multi-layer test board body, the high-speed line refers to the L2 layer, and the high-speed signal transmission line type of the microstrip line is adopted. The medium-loss wiring layer is located on the L5 layer of the multi-layer test board body, and the stripline transmission line type is adopted, referring to the L4 / L6 layer. The low-loss wiring layer is located on the L3 layer of the multi-layer test board body, and the stripline transmission line type is referred to the L2 / L4 layer.
[0044] Furthermore, one end of each PCB trace of the high-loss wiring layer is connected to each pin of the high-loss port through a signal through-hole, and the other end of each PCB trace of the high-loss wiring layer is connected to each high-loss connector; one end of each PCB trace of the medium-loss wiring layer is connected to each pin of the medium-loss port through a signal through-hole, and the other end of each PCB trace of the medium-loss wiring layer is connected to each medium-loss connector through a signal through-hole; one end of each PCB trace of the low-loss wiring layer is connected to each pin of the low-loss port through a signal through-hole, and the other end of each PCB trace of the low-loss wiring layer is connected to each low-loss connector through a signal through-hole.
[0045] The high loss port, medium loss port and low loss port can be placed on the same surface of the multilayer test board body or on different surfaces. Preferably, the high loss port, medium loss port and low loss port are placed on different surfaces of the multilayer test board body.
[0046] In some embodiments, the high-loss port is arranged on the front side of the multi-layer test board body, the medium-loss port and the low-loss port are arranged on the back side of the multi-layer test board body, and the high-loss connector, the loss connector and the low-loss connector are arranged on the back side of the multi-layer test board body.
[0047] Furthermore, the multi-layer test board body has 12 layers, namely L1 layer, L2 layer, L3 layer, L4 layer, L5 layer, L6 layer, L7 layer, L8 layer, L9 layer, L10 layer, L11 layer, and L12 layer. The L1 layer is a signal layer, the L2 layer is a GND layer, the L3 layer is a signal layer, the L4 layer is a GND layer, the L5 layer is a signal layer, the L6 layer is a GND layer, the L7 layer is a GND layer, the L8 layer is a GND layer, the L9 layer is a GND layer, the L10 layer is a power layer, the L11 layer is a GND layer, and the L12 layer is a GND layer.
[0048] Furthermore, the boards used in the multi-layer test board body are FR4, M6, and M7 series, and the copper foil roughness has two specifications: RTF and HVLP;
[0049] The sheet material layers of the multi-layer test board body are, in order, the first PP material layer of the M6 series, the first PP material layer of the M7 series, the second PP material layer of the M7 series, the third PP material layer of the M7 series, the fourth PP material layer of the M7 series, the core layer of the FR4 series, the fifth PP material layer of the M7 series, the sixth PP material layer of the M7 series, the seventh PP material layer of the M7 series, the eighth PP material layer of the M7 series, and the second PP material layer of the M6 series;
[0050] The conductive layers of the multi-layer test board body are the first RTF layer, the second RTF layer, the first HVLP layer, the second HVLP layer, the third HVLP layer, the fourth HVLP layer, the fifth HVLP layer, the sixth HVLP layer, the seventh HVLP layer, the eighth HVLP layer, the third RTF layer, and the fourth RTF layer in sequence;
[0051] The first PP material layer of the M6 series is located between the first RTF layer and the second RTF layer, the first PP material layer of the M7 series is located between the second RTF layer and the first HVLP layer, the second PP material layer of the M7 series is located between the first HVLP layer and the second HVLP layer, the third PP material layer of the M7 series is located between the second HVLP layer and the third HVLP layer, the fourth PP material layer of the M7 series is located between the third HVLP layer and the fourth HVLP layer, the core layer is located between the fourth HVLP layer and the fifth HVLP layer, the fifth PP material layer of the M7 series is located between the fifth HVLP layer and the sixth HVLP layer, the sixth PP material layer of the M7 series is located between the sixth HVLP layer and the seventh HVLP layer, the seventh PP material layer of the M7 series is located between the seventh HVLP layer and the eighth HVLP layer, the eighth PP material layer of the M7 series is located between the eighth HVLP layer and the third RTF layer, and the second PP material layer of the M6 series is located between the third RTF layer and the fourth RTF layer.
[0052] The PCB design of this embodiment has a total of 12 layers, and the materials used are FR4, M6, and M7 series, and the copper foil roughness has two specifications of RTF and HVLP; layered wiring is adopted, in which the high-loss port wiring is on the L1 layer, the high-speed line refers to the L2 layer, and the high-speed signal transmission line type of the microstrip line is adopted. L1 / L2 uses conventional roughness copper foil RTF and M6 series PP material, and the connector and port are connected through signal through holes; the medium-loss port wiring is on the L5 layer, and the transmission line type of the stripline is referred to the L4 / L6 layer. L4 / L5 / L6 all use low-roughness copper foil HVLP and low-loss M7 series PP material; the low-loss port wiring is on the L3 layer, and the transmission line type of the stripline is referred to the L2 / L4 layer, and L3 / L4 all use low-roughness copper foil HVLP and low-loss M7 series PP material.
[0053] Embodiment 2
[0054] The embodiment of the present invention further discloses an optical module testing system, comprising a testing device and the multi-loss port testing board as described in the first embodiment, wherein the testing device is connected to a connector of the multi-loss port testing board.
[0055] In some embodiments, see Figures 8 to 10 When the multi-loss port test board of the present invention is applied to the eye diagram test scenario: the pattern generator is connected to the high-speed connector of the multi-loss test and outputs a high-speed signal, which passes through the PCB traces and ports of the test board, enters the interior of the optical module and generates electro-optical conversion, and finally captures the eye diagram signal through the optical eye diagram at the output end of the optical module; the eye diagram test can be performed on the high / medium / low loss ports respectively, and the test environment does not need to be changed frequently.
[0056] The test equipment includes a code generator and an optical eye diagram instrument. The code generator is connected to a transmitter connector among a plurality of connectors. The test signal sent by the code generator passes through the transmitter connector, PCB routing, and an optical module port in sequence, and then enters an optical module connected to the optical module port for electro-optical conversion. The optical eye diagram instrument is used to capture an eye diagram signal at the output end of the optical module.
[0057] In other embodiments, see Fig.11 When the multi-loss port test board of the present invention is applied to a bit error rate test scenario: the test equipment includes a bit error tester, which is connected to a transmitter connector and a receiver connector among a plurality of connectors. The test signal sent by the bit error tester passes through the transmitter connector, PCB wiring, and the optical module port in sequence, and then enters the optical module connected to the optical module port for electro-optical conversion. The optical signal sent by the optical module is transmitted to another optical module through an optical fiber. The other optical module performs photoelectric conversion on the optical signal. After being converted into an electrical signal, it passes through another optical module port and the receiver connector in sequence and returns to the bit error tester to complete the bit error test.
[0058] The bit error meter tester (BERT) first connects to the connector on the transmitting end of the test board, passes through the PCB traces and ports of the test board, enters the optical module and generates electrical-optical conversion. The optical signal is transmitted to another module through optical fiber. The other module can be at other loss ports on the same test board or at any loss type port on another test board. The optical signal entering the optical module generates photoelectric conversion, which is converted into an electrical signal and then output to the connector on the receiving end of the test board through the port. Finally, the signal returns to the bit error meter tester to complete the bit error test.
[0059] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.
Claims
1. A multi-loss port test board, characterized in that : It includes a multi-layer test board body, the surface of which is provided with a plurality of connectors and a plurality of optical module ports for connecting optical modules, the multi-layer test board body is provided with a plurality of loss wiring layers arranged in layers, the plurality of loss wiring layers correspond one-to-one to the plurality of optical module ports for connecting optical modules, each loss wiring layer is provided with a plurality of PCB traces, one end of each PCB trace is connected to the optical module port directly or through a signal through hole, and the other end of each PCB trace is connected to the connector directly or through a signal through hole.
2. The multi-loss port test board according to claim 1, characterized in that: There are three optical module ports, which are respectively a high-loss port, a medium-loss port and a low-loss port. There are three loss wiring layers, which are respectively a high-loss wiring layer, a medium-loss wiring layer and a low-loss wiring layer. The high-loss wiring layer corresponds to the high-loss port, the medium-loss wiring layer corresponds to the medium-loss port, and the low-loss wiring layer corresponds to the low-loss port.
3. The multi-loss port test board according to claim 2, characterized in that: The surface of the multi-layer test board body is provided with three groups of connectors, namely a high-loss connector group, a medium-loss connector group and a low-loss connector group. The high-loss connector group includes multiple high-loss connectors, the medium-loss connector group includes multiple medium-loss connectors, and the low-loss connector group includes multiple low-loss connectors. The high-loss connector group, the loss connector group and the low-loss connector group correspond to the high-loss port, the medium-loss port and the low-loss port respectively. The length of the PCB trace of the high-loss wiring layer is greater than the length of the corresponding PCB trace on the medium-loss wiring layer, and the length of the PCB trace of the medium-loss wiring layer is greater than the length of the corresponding PCB trace on the low-loss wiring layer.
4. The multi-loss port test board according to claim 3, characterized in that: The high-loss wiring layer is located on the L1 layer of the multi-layer test board body, the high-speed line refers to the L2 layer, and the high-speed signal transmission line type of the microstrip line is adopted. The medium-loss wiring layer is located on the L5 layer of the multi-layer test board body, and the transmission line type of the stripline is adopted, referring to the L4 / L6 layer. The low-loss wiring layer is located on the L3 layer of the multi-layer test board body, and the transmission line type of the stripline is referred to the L2 / L4 layer.
5. The multi-loss port test board according to claim 4, characterized in that: One end of each PCB trace of the high-loss wiring layer is connected to each pin of the high-loss port through a signal through-hole, and the other end of each PCB trace of the high-loss wiring layer is connected to each high-loss connector; one end of each PCB trace of the medium-loss wiring layer is connected to each pin of the medium-loss port through a signal through-hole, and the other end of each PCB trace of the medium-loss wiring layer is connected to each medium-loss connector through a signal through-hole; one end of each PCB trace of the low-loss wiring layer is connected to each pin of the low-loss port through a signal through-hole, and the other end of each PCB trace of the low-loss wiring layer is connected to each low-loss connector through a signal through-hole.
6. The multi-loss port test board according to any one of claims 1 to 5, characterized in that: The multi-layer test board body has 12 layers, namely L1 layer, L2 layer, L3 layer, L4 layer, L5 layer, L6 layer, L7 layer, L8 layer, L9 layer, L10 layer, L11 layer, and L12 layer. The L1 layer is a signal layer, the L2 layer is a GND layer, the L3 layer is a signal layer, the L4 layer is a GND layer, the L5 layer is a signal layer, the L6 layer is a GND layer, the L7 layer is a GND layer, the L8 layer is a GND layer, the L9 layer is a GND layer, the L10 layer is a power layer, the L11 layer is a GND layer, and the L12 layer is a GND layer.
7. The multi-loss port test board according to claim 6, characterized in that: The materials used in the multi-layer test board are FR4, M6, and M7 series, and the copper foil roughness has two specifications: RTF and HVLP; The sheet material layers of the multi-layer test board body are, in order, the first PP material layer of the M6 series, the first PP material layer of the M7 series, the second PP material layer of the M7 series, the third PP material layer of the M7 series, the fourth PP material layer of the M7 series, the core layer of the FR4 series, the fifth PP material layer of the M7 series, the sixth PP material layer of the M7 series, the seventh PP material layer of the M7 series, the eighth PP material layer of the M7 series, and the second PP material layer of the M6 series; The conductive layers of the multi-layer test board body are the first RTF layer, the second RTF layer, the first HVLP layer, the second HVLP layer, the third HVLP layer, the fourth HVLP layer, the fifth HVLP layer, the sixth HVLP layer, the seventh HVLP layer, the eighth HVLP layer, the third RTF layer, and the fourth RTF layer in sequence; The first PP material layer of the M6 series is located between the first RTF layer and the second RTF layer, the first PP material layer of the M7 series is located between the second RTF layer and the first HVLP layer, the second PP material layer of the M7 series is located between the first HVLP layer and the second HVLP layer, the third PP material layer of the M7 series is located between the second HVLP layer and the third HVLP layer, the fourth PP material layer of the M7 series is located between the third HVLP layer and the fourth HVLP layer, the core layer is located between the fourth HVLP layer and the fifth HVLP layer, the fifth PP material layer of the M7 series is located between the fifth HVLP layer and the sixth HVLP layer, the sixth PP material layer of the M7 series is located between the sixth HVLP layer and the seventh HVLP layer, the seventh PP material layer of the M7 series is located between the seventh HVLP layer and the eighth HVLP layer, the eighth PP material layer of the M7 series is located between the eighth HVLP layer and the third RTF layer, and the second PP material layer of the M6 series is located between the third RTF layer and the fourth RTF layer.
8. An optical module testing system, characterized in that : comprising a test device and a multi-loss port test board as described in any one of claims 1 to 7, wherein the test device is connected to a connector of the multi-loss port test board.
9. The optical module testing system according to claim 8, characterized in that: The test equipment includes a bit error tester, which is connected to a transmitter connector and a receiver connector among a plurality of connectors. The test signal sent by the bit error tester passes through the transmitter connector, PCB wiring, and the optical module port in sequence, and then enters the optical module connected to the optical module port for electro-optical conversion. The optical signal sent by the optical module is transmitted to another optical module through an optical fiber. The other optical module performs photoelectric conversion on the optical signal, and after being converted into an electrical signal, it returns to the bit error tester through another optical module port and the receiver connector in sequence to complete the bit error test.
10. The optical module testing system according to claim 8, characterized in that: The test equipment includes a code generator and an optical eye diagram instrument. The code generator is connected to a transmitter connector among a plurality of connectors. The test signal sent by the code generator passes through the transmitter connector, PCB routing, and an optical module port in sequence, and then enters an optical module connected to the optical module port for electro-optical conversion. The optical eye diagram instrument is used to capture an eye diagram signal at the output end of the optical module.